CN111243487B - Display panel, driving method of display panel and display device - Google Patents
Display panel, driving method of display panel and display device Download PDFInfo
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- CN111243487B CN111243487B CN202010190282.1A CN202010190282A CN111243487B CN 111243487 B CN111243487 B CN 111243487B CN 202010190282 A CN202010190282 A CN 202010190282A CN 111243487 B CN111243487 B CN 111243487B
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- 230000002457 bidirectional effect Effects 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 18
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000001680 brushing effect Effects 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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Abstract
The invention discloses a display panel, a driving method of the display panel and a display device. The display panel comprises a control signal driving circuit; the control signal driving circuit comprises a cascaded N-stage shift register and N-1 switch units; the kth switch unit is arranged between the kth-stage shift register and the (k + 1) th-stage shift register and is used for controlling the conduction or the disconnection between the shift registers of adjacent stages. The switch unit is arranged between the adjacent stages of the shift registers of the control signal driving circuit, and the conduction time of the switch unit is determined according to the display area of the display panel part, so that the display area which is normally displayed when the display panel part displays can be normally displayed by the control signal, the display area of other parts cannot be displayed by the control signal, and the whole power consumption of the display panel part can be reduced. Meanwhile, the probability of misoperation can be reduced, and the accuracy of the display panel during partial display is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel, a driving method of the display panel and a display device.
Background
In order to meet better experience effect of customers, the concept of a folding screen is provided in the display field. The development of the folding screen injects new vitality into the display field. When the folding screen displays on a half screen, the display is abnormal due to easy misoperation, and the folding screen has larger power consumption and is not beneficial to improving the display efficiency of the folding screen.
Disclosure of Invention
The invention provides a display panel, a driving method of the display panel and a display device, which are used for reducing the power consumption of the display panel during partial display and improving the accuracy of the display panel.
In a first aspect, an embodiment of the present invention provides a display panel, including a control signal driving circuit;
the control signal driving circuit comprises cascaded N-stage shift registers and N-1 switch units; the kth switch unit is arranged between the kth-stage shift register and the (k + 1) th-stage shift register along a first direction, and is used for controlling the connection or disconnection between the shift registers of adjacent stages, wherein the first direction is a direction in which the first-stage shift register of the control signal driving circuit points to the nth-stage shift register, k is an integer larger than zero and smaller than N-1, and N is an integer larger than 1.
Optionally, the control signal driving circuit includes a gate driving circuit;
the grid driving circuit comprises cascaded N stages of first shift registers; the first shift register of each stage is connected with N scanning signal lines of the display panel in a one-to-one correspondence manner, and the grid drive circuit further comprises N-1 first switch units; along a first direction, the kth first switch unit is arranged between the kth-stage first shift register and the (k + 1) -th-stage first shift register, and the kth first switch unit is used for controlling the connection or disconnection between the first shift registers of adjacent stages, wherein the first direction is a direction in which the first-stage first shift register of the gate driving circuit points to the nth-stage first shift register, k is an integer greater than zero and less than N-1, and N is an integer greater than 1.
Optionally, the kth first switching unit includes a switching transistor; the first pole of the switch transistor is electrically connected with the output end of the kth-stage first shift register, the second pole of the switch transistor is electrically connected with the initial signal input end of the (k + 1) -th-stage first shift register, and the grid electrode of the switch transistor is electrically connected with the switch control signal line of the display panel.
Optionally, the display panel further includes a reference voltage input unit; the reference voltage input unit is electrically connected with a reference voltage signal line of the display panel, and is used for outputting a first reference voltage signal when the first switch unit is turned on and outputting a second reference voltage signal when the first switch unit is turned off.
Optionally, the reference voltage input unit includes a first transistor and a second transistor; the first electrode of the first transistor is electrically connected with a first reference voltage signal line, the first electrode of the second transistor is electrically connected with a second reference voltage signal line, the second electrode of the first transistor and the second electrode of the second transistor are electrically connected with the reference voltage signal line, the grid electrode of the first transistor is electrically connected with a first control signal line of the display panel, and the grid electrode of the second transistor is electrically connected with a second control signal line of the display panel.
Optionally, the switch transistors of the first switch unit, the first transistor, and the second transistor are of the same type, and the switch control signal line of the display panel is multiplexed as the first control signal line; the first control signal provided by the first control signal line and the second control signal provided by the second control signal line are opposite.
Optionally, the first shift register is a bidirectional shift register.
Optionally, the control signal driving circuit further includes a light emitting control driving circuit;
the light-emitting control driving circuit comprises cascaded N stages of second shift registers; the second shift register of each stage is correspondingly connected with N light-emitting control signal lines of the display panel one by one, and the light-emitting control drive circuit also comprises N-1 second switch units; along the first direction, the kth second switch unit is arranged between the kth-stage second shift register and the (k + 1) th-stage second shift register, and the kth second switch unit is used for controlling the connection or disconnection between the second shift registers of adjacent stages.
In a second aspect, an embodiment of the present invention provides a method for driving a display panel, where the method is used to drive the display panel provided in any embodiment of the present invention, and the method includes:
in the first stage, a first switch control signal is provided to a switch unit to control the switch unit to be conducted, so that the shift registers cascaded from the 1 st stage to the (m + 1) th stage output control signals step by step; wherein m is an integer greater than 0 and less than N-2;
and in the second stage, a second switch control signal is provided to the switch unit to control the switch unit to be cut off, so that the shift registers cascaded from the (m + 2) th stage to the Nth stage do not output the control signal.
In a second aspect, embodiments of the present invention provide a display device, including the display panel provided in any embodiment of the present invention.
According to the technical scheme of the embodiment of the invention, the switch unit is arranged between the adjacent stages of the shift registers in the control signal driving circuit, and the conducting time of the switch unit is determined according to the number of the shift registers corresponding to the normally displayed display area when the display panel part displays, so that the normally displayed display area can be normally displayed by the control signal when the display panel part displays, and the display areas of other parts can not be displayed by the control signal. In addition, display data do not need to be provided for display areas of other parts, the probability of misoperation is reduced, and therefore the accuracy of the display panel in partial display can be improved.
Drawings
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the invention;
fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 4 is a timing diagram of the display panel of FIG. 3;
fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 6 is a timing diagram corresponding to the display panel of FIG. 5;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 9 is a flowchart illustrating a driving method of a display panel according to an embodiment of the invention;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings, not all of them.
When the folding screen is in a half-screen state, the folding screen has two folding modes, namely inward folding and outward folding. The inward folding is that the display screen is folded inwards relatively, and the outward folding is that the display screen is folded outwards back to back. When the folding screen is folded outwards, the folding screen can adopt half-screen display. In the prior art, half screen display of the folding screen can be normally displayed through half of the folding screen, and half of the folding screen is black-brushed display. And (3) performing black display on half of the folding screens, namely providing 0-gray-scale display data for the half of the folding screens, so that the pictures displayed by the half of the folding screens are black pictures. The half-screen display of the folding screen is in a black display state, so that power is consumed, and when the half-screen display of the folding screen displays, the power consumption of the folding screen is larger than that of a non-folding screen with the same resolution as that of the normally displayed half-screen, namely the power consumption of the folding screen is larger. In addition, because the normal display part and the black brushing part of the folding screen need to provide display data, misoperation is easy to occur, and abnormal display occurs in the normal display part and the black brushing part of the folding screen.
In view of the above technical problems, an embodiment of the present invention provides a display panel. The display panel comprises a control signal driving circuit; the control signal driving circuit comprises a cascaded N-stage shift register and N-1 switch units; along a first direction, the kth switch unit is arranged between the kth-stage shift register and the (k + 1) th-stage shift register and is used for controlling the connection or disconnection between the shift registers of adjacent stages, wherein the first direction is the direction in which the first-stage shift register of the control signal driving circuit points to the Nth-stage shift register, k is an integer larger than zero and smaller than N-1, and N is an integer larger than 1.
Specifically, in the cascaded shift register, an output signal of the shift register of the previous stage serves as a start signal of the shift register of the next stage, so that the shift register of the next stage outputs a signal under the action of the output signal of the shift register of the previous stage, that is, the cascaded N-stage shift register can output a control signal step by step, and control the pixel circuit corresponding to the cascaded N-stage shift register to drive the light-emitting device to emit light. The switch unit is connected in series between two adjacent stages of shift registers, when the switch unit is turned on, the control signal output by the shift register of the previous stage can be output to the shift register of the next stage, and the shift register of the next stage can output the control signal. When the switch unit is turned off, the control signal output by the shift register of the previous stage cannot be output to the shift register of the next stage, and the shift register of the next stage cannot output the control signal. Therefore, the number of the N-stage shift register capable of outputting the control signal can be controlled by controlling the on or off of the switching unit, so that the number of rows of the pixel circuit driving the light emitting device to emit light can be determined. When the display panel is used for manufacturing a folding screen, under the folding state of the folding screen, the display area of the display panel can be divided into a first display area and a second display area, the pixel circuit of the first display area corresponds to the first-level to m + 1-level shift registers, and the pixel circuit of the second display area corresponds to the m + 2-level to N-level shift registers. When the first display area is used for normal display in a folded state, the switching unit is controlled to be switched on within the time of the previous m/N frame within the time of one frame, and then the first-stage shift register to the (m + 1) th-stage shift register in the cascaded N-stage shift registers can output control signals to control the pixel circuit of the first display area to normally display. When the second display area is not displayed in the folded state, the switching unit is in the off state for a time of (1-m/N) frame after the control for a time of one frame. After the m-th stage shift register outputs the control signal, the switch unit is turned off, so that the control signal output by the m + 1-th stage shift register cannot be output to the m + 2-th stage shift register, the control signal cannot be normally output from the m + 2-th stage shift register to the N-th stage shift register, and the pixel circuit of the second display area cannot be controlled to display. Therefore, the switch unit is arranged between the adjacent stages of the shift registers, and when the display area is displayed according to the display panel part, the number of the shift registers corresponding to the display area which is normally displayed determines the on-time of the switch unit, so that the display area which is normally displayed when the display panel part is displayed can be normally displayed by providing the control signal, the display area of other parts can not be displayed by providing the control signal, and compared with the black-brushing display in the prior art, the power consumption of the display area of other parts can be reduced, and the overall power consumption of the display panel can be reduced when the display panel part is displayed. In addition, need not to provide display data for the display area of other parts, reduce the probability that the maloperation appears to accuracy when can improving display panel part and show.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention. As shown in fig. 1, the control signal driving circuit illustratively includes a gate driving circuit 110; the gate driving circuit 110 includes cascaded N stages of first shift registers 111; the first shift register 111 of each stage is connected to the N scanning signal lines 120 of the display panel in a one-to-one correspondence, and the gate driving circuit 110 further includes N-1 first switching units 112; along a first direction X, the kth first switch unit 112 is disposed between the kth stage first shift register 111 and the (k + 1) th stage first shift register 111, and the kth first switch unit 112 is configured to control on/off between the first shift registers 111 of adjacent stages, where the first direction X is a direction in which the first stage first shift register 111 of the gate driving circuit 110 points to the nth stage first shift register 111, k is an integer greater than zero and less than N-1, and N is an integer greater than 1.
Specifically, the cascaded N-stage first shift register 111 may output the scan signal stage by stage. As shown in fig. 1, each stage of the first shift register 111 includes a first clock signal input terminal CK1, a second clock signal input terminal CK2, a high level signal input terminal VGH, a low level signal input terminal VGL, and a start signal input terminal STV. The high-level signal input terminal VGH of each stage of the first shift register 111 is electrically connected to the high-level signal line VH, and the low-level signal input terminal VGL of each stage of the first shift register 111 is electrically connected to the low-level signal line VL. The first clock signal input terminal CK1 of the odd-numbered first shift register 111 and the second clock signal input terminal CK2 of the even-numbered first shift register 111 are electrically connected to a first clock signal line CK1, the first clock signal input terminal CK1 of the even-numbered first shift register 111 and the second clock signal input terminal CK2 of the odd-numbered first shift register 111 are electrically connected to a second clock signal line CK2, the start signal input terminal STV of the first shift register 111 of the first stage is electrically connected to a start signal line STV, and the start signal input terminal STV of the first shift register 111 of the next stage is electrically connected to the output terminal VOUT of the first shift register 111 of the previous stage. When the gate driving circuit 110 is operated, the start signal line stv outputs a start signal, and the first stage first shift register 111 is operated to output a scan signal to the first scan signal line 120. And simultaneously outputs the scan signal to the start signal input terminal STV of the second stage first shift register 111, so that the second stage first shift register 111 starts to operate, outputs the scan signal to the second scan signal line 120, and simultaneously outputs the scan signal to the start signal input terminal STV of the third stage first shift register 111. And so on, thereby realizing that the cascaded first shift register 111 outputs the scanning signal stage by stage. The scanning signals outputted step by step are outputted to the N scanning signal lines 120 correspondingly connected thereto. The display panel may further include pixel circuits 130, and each of the scan signal lines 120 is electrically connected to a row of the pixel circuits 130, and provides a scan signal to the row of the pixel circuits 130 to drive the pixel circuits 130 to display. Fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, and as shown in fig. 2, a SCAN signal input terminal SCAN of the pixel circuit is electrically connected to a SCAN signal line 120 of a corresponding row, so that the pixel circuit drives the pixel circuit to operate according to a SCAN signal provided by the SCAN signal line 120, and drives the light emitting device to emit light.
The gate driving circuit 110 further includes a first switch unit 112, and the first switch unit 112 is sequentially disposed between two adjacent stages of the first shift register 111. When the first switch unit 112 is turned on, the scan signal output from the first shift register 111 of the previous stage is output to the start signal input terminal STV of the first shift register 111 of the next stage, so that the first shift register 111 of the next stage is operated to output the scan signal. When the first switch unit 112 is turned off, the scan signal output from the first shift register 111 of the previous stage cannot be output to the start signal input terminal STV of the first shift register 111 of the next stage, and the first shift register 111 of the next stage cannot normally operate, so that the scan signal cannot be output. Accordingly, the number of the first shift registers 111 capable of outputting the scan signal among the N-stage first shift registers 111 can be controlled by controlling the turn-on or turn-off of the first switching unit 112.
When the display panel is used for manufacturing a folding screen, in a folding state of the folding screen, a display area of the display panel can be divided into a first display area and a second display area, a pixel circuit 130 of the first display area corresponds to first-stage to (m + 1) th-stage first shift register 111, and a pixel circuit 130 of the second display area corresponds to (m + 2) th-nth-stage first shift register 111. When the first display region is used for normal display in the folded state, the first switching unit 112 is in the on state for a time of controlling the previous m/N frames within a time of one frame. After the cascaded first shift register 111 starts to work, the time from the first shift register 111 of the first stage to the first shift register 111 of the mth stage to output the scan signal is m/N frames, and the first switch unit 112 is in a conducting state during the time, so that the first shift register 111 of the first stage to the first shift register 111 of the (m + 1) th stage can output the scan signal, so that the pixel circuit 130 of the first display area can normally display. When the second display region is not displayed in the folded state, the first switching unit 112 is in the off state for a time of one frame, for a time of (1-m/N) frame after the control. That is, after the m-th stage first shift register 111 outputs the scan signal, the first switch unit 112 is turned off, so that the m + 2-th stage first shift register 111 cannot normally output the scan signal, that is, the pixel circuit 130 in the second display region cannot display the scan signal. Therefore, the first switch unit 112 is arranged between the first shift registers 111 of adjacent stages, and the on-time of the first switch unit 112 is determined according to the number of the first shift registers 111 corresponding to the display area which is normally displayed when the display panel is displayed in the partial display area, so that the display area which is normally displayed when the display panel is displayed in the partial display area can be normally displayed by providing the scanning signal, the display area of other parts can not be displayed by providing the scanning signal, and compared with the black-and-white display in the prior art, the display power consumption of the display area of other parts can be reduced, and the overall power consumption of the display panel can be reduced when the display panel is displayed in the partial display area. In addition, need not to provide display data for the display area of other parts, reduce the probability that the maloperation appears to accuracy when can improving display panel part and show.
Fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 3, the kth first switching unit 112 includes a switching transistor M; a first pole of the switching transistor M is electrically connected to the output terminal VOUT of the kth stage first shift register 111, a second pole of the switching transistor M is electrically connected to the start signal input terminal STV of the (k + 1) th stage first shift register 111, and a gate of the switching transistor M is electrically connected to the switching control signal line CLK of the display panel.
Specifically, referring to fig. 3, the switching transistor M is connected in series between the adjacent two stages of the first shift register 111. The switching transistor M may be a P-type transistor or an N-type transistor. The switching transistor M may be turned on or off by a switching control signal output from the switching control signal line CLK.
Illustratively, as shown in fig. 3, the switching transistor M may be a P-type transistor. At this time, the switching transistor M is turned off when the switching control signal output from the switching control signal line CLK is at a high level, and the switching transistor M is turned on when the switching control signal output from the switching control signal line CLK is at a low level. Fig. 4 is a timing diagram corresponding to the display panel of fig. 3. Where VH is a timing of a high level signal input from the high level signal line VH, VL is a timing of a low level signal input from the low level signal line VL, c1 is a timing of a first clock signal input from the first clock signal line ck1, c2 is a timing of a second clock signal input from the second clock signal line ck2, st is a timing of a start signal input from the start signal line stv, CLK is a timing of an output from the switch control signal line CLK, and T is a time of one frame of the display panel. As shown in fig. 3 and 4, when the pixel circuits 130 in the display area corresponding to the first M + 1-th stage first shift register 111 of the display panel normally display and the pixel circuits 130 in the display area corresponding to the (M + 1) -th to nth stages first shift registers 111 stop displaying, in an M/N frame T, the switch control signal line CLK outputs a low level, the switch transistor M is turned on, the first stage first shift register 111 to the (M + 1) -th stage first shift register 111 can realize cascade output of the scan signal, and the pixel circuits 130 in the display area corresponding to the first stage first shift register 111 to the (M + 1) -th stage first shift register 111 can normally display. In the following (1-M/N) frame T, the switch control signal line CLK outputs a high level, the switch transistor M is turned off, and at this time, the (M + 1) -th stage first shift register 111 and the (M + 2) -th stage first shift register 111 are turned off, so that the (M + 2) -th stage first shift register 111 cannot acquire an initial signal to operate, the (M + 2) -th to nth stage first shift registers 111 cannot output a scan signal, and the pixel circuits 130 in the display regions corresponding to the (M + 1) -th to nth stage first shift registers 111 stop displaying.
It should be noted that the switching transistor M may also be an N-type transistor. At this time, the switching transistor M is turned on when the switching control signal line CLK outputs a high level, and the switching transistor M is turned off when a low level is output, and the timing of the switching control signal output from the switching control signal line CLK can be adaptively changed according to the above-described process. In addition, m may be adaptively selected according to the number of rows that can be normally displayed in the display area, which is not limited herein.
Fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 5, the display panel further includes a reference voltage input unit 140; the reference voltage input unit 140 is electrically connected to a reference voltage signal line 150 of the display panel, and the reference voltage input unit 140 is configured to output a first reference voltage signal when the first switch unit 112 is turned on and output a second reference voltage signal when the first switch unit 112 is turned off.
Specifically, referring to fig. 2, the pixel circuit 130 further includes a reference voltage input terminal VREF, and the reference voltage input terminal VREF is electrically connected to the reference voltage signal line 150 and is used for providing an initialization voltage for the pixel circuit 130 in an initialization stage. The reference voltage input unit 140 may selectively output a first reference voltage signal and a second reference voltage signal. The first reference voltage signal is used to initialize the pixel circuit 130 when the first switch unit 112 is turned on, so as to improve the display uniformity of the display panel. The method specifically comprises the following steps: when the first switching unit 112 is turned on, the cascaded first shift register 111 may output a scan signal to the scan signal line 120, and at this time, the pixel circuit 130 connected to the scan signal line 120 may normally drive the light emitting device to emit light. Before the scan signal line 120 outputs the scan signal, the reference voltage input unit 140 outputs a first reference voltage signal to initialize the driving transistor in the pixel circuit 130, and then the pixel circuit 130 drives the light emitting device to emit light under the action of the scan signal, so that the light emitting uniformity of different light emitting devices of the display panel can be improved.
The second reference voltage signal is used to turn off the driving transistor in the pixel circuit 130 when the first switch unit 112 is turned off, so as to further ensure that the pixel circuit 130 cannot drive the light emitting device to emit light, thereby reducing the power consumption of the whole display panel when the display panel partially displays. Meanwhile, the probability of misoperation is further reduced, and the accuracy of the display panel part in displaying is improved. The method specifically comprises the following steps: when the first switch unit 112 is turned off, the cascaded first shift register 111 cannot output a scan signal to the scan signal line 120, and the pixel circuit 130 connected to the scan signal line 120 cannot drive the light emitting device to emit light. Before the scan signal line 120 outputs the scan signal, the reference voltage input unit 140 outputs a second reference voltage signal to turn off the driving transistor in the pixel circuit 130, so that the pixel circuit 130 is further ensured not to emit light, and the overall power consumption of the display panel is reduced. Meanwhile, the probability of misoperation is further reduced, and the accuracy of the display panel in partial display is improved.
For example, when the driving transistor in the pixel circuit 130 is a P-type transistor, the initialization voltage may be a low level. At this time, the first reference voltage signal may be at a low level for initializing the pixel circuit 130 when the first switching unit 112 is turned on, and the second reference voltage signal may be at a high level for turning off the driving transistor in the pixel circuit 130 when the first switching unit 112 is turned off.
With continued reference to fig. 5, the reference voltage input unit 140 includes a first transistor T1 and a second transistor T2; a first pole of the first transistor T1 is electrically connected to the first reference voltage signal line 141, a first pole of the second transistor T2 is electrically connected to the second reference voltage signal line 142, a second pole of the first transistor T1 and a second pole of the second transistor T2 are electrically connected to the reference voltage signal line 150, a gate of the first transistor T1 is electrically connected to the first control signal line ctrl1 of the display panel, and a gate of the second transistor T2 is electrically connected to the second control signal line ctrl2 of the display panel.
Specifically, the first control signal provided by the first control signal line ctrl1 and the second control signal provided by the second control signal line ctrl1 may control one of the first transistor T1 and the second transistor T2 to be turned on and off, so that the reference voltage input unit 140 implements gating, that is, the reference voltage input unit 140 outputs the first reference voltage signal or the second reference voltage signal at the same time. For example, when the first switching unit 112 is turned on, the first control signal provided by the first control signal line ctrl1 controls the first input terminal and the output terminal of the reference voltage input unit 140 to be turned on, the second control signal provided by the second control signal line ctrl1 controls the first input terminal and the output terminal of the reference voltage input unit 140 to be turned off, and at this time, the reference voltage input unit 140 outputs the first reference voltage signal input by the first reference voltage signal line 141, so as to initialize the pixel circuit 130. When the first switch unit 112 is turned off, the first control signal provided by the first control signal line ctrl1 controls the first input terminal and the output terminal of the reference voltage input unit 140 to be turned off, the second control signal provided by the second control signal line ctrl1 controls the first input terminal and the output terminal of the reference voltage input unit 140 to be turned on, and at this time, the reference voltage input unit 140 outputs the second reference voltage signal input by the first reference voltage signal line 141, so that the driving transistor in the pixel circuit 130 is turned off.
Specifically, the first transistor T1 and the second transistor T2 may be P-type transistors or N-type transistors. Referring to fig. 5, the first transistor T1 and the second transistor T2 may be both P-type transistors exemplarily. At this time, the first control signal supplied from the first control signal line ctrl1 and the second control signal supplied from the second control signal line ctrl1 are inverted signals. FIG. 6 is a timing diagram of the display panel of FIG. 5. Where CTRL1 is the timing of the first control signal provided by first control signal line CTRL1, and CTRL2 is the timing of the second control signal provided by second control signal line CTRL 2. When the switch control signal line CLK outputs a low level and the switch transistor M is turned on, the first control signal provided by the first control signal line ctrl1 is at a low level, the second control signal provided by the second control signal line ctrl1 is at a high level, at this time, the first transistor T1 is turned on, the second transistor T2 is turned off, and the reference voltage input unit 140 outputs the first reference voltage signal of the first reference voltage signal line 141, so as to initialize the pixel circuit 130. When the switch control signal line CLK outputs a high level and the switch transistor M is turned off, the first control signal provided by the first control signal line ctrl1 is at a high level, the second control signal provided by the second control signal line ctrl1 is at a low level, at this time, the first transistor T1 is turned off, the second transistor T2 is turned on, and the reference voltage input unit 140 outputs the second reference voltage signal of the second reference voltage signal line 142, so that the driving transistor in the pixel circuit 130 is turned off.
With continued reference to fig. 5, the switching transistor M, the first transistor T1, and the second transistor T2 of the first switching unit 112 are of the same type, and the switching control signal line CLK of the display panel is multiplexed as a first control signal line ctrl1; the first control signal supplied from the first control signal line ctrl1 and the second control signal supplied from the second control signal line ctrl2 are inverted.
Specifically, as shown in fig. 5, when the switching transistor M is turned on, the first transistor T1 is turned on at the same time, so that the first reference voltage provided by the first reference voltage signal line 141 is output to the reference voltage signal line 150 through the first transistor T1, the pixel circuit 130 is initialized, and the pixel circuit 130 drives the light emitting device to emit light. When the types of the switching transistor M and the first transistor T1 are the same, voltages input to the gates of the switching transistor M and the first transistor T1 may be the same, and at this time, the switching control signal line CLK of the display panel may be set to be multiplexed as the first control signal line ctrl1, so that the number of signal lines in the display panel may be reduced, which is beneficial to the layout and narrow frame design of the display panel. In addition, when the types of the first transistor T1 and the second transistor T2 are the same, the first control signal provided by the first control signal line ctrl1 and the second control signal provided by the second control signal line ctrl1 are inverted, thereby ensuring that only one of the first transistor T1 and the second transistor T2 is turned on, so that the reference voltage input unit 140 selectively outputs the first reference voltage signal or the second reference voltage signal.
Optionally, the first shift register is a bidirectional shift register.
Specifically, the bidirectional shift register can realize bidirectional scanning. For example, when the bidirectional shift register is scanned in the forward direction, the cascaded first shift registers can realize the scanning from the first stage to the last stage of the first shift register, the scanning signals are output stage by stage from the first stage, and the pixel circuits of the display panel start to drive the light-emitting devices to emit light from the first row. When the bidirectional shift register is in reverse scanning, the cascaded first shift register can realize that the last stage scans the first shift register stage by stage, scanning signals are output stage by the last stage, and the pixel circuit of the display panel starts to drive the light-emitting device to emit light by the last row. Therefore, by setting the first shift register as a bidirectional shift register, when the display panel partially displays, if the display panel partially displays the first to mth rows on the display panel, the bidirectional shift register may be driven by forward scanning, and the switch control signal controls the first switch unit to be turned on in the first m/N frame and to be turned off in the second (1-m/N) frame. If the display panel part displays the last line to the mth line of the display panel, the bidirectional shift register can be driven by reverse scanning, the switch control signal controls the first switch unit to be switched on in the first m/N frame, and controls the first switch unit to be switched off in the last (1-m/N) frame. Therefore, when the display panel part displays different positions on the display panel, the display panel part can normally display under the condition of not changing the time sequence of the switch control signal by changing the scanning direction of the bidirectional shift register, thereby reducing the difficulty of driving the display panel to display different parts and being beneficial to the design of a driving circuit of the display panel.
Fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the disclosure. As shown in fig. 7, the control signal driving circuit includes a light emission control driving circuit 160; the light emission control drive circuit 160 includes cascaded M stages of second shift registers 161; the second shift register 161 of each stage is connected to M light emission control signal lines 170 of the display panel in a one-to-one correspondence, and the light emission control driving circuit 160 further includes M-1 second switching units 162; in the first direction, the pth second switch unit 162 is disposed between the pth second shift register 161 and the p +1 second shift register 161, and the pth second switch unit 162 is used to control on or off between the second shift registers 161 of adjacent stages; wherein p is an integer greater than zero and less than M-1, and M is an integer greater than 1.
Specifically, the cascaded M-stage second shift register 161 may output the light emission control signal stage by stage. The light emission control signals outputted step by step are outputted to M light emission control signal lines 170 correspondingly connected thereto. The pixel circuit 130 further includes an emission control signal input terminal EM electrically connected to the emission control signal line 170 for inputting an emission control signal to control the pixel circuit 130 to drive the light emitting device to emit light during an emission phase of the pixel circuit 130.
The light emission control driving circuit 160 further includes a second switching unit 162, and the second switching unit 162 is sequentially disposed between two adjacent stages of the second shift register 161. When the second switch unit 162 is turned on, the light emitting control signal output from the second shift register 161 of the previous stage may be output to the second shift register 161 of the next stage, so that the second shift register 161 of the next stage operates to output the light emitting control signal. When the second switch unit 162 is turned off, the light emitting control signal output from the second shift register 161 of the previous stage cannot be output to the second shift register 161 of the next stage, and the second shift register 161 of the next stage cannot normally operate, so that the scan signal cannot be output. Therefore, the number of second shift registers 161 capable of outputting the light control signal among the M-stage second shift registers 161 can be controlled by controlling the on or off of the second switching unit 162.
When the display area of the display panel is divided into a first display area and a second display area according to the folded state, the pixel circuits 130 of the first display area correspond to the first stage second shift register 161 to the p +1 th stage second shift register 161, and the pixel circuits 130 of the second display area correspond to the p +2 th stage second shift register 161 to the M-th stage second shift register 161. When the first display region is used for normal display in the folded state, the second switching unit 162 is in the on state for a time of controlling the previous p/M frames within a time of one frame. After the cascaded second shift register 161 starts to operate, the time from the first-stage second shift register 161 to the p-th-stage second shift register 161 for outputting the light-emitting control signal is p/M frames, and during this time, the second switch unit 162 is in the on state, so that the first-stage second shift register 161 to the p + 1-th-stage second shift register 161 can output the light-emitting control signal, so that the pixel circuits 130 in the first display area can display normally. When the second display region is not displayed in the folded state, the second switching unit 162 is in the off state for a time of one frame and a time of (1-p/M) frame after the control. That is, after the p-th stage second shift register 161 outputs the light emitting control signal, the second switch unit 162 is turned off, so that the p + 2-th stage second shift register 161 cannot normally output the light emitting control signal, that is, the pixel circuit 130 in the second display region cannot display. Therefore, the second switch unit 162 is arranged between the second shift registers 161 of adjacent stages, and the on-time of the second switch unit 162 is determined according to the number of the second shift registers 161 corresponding to the display area which is normally displayed when the display panel is displayed in the partial display area, so that the display area which is normally displayed when the display panel is displayed in the partial display area can be normally displayed by providing the light-emitting control signal, and the display area of other parts can not be displayed by providing the light-emitting control signal. In addition, display data do not need to be provided for display areas of other parts, the probability of misoperation is reduced, and therefore the accuracy of the display panel in partial display can be improved.
It should be noted that, the technical scheme that the light-emitting control driving circuit controls the display panel portion to normally display, and the other portions cannot emit light is similar to the technical scheme that the gate driving circuit controls the display panel portion to normally display, and the other portions cannot emit light, and is not described herein again. In addition, on the basis of the light emission control driving circuit, the display panel may further include a reference voltage input unit, and a specific working process of the reference voltage input unit is the same as that of the gate driving circuit including the reference voltage input unit, which is not described herein again.
Fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 8, the control signal driving circuit may include the gate driving circuit 110 and the light-emitting control driving circuit 160 at the same time, and at this time, the on/off of the first switch unit 112 and the second switch unit 162 may be controlled at the same time, and the number of the output signals in the N-stage first shift register 111 and the second shift register 161 may be controlled, so that when the display panel displays partially, the normally displayed display area may display normally, and the display areas in other portions may not display, so that the display power consumption in the display areas in other portions may be further reduced. And meanwhile, the pixel circuit corresponding to the display area which cannot be displayed cannot emit light from a plurality of control signals, so that the probability of misoperation is further reduced, and the accuracy of the display panel part during display is improved.
The embodiment of the invention also provides a driving method of the display panel, which is used for driving the display panel provided by any embodiment of the invention. Fig. 9 is a flowchart illustrating a driving method of a display panel according to an embodiment of the present invention. As shown in fig. 9, the method includes:
s10, in the first stage, a first switch control signal is provided to the switch unit, the switch unit is controlled to be conducted, and the shift registers cascaded from the 1 st stage to the (m + 1) th stage output control signals step by step, wherein m is an integer larger than 0 and smaller than N-2.
Specifically, the display panel has a display area, and when the display panel is in a folded state, the display area forms a first display area and a second display area. The pixel circuit of the first display area corresponds to the shift registers from the first stage to the (m + 1) th stage, and the pixel circuit of the second display area corresponds to the cascaded shift registers from the (m + 2) th stage to the Nth stage. In the display time of one frame, in the first stage, the first switch control signal controls the switch unit to be conducted, and at the moment, the cascade-connected shift register outputs the control signal stage by stage from the first stage to the (m + 1) th shift register. The control signals output by the first-stage shift register to the (m + 1) th-stage shift register control the corresponding pixel circuit to drive the light-emitting device to emit light, so that the first display area displays normally.
And S20, in the second stage, providing a second switch control signal to the switch unit, and controlling the switch unit to be cut off so that the shift registers cascaded from the (m + 2) th stage to the Nth stage do not output the control signal.
Specifically, in the second stage, the switch unit is turned off, the control signal output by the m +1 th stage shift register cannot be output to the m +2 th stage shift register, and the control signal cannot be normally output from the m +2 th stage shift register to the nth stage shift register, so that the pixel circuit in the second display area cannot be controlled to display, and therefore, the light emitting device in the second display area is prevented from emitting light. Therefore, the switch unit is arranged between the adjacent stages of the shift registers, and in the first stage, the switch unit is controlled to be switched on, so that the pixel circuit of the first display area can be normally displayed by the control signal, the pixel circuit of the second display area cannot be displayed by the control signal, and compared with the black brushing display in the prior art, the display power consumption of the second display area can be reduced, and the whole power consumption of the display panel can be reduced when the first display area of the display panel displays. In addition, display data do not need to be provided for the second display area, the probability of misoperation is reduced, and therefore the accuracy of the display panel in the display process of the first display area can be improved.
On the basis of the technical scheme, the method further comprises the following steps:
in the first stage, a reference voltage input unit of the display panel outputs a first reference voltage signal to the pixel circuit, and initializes the pixel circuit.
In the second stage, the reference voltage input unit outputs a second reference voltage signal to the pixel circuit to turn off the driving transistor of the pixel circuit.
Specifically, when the switch unit is turned off, the reference voltage input unit can further output a cut-off signal to the driving transistor of the pixel circuit, so that the driving transistor is cut off, the pixel circuit can be further ensured not to drive the light-emitting device to emit light, the probability of misoperation is further reduced, and the accuracy of the display panel during partial display is improved.
The embodiment of the invention also provides a display device. Fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention. As shown in fig. 10, the display device 27 includes a display panel 26 provided in any embodiment of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in some detail by the above embodiments, the invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the invention, and the scope of the invention is determined by the scope of the appended claims.
Claims (8)
1. A display panel is characterized by comprising a control signal driving circuit;
the control signal driving circuit comprises cascaded N-stage shift registers and N-1 switch units; along a first direction, the kth switch unit is arranged between the kth-stage shift register and the (k + 1) th-stage shift register and is used for controlling the conduction or the disconnection between the shift registers of adjacent stages, wherein the first direction is a direction in which the first-stage shift register of the control signal driving circuit points to the Nth-stage shift register, k is an integer larger than zero and smaller than N-1, and N is an integer larger than 1;
the control signal driving circuit comprises a grid driving circuit;
the grid driving circuit comprises cascaded N stages of first shift registers; the first shift register of each stage is correspondingly connected with N scanning signal lines of the display panel one by one, and the grid drive circuit further comprises N-1 first switch units; along a first direction, the kth first switch unit is arranged between the kth-stage first shift register and the (k + 1) -th-stage first shift register, and the kth first switch unit is used for controlling the connection or disconnection between the first shift registers of adjacent stages, wherein the first direction is a direction in which the first-stage first shift register of the gate driving circuit points to the Nth-stage first shift register, k is an integer greater than zero and less than N-1, and N is an integer greater than 1;
the device also comprises a reference voltage input unit; the reference voltage input unit is electrically connected with a reference voltage signal line of the display panel, and is used for outputting a first reference voltage signal when the first switch unit is switched on and outputting a second reference voltage signal when the first switch unit is switched off;
the first reference voltage signal is used for initializing a driving transistor in the pixel circuit, and the second reference voltage signal is used for controlling the driving transistor to be cut off.
2. The display panel according to claim 1, wherein a kth one of the first switch units comprises a switch transistor; the first pole of the switch transistor is electrically connected with the output end of the kth-stage first shift register, the second pole of the switch transistor is electrically connected with the initial signal input end of the (k + 1) -th-stage first shift register, and the grid electrode of the switch transistor is electrically connected with the switch control signal line of the display panel.
3. The display panel according to claim 1, wherein the reference voltage input unit comprises a first transistor and a second transistor; the first electrode of the first transistor is electrically connected with a first reference voltage signal line, the first electrode of the second transistor is electrically connected with a second reference voltage signal line, the second electrode of the first transistor and the second electrode of the second transistor are electrically connected with the reference voltage signal line, the grid electrode of the first transistor is electrically connected with a first control signal line of the display panel, and the grid electrode of the second transistor is electrically connected with a second control signal line of the display panel.
4. The display panel according to claim 3, wherein the switching transistors of the first switching unit, the first transistor, and the second transistor are of the same type, and a switching control signal line of the display panel is multiplexed as the first control signal line; the first control signal provided by the first control signal line and the second control signal provided by the second control signal line are reversed.
5. The display panel according to claim 1, wherein the first shift register is a bidirectional shift register.
6. The display panel according to claim 1, wherein the control signal driver circuit further comprises a light emission control driver circuit;
the light-emitting control driving circuit comprises cascaded N stages of second shift registers; the second shift register of each stage is correspondingly connected with N light-emitting control signal lines of the display panel one by one, and the light-emitting control drive circuit also comprises N-1 second switch units; along the first direction, the kth second switch unit is arranged between the kth-stage second shift register and the (k + 1) -th-stage second shift register, and the kth second switch unit is used for controlling the conduction or the disconnection between the second shift registers of the adjacent stages.
7. A method of driving a display panel, for driving the display panel according to any one of claims 1 to 6, the method comprising:
in the first stage, a first switch control signal is provided to a switch unit to control the switch unit to be conducted, so that the shift registers cascaded from the 1 st stage to the (m + 1) th stage output control signals step by step; wherein m is an integer greater than 0 and less than N-2;
and in the second stage, a second switch control signal is provided to the switch unit to control the switch unit to be cut off, so that the shift registers cascaded from the (m + 2) th stage to the Nth stage do not output the control signal.
8. A display device characterized by comprising the display panel according to any one of claims 1 to 6.
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| WO2021189492A1 (en) * | 2020-03-27 | 2021-09-30 | 京东方科技集团股份有限公司 | Gate drive circuit, driving method therefor, and display panel |
| CN112908253B (en) * | 2021-01-28 | 2022-07-01 | 武汉天马微电子有限公司 | Display panel, drive control method thereof, and display device |
| CN113593482B (en) * | 2021-06-29 | 2022-12-06 | 合肥京东方卓印科技有限公司 | Display substrate, display panel and display device |
| CN114639333B (en) * | 2022-03-22 | 2025-09-16 | 上海天马微电子有限公司 | Circuit structure, driving method and display device |
| CN115273738B (en) * | 2022-08-26 | 2025-04-11 | 厦门天马显示科技有限公司 | Display panel and display device |
| CN117935744A (en) * | 2022-10-14 | 2024-04-26 | 华为技术有限公司 | Display panel, driving method thereof, electronic device and storage medium |
| CN115719575A (en) * | 2022-10-27 | 2023-02-28 | 维沃移动通信有限公司 | Display panel, display method and electronic device |
| CN115798382B (en) * | 2022-11-29 | 2025-10-17 | 云谷（固安）科技有限公司 | Display driving circuit, control method thereof and display device |
| CN115731839B (en) * | 2022-11-29 | 2024-07-19 | 云谷（固安）科技有限公司 | Display driving circuit and display device |
| CN116363989A (en) * | 2023-02-21 | 2023-06-30 | 信利(仁寿)高端显示科技有限公司 | Low-power consumption GOA driving method and display screen |
| CN116631322A (en) * | 2023-06-07 | 2023-08-22 | 昆山国显光电有限公司 | Scanning driving circuit, display device and driving method thereof |
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| CN106057126B (en) * | 2016-05-26 | 2019-04-16 | 上海天马有机发光显示技术有限公司 | A kind of pixel circuit and its driving method |
| CN106157873B (en) * | 2016-08-31 | 2019-02-26 | 昆山工研院新型平板显示技术中心有限公司 | A kind of gate drive apparatus, driving method and display panel |
| CN106935181A (en) * | 2017-05-22 | 2017-07-07 | 厦门天马微电子有限公司 | Gate driving circuit |
| CN107342044B (en) * | 2017-08-15 | 2020-03-03 | 上海天马有机发光显示技术有限公司 | Pixel circuit, display panel and driving method of pixel circuit |
| CN107346650A (en) * | 2017-09-14 | 2017-11-14 | 厦门天马微电子有限公司 | Display panel, display device and scanning drive method |
| CN107481676B (en) * | 2017-09-30 | 2020-09-08 | 上海天马有机发光显示技术有限公司 | Pixel circuit driving method, display panel and display device |
| CN109215582A (en) * | 2018-09-28 | 2019-01-15 | 昆山国显光电有限公司 | Display panel, the driving method of pixel circuit and display device |
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