CN119759815A - EC serial port configuration method, device and storage medium - Google Patents

Abstract

The application relates to the technical field of computers and discloses a configuration method, equipment and a storage medium of an EC serial port, wherein the method comprises multiplexing GPIO pins of the EC serial port into serial port pins; setting an I/O space base address of an EC serial port and an interrupt number in an interrupt number register in a configuration space of a Super I/O, so that the EC serial port generates an interrupt signal when receiving data transmission information sent by external equipment through a serial port pin and sends the interrupt signal and the interrupt number to a CPU (central processing unit) through an LPC (Linear Power controller), and setting a read data byte value in the configuration register of the CPU, so that the CPU reads data of the EC serial port according to the I/O space base address and the read data byte value after receiving the interrupt signal and the interrupt number, wherein the data of the EC serial port is data sent by the external equipment. Through the mode, the use ratio of the EC serial port is improved.

Description

Configuration method, equipment and storage medium of EC serial port

Technical Field

The embodiment of the application relates to the technical field of computers, in particular to a configuration method, equipment and a storage medium of an EC serial port.

Background

The EC serial port (Embedded Controller Serial Port) is an interface for communicating with an embedded controller. An embedded controller is a special hardware device, which is usually integrated with a computer motherboard, and is used for managing and controlling peripheral devices such as power management, fan control, keyboard input, touch pad, and the like. The EC serial port is used for data exchange and command transmission with the embedded controller through a serial communication protocol, and allows bidirectional communication between the computer system and the embedded controller so as to realize control and management of peripheral equipment. Through the EC serial port, the host system may send instructions to the embedded controller, such as adjusting fan speed, setting power mode, obtaining sensor data, etc. Meanwhile, the embedded controller can also transmit the state information of the peripheral equipment, the sensor data and the like to the host system through the EC serial port for processing.

The EC serial port may be used to enable communication between a computer system and an external device, such as other computers, in addition to communication between the computer system and an embedded controller. However, in order for the computer system to communicate with the external device through the EC serial port, a series of settings must be performed according to the data manual of the EC serial port, and this setting process is not only cumbersome, but also involves hardware configuration and software programming, and may require specific knowledge and tools, which results in that the EC serial port is rarely used in the existing computer system, thereby causing resource waste.

Disclosure of Invention

In view of the above problems, embodiments of the present application provide a method, an apparatus, and a storage medium for configuring an EC serial port, which improve the use rate of the EC serial port.

According to one aspect of the embodiment of the application, an EC serial port configuration method is provided, wherein the EC serial port is in communication connection with a CPU of a computer main board and is used for being connected with external equipment, the method comprises multiplexing GPIO pins of the EC serial port into serial port pins, setting an I/O space base address of the EC serial port and an interrupt number in an interrupt number register in a configuration space of Super I/O, so that the EC serial port generates an interrupt signal when receiving data transmission information sent by the external equipment through the serial port pins, and sending the interrupt signal and the interrupt number to the CPU through LPC, and setting a read data byte value in the configuration register of the CPU, so that the CPU reads data of the EC serial port according to the I/O space base address and the read data byte value after receiving the interrupt signal and the interrupt number, wherein the data of the EC serial port is the data sent by the external equipment.

In an optional mode, the method further comprises the step of reporting the I/O space base address and the interrupt number of the EC serial port to an operating system, so that the operating system obtains data received by the EC serial port according to the I/O space base address and the interrupt number.

In an optional manner, multiplexing the GPIO pins of the EC serial port into serial port pins further includes determining a multiplexing number corresponding to each GPIO pin of the EC serial port, and modifying a bit segment value of a register corresponding to the GPIO pin into the multiplexing number corresponding to the GPIO pin.

In an optional mode, the method further comprises the step of writing a first preset value into an interrupt processing register of the EC serial port, wherein the first preset value corresponds to the level value of the interrupt signal, so that the EC serial port generates the interrupt signal with the level value corresponding to the first preset value.

In an optional manner, after setting the I/O space base address of the EC serial port and the interrupt number in the interrupt number register in the configuration space of the super input/output controller, the method further comprises setting an interrupt trigger type in the interrupt request type register of the EC serial port to enable the EC serial port to generate the interrupt signal when the data transmission information meets the interrupt trigger type, and setting a working clock of the EC serial port to enable the EC serial port to receive data sent by the external device at a data transmission rate corresponding to the working clock.

In an alternative manner, after multiplexing the GPIO pins of the EC serial port into serial port pins, the method further comprises entering the configuration space of the Super I/O in response to a received entering instruction, and after setting the I/O space base address of the EC serial port and the interrupt number in the interrupt number register, exiting the configuration space of the Super I/O in response to a received exiting instruction.

In an alternative mode, the method further comprises setting a serial interrupt mode and a sampling start period in a configuration register of the CPU, so that the CPU can read the data of the EC serial port from the sampling start period after receiving the interrupt signal according to the serial interrupt mode.

In an alternative mode, the method further comprises writing a second preset value into an interrupt mask register and a configuration start period register of the CPU so that the CPU can receive all interrupt signals sent by the EC serial port.

According to another aspect of the embodiment of the present application, there is provided an electronic device, including a memory, a processor, and a computer program stored on the memory, where the processor executes the computer program to implement the method for configuring an EC serial port provided in any of the foregoing embodiments.

According to yet another aspect of the embodiments of the present application, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the EC serial port configuration method provided in any of the above embodiments.

According to the embodiment of the application, the GPIO pin of the EC serial port is multiplexed into the serial port pin, and the I/O space base address of the EC serial port and the interrupt number in the interrupt number register are set, so that the EC serial port can receive data transmission information sent by external equipment through the serial port pin, an interrupt signal is generated when the data transmission information is received, and the interrupt signal and the interrupt number are sent to the CPU through the LPC. The CPU can read the data sent by the external equipment in the EC serial port according to the I/O space base address and the read data byte value after receiving the terminal signal and the interrupt number by setting the read data byte value of the configuration register in the CPU. Through setting the EC serial port and the CPU, the EC serial port can receive data sent by external equipment and send an interrupt request to the CPU when receiving the data, and the CPU can process the interrupt request of the EC serial port and read the data sent by the external equipment in the EC serial port, so that the EC serial port realizes the communication between the external equipment and the CPU, namely the computer system, and the utilization rate of the EC serial port is improved.

The foregoing description is only an overview of the technical solutions of the embodiments of the present application, and may be implemented according to the content of the specification, so that the technical means of the embodiments of the present application can be more clearly understood, and the following specific embodiments of the present application are given for clarity and understanding.

Drawings

The drawings are only for purposes of illustrating embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:

fig. 1 shows a flow chart of a configuration method of an EC serial port provided by an embodiment of the present application;

Fig. 2 shows a schematic structural diagram of a configuration device of an EC serial port according to an embodiment of the present application;

Fig. 3 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

Exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the embodiments set forth herein.

In the process of actually using the EC serial port, in order to implement bidirectional communication between the computer system and the external device using the EC serial port, so as to implement management and control of the external device, a series of settings must be made according to the data manual of the EC serial port. In this process, the steps of setting are numerous, but the data manual often lacks specific setting details. Therefore, in the process of implementing the EC serial port by actual configuration, the EC serial port needs to be continuously set and tested in combination with a data manual of the EC serial port, which involves hardware configuration and software programming, and special knowledge and tools may be required, which causes that the EC serial port is rarely used in the existing computer system, thereby wasting resources.

For example, in a scheme that a computer platform communicates with an external device through a serial port, a common serial port scheme is implemented by directly adopting a serial port integrated by a CPU (Central Processing Unit ) or converting a PCIE (PERIPHERAL COMPONENT INTERCONNECT EXPRESS, high-speed serial computer expansion bus standard) to a serial port chip, where the computer platform is equipped with an EC serial port, and the EC serial port is certainly a waste of system resources when the EC serial port can provide a function similar to the above serial port.

Based on this, the application provides a configuration method of an EC serial port, which enables the EC serial port to receive data sent by an external device by setting a GPIO (General Purpose Input/Output ) pin of the EC serial port, and enables the EC serial port to send an interrupt signal and an interrupt number to a CPU when receiving the data by setting an I/O space base address and an interrupt number of the EC serial port, so that the CPU can process an interrupt request of the EC serial port according to the interrupt signal and the interrupt number, and enables the CPU to read the data sent by the external device in the EC serial port by setting a read data byte value of the CPU. Through the arrangement of the EC serial port and the CPU, the EC serial port realizes communication between the CPU, namely the computer system and the external equipment, and the utilization rate of the EC serial port is improved.

Fig. 1 shows a flowchart of a method for configuring an EC serial port according to an embodiment of the present application, where the method is performed by an electronic device, for example, a computer, a server, or the like. As shown in fig. 1, the method comprises the steps of:

And 100, multiplexing GPIO pins of the EC serial port into serial port pins.

GPIO pins are generic in nature and they may be configured as input pins or output pins, but without specific serial communication functionality. Multiplexing the GPIO pins into serial port pins, so that the EC serial port can realize serial port communication function.

The number of GPIO pins of the EC serial port is 9, and after multiplexing into serial port pins, the serial port pins are respectively a carrier detection pin, a data receiving pin, a data sending pin, a data terminal ready pin, a signal ground pin, a data equipment ready pin, a request sending pin, a clear sending pin and a ringing indication pin.

Specifically, step 100 includes the steps of:

Step 110, determining multiplexing numbers corresponding to each GPIO pin of the EC serial port.

And 120, modifying the bit segment value of the register corresponding to the GPIO pin into the multiplexing number corresponding to the GPIO pin.

Each GPIO pin has one or more standby functions, each with a corresponding multiplex number. For example, the multiplexing number of the GPIO pin 2 is 2, the standby function is RXD (receive data) function, the multiplexing number of the GPIO pin 3 is 3, and the standby function is TXD (transmit data) function.

In the AFR (Alternative Function Register) registers of GPIO pins, each GPIO pin is typically represented by a fixed bit field, which may be a 4-bit field, that may store a value representing the spare function of the GPIO pin. Therefore, the bit segment value of the register corresponding to the GPIO pin is modified to be the multiplexing number corresponding to the GPIO pin, and which standby function should be executed by the GPIO pin can be determined according to the bit segment value. For example, after modifying the bit segment value of the register corresponding to the GPIO pin 2 to 2, the GPIO pin 2 is multiplexed into the RXD pin, and has an RXD function.

When the external device is connected with the EC serial port and sends data transmission information to a serial port pin of the EC serial port, the serial port pin of the EC serial port receives the data transmission information, and in response to the data transmission information, the EC serial port generates an interrupt signal and sends the interrupt signal to the CPU. The data transmission information may be a control instruction or communication data.

In the embodiment of the present application, the level value of the interrupt signal generated by the EC serial port is related to the first preset value written into the interrupt processing register, that is, the first preset value corresponds to the level value of the interrupt signal. Specifically, the interrupt processing register is a dis_irq_level register of the EC serial port, when the first preset value written into the dis_irq_level register is 0, the LEVEL value of the interrupt signal is high, and when the first preset value written into the dis_irq_level register is 1, the LEVEL value of the interrupt signal is low.

For example, when 0 is written into the interrupt processing register of the EC serial port, the EC serial port queries the value of the interrupt processing register after receiving the data transmission information, and when the value of the interrupt processing register is queried to be 0, the EC serial port generates a high-level interrupt signal.

Step 200, setting an I/O space base address of an EC serial port and an interrupt number in an interrupt number register in a configuration space of a Super I/O (Super Input/Output controller) so that the EC serial port generates an interrupt signal when receiving data transmission information sent by an external device through a serial port pin, and sending the interrupt signal and the interrupt number to a CPU through an LPC (Low Pin Count Bus reduced pin bus).

The I/O space base address is information for storing serial I/O addresses, for example, 0x2F8, 0x3F8, and the like. Through the I/O space base address, the CPU can access the register of the EC serial port, and then read the data sent by the external equipment and stored in the register of the EC serial port.

The interrupt number in the interrupt number register corresponds to the EC serial port, for example, the interrupt number of EC serial port 1 is 1, and the interrupt number of EC serial port 2 is 2. The interrupt number is used for identifying an interrupt signal of the EC serial port, and the CPU can know the EC serial port which sends the interrupt number through the interrupt number, and further know the external equipment which needs to communicate with the EC serial port through the EC serial port.

The EC serial port is in communication connection with the CPU through the LPC, and an interrupt state register in the CPU is provided with a bit corresponding to an interrupt number, wherein the value of the bit corresponds to the level value of an interrupt signal sent by the EC serial port. For example, assume that the level value of the interrupt signal is 1, the interrupt number of the ec serial port is 3, and the value displayed by the interrupt status register bit 3 after the ec serial port transmits the interrupt signal and the interrupt number to the CPU is 1. The CPU can determine the EC serial port for sending the interrupt signal by inquiring the bit value of the interrupt status register, and then the CPU can process the interrupt request of the EC serial port.

In some embodiments, in order to prevent the I/O space base address and the interrupt number of the EC serial port from being tampered at will, and avoid abnormal situations of communication of the EC serial port, an entry instruction for entering the configuration space of the Super I/O may be set, and the BIOS (Basic Input Output System ) may enter the configuration space of the Super I/O to modify the I/O space base address and the interrupt number of the EC serial port through the entry instruction. Similarly, an exit instruction for exiting the configuration space of the Super I/O is set, and the configuration space of the Super I/O is locked through the exit instruction, so that the I/O space base address and the interrupt number of the EC serial port are ensured not to be tampered. The entering instruction and the exiting instruction may be a single instruction, or may be two or more instructions with a certain sequence, and the entering instruction and the exiting instruction are different.

The method comprises the steps that after an entering instruction and an exiting instruction are set, when a user inputs the entering instruction, the electronic equipment responds to the entering instruction to enter the configuration space of the Super I/O, and when the user inputs the exiting instruction, the electronic equipment responds to the exiting instruction to exit the configuration space of the Super I/O and locks the configuration space of the Super I/O.

In some embodiments, step 200 is followed by the further step of:

Step 201, setting an interrupt trigger type in an interrupt request type register of the EC serial port, so that the EC serial port generates an interrupt signal when the data transmission information meets the interrupt trigger type.

The interrupt trigger type may be a level trigger type, such as a high level trigger or a high level trigger, or an edge trigger type, such as a rising edge trigger or a falling edge trigger.

Assuming that the interrupt trigger type is set as falling edge trigger, when the EC serial port receives data transmission information, the data transmission information jumps from high level to low level, the falling edge trigger is satisfied, and the EC serial port generates an interrupt signal. By setting the level trigger type, the persistence and the condition of the interrupt signal generated by the EC serial port can be controlled.

Step 202, setting a working clock of the EC serial port, so that the EC serial port receives data sent by external equipment at a data transmission rate corresponding to the working clock.

The working clock can be a 1.84MHz clock or a 24Mhz clock. By setting the working clock of the EC serial port, the rate of receiving the data of the external equipment by the EC serial port can be controlled.

Step 300, setting the byte value of the read data in the configuration register of the CPU so that the CPU reads the data of the EC serial port according to the I/O space base address and the byte value of the read data after receiving the interrupt signal and the interrupt number, wherein the data of the EC serial port is the data sent by the external equipment.

After the EC serial port is set, the CPU can receive the interrupt request of the EC serial port, and then the CPU is required to be set, so that the CPU can normally process the interrupt request of the EC serial port to read the data received by the EC serial port.

The byte value of the read data is the byte number of the data of the EC serial port read by the CPU according to the I/O space base address each time, and can be set to be 1 byte or 4 bytes.

Assuming that the read data byte value is set to 1, the cpu receives an interrupt signal and an interrupt number. The EC serial port generating the interrupt signal can be determined, and then the CPU executes an interrupt service routine of the EC serial port, in the interrupt service routine, the CPU accesses a register of the EC serial port according to the I/O space base address, and then the data sent by external equipment in the register is read in a mode of reading 1 byte of data each time. In this way, the CPU is enabled to communicate with external devices through the EC serial port.

In some embodiments, the serial interrupt mode and the sampling start period in the configuration register of the CPU are set so that the data of the EC serial port is read from the sampling start period after the CPU receives the interrupt signal in the serial interrupt mode.

The serial interrupt mode may be a continuous mode, a single byte interrupt mode, a buffer full interrupt mode, or the like. In the embodiment of the application, the serial interrupt mode is preferably a continuous mode, which can ensure that the CPU can continuously receive the interrupt signal sent by the EC serial port until the CPU reads all data of the EC serial port register.

In serial communication, data is sampled in a specific clock period, and the sampling start period determines the starting point of data sampling. By setting the sampling start period, the time node for reading data by the CPU can be limited, and the CPU can be ensured to normally read the data sent by external equipment in the EC serial port register.

To ensure that the CPU is able to receive all interrupt signals sent by the EC serial port, in some embodiments, a second preset value is written to the CPU's interrupt mask register and configuration start period register to enable the CPU to receive all interrupt signals sent by the EC serial port.

The interrupt mask register is used to control which interrupt signals can be identified by the CPU. The starting period register is used for configuring time sequence parameters of the LPC interface and ensuring the stability of interrupt signal transmission.

The second preset value may be 0, and when writing 0 into the interrupt mask register and the configuration start period register, the second preset value indicates that the masks of all interrupt signals sent by the EC serial port are released, so that the CPU can receive all interrupt signals, and thus all interrupt requests of the EC serial port are processed.

In some embodiments, after the EC serial port and the CPU are set according to steps 100-300, the I/O space base address and the interrupt number of the EC serial port need to be reported to an Operating System (OS) to enable the OS to obtain the data received by the EC serial port according to the I/O space base address and the interrupt number. Otherwise, the OS cannot acquire the interrupt signal of the EC serial port, so that the communication function of the EC serial port is abnormal.

Specifically, the name of the EC serial port is declared in ACPI (Advanced Configuration and Power MANAGEMENT INTERFACE, advanced configuration and Power interface) code, and then the I/O space base address and interrupt number used by the EC serial port are declared. When the OS is started, the OS loads an ACPI driver, then the ACPI driver analyzes an ACPI code to obtain an I/O space base address and an interrupt number of the EC serial port, and then the OS distributes the I/O port and configures an interrupt processing program and the like for the EC serial port according to the I/O space base address and the interrupt number, so that when external equipment sends data to the EC serial port, the OS can receive an interrupt signal of the EC serial port and read the data received by the EC serial port in response to the interrupt signal, and a user can manage communication of the EC serial port by the OS, and further application of EC serial port resources is realized.

According to the embodiment of the application, the GPIO pin of the EC serial port is multiplexed into the serial port pin, and the I/O space base address of the EC serial port and the interrupt number in the interrupt number register are set, so that the EC serial port can receive data transmission information sent by external equipment through the serial port pin, an interrupt signal is generated when the data transmission information is received, and the interrupt signal and the interrupt number are sent to the CPU through the LPC. The CPU can read the data sent by the external equipment in the EC serial port according to the I/O space base address and the read data byte value after receiving the terminal signal and the interrupt number by setting the read data byte value of the configuration register in the CPU. Through setting the EC serial port and the CPU, the EC serial port can receive data sent by external equipment and send an interrupt request to the CPU when receiving the data, and the CPU can process the interrupt request of the EC serial port and read the data sent by the external equipment in the EC serial port, so that the EC serial port realizes the communication between the external equipment and the CPU, namely the computer system, and the utilization rate of the EC serial port is improved.

Fig. 2 shows a schematic structural diagram of a configuration device of an EC serial port according to an embodiment of the present application. As shown in fig. 2, the apparatus 400 includes a pin multiplexing module 410, an EC serial port setting module 420, and a CPU setting module 430. The CPU setting module 430 is used for setting the reading data byte value in the configuration register of the CPU, so that the CPU can read the data of the EC serial port according to the I/O space base address and the reading data byte value after receiving the interrupt signal and the interrupt number, wherein the data of the EC serial port is the data sent by the external device.

Fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application, and the specific embodiment of the present application is not limited to the specific implementation of the electronic device.

As shown in FIG. 3, the electronic device may include a processor (processor) 502 and a memory (memory) 504.

Wherein the memory 504 is used to store a computer program 506. The memory 504 may comprise high-speed RAM memory or may further comprise non-volatile memory (non-volatile memory), such as at least one disk memory. The computer program 506 may include computer-executable instructions.

The processor 502 is configured to execute a computer program 506 to implement the above-described configuration method embodiment of the EC serial port.

The processor 502 may be a central processing unit CPU, or an Application-specific integrated Circuit ASIC (Application SPECIFIC INTEGRATED Circuit), or one or more integrated circuits configured to implement embodiments of the present application. The one or more processors included in the electronic device may be the same type of processor, such as one or more CPUs, or different types of processors, such as one or more CPUs and one or more ASICs.

The embodiment of the application provides a computer readable storage medium, wherein the storage medium stores a computer program, and the computer program realizes the configuration method embodiment of the EC serial port when being executed by a processor.

The embodiment of the application provides a computer program which can be executed by a processor to realize the configuration method embodiment of the EC serial port.

The embodiment of the application provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to realize the embodiment of the configuration method of the EC serial port.

In several embodiments provided by the present application, any of the functions, if implemented in the form of software functional modules/units, and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. With such understanding, some or all of the aspects of the present application may be embodied in the form of a software product stored on a storage medium, comprising instructions for causing a computer device (which may be a personal computer, server, or the like) to perform all or part of the steps of a method according to various embodiments of the present application. The storage medium includes a U disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk or an optical disk, etc., which can store computer program codes.

The algorithms or displays presented herein are not inherently related to any particular computer, virtual system, or other apparatus. Various general-purpose systems may also be used with the teachings herein. The required structure for a construction of such a system is apparent from the description above. In addition, embodiments of the present application are not directed to any particular programming language. It will be appreciated that the teachings of the present application described herein may be implemented in a variety of programming languages, and the above description of specific languages is provided for disclosure of enablement and best mode of the present application.

It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the claims enumerating several means, several of these means or modules may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order. These words may be interpreted as names. The steps in the above embodiments should not be construed as limiting the order of execution unless specifically stated.

The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims (10)

1. A method for configuring an EC serial port, wherein the EC serial port is communicatively connected to a CPU of a computer motherboard and is used to connect an external device, the method comprising: Multiplexing the GPIO pins of the EC serial port into serial port pins; In the configuration space of the Super I/O, the I/O space base address of the EC serial port and the interrupt number in the interrupt number register are set, so that the EC serial port generates an interrupt signal when receiving data transmission information sent by the external device through the serial port pin, and sends the interrupt signal and the interrupt number to the CPU through the LPC; The read data byte value in the configuration register of the CPU is set so that after receiving the interrupt signal and the interrupt number, the CPU reads the data of the EC serial port according to the I/O space base address and the read data byte value, wherein the data of the EC serial port is the data sent by the external device. 2. The method according to claim 1, characterized in that the method further comprises: The I/O space base address and the interrupt number of the EC serial port are reported to an operating system, so that the operating system obtains data received by the EC serial port according to the I/O space base address and the interrupt number. 3. The method according to claim 1, characterized in that the step of multiplexing the GPIO pins of the EC serial port into serial port pins further comprises: Determine the multiplexing number corresponding to each GPIO pin of the EC serial port; The bit segment value of the register corresponding to the GPIO pin is modified to the multiplexing number corresponding to the GPIO pin. 4. The method according to claim 1, characterized in that the method further comprises: A first preset value is written into the interrupt processing register of the EC serial port, wherein the first preset value corresponds to the level value of the interrupt signal, so that the EC serial port generates an interrupt signal with a level value corresponding to the first preset value. 5. The method according to claim 1, characterized in that after setting the I/O space base address of the EC serial port and the interrupt number in the interrupt number register in the configuration space of the super input and output controller, the method further comprises: Setting the interrupt trigger type in the interrupt request type register of the EC serial port, so that the EC serial port generates the interrupt signal when the data transmission information meets the interrupt trigger type; The working clock of the EC serial port is set so that the EC serial port receives the data sent by the external device at a data transmission rate corresponding to the working clock. 6. The method according to claim 1, characterized in that after the GPIO pin of the EC serial port is multiplexed into a serial port pin, the method further comprises: In response to the received entry instruction, enter the configuration space of the Super I/O; After setting the I/O space base address of the EC serial port and the interrupt number in the interrupt number register, the method further includes: In response to the received exit instruction, exit the configuration space of the Super I/O. 7. The method according to claim 1, characterized in that the method further comprises: The serial interrupt mode and the sampling start period in the configuration register of the CPU are set so that after the CPU receives the interrupt signal according to the serial interrupt mode, it starts to read the data of the EC serial port from the sampling start period. 8. The method according to claim 1, characterized in that the method further comprises: A second preset value is written into the interrupt mask register and the configuration start cycle register of the CPU, so that the CPU can receive all interrupt signals sent by the EC serial port. 9. An electronic device, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the EC serial port configuration method according to any one of claims 1 to 8. 10. A computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the method for configuring the EC serial port according to any one of claims 1 to 8 is implemented.