CN118794558B - A digital temperature sensor and chip - Google Patents
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- G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
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- G01K7/24—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a non-linear resistance, e.g. thermistor in a specially-adapted circuit, e.g. bridge circuit
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Abstract
本申请公开一种数字温度传感器，包括前端模拟电路和量化电路，前端模拟电路用于感应温度，输出包含温度信息的第一电信号和第二电信号，量化电路用于输入前端模拟电路输出的第一电信号和第二电信号，并基于第一电信号和第二电信号得到与温度正相关的正温信号和与温度负相关的负温信号，基于正温信号和负温信号,通过将正温信号和负温信号中温度系数绝对值较小的一者乘以温度信息N的乘积逐渐逼近另一者，或者将正温信号和负温信号中温度系数绝对值较大的一者除以温度信息N的商逐渐逼近另一者，从而得到量化的温度信息N，从而在不采用高精度ADC的情况实现了对温度的检测和量化输出。本申请还提供一种芯片，包括上述数字温度传感器。
The present application discloses a digital temperature sensor, including a front-end analog circuit and a quantization circuit, wherein the front-end analog circuit is used to sense temperature and output a first electrical signal and a second electrical signal containing temperature information, and the quantization circuit is used to input the first electrical signal and the second electrical signal output by the front-end analog circuit, and obtain a positive temperature signal positively correlated with temperature and a negative temperature signal negatively correlated with temperature based on the first electrical signal and the second electrical signal, and gradually approach the other by multiplying the product of the temperature coefficient of the positive temperature signal and the negative temperature signal with a smaller absolute value by the temperature information N, or gradually approaching the other by dividing the temperature coefficient of the positive temperature signal and the negative temperature signal with a larger absolute value by the temperature information N, thereby obtaining quantized temperature information N, thereby realizing the detection and quantization output of temperature without using a high-precision ADC. The present application also provides a chip, including the above-mentioned digital temperature sensor.
Description
Technical Field
The application relates to the field of temperature detection, in particular to a digital temperature sensor and a chip comprising the digital temperature sensor.
Background
The temperature sensor is used for measuring the temperature of the measured object, and can be classified into analog and digital according to the implementation manner. With the increasing maturity of artificial intelligence, the intellectualization of the sensor becomes necessary, and the use of digital temperature sensors is becoming wider and wider.
The basic principle of the digital temperature sensor is that temperature information is extracted through voltage (or current) related to temperature, then continuous analog signals are converted into discrete digital signals through a high-precision analog-to-digital converter (ADC), digital quantization of the temperature information is realized, and finally quantized numerical values are converted into temperature values to be output.
With the development of artificial intelligence, the scale of complex chips such as GPU, FPGA, CPU and accelerators is larger and larger, and the monitoring of the local temperature of the chip through a digital temperature sensor designed on the chip is more and more important in optimizing the power consumption of the chip and guaranteeing the reliable operation of the chip. However, the current digital temperature sensor needs a high-precision ADC under the condition of ensuring the temperature measurement precision, which means that the chip area and the power consumption occupied by the ADC are relatively large.
Disclosure of Invention
The application provides a digital temperature sensor, which does not need to adopt a high-precision analog-digital converter, but adopts a simpler mode to realize temperature measurement.
According to one aspect of the application, a digital temperature sensor is provided, and the digital temperature sensor comprises a front-end analog circuit and a quantization circuit used for reading quantized temperature information, wherein the front-end analog circuit is used for sensing temperature and outputting a first electric signal and a second electric signal containing the temperature information, the quantization circuit is connected with the front-end analog circuit and used for inputting the first electric signal and the second electric signal output by the front-end analog circuit, obtaining a positive temperature signal positively correlated with the temperature and a negative temperature signal negatively correlated with the temperature based on the first electric signal and the second electric signal, and outputting quantized temperature information N based on the positive temperature signal and the negative temperature signal, wherein the value of the temperature information N is a positive integer when the product of the absolute value of a temperature coefficient of one of the positive temperature signal and the negative temperature signal is most approximate to the other temperature information N, or the value of the temperature information N is a positive integer when the quotient of the absolute value of the temperature coefficient of the one of the positive temperature signal and the negative temperature signal is divided by the temperature information N is most approximate to the other temperature information N.
In one embodiment, a quantization circuit includes:
The conversion unit is used for multiplying one of the positive temperature signal and the negative temperature signal with the temperature information N with smaller absolute value of the temperature coefficient and obtaining a product which is gradually increased, or is used for dividing one of the positive temperature signal and the negative temperature signal with the temperature information N with larger absolute value of the temperature coefficient and obtaining a quotient which is gradually decreased;
a comparator for outputting a first level when the successively increasing product or the successively decreasing quotient does not reach the most proximate other, and outputting a second level when the most proximate other is reached;
And the accumulator is used for setting the initial value of the temperature information N to be 1, accumulating the N based on the first level output by the comparator along with the clock period, outputting the accumulated N to the conversion unit, stopping accumulating the N when the comparator outputs the second level, and outputting the N after stopping accumulating as quantized temperature information.
According to a second aspect, an embodiment provides a chip, including a chip substrate for implementing a preset operation or processing function, on which a plurality of the above-mentioned digital temperature sensors are distributed.
According to the above embodiment, the quantization circuit obtains the positive temperature signal positively correlated with the temperature and the negative temperature signal negatively correlated with the temperature based on the first electric signal and the second electric signal, gradually approximates one of the positive temperature signal and the negative temperature signal by multiplying the one of the positive temperature signal and the negative temperature signal having the smaller absolute value of the temperature coefficient by the continuously accumulated temperature information N, or gradually approximates the other by dividing the quotient of the one of the positive temperature signal and the negative temperature signal having the larger absolute value of the temperature coefficient by the continuously accumulated temperature information N, thereby obtaining N when the other is most approximated, and outputs N at this time as the quantized temperature information. According to the scheme, temperature detection is achieved without adopting a high-precision ADC, and the device used by the scheme is simple, so that the occupied area and the power consumption of the digital temperature sensor can be reduced.
Drawings
FIG. 1 is a schematic diagram of a digital temperature sensor in one embodiment;
FIG. 2 is a schematic block diagram of a quantization circuit;
FIG. 3 is a circuit diagram of a quantization circuit in one embodiment;
FIG. 4 is a clock timing diagram of an approximation differencing unit in one embodiment;
FIG. 5 is a graph of the quantized value as a function of temperature;
FIG. 6 is a circuit diagram of a front-end analog circuit in another embodiment;
FIG. 7 is a circuit diagram of a quantization circuit in another embodiment;
FIG. 8 is a schematic diagram of a multi-point distribution of digital temperature sensors in a chip in one embodiment.
Detailed Description
The application will be described in further detail below with reference to the drawings by means of specific embodiments. Wherein like elements in different embodiments are numbered alike in association. In the following embodiments, numerous specific details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted, or replaced by other elements, materials, or methods in different situations. In some instances, related operations of the present application have not been shown or described in the specification in order to avoid obscuring the core portions of the present application, and may be unnecessary to persons skilled in the art from a detailed description of the related operations, which may be presented in the description and general knowledge of one skilled in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments, and the operational steps involved in the embodiments may be sequentially exchanged or adjusted in a manner apparent to those skilled in the art. Accordingly, the description and drawings are merely for clarity of describing certain embodiments and are not necessarily intended to imply a required composition and/or order.
The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The term "coupled" as used herein includes both direct and indirect coupling (coupling), unless otherwise indicated.
Referring to fig. 1, the temperature sensor includes a front-end analog circuit 10, a quantization circuit 20 and a digital processing circuit 30, wherein the front-end analog circuit 10 includes a temperature sensing element for sensing a temperature change and outputting an electrical signal containing temperature information, such as a current signal or a voltage signal. Temperature information is typically extracted by an electrical signal that satisfies the following conditions:
1) There are two voltage quantities strongly correlated to temperature;
2) The two voltage quantities change monotonically with temperature in a measuring temperature range;
3) The temperature coefficients of the two voltage quantities change less in the measured temperature range, i.e. the linearity is better.
In one embodiment, the characteristics of the on-chip semiconductor device and the characteristics of the temperature are utilized, a bipolar transistor formed by a CMOS process is used as a temperature sensing element, the voltage V BE of the base-emitter of the bipolar transistor and the difference DeltaV BE of V BE of the two bipolar transistors meet the three conditions, the voltage V BE of the base-emitter is in negative correlation with the temperature, and the difference DeltaV BE of V BE of the two bipolar transistors is in positive correlation with the temperature. It is common in the current implementation of digital temperature sensors to quantify the ratio between the two voltages strongly related to temperature, with a common quantization target being X or Y, as shown in the following formula.
...................................................(1)
According to the formula, a curve of X changing along with the temperature or a quantization curve of Y changing along with the temperature can be measured in advance, when the temperature is measured, only the ratio between V BE and DeltaV BE is quantized, and the numerical value of the temperature T can be obtained by checking the quantization curve.
While in the quantization of X or Y using ADCs, high precision ADCs will occupy a larger chip area and consume more energy.
In the research, the inventor finds that the requirements of the internal temperature monitoring of the chip are greatly different from those of the traditional temperature sensor, and the requirements are specifically as follows:
1) The temperature measurement accuracy requirement is low, and the error range of +/-10 o C can be widened;
2) The occupied chip area is small;
3) The consumed power consumption is small.
The inventors therefore contemplate that the detection of the internal temperature of the chip is achieved by a temperature sensor that does not employ a high-precision ADC, thereby avoiding the drawbacks associated with employing a high-precision ADC. In order not to use high precision ADC for quantization, the inventive concept of the invention is to calculate the following equation:
M=VBE-N*ΔVBE...................................................(2)
Ideally, when m=0, n=v BE/ΔVBE is the same as the general quantization target X. Therefore, a further concept of the present invention is to find N that can make n×Δv BE approach V BE as much as possible, for example, by continuously performing +1 iteration on N, so as to find N that can make n×Δv BE approach V BE as much as possible, where the M value obtained by the formula (2) is close to the quantized target X value, and in the case that the temperature measurement accuracy requirement is not high, the temperature value T01 obtained by querying on the quantized curve according to the M value can be used as the measured temperature value.
The following describes a technical scheme for realizing the inventive concept.
Embodiment one:
Referring to fig. 1, the temperature sensor of the present embodiment includes a front-end analog circuit 10, a quantization circuit 20 and a digital processing circuit 30, wherein the front-end analog circuit 10 includes two current sources and two bipolar transistors, the current of the second current source PI is P times that of the first current source I, the current provided by the two current sources respectively flows through the two transistors, and the base-emitter voltages of the two transistors are output as a first electrical signal V BEL and a second electrical signal V BER. In the present embodiment, the first electrical signal V BEL and the second electrical signal V BER are signals that are inversely related to temperature, that is, the first electrical signal V BEL and the second electrical signal V BER both decrease with increasing temperature, but the difference Δv BE between the first electrical signal V BEL and the second electrical signal V BER is a signal that is positively related to temperature, and the absolute value of the negative temperature coefficient of the first electrical signal V BEL and the second electrical signal V BER is greater than the absolute value of the positive temperature coefficient of Δv BE.
The quantization circuit 20 is configured to quantize the analog electrical signal output by the front-end analog circuit 10, and an input terminal of the quantization circuit 20 is connected to an output terminal of the front-end analog circuit 10, and is configured to input a first electrical signal V BEL and a second electrical signal V BER. In order to realize quantization, it is necessary to obtain a positive temperature signal positively correlated with temperature and a negative temperature signal negatively correlated with temperature, the quantization circuit 20 obtains the positive temperature signal positively correlated with temperature and the negative temperature signal negatively correlated with temperature based on the first electric signal V BEL and the second electric signal V BER, and then outputs quantized temperature information N based on the positive temperature signal and the negative temperature signal, the value of the temperature information N being a positive integer when the product of the temperature coefficient absolute value smaller in the positive temperature signal and the negative temperature signal multiplied by the temperature information N most approximates the other, or the value of the temperature information N being a positive integer when the product of the temperature coefficient absolute value larger in the positive temperature signal and the negative temperature signal divided by the quotient of the temperature information N most approximates the other.
The digital processing circuit 30 is connected to the quantization circuit 20 for outputting a temperature value based on quantized temperature information output from the quantization circuit 20.
In some embodiments, the digital processing circuit 30 is not necessary, and the temperature information N output by the quantization circuit 20 may be used as the output temperature value of the digital temperature sensor, but the relationship between the value of N and the actual temperature is not linear, please refer to fig. 5, and the temperature value needs to be obtained by referring to the curve shown in fig. 5. The function of the digital processing circuit 30 is to process the value of N accordingly so that the final temperature information output value is linear with the actual temperature.
As shown in fig. 2, the functional block diagram of the quantization circuit 20 according to the present inventive concept includes a transformation unit D1, a comparator D3, and an accumulator D4, the transformation unit D1 being configured to multiply one of the positive temperature signal and the negative temperature signal, which has a smaller absolute value of the temperature coefficient, by the continuously accumulated temperature information N and to obtain a successively increased product, or to divide one of the positive temperature signal and the negative temperature signal, which has a larger absolute value of the temperature coefficient, by the continuously accumulated temperature information N and to obtain a successively decreased quotient. The comparator D3 is configured to output a first level when the successively increasing product or the successively decreasing quotient does not reach the closest other, and to output a second level when the closest other is reached. The accumulator D4 is configured to set an initial value of the temperature information N to 1, accumulate N based on a first level output from the comparator and following a clock period, and output the accumulated N to the conversion unit D1 for obtaining a product of successive increases or a quotient of successive decreases, where the accumulator D4 stops accumulating N when the comparator D3 outputs a second level, and outputs the N after stopping accumulating as quantized temperature information.
The two quantities to be compared by the quantization circuit are a positive temperature signal and a negative temperature signal, and the first electric signal V BEL and the second electric signal V BER are input as an example. since the first electrical signal V BEL and the second electrical signal V BER are both signals inversely related to temperature and the difference Δv BE between the first electrical signal V BEL and the second electrical signal V BER is a positive temperature signal, one of the first electrical signal V BEL and the second electrical signal V BER may be selected as a negative temperature signal, the difference Δv BE between the first electrical signal V BEL and the second electrical signal V BER may be selected as a positive temperature signal, V BE is used as a negative temperature signal, and Δv BE is used as a positive temperature signal in fig. 2. Since the absolute value of the temperature coefficient of the negative temperature signal is Yu Zhengwen times the absolute value of the temperature coefficient of the signal, in one embodiment, the comparison DeltaV BE times the continuously accumulated temperature information N is sufficient to approximate V BE. For example, Δv BE is input to the conversion unit D1 to obtain n×Δv BE,VBE and n×Δv BE, and the difference Y between the two is obtained by the operation of the adder D2, that is, y=v BE-N*ΔVBE, and the comparator D3 quantizes Y, for example, compares Y with a preset reference voltage, and outputs V according to the comparison result, where the value of V is 0 or 1, and when the value of Y is greater than 0, v=1, otherwise v=0. The input of accumulator D4 is V and the output is N, and if the input v=1 of accumulator D4, the value of accumulator output N is incremented by 1 every clock cycle. Otherwise, if v=0, the accumulation of N is stopped, the value of output N is not changed any more, and N or output N is saved. When the comparator is flipped, n×Δv BE is said to be closest to V BE, corresponding to y=v BE-N*ΔVBE ≡0, i.e. n≡v BE/ΔVBE. From the formulas (1) and (2), N can be regarded as quantized temperature information without requiring very high accuracy.
In the embodiment shown in fig. 2, the comparator D3 compares the difference Y with the reference voltage, and in some embodiments, the comparator D3 may directly compare V BE with n×Δv BE, i.e. the two input terminals of the comparator D3 respectively input V BE and n×Δv BE, and output 0 or 1 according to the comparison result. In such an embodiment, adder D2 is not required.
In another embodiment, it is also compared whether V BE divided by the continuously accumulated temperature information N is sufficiently close to Δv BE. For example, V BE is input to the conversion unit D1, a difference Y between V BE/N,VBE/N and Δv BE is obtained by the operation of the adder D2, that is, y=v BE/N-ΔVBE, the comparator D3 quantizes Y, for example, compares Y with a preset reference voltage, and outputs V according to the comparison result, where V is 0 or 1, and v=1 when the value of Y is greater than 0, and v=0 otherwise. The input of accumulator D4 is V and the output is N, and if the input v=1 of accumulator D4, the value of accumulator output N is incremented by 1 every clock cycle. Otherwise, if v=0, the accumulation of N is stopped, the value of output N is not changed any more, and N or output N is saved.
From the above, the implementation of the embodiment of the invention is very simple, only the adder (not necessary) is used, and the comparator and the accumulator are low in hardware cost and power consumption. While the accuracy of the on-chip temperature given by the output N is sufficient for widespread and ubiquitous applications (e.g., adjusting analog circuit parameters (such as bias voltage and current) according to the on-chip temperature range, thereby reducing the temperature drift of the analog circuit).
The schematic block diagram of fig. 2 may be implemented in various ways, as shown in fig. 3 as a specific embodiment.
In the embodiment shown in fig. 3, the quantization circuit 20 includes an approximation differencing unit 21, a comparator 22, and an accumulator (also referred to as a counter) 23. The approximation difference unit 21 is configured to perform at least a function of a conversion unit, and an input end of the approximation difference unit 21 is connected to an output end of the front-end analog circuit 10, and is configured to input a first electrical signal V BEL and a second electrical signal V BER, obtain a positive temperature signal positively correlated with temperature and a negative temperature signal negatively correlated with temperature based on the first electrical signal and the second electrical signal, and then obtain a difference N times of the negative temperature signal and the positive temperature signal, and output a correlation value of the difference, where the correlation value of the difference may be the difference itself or a first-order linear function of the difference, for example, a constant times of the difference. I.e. the approximation differencing unit 21 is mainly used to derive the difference of V BE-N*ΔVBE in equation (1) from the N determined from the current clock cycle. The value of N is given by the accumulator 23, the input end of the comparator 22 is connected with the output end of the approximation differencing unit 21, the output end is connected with the accumulator 23, the operation of the accumulator 23 is controlled according to the difference value obtained by the approximation differencing unit 21, when n×Δv BE is not enough to approximate V BE, the accumulator 23 executes the accumulation operation of n=n+1, and outputs the accumulation result N to the approximation differencing unit, when n×Δv BE is enough to approximate V BE, the accumulator 23 stops the accumulation operation, and outputs N calculated at this time.
In a specific embodiment, the approximation and difference obtaining unit is implemented by adopting a switched capacitor circuit, and includes a first branch and a second branch, the first branch includes a first capacitor C1, and is configured to obtain a negative temperature signal based on a first electrical signal, and charge the first capacitor C1 by adopting the negative temperature signal, the second branch includes a second capacitor C2, and is configured to charge the second capacitor C2 by adopting a positive temperature signal at least based on a positive temperature signal obtained by a second electrical signal, a capacitance value of the second capacitor C2 is controlled by an accumulation result N output by the accumulator, so that a capacitance value of the second capacitor is N times that of the first capacitor, and output ends of the first branch and the second branch are connected, so that charging charges of the first branch and the second branch affect voltages of output end connection nodes a of the two branches simultaneously, and the voltages are transmitted to the comparator as output voltages of the approximation and difference obtaining unit.
In a specific embodiment, as shown in fig. 3, the first branch includes a second switch T2, a third switch T3, and a first capacitor C1, the second switch T2 and the third switch T3 are connected in parallel to a first end of the first capacitor, the other ends of the second switch T2 and the third switch T3 are respectively connected to a first electric signal V BEL and a zero potential output by the analog front-end circuit 10, the second branch includes a fourth switch T4, a fifth switch T5, and a second capacitor C2, the fourth switch T4 and the fifth switch T5 are connected in parallel to a first end of the second capacitor C2, the other ends of the fourth switch T4 and the fifth switch T5 are respectively connected to a first electric signal V BEL and a second electric signal V BER output by the analog front-end circuit 10, and a difference Δv BE between the first electric signal V BEL and the second electric signal V BER is input to the first end of the second capacitor C2 in a parallel manner. The second capacitor C2 is a variable capacitor, and its capacitance control end is connected to the output end of the accumulator 23, and is configured to receive the accumulation result N output by the accumulator 23, and control the capacitance of the second capacitor C2 to be N times the capacitance of the first capacitor C1 based on the accumulation result N. The second terminals of the first capacitor C1 and the second capacitor C2 are connected to the a node, which is grounded through the first switch T1 and connected to the input terminal of the comparator 22.
In a specific embodiment, the digital temperature sensor further comprises a clock signal generating circuit (not shown in the figure) for generating clocks required for the respective parts of the digital temperature sensor so that the respective parts of the digital temperature sensor perform operations in beats of a constant period.
In the present embodiment, the clock signal generating circuit generates at least three clock signals, namely, a first clock signal CL1, a second clock signal CL2 and a third clock signal CL3. The first switch T1 switches between on and off states based on the control of the first clock signal CL1, the second switch T2 and the fourth switch T4 switch between on and off states based on the control of the second clock signal CL2, and the third switch T3 and the fifth switch T5 switch between on and off states based on the control of the third clock signal CL3. In a specific embodiment, there is a time overlap between the conduction phase of the first clock signal CL1 and the conduction phase of the second clock signal CL2, and there is no time overlap between the conduction phase of the first clock signal CL1 and the conduction phase of the third clock signal CL3, nor between the conduction phase of the second clock signal CL2 and the conduction phase of the third clock signal CL3, per clock cycle, as shown in fig. 4.
Preferably, at each clock cycle, the conduction phase of the second clock signal (e.g., a high period of one clock cycle) lags the end of the conduction phase of the first clock signal, and the start of the conduction phase of the third clock signal lags the end of the conduction phase of the second clock signal.
The comparator 22 includes a comparator a V, two input terminals of the comparator a V are respectively connected to the node a and the reference voltage source, for example, an inverting input terminal of the comparator a V is connected to the node a, a non-inverting input terminal is connected to the reference voltage source, and is used for respectively inputting the voltage of the node a and the reference voltage, the comparator a V compares the voltage of the node a with the reference voltage, and outputs a first level or a second level according to the comparison result, the reference voltage can be set to a zero potential or a fixed voltage according to the voltage of the node a, and the first level can be a high level "1", the second level is a low level "0", or vice versa according to the trigger logic to the accumulator 23. According to the inventive concept, when the approximation and difference unit 21 approximates the cyclic operation of V BE by continuously incrementing N according to equation (1), Δv BE can be designed to be at V BE-N*ΔVBE >0, with comparator AV outputting a high level, and when V BE-N*ΔVBE is equal to 0 or less than 0, comparator AV outputting a low level.
In a more preferred embodiment, the comparator 22 may further comprise a third capacitor C AZ connected between node a and the input of the comparator a V for eliminating comparator offset. And may further include a sixth switch T6 connected between the output terminal and the inverting input terminal of the comparator a V, so that the comparator constitutes an auto-zeroing comparator. In addition, the comparator 22 may further include a latch connected between the output of the comparator a V and the accumulator 23 to synchronize the output of the comparator and the action of the accumulator 23.
The input end of the accumulator 23 is connected with the output end of the comparator 22, and the output end is connected with the approximation differencing unit 21, and is used for executing the accumulation operation of n=n+1 according to the clock beat when the comparator 22 outputs the first level, outputting the accumulation result N to the approximation differencing unit, and stopping accumulation when the comparator outputs the second level. The initial value of the accumulator 23 may be set to 0 or 1, and N is output to the digital processing circuit after stopping the accumulation.
In this embodiment, the approximation difference unit 21 inputs the first electrical signal V BEL and the second electrical signal V BER, outputs the voltage related to V BE-N*ΔVBE, and by the parameter design of each component, the comparator a V outputs a high level when V BE-N*ΔVBE >0, and the comparator a V outputs a low level when V BE-N*ΔVBE is equal to 0 or less than 0. In this case, when receiving the high level, the accumulator 23 performs the accumulation operation of n=n+1, and outputs the accumulation result N to the second capacitor C2, adjusts the capacitance value of the second capacitor to be doubled with respect to the capacitance value of the first capacitor C1, and approximates the voltage output by the differencing unit 21 by the charging influence after the capacitance value of the second capacitor is increased. When the voltage output by the approximation difference unit 21 changes to a certain extent, the output level of the comparator 22 is affected, the output level of the comparator 22 is inverted, and the accumulator 23 stops accumulating N, so as to find an N value that can make n×Δv BE approach V BE as much as possible.
The detailed workflow of this embodiment is as follows:
in the phase phi 1 of the first clock signal CL1 and the second clock signal CL2 (i.e., the high period of one clock cycle), T1, T2 and T4 are closed, point a is grounded, V BEL charges the capacitors C1 and C2, the charges are stored on the plates near point a of C1 and C2, the charges stored at point a of the phase phi 2 of the first clock signal CL1 and the second clock signal CL2 (i.e., the low period of one clock cycle) remain consistent with the phase phi 1, and the voltage at point a is divided by a fixed number after n×Δv BE-VBEL, which is specifically calculated as follows:
At the phi 1 phase:
................................. (3)
Wherein V A、VB_φ1、VC_φ1 is the voltage at node A, B, C, V OS is the output voltage of the voltage source, and a V is the amplification factor of the comparator.
The amount of charge Q A_φ1 stored on the plate near point a is:
.................. (4)
Wherein C S is the capacitance value of the capacitor C1.
In the phi 2 phase, the charge quantity Q A_φ2 stored on the pole plate close to the point A is as follows:
......... (5)
from the above formula, it is possible to obtain:
............ (6)
Finally, the method comprises the following steps:
.............................. (7)
When n×Δv BE-VBEL is smaller than 0, the output of the comparator is a fixed level, the accumulator continuously counts, and as the output N of the accumulator increases, n×Δv BE-VBEL is equal to or greater than 0 at a certain moment, at this time, the output level of the comparator turns over, and the accumulator stops counting.
Since Δv BE and V BEL are both temperature-dependent data, where Δv BE is positively temperature-dependent and V BEL is negatively temperature-dependent, the N value for n×Δv BE-VBEL polarity reversal is different at different temperatures.
Under a certain process, the value of N is also in a certain relation with the corresponding temperature, so that the temperature value measured by the temperature sensor can be characterized by N.
After the accumulator stops counting, the N value is determined, and the digital processing circuit 30 may read N from the accumulator 23 or directly output N from the accumulator, and may find the temperature value T on the horizontal axis corresponding to the vertical axis N by using the quantization curve of the target X shown in fig. 5.
In the embodiment without C AZ, equation (6) also exists. Equation (6) represents a fixed multiple of the difference between the negative temperature signal and the positive temperature signal, which is output by the approximation differencing unit, and in some embodiments, the approximation differencing unit may also output the difference between the negative temperature signal and the positive temperature signal by N times.
In another embodiment, the input signals of the first branch and the second branch in fig. 3 may be interchanged, that is, the second branch inputs a negative temperature signal, the first branch inputs a positive temperature signal, and the capacitance value of the second capacitor C2 is controlled by the accumulated value N (temperature information) output by the accumulator 23, so that the capacitance value of the second capacitor C2 is 1/N of the first capacitor C1, and thus the difference value of V BE/N-ΔVBE or the function value of the difference value is obtained at the node a.
According to the analysis, the embodiment realizes the detection of the temperature without adopting the ADC, and can meet the requirement that the accuracy of the corresponding temperature information is within the error range of +/-10 o C when the quantization accuracy of X is 1 through actual measurement. And the present embodiment has the following effects:
1) Because the scheme avoids using a high-precision ADC (analog to digital converter) and uses an implementation mode of an accumulator, the hardware cost and the area of a chip can be reduced, and the power consumption of the chip is reduced.
2) Digital output of temperature can be achieved.
In the above embodiment, V BEL is input to C1, if V BER is input to C1, since V BER is greater than V BEL, the difference value of V BER-N*ΔVBE is obtained by the approximation difference unit, when V BER-N*ΔVBE is greater than 0, the output of the comparator is a fixed level, the accumulator continuously counts, and as the output N of the accumulator continuously increases, V BER-N*ΔVBE is equal to or less than 0 at a certain moment, and at this moment, the output level of the comparator is inverted, and the accumulator stops counting.
Embodiment two:
The second embodiment is different from the first embodiment in that the front-end analog circuit is different in structure, and the two first electric signals and the second electric signals inputted by the approximation difference unit 21 are different.
In this embodiment, as shown in fig. 6, the temperature sensing element of the front-end analog circuit adopts a thermistor, the front-end analog circuit includes two current sources and two thermistors, the resistors R1 and R2 are resistors with different temperature coefficients, wherein the resistor R1 is a negative temperature coefficient thermistor negatively related to temperature, the resistor R2 is a positive temperature coefficient thermistor positively related to temperature, the I1 output by the current source is a current which does not change with temperature, and the voltage V1 of the resistor R1 and the voltage V2 of the resistor R2 are a voltage with a negative temperature coefficient and a voltage with a positive temperature coefficient, respectively.
In this embodiment, the first electrical signal and the second electrical signal input to the approximation difference unit 21 are a voltage V1 and a voltage V2, respectively, as shown in fig. 7, the second switch T2 is connected to the voltage V1, the third switch T3 is connected to the 0 potential, the fourth switch T4 is connected to the voltage V2, and the fifth switch T5 is connected to the 0 potential.
In practical applications, the digital temperature sensor of the above embodiment may be designed as a separate chip or as a discrete device, and the clock signal generating circuit may be designed on-chip or in the device as a part of the digital temperature sensor. In further embodiments, the digital temperature sensor may not include a clock signal generation circuit, but may obtain the clock signal through a clock signal generation circuit of an external system.
In some embodiments, the digital temperature sensor may also be integrated on chips with other functions, such as GPU, FPGA, CPU and accelerators, among others. In the prior art, these chips with specific functions are usually integrated with a digital temperature sensor for detecting the temperature of the chip. Because the digital temperature sensor in the embodiment of the invention has simple structure, low cost, small occupied area and low power consumption, a plurality of digital temperature sensors can be integrated on a chip with specific functions (such as GPU, FPGA, CPU chips, accelerators and the like), as shown in fig. 8, the chip comprises a chip substrate 1 for realizing preset operation or processing functions and the digital temperature sensors distributed on the substrate 1 in the plurality of the above embodiments, and the number and the distribution positions of the digital temperature sensors can be designed according to actual needs, for example, a 2x 2 matrix or a 3*3 matrix can be formed. With the increase of chip functions and areas, the multipoint distributed digital temperature sensor can detect the temperature in each sensing range, so that the detection of the local temperature of the chip is realized, and the control of the local temperature is realized.
The foregoing description of the invention has been presented for purposes of illustration and description, and is not intended to be limiting. Several simple deductions, modifications or substitutions may also be made by a person skilled in the art to which the invention pertains, based on the idea of the invention.
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| CN204652351U (en) * | 2015-07-07 | 2015-09-16 | 杭州士兰微电子股份有限公司 | Gradually-appoximant analog-digital converter |
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| CN115208403A (en) * | 2022-09-13 | 2022-10-18 | 杭州米芯微电子有限公司 | Successive approximation type ADC circuit, ADC converter and chip |
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