CN117203696A - display device - Google Patents

Abstract

A novel display device is provided. A display device, the display device includes a first layer with a driving circuit, a second layer with a plurality of pixel circuits, and a third layer with a plurality of light-emitting elements, a second layer is provided on the first layer, and the second layer is A third layer is disposed on the third layer, and a conductive layer is disposed between the driving circuit and the plurality of pixel circuits. The driver circuit has the function of controlling operations of multiple pixel circuits. One of the plurality of pixel circuits is electrically connected to one of the plurality of light-emitting elements. The pixel circuit has the function of controlling the brightness of the light-emitting element.

Description

display device

Technical field

One aspect of the present invention relates to a display device.

Note that one aspect of the present invention is not limited to the above technical field. Examples of the technical fields of one aspect of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic equipment, lighting devices, input devices, input-output devices, and the like. driving methods or their manufacturing methods.

Background technique

In recent years, electronic devices equipped with display devices, such as smartphones and tablet terminals, have become widely popular. Typical examples of display devices include liquid crystal display devices, light-emitting devices including light-emitting elements such as organic EL (Electro Luminescence) elements and light-emitting diodes (LED: Light Emitting Diode), and electronic devices that perform display by electrophoresis or the like.

For example, the basic structure of an organic EL element is a structure in which a layer containing a light-emitting organic compound is sandwiched between a pair of electrodes. By applying a voltage to this element, light emission from the luminescent organic compound can be obtained. Since a display device using the above-mentioned organic EL element does not require a backlight required for a liquid crystal display device or the like, a thin, lightweight, high-contrast, and low-power consumption display device can be realized. For example, Patent Document 1 discloses an example of a display device using an organic EL element.

In addition, Patent Document 2 discloses a circuit structure in which, in a pixel circuit that controls the emission brightness of an organic EL element, the threshold unevenness of the transistor is corrected for each pixel, thereby improving the display quality of the display device.

[Advanced technical documents]

[Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2002-324673

[Patent Document 2] Japanese Patent Application Publication No. 2015-132816

Contents of the invention

The technical problem to be solved by the invention

On the other hand, depending on the structure of the organic EL element, high voltage may be required for driving. In order to drive such an organic EL element, it is necessary to provide a power source for generating high voltage.

One object of one aspect of the present invention is to provide a display device that achieves miniaturization. In addition, one of the objects of one aspect of the present invention is to provide a display device that achieves high color reproducibility. In addition, one of the objects of one aspect of the present invention is to provide a high-definition display device. In addition, one of the objects of one aspect of the present invention is to provide a display device with high reliability. In addition, one of the objects of one aspect of the present invention is to provide a display device with reduced power consumption. In addition, one of the objects of one aspect of the present invention is to provide a novel display device.

Note that the recording of these purposes does not prevent the existence of other purposes. Note that an embodiment of the invention does not need to achieve all of the above objectives. In addition, purposes other than the above may be extracted from descriptions in the specification, drawings, claims, etc.

Means of solving technical problems

(1) One aspect of the present invention is a semiconductor device including first and second transistors, first to fifth switches, first to third capacitors, and a display element, wherein the first transistor includes a back gate, and the The gate of a transistor is electrically connected to the first switch. A second switch and a first capacitor are included between the gate and the source of the first transistor. The back gate of the first transistor is electrically connected to the third switch. In the first A second capacitor is included between the back gate and the source of the transistor. The source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor. The gate of the second transistor is electrically connected to the fifth switch. In the A third capacitor is included between the gate and the source of the second transistor, and the source of the second transistor is electrically connected to one terminal of the display element.

Furthermore, in (1), the first switch may have a function of selecting conduction or non-conduction between the first wiring and the gate of the first transistor. In addition, the second switch may also have a function of selecting conduction or non-conduction between the gate electrode and the source electrode of the first transistor. In addition, the third switch may have a function of selecting conduction or non-conduction between the second wiring and the back gate of the first transistor. The fourth switch may have a function of selecting conduction or non-conduction between the third wiring and the source of the first transistor. The fifth switch may have a function of selecting conduction or non-conduction between the fourth wiring and the gate of the second transistor.

In addition, in (1), transistors may be used as the first to fifth switches. The fourth switch and the fifth switch may be p-channel transistors. In addition, the fourth switch and the fifth switch may be transistors in which the semiconductor layer forming the channel contains silicon.

(2) Another aspect of the present invention is a semiconductor device including first and second transistors, first to fifth switches, first to third capacitors, a first display element, and a second display element, Wherein, the first transistor includes a back gate, the gate of the first transistor is electrically connected to the first switch, a second switch and a first capacitor are included between the gate and the source of the first transistor, and the back gate of the first transistor The electrode of the first transistor is electrically connected to the third switch, and a second capacitor is included between the back gate and the source of the first transistor. The source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor. The second transistor The gate is electrically connected to the fifth switch, a third capacitor is included between the gate and the source of the second transistor, and the source of the second transistor is connected to a terminal of the first display element and a terminal of the second display element. Electrical connection.

Furthermore, in (2), the first switch may have a function of selecting conduction or non-conduction between the first wiring and the gate of the first transistor. The second switch may also have a function of selecting conduction or non-conduction between the gate electrode and the source electrode of the first transistor. The third switch may have a function of selecting conduction or non-conduction between the second wiring and the back gate of the first transistor. The fourth switch may have a function of selecting conduction or non-conduction between the third wiring and the source of the first transistor. The fifth switch may have a function of selecting conduction or non-conduction between the fourth wiring and the gate of the second transistor.

Furthermore, in (2), the first capacitor may have a function of maintaining a potential difference between the gate and the source of the first transistor. The second capacitor may also have a function of maintaining a potential difference between the back gate and the source of the first transistor. The third capacitor may also have a function of maintaining the potential difference between the gate and the source of the second transistor.

Furthermore, in (2), the drain of the first transistor may be electrically connected to the fifth wiring. For example, the other terminal of the first display element may be electrically connected to the sixth wiring, and the other terminal of the second display element may be electrically connected to the seventh wiring.

In addition, a plurality of semiconductor devices described in (2) may be arranged in a matrix to form a display device. For example, the first display elements are arranged in odd-numbered rows, and the second display elements are arranged in even-numbered rows. By causing the first display element to emit light during odd-numbered frame periods and the second display element to emit light during even-numbered frame periods, a display device having a function of interlaced scanning driving can be realized.

(3) Another aspect of the present invention is a semiconductor device including first to eighth transistors, first to third capacitors, and a display element, wherein the gate of the first transistor and the gate of the sixth transistor The gate electrode of the third transistor and the fourth transistor are electrically connected to the second wiring. The gate electrode of the seventh transistor is electrically connected to the third wiring. The gate electrode of the eighth transistor is electrically connected to the fourth wiring. The wiring is electrically connected, one of the source and drain of the first transistor is electrically connected to the fifth wiring, and the other of the source and drain of the first transistor is connected to the gate of the second transistor and the source of the third transistor. One of the drain electrodes and one terminal of the first capacitor are electrically connected, one of the source electrode and the drain electrode of the second transistor is electrically connected to the sixth wiring, and one of the source electrode and the drain electrode of the fourth transistor is electrically connected to the seventh wiring. The wiring is electrically connected, the other of the source and drain of the fourth transistor is electrically connected to one terminal of the second capacitor, and the other of the source and drain of the second transistor is electrically connected to the source and drain of the third transistor. The other of the first capacitor, the other terminal of the second capacitor, one of the source electrode and the drain electrode of the fifth transistor, and one of the source electrode and the drain electrode of the sixth transistor are electrically connected. One of the source and drain of the seven transistors is electrically connected to the seventh wiring, the gate of the fifth transistor is electrically connected to the other of the source and drain of the seventh transistor, and the source and drain of the eighth transistor are electrically connected to each other. One is electrically connected to one terminal of the third capacitor, the other of the source and drain of the sixth transistor and the other of the source and drain of the eighth transistor are electrically connected to the eighth wiring, and the source of the fifth transistor is electrically connected to the eighth wiring. The other of the electrode and the drain is electrically connected to the other terminal of the third capacitor and one terminal of the display element. The other terminal of the display element is electrically connected to the ninth wiring. The second transistor includes a back gate, and the back gate is electrically connected to the ninth wiring. The other one of the source electrode and the drain electrode of the fourth transistor is electrically connected to one terminal of the second capacitor.

Furthermore, in (3), a transistor in which the semiconductor forming the channel includes an oxide semiconductor may be used as the second transistor. The second transistor includes one of a source electrode and a drain electrode, the other of the source electrode and the drain electrode, a gate electrode, and a back gate electrode. The second transistor may have a function of changing the gate potential and the back gate potential according to the potential change of the other of the source and the drain.

In (3), a transistor in which the semiconductor forming the channel includes an oxide semiconductor may be used as the fifth transistor. The fifth transistor includes one of the source electrode and the drain electrode, the other of the source electrode and the drain electrode, and a gate electrode. The fifth transistor may have a function of changing the gate potential according to the potential change of the other of the source and the drain.

(4) Another aspect of the present invention is a semiconductor device including first and second transistors, first to sixth switches, first to third capacitors, and a display element, wherein the first transistor includes a back gate, The gate of the first transistor is electrically connected to the first switch. A second switch and a first capacitor are included between the gate and the source of the first transistor. The back gate of the first transistor is electrically connected to the third switch. A second capacitor is included between the back gate and the source of a transistor. The source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor. The gate of the second transistor is connected to the fifth switch and the sixth switch. The electrical connection includes a third capacitor between the gate and the source of the second transistor, and the source of the second transistor is electrically connected to the display element.

In addition, in (4), the first switch may have a function of selecting conduction or non-conduction between the first wiring and the gate of the first transistor, and the second switch may have a function of selecting between the gate of the first transistor and The third switch may also have the function of selecting conduction or non-conduction between the second wiring and the back gate of the first transistor. The fourth switch may also have the function of selecting the conduction or non-conduction between the second wiring and the back gate of the first transistor. The fifth switch may also have the function of selecting conduction or non-conduction between the second wiring and the gate of the second transistor. The sixth switch may also have the function of selecting conduction or non-conduction between the second wiring and the gate of the second transistor. The switch may have a function of selecting conduction or non-conduction between the third wiring and the gate of the second transistor.

In addition, in (4), the first capacitor may have the function of maintaining the potential difference between the gate and the source of the first transistor, and the second capacitor may have the function of maintaining the potential difference between the back gate and the source of the first transistor. The third capacitor may also have the function of maintaining the potential difference between the gate and the source of the second transistor.

In addition, in (1), (2), (3) and (4), the oxide semiconductor preferably contains at least one of indium and zinc. The display element may also use a single-structure organic EL element or a tandem-structure organic EL element.

(5) Another aspect of the present invention is a display device including a first layer having a driving circuit, a second layer having a plurality of pixel circuits, and a third layer having a plurality of light emitting elements, wherein the third layer The second layer is arranged on the first layer, and the third layer is arranged on the second layer. The driving circuit has the function of controlling the operation of multiple pixel circuits. One of the multiple pixel circuits is electrically connected to one of the multiple light-emitting elements. The pixel circuit It has the function of controlling the luminance of the light-emitting element and includes a conductive layer between the driving circuit and the plurality of pixel circuits.

Furthermore, in (5), it is preferable that the conductive layer and the plurality of pixel circuits have regions overlapping each other. In addition, the above-mentioned conductive layer may also be in a mesh shape.

Furthermore, in (5), the driver circuit may include a Si transistor, for example. In addition, the pixel circuit may include an OS transistor, for example. The light-emitting element may be an organic EL element, for example. In addition, the light-emitting element may also be a light-emitting element having a tandem structure.

Invention effect

According to one aspect of the present invention, it is possible to provide a miniaturized display device. In addition, a display device achieving high color reproducibility can be provided. In addition, a high-definition display device can be provided. In addition, a highly reliable display device can be provided. In addition, a display device with reduced power consumption can be provided. In addition, a novel display device can be provided.

Note that the description of these effects does not prevent the existence of other effects. Note that an aspect of the present invention does not necessarily have all of the above effects. In addition, effects other than those described above can be extracted from descriptions in the specification, drawings, claims, etc.

Brief description of the drawings

FIG. 1 is a diagram explaining a semiconductor device.

FIG. 2 is a diagram explaining a semiconductor device.

FIG. 3 is a diagram explaining a semiconductor device.

FIG. 4 is a diagram explaining a semiconductor device.

FIG. 5 is a diagram explaining a semiconductor device.

FIG. 6 is a diagram explaining the plan layout of the semiconductor device.

FIG. 7 is a diagram explaining a semiconductor device.

FIG. 8 is a diagram explaining a semiconductor device.

FIG. 9 is a diagram explaining a semiconductor device.

FIG. 10 is a diagram explaining a semiconductor device.

FIG. 11 is a diagram explaining a semiconductor device.

FIG. 12 is a diagram explaining a semiconductor device.

FIG. 13 is a diagram explaining a semiconductor device.

FIG. 14 is a diagram explaining a semiconductor device.

FIG. 15 is a diagram explaining a semiconductor device.

16A to 16C are diagrams showing circuit diagram symbols of transistors.

FIG. 17 is a timing chart explaining the operation of the semiconductor device.

FIG. 18 is a diagram explaining the operation of the semiconductor device.

FIG. 19 is a diagram explaining the operation of the semiconductor device.

FIG. 20 is a diagram explaining the operation of the semiconductor device.

FIG. 21 is a diagram explaining the operation of the semiconductor device.

FIG. 22 is a diagram explaining the operation of the semiconductor device.

FIG. 23 is a diagram explaining the operation of the semiconductor device.

FIG. 24 is a diagram explaining the operation of the semiconductor device.

FIG. 25 is a diagram explaining a semiconductor device.

FIG. 26 is a timing chart explaining the operation of the semiconductor device.

FIG. 27 is a diagram explaining the operation of the semiconductor device.

FIG. 28 is a diagram explaining the operation of the semiconductor device.

FIG. 29 is a diagram explaining the operation of the semiconductor device.

FIG. 30 is a diagram explaining the operation of the semiconductor device.

FIG. 31 is a diagram explaining the operation of the semiconductor device.

FIG. 32 is a diagram explaining the operation of the semiconductor device.

FIG. 33 is a diagram explaining a semiconductor device.

FIG. 34 is a diagram explaining a semiconductor device.

FIG. 35 is a timing chart explaining the operation of the semiconductor device.

FIG. 36 is a diagram explaining the operation of the semiconductor device.

FIG. 37 is a diagram explaining the operation of the semiconductor device.

FIG. 38 is a diagram explaining the operation of the semiconductor device.

FIG. 39 is a diagram explaining the operation of the semiconductor device.

FIG. 40 is a diagram explaining the operation of the semiconductor device.

FIG. 41 is a diagram explaining the operation of the semiconductor device.

FIG. 42 is a diagram explaining a semiconductor device.

FIG. 43 is a diagram explaining the operation of the semiconductor device.

FIG. 44 is a diagram explaining a semiconductor device.

FIG. 45 is a diagram explaining a semiconductor device.

FIG. 46 is a diagram explaining a semiconductor device.

FIG. 47 is a diagram explaining a semiconductor device.

FIG. 48 is a diagram explaining a semiconductor device.

49A and 49B are diagrams illustrating a semiconductor device.

50A and 50B are diagrams illustrating a semiconductor device.

FIG. 51 is a diagram explaining a semiconductor device.

FIG. 52 is a diagram explaining a semiconductor device.

FIG. 53 is a diagram explaining a semiconductor device.

FIG. 54 is a diagram explaining a semiconductor device.

FIG. 55A is a diagram explaining the display device. 55B1 to 55B7 are diagrams illustrating structural examples of pixels.

FIG. 56 is a diagram explaining an example of the structure of a pixel.

57A1, 57A2, 57B, and 57C are diagrams illustrating structural examples of pixels.

58A to 58D are diagrams illustrating structural examples of light-emitting elements.

59A to 59D are diagrams showing structural examples of light-emitting elements.

60A to 60D are diagrams showing structural examples of light-emitting elements.

61A and 61B are diagrams showing structural examples of light-emitting elements.

62A to 62C are diagrams showing structural examples of light-emitting elements.

63A and 63B are perspective views of the display device.

Fig. 64A is a perspective view of the display device. Fig. 64B is a plan view of the display device.

Fig. 65 is a perspective view of the display device.

Fig. 66A is a perspective view of the display device. 66B and 66C are diagrams showing an example of a conductive layer.

Fig. 67 is a perspective view of the display device.

68A and 68B are perspective views of the display device.

69A to 69C are three-dimensional schematic views of the display module.

FIG. 70 is a cross-sectional view showing an example of a display device.

FIG. 71 is a cross-sectional view showing an example of a display device.

FIG. 72 is a cross-sectional view showing an example of a display device.

FIG. 73 is a cross-sectional view showing an example of a display device.

FIG. 74 is a cross-sectional view showing an example of a display device.

FIG. 75 is a cross-sectional view showing an example of a display device.

Fig. 76A is a block diagram of a display device. FIG. 76B is a timing chart explaining the operation of the display device.

Fig. 77A is a block diagram of a display device. FIG. 77B is a timing chart explaining the operation of the display device.

Fig. 78A is a block diagram of a display device. FIG. 78B is a timing chart explaining the operation of the display device.

FIG. 79A is a plan view showing a structural example of a transistor. 79B and 79C are cross-sectional views showing structural examples of transistors.

FIG. 80A is a diagram explaining the classification of crystal structures. Figure 80B is a diagram illustrating the XRD spectrum of the CAAC-IGZO film. Figure 80C is a diagram illustrating the nanobeam electron diffraction pattern of the CAAC-IGZO film.

81A to 81F are diagrams illustrating an example of electronic equipment.

82A to 82F are diagrams illustrating an example of electronic equipment.

83A and 83B are diagrams illustrating an example of electronic equipment.

FIG. 84 is a diagram illustrating an example of electronic equipment.

85A to 85C are diagrams showing evaluation results of Id-Vd characteristics of transistors.

FIG. 86 is a diagram showing the evaluation results of the dielectric breakdown voltage of the transistor.

Mode of carrying out the invention

Hereinafter, embodiments will be described with reference to the drawings. Note that the embodiments can be implemented in a plurality of different forms, and those of ordinary skill in the art can easily understand the fact that the manner and details can be changed without departing from the spirit and scope thereof. Various forms. Therefore, the present invention should not be construed as being limited only to the contents described in the following embodiments.

In this specification and others, a semiconductor device refers to a device that utilizes the characteristics of a semiconductor, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device including the circuit, and the like. In addition, a semiconductor device refers to any device that can function by utilizing the characteristics of a semiconductor. For example, as examples of the semiconductor device, there are an integrated circuit, a chip including the integrated circuit, or an electronic component housing the chip in a package. In addition, storage devices, display devices, light-emitting devices, lighting devices, electronic equipment, etc. themselves are semiconductor devices, and sometimes include semiconductor devices.

In addition, in this specification and the like, when it is described as "X and Y are connected", it means that the following are disclosed in the specification and the like: X and Y are electrically connected; X and Y are functionally connected; and Directly connected to Y. Therefore, the invention is not limited to the connection relationships shown in the drawings or the text. For example, other connection relationships are also described within the scope of the drawings or the text. X and Y are objects (for example, devices, components, circuits, wirings, electrodes, terminals, conductive films or layers, etc.).

As an example of a case where X and Y are electrically connected, more than one element capable of electrically connecting X and Y (for example, a switch, a transistor, a capacitive element, an inductor, a resistive element, a diode, a display device, light-emitting device or load, etc.).

As an example of a case where X and Y are functionally connected, there may be connected between X and Y more than one circuit capable of functionally connecting X and Y (for example, a logic circuit (inverter, NAND circuit, NOR circuits, etc.), signal conversion circuits (digital-to-analog conversion circuits, analog-to-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, buck circuits, etc.), changing the potential level of signals level shift circuits, etc.), voltage sources, current sources, switching circuits, amplifier circuits (circuits that can increase signal amplitude or current, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signals Generating circuits, storage circuits, control circuits, etc.). Note that, for example, even if there are other circuits sandwiched between X and Y, when the signal output from X is transmitted to Y, X and Y can be said to be functionally connected.

In addition, when it is clearly stated that "X and Y are electrically connected", it includes the following cases: the case where X and Y are electrically connected (in other words, the case where X and Y are connected with other components or other circuits sandwiched between them); and The case where X and Y are directly connected (in other words, the case where X and Y are connected without any other components or other circuits in between).

For example, it can be expressed as "X, Y, the source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor are electrically connected to each other, and X, the source (or first terminal, etc.) of the transistor , the drain (or second terminal, etc.) of the transistor is electrically connected to Y in sequence." Or, it can be expressed as "the source (or first terminal, etc.) of the transistor is electrically connected to X, the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and ), the drain (or second terminal, etc.) of the transistor and Y are electrically connected in sequence." Alternatively, it can be expressed as “X is electrically connected to Y through the source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor, and The drain (or second terminal, etc.) and Y of the transistor are set in order." By specifying the connection sequence in the circuit structure using the same expression method as in this example, the technical scope can be determined by distinguishing the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor. Note that this expression method is an example and is not limited to the above expression method. Here, X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films or layers, etc.).

Furthermore, even if independent components are electrically connected to each other on the circuit diagram, one component may have the functions of multiple components. For example, when a part of the wiring is used as an electrode, one conductive film has the functions of both components of the wiring and the electrode. Therefore, the category of “electrical connection” in this specification also includes the case where one conductive film has the functions of a plurality of constituent elements.

In this specification and the like, the "capacitive element" may include, for example, a circuit element having an electrostatic capacitance value higher than 0F, a wiring region having an electrostatic capacitance value higher than 0F, a parasitic capacitance, a gate capacitance of a transistor, and the like. Therefore, in this specification and the like, a "capacitive element" is not limited to a circuit element including a pair of electrodes and a dielectric between the electrodes, but also includes parasitic capacitance generated between wirings or capacitance generated in a transistor. The gate capacitance between one of the source and drain electrodes and the gate, etc. In addition, "capacitive element", "parasitic capacitance" or "gate capacitance" etc. can be called "capacitor" etc., and conversely, "capacitor" can be called "capacitive element", "parasitic capacitance" or "gate capacitance". "wait. In addition, the "pair of electrodes" of the "capacitor" may be referred to as a "pair of conductors", a "pair of conductive regions", a "pair of regions", etc. The electrostatic capacitance value may be, for example, 0.05 fF or more and 10 pF or less. In addition, for example, it may be 1 pF or more and 10 μF or less.

In this specification and others, a transistor includes three terminals: a gate, a source, and a drain. The gate serves as a control terminal that controls the amount of current flowing between the source and drain. The two terminals used as source or drain are the input and output terminals of the transistor. Depending on the conductivity type of the transistor (n-channel type or p-channel type) and the level of potential applied to the three terminals of the transistor, one of the two input and output terminals serves as the source and the other serves as the drain. Therefore, in this specification and the like, "source" and "drain" may be interchanged with each other. In this specification and others, when describing the connection relationship of a transistor, "one of the source and the drain" (the first electrode or the first terminal) or "the other of the source and the drain" (the second electrode) is used. or second terminal) expression. In addition, depending on the structure of the transistor, a back gate may be included in addition to the above three terminals. In this case, in this specification and the like, one of the gate electrode and the back gate electrode of the transistor may be called a first gate electrode, and the other of the gate electrode and the back gate electrode of the transistor may be called a second gate electrode. In addition, in the same transistor, the "gate" and "back gate" can sometimes be interchanged. In addition, when a transistor includes three or more gates, each gate may be referred to as a first gate, a second gate, a third gate, etc. in this specification and the like.

In addition, in this specification and the like, a "node" may be called a "terminal", "wiring", "electrode", "conductive layer", "conductor" or "impurity region" depending on the circuit structure or device structure. In addition, "terminals" or "wirings" etc. may be called "nodes".

In addition, in this specification and the like, ordinal numbers such as "first", "second", or "third" are added to avoid confusion of constituent elements. Therefore, this ordinal number does not limit the number of constituent elements. In addition, this ordinal word does not limit the order of the constituent elements. For example, a "first" component attached to one of the embodiments in this specification may be appended to a "second" component in another embodiment or claim. Furthermore, for example, in this specification and the like, a component referred to as "first" in one embodiment may be omitted in other embodiments or claims.

In addition, in this specification and the like, for the sake of convenience, the positional relationship of the constituent elements may be described with reference to the drawings by using words such as "upper", "lower", "upper" or "lower" to indicate the arrangement. In addition, the positional relationship of the constituent elements is appropriately changed depending on the direction in which each structure is described. Therefore, it is not limited to the words and phrases described in the specification, etc., and the words and phrases may be appropriately changed depending on the circumstances. For example, in the expression "insulator located on the top surface of the conductor", by rotating the direction of the drawing shown by 180 degrees, it may also be called "insulator located on the bottom surface of the conductor".

In addition, the terms "upper" and "lower" are not limited to the case where the positional relationship of the constituent elements is "right above" or "right below" and they are in direct contact. For example, the expression "electrode B on insulating layer A" does not necessarily mean that electrode B is formed on insulating layer A in direct contact, and may include other components between insulating layer A and electrode B.

In addition, in this specification and the like, terms such as "overlapping" are not limited to the state of the stacking order of the constituent elements. For example, the expression "electrode B overlapping with insulating layer A" does not necessarily mean that electrode B is formed on insulating layer A. It may also include a state in which electrode B is formed under insulating layer A or to the right of insulating layer A. The electrode B is formed on the side (or left side).

In addition, in this specification and the like, the terms "adjacent" and "close" are not limited to the case where the constituent elements are in direct contact. For example, the expression "electrode B adjacent to insulating layer A" does not necessarily require that the insulating layer A and the electrode B are formed in direct contact, and may include other components between the insulating layer A and the electrode B. .

In addition, in this specification and the like, words such as "film" and "layer" may be interchanged depending on the situation. For example, "conductive layer" may sometimes be converted into "conductive film". For example, "insulating film" may sometimes be converted into "insulating layer". In addition, depending on the situation, other words and phrases can sometimes be used instead of words such as "membrane" or "layer". For example, "conductive layer" or "conductive film" may sometimes be converted into "conductor". In addition, "conductive body" may sometimes be converted into "conductive layer" or "conductive film". For example, "insulating layer" or "insulating film" may sometimes be converted into "insulator". In addition, "insulator" may sometimes be converted into "insulating layer" or "insulating film".

Note that in this specification and the like, words such as "electrode", "wiring" and "terminal" do not functionally limit the constituent elements. For example, "electrodes" are sometimes used as part of "wiring" and vice versa. In addition, “electrode” or “wiring” also includes a case where a plurality of “electrodes” or “wiring” are formed into one body. Furthermore, for example, "terminal" is sometimes used as a part of "wiring" or "electrode" and vice versa. In addition, the term "terminal" also includes the case where a plurality of "electrodes", "wirings", "terminals", etc. are formed into one body. Thus, for example, an "electrode" may be part of a "wiring" or a "terminal". Furthermore, for example, a "terminal" may be a part of a "wiring" or an "electrode". In addition, words and phrases such as "electrode", "wiring" and "terminal" may be replaced by words and phrases such as "region".

In this manual, etc., the words "wiring", "signal line" or "power line" may be interchanged depending on the situation. For example, sometimes "wiring" can be transformed into "signal line". In addition, for example, "wiring" may be converted into "power line". Vice versa, sometimes "signal lines" and "power lines" can be transformed into "wiring". In addition, sometimes the "power line" can be converted into a "signal line". Vice versa, sometimes a "signal line" can be transformed into a "power line". In addition, depending on the situation, the "potential" applied to the wiring may be converted into a "signal". Vice versa, sometimes "signal" can be transformed into "potential".

In addition, in this specification and the like, a "switch" includes a plurality of terminals, and has a function of switching (selecting) conduction or non-conduction between terminals. For example, when a switch includes two terminals and there is conduction between the two terminals, the switch is in a "conducting state" or an "on state." In addition, when there is no conduction between the two terminals, the switch is in a "non-conduction state" or a "closed state". Note that "being switched to one of a conducting state and a non-conducting state" or "the switch maintains one of a conducting state and a non-conducting state" is sometimes referred to as a "controlled conduction state".

That is, a switch is a component that has the function of controlling whether or not current flows. Alternatively, a switch refers to a component that has the function of selecting and switching a current path. As an example, an electrical switch or a mechanical switch or the like may be used. In other words, switches are not limited to specific components as long as they can control current.

Examples of switches include transistors (such as bipolar transistors, MOS (Metal Oxide Semiconductor: Metal Oxide Semiconductor) transistors, etc.), diodes (such as PN diodes, PIN diodes, Schottky diodes, metal-insulator-metal (MIM); Metal Insulator Metal) diodes, metal-insulator-semiconductor (MIS; Metal Insulator Semiconductor) diodes, diode-connected transistors, etc.) or logic circuits that combine such components. When a transistor is used as a switch, the "on state" of the transistor refers to a state in which the source electrode and the drain electrode of the transistor are electrically short-circuited. In addition, the “non-conducting state” of a transistor refers to a state in which the source electrode and the drain electrode of the transistor are electrically disconnected. When using a transistor only as a switch, there is no particular restriction on the polarity (conductivity type) of the transistor.

Examples of mechanical switches include switches utilizing MEMS (microelectromechanical systems) technology. The switch has a mechanically movable electrode that is moved to select conduction or non-conduction.

In this specification, "parallel" refers to a state in which the angle formed by two straight lines is -10° or more and 10° or less. Therefore, the state where the angle is -5° or more and 5° or less is also included. "Approximately parallel" refers to a state where the angle formed by two straight lines is -30° or more and 30° or less. In addition, "vertical" refers to a state where the angle formed by two straight lines is 80° or more and 100° or less. Therefore, the state where the angle is 85° or more and 95° or less is also included. "Approximately perpendicular" refers to a state where the angle formed by two straight lines is 60° or more and 120° or less.

In addition, in this specification and the like, unless otherwise stated, when "the same", "identical", "equal" or "uniform" (including their synonyms) are mentioned regarding count values and measurement values, they include ± 20% error.

The embodiment described in this specification will be described with reference to the drawings. Note that the embodiments can be implemented in a plurality of different forms, and those of ordinary skill in the art can easily understand the fact that the manner and details can be changed without departing from the spirit and scope thereof. Various forms. Therefore, the present invention should not be construed as being limited only to the description of the embodiments. Note that in the structure of the invention according to the embodiment, the same reference numerals may be commonly used in different drawings to denote the same parts or parts having the same functions, and repeated descriptions may be omitted. In addition, when indicating parts having the same function, the same hatching is sometimes used without specifically attaching a reference numeral. For the sake of clarity, illustration of some components may be omitted in perspective views, plan views, etc.

In the drawings and the like of this specification, the size, thickness of a layer, or area may be exaggerated for clarity of explanation. Therefore, it is not limited to the dimensions, aspect ratio, etc. in the drawings. In addition, in the drawings, ideal examples are schematically shown, and therefore the present invention is not limited to the shapes, numerical values, etc. shown in the drawings. For example, this may include unevenness of signals, voltages, or currents caused by noise or timing deviations.

In addition, arrows indicating the X direction, the Y direction, and the Z direction may be attached to the drawings and the like according to this specification. In this specification and others, the "X direction" refers to the direction along the X-axis, and unless otherwise specified, the forward direction and the reverse direction may not be distinguished in some cases. "Y direction" and "Z direction" are also the same as "X direction". In addition, the X direction, the Y direction, and the Z direction are directions that cross each other. More specifically, the X direction, the Y direction, and the Z direction are directions orthogonal to each other. In this specification and the like, one of the X direction, the Y direction, and the Z direction may be referred to as the "first direction." In addition, the other is sometimes referred to as the "second direction". In addition, the remaining one is sometimes called the "third direction".

In this specification, etc., when the same symbol is used for multiple components and it is necessary to distinguish them, "A", "b", "_1", "[n]", "[m, n]", etc. may be added to the symbol. Symbols used for identification.

(Embodiment 1)

A semiconductor device 100A according to one embodiment of the present invention will be described. The semiconductor device 100A according to one embodiment of the present invention can be used, for example, in a pixel of a display device.

<Structure example>

FIG. 1 shows an example of the circuit configuration of the semiconductor device 100A. The semiconductor device 100A includes a pixel circuit 51A and a light-emitting element 61 . The pixel circuit 51A includes transistors M1 to M8 and capacitors C1 to C3. In this embodiment and others, unless otherwise stated, the transistors M1 to M8 are enhancement-type (normally-off) n-channel field effect transistors. Therefore, its threshold voltage (also called "Vth") is greater than 0V.

The gate of the transistor M1 is electrically connected to the wiring GLa, one of the source and the drain is electrically connected to the wiring DL, and the other of the source and the drain is electrically connected to the gate of the transistor M2. The transistor M1 has a function of selecting whether the gate of the transistor M2 and the wiring DL are in a conductive state or a non-conductive state.

Furthermore, the gate of the transistor M2 is electrically connected to one terminal of the capacitor C1, one of the source and the drain is electrically connected to the wiring 101, and the other of the source and the drain is electrically connected to the other terminal of the capacitor C1. In addition, transistor M2 includes a back gate. The back gate of transistor M2 is electrically connected to one terminal of capacitor C2. In addition, the other terminal of the capacitor C2 is electrically connected to the other one of the source and the drain of the transistor M2.

The gate of the transistor M3 is electrically connected to the wiring GLb, one of the source and the drain is electrically connected to one terminal of the capacitor C1, and the other of the source and the drain is electrically connected to the other terminal of the capacitor C1. The transistor M3 has a function of selecting whether the gate and the source of the transistor M2 are in a conductive state or a non-conductive state.

The gate of the transistor M4 is electrically connected to the wiring GLb, one of the source and the drain is electrically connected to the wiring 102, and the other of the source and the drain is electrically connected to one terminal of the capacitor C2. The transistor M4 has a function of selecting whether the wiring 102 and one terminal of the capacitor C2 are in a conductive state or a non-conductive state.

The gate of the transistor M5 is electrically connected to one terminal of the capacitor C3, and one of the source and the drain is electrically connected to the other of the source and the drain of the transistor M2. In addition, the other one of the source and the drain of the transistor M5 is electrically connected to the other terminal of the capacitor C3 and one terminal (eg, anode terminal) of the light emitting element 61 . In addition, the other terminal (eg, cathode terminal) of the light-emitting element 61 is electrically connected to the wiring 104 .

The gate of the transistor M6 is electrically connected to the wiring GLa, one of the source and the drain is electrically connected to the other of the source and the drain of the transistor M2, and the other of the source and the drain is electrically connected to the wiring 103. The transistor M6 has a function of selecting whether the other of the source and drain of the transistor M2 and the wiring 103 is in a conductive state or a non-conductive state.

The gate of the transistor M7 is electrically connected to the wiring GLC, one of the source and the drain is electrically connected to the wiring 102, and the other of the source and the drain is electrically connected to the gate of the transistor M5. The transistor M7 has a function of selecting whether the gate of the transistor M5 and the wiring 102 are in a conductive state or a non-conductive state.

The gate of the transistor M8 is electrically connected to the wiring GLd, one of the source and the drain is electrically connected to the gate of the transistor M5, and the other of the source and the drain is electrically connected to the wiring 103. The transistor M8 has a function of selecting whether the gate of the transistor M5 and the wiring 103 are in a conductive state or a non-conductive state.

In addition, the other terminal of the capacitor C1, the other terminal of the capacitor C2, the other of the source and the drain of the transistor M2, the other of the source and the drain of the transistor M3, the source and the drain of the transistor M5 The region where one of the source and the drain of the transistor M6 are electrically connected is also referred to as node ND1.

In addition, a region in which one terminal of the capacitor C2, the back gate of the transistor M2, and the other one of the source and drain of the transistor M4 are electrically connected is also referred to as node ND2.

In addition, a region where the other of the source and drain of the transistor M1, one of the source and the drain of the transistor M3, one terminal of the capacitor C1, and the gate of the transistor M2 are electrically connected is also called node ND3.

In addition, a region where the gate of the transistor M5, one terminal of the capacitor C3, the other of the source and drain of the transistor M7, and one of the source and the drain of the transistor M8 are electrically connected is also called node ND4.

The capacitor C1 has a function of maintaining the potential difference between the other one of the source and drain of the transistor M2 and the gate of the transistor M2 when the node ND3 is in the floating state. The capacitor C2 has a function of maintaining a potential difference between the other one of the source and drain of the transistor M2 and the back gate of the transistor M2 when the node ND2 is in a floating state. The capacitor C3 has a function of maintaining the potential difference between the other one of the source and drain of the transistor M5 and the gate of the transistor M5 when the node ND4 is in the floating state.

The pixel circuit 51A according to one embodiment of the present invention can use transistors including various semiconductors. For example, a transistor including a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in the channel formation region may be used. Note that the invention is not limited to a single semiconductor whose main component is composed of a single element (for example, silicon (Si) or germanium (Ge)). A compound semiconductor (for example, silicon germanium (SiGe) or gallium arsenide (GaAs)) or an oxide semiconductor may be used. Material semiconductors, etc.

In addition, in this embodiment and the like, an example is shown in which the semiconductor device 100A is configured using n-channel transistors, but one aspect of the present invention is not limited to this. Some or all of the transistors constituting the semiconductor device 100A may use p-channel transistors.

As an example, FIG. 2 shows an example of the circuit structure of a semiconductor device 100A using p-channel transistors as transistors M6 to M8 among the transistors constituting the pixel circuit 51A. In the circuit structure shown in FIG. 2 , the gate of the transistor M6 is electrically connected to the wiring GLe.

In addition, transistors of various structures can be used in the pixel circuit 51A as one embodiment of the present invention. For example, various structures such as planar type, FIN (fin) type, TRI-GATE (tri-gate) type, top gate type, bottom gate type, or double gate type (structure with gates arranged above and below the channel) can be used. transistor. In addition, as a transistor according to one embodiment of the present invention, a MOS transistor, a junction transistor, a bipolar transistor, or the like can be used.

For example, as the transistor constituting the pixel circuit 51A, it is preferable to use an OS transistor (a transistor including an oxide semiconductor in a semiconductor layer forming a channel. The band gap of the oxide semiconductor is 2 eV or more, so the off-state current is extremely small.

The off-state current value of an OS transistor with a channel width of 1 μm at room temperature can be below 1aA (1×10 ^-18 A), below 1zA (1×10 ^-21 A), or below 1yA (1×10 ^-24 A) . Note that the off-state current value of a Si transistor (a transistor containing silicon in the semiconductor layer forming the channel) of 1 μm per channel width at room temperature is 1 fA (1×10 ^-15 A) or more and 1 pA (1×10 ^{- 12} A) below. Therefore, it can also be said that the off-state current of the OS transistor is about 10 bits lower than that of the Si transistor.

When an OS transistor is used as a transistor constituting the pixel circuit 51A, charges written to each node can be retained for a long period of time. For example, when displaying a static image that does not need to be rewritten for each frame, the image can be continued to be displayed even if the operation of the peripheral drive circuit is stopped. This driving method of stopping the operation of the peripheral driving circuit while displaying a static image is also called "idling stop (IDS: idling stop) driving". By performing idling stop driving, the power consumption of the display device can be reduced.

In addition, even in a high-temperature environment, the off-state current of the OS transistor hardly increases. Specifically, even at ambient temperatures above room temperature and below 200°C, the off-state current of the OS transistor hardly increases. In addition, even in a high-temperature environment, the on-state current of the OS transistor does not decrease easily. Semiconductor devices including OS transistors operate stably and have high reliability even in high-temperature environments.

In addition, in OS transistors, the insulation withstand voltage between the source and drain is very high. By using the OS transistor as the transistor constituting the pixel circuit 51A, the OS transistor can operate stably even when the potential difference between the potential Va and the potential Vc is large. This allows the OS transistor to realize a highly reliable semiconductor device. In particular, it is preferable to use an OS transistor for one or both of the transistor M2 and the transistor M5.

The semiconductor layer of the OS transistor preferably contains, for example, indium, M (M is selected from the group consisting of gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, One or more of neodymium, hafnium, tantalum, tungsten and magnesium) and zinc. In particular, M is preferably one or more selected from aluminum, gallium, yttrium and tin.

In particular, as the semiconductor layer, it is preferable to use an oxide (also described as "IGZO") containing indium (In), gallium (Ga), and zinc (Zn). Alternatively, as the semiconductor layer, an oxide (also described as "IAZO") containing indium (In), aluminum (Al), and zinc (Zn) may be used. Alternatively, as the semiconductor layer, an oxide (also described as "IAGZO") containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) may be used.

When an In-M-Zn oxide is used for the semiconductor layer, the atomic number ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic number ratio of M. Examples of the atomic number ratio of the metal elements in such an In-M-Zn oxide include a composition of In:M:Zn=1:1:1 or a composition close thereto, In:M:Zn=1:1: 1.2 or a composition near it, In: M: Zn = 1: 3: 2 or a composition near it, In: M: Zn = 1: 3: 4 or a composition near it, In: M: Zn = 2: 1 : 3 or a composition near it, In: M: Zn = 3: 1: 2 or a composition near it, In: M: Zn = 4: 2: 3 or a composition near it, In: M: Zn = 4: 2: 4.1 or a composition near it, In: M: Zn = 5: 1: 3 or a composition near it, In: M: Zn = 5: 1: 6 or a composition near it, In: M: Zn = 5 : 1:7 or a composition near it, In: M: Zn = 5: 1: 8 or a composition near it, In: M: Zn = 6: 1: 6 or a composition near it, or In: M: Zn = 5:2:5 or its nearby composition, etc. Note that the nearby composition includes a range of ±30% of the desired atomic number ratio.

For example, when the atomic number ratio is described as In:Ga:Zn=4:2:3 or a composition close to it, it includes the following cases: when the atomic number ratio of In is 4, the atomic number ratio of Ga is 1 or more and 3 or less, and the atomic number ratio of Zn is 2 or more and 4 or less. In addition, when the composition is described as having an atomic number ratio of In:Ga:Zn=5:1:6 or thereabouts, it includes the following cases: when the atomic number ratio of In is 5, the atomic number ratio of Ga is greater than 0.1 and is 2 or less, and the atomic number ratio of Zn is 5 or more and 7 or less. In addition, when the composition is described as having an atomic number ratio of In:Ga:Zn=1:1:1 or thereabouts, it includes the following cases: when the atomic number ratio of In is 1, the atomic number ratio of Ga is greater than 0.1 and is 2 or less, and the atomic number ratio of Zn is greater than 0.1 and is 2 or less.

Note that the transistor M2 has a function of controlling the amount of current Ie flowing through the light-emitting element 61 . That is, the transistor M2 has a function of controlling the amount of light emitted by the light emitting element 61 . Therefore, in this specification and the like, the transistor M2 is sometimes called a "driving transistor".

In addition, the transistor M5 has a function of switching conduction and non-conduction between the transistor M2 and the light-emitting element 61 . When the transistor M5 is in the off state, the light emitting element 61 is quenched, and when the transistor M5 is in the on state, the light emitting element 61 can emit light. Therefore, transistor M5 is sometimes called a "light-emitting transistor." In order for the amount of current determined by the driving transistor to reliably flow through the light-emitting element 61, the transistor M5 must be in an on state regardless of the values of the source potential and the drain potential.

Among the transistors constituting the pixel circuit 51A, the transistor M1 , the transistor M3 , the transistor M4 , the transistor M6 , the transistor M7 , and the transistor M8 are used as switches. Therefore, the semiconductor device 100A may be represented by FIG. 3 .

In addition, transistor M5 is also used as a switch. Therefore, the semiconductor device 100A can also be represented by FIG. 4 . Elements capable of realizing the function of a switch may be used instead of the transistor M1 and the transistors M3 to M8.

The transistors constituting the pixel circuit 51A may be transistors including a back gate. By providing the back gate, the electric field generated outside the transistor is less likely to affect the channel formation region, thereby stabilizing the operation of the semiconductor device using the transistor and improving the reliability of the semiconductor device. In addition, by controlling the potential of the back gate, the threshold voltage of the transistor can be changed.

FIG. 5 shows a circuit structure example of the semiconductor device 100A in which not only the transistor M2 but also the transistor M1 and the transistors M3 to M8 are transistors including a back gate. FIG. 5 shows an example in which the gate and back gate of the transistor M1 and each of the transistors M3 to M8 are electrically connected. However, it is not necessary that all transistors constituting the semiconductor device be provided with back gates.

In addition, the gate electrode and the back gate electrode may not be electrically connected and an arbitrary potential may be supplied to the back gate electrode. Note that the potential supplied to the back gate is not limited to a fixed potential. The potential supplied to the back gates of the transistors constituting the semiconductor device may be different or the same for each transistor.

FIG. 6 shows a plan layout of the semiconductor device 100A shown in FIG. 5 . In the plan layout shown in FIG. 6 , the semiconductor layer 111 of the transistor M1 is provided on the wiring GLa. The wiring GLa and the semiconductor layer 111 have regions overlapping each other. In addition, a part of the wiring GLa is used as the back gate of the transistor M1. The conductor 112 is used as a gate of the transistor M1 and is electrically connected to the wiring GLa in the contact hole 113 .

Furthermore, the semiconductor layer 114 of the transistor M3 is provided on the wiring GLb. The wiring GLb and the semiconductor layer 114 have regions overlapping each other. In addition, a part of the wiring GLb is used as the back gate of the transistor M3. The conductor 115 is used as a gate of the transistor M3 and is electrically connected to the wiring GLb in the contact hole 116 .

Furthermore, the semiconductor layer 117 of the transistor M4 is provided on the wiring GLb. The wiring GLb and the semiconductor layer 117 have regions overlapping each other. In addition, a part of the wiring GLb is used as the back gate of the transistor M4. The conductor 118 is used as a gate of the transistor M4 and is electrically connected to the wiring GLb in the contact hole 119 .

Furthermore, the semiconductor layer 121 of the transistor M6 is provided on the wiring GLa. The wiring GLa and the semiconductor layer 121 have regions overlapping each other. In addition, a part of the wiring GLa is used as the back gate of the transistor M6. The conductor 122 is used as a gate of the transistor M6 and is electrically connected to the wiring GLa in the contact hole 123 .

Furthermore, the semiconductor layer 124 of the transistor M7 is provided on the wiring GLC. The wiring GLC and the semiconductor layer 124 have regions overlapping each other. In addition, a part of the wiring GLC is used as the back gate of the transistor M7. The conductor 125 is used as a gate of the transistor M7 and is electrically connected to the wiring GLC in the contact hole 126 .

Furthermore, the semiconductor layer 127 of the transistor M8 is provided on the wiring GLd. The wiring GLd and the semiconductor layer 127 have regions overlapping each other. In addition, a part of the wiring GLd is used as the back gate of the transistor M8. The conductor 128 is used as a gate of the transistor M8 and is electrically connected to the wiring GLd in the contact hole 129 .

One of the source and the drain of the transistor M1 is electrically connected to the wiring DL through the conductive layer 131 . The other one of the source electrode and the drain electrode of the transistor M1 is electrically connected to the conductive layer 133 through the conductive layer 132 .

Furthermore, the semiconductor layer 134 of the transistor M2 is provided on the conductive layer 136 . The conductive layer 136 and the semiconductor layer 134 have regions overlapping each other. A portion of conductive layer 136 is used as the back gate of transistor M2. Furthermore, the conductive layer 135 electrically connected to the conductive layer 133 is used as a gate electrode of the transistor M2.

One of the source and the drain of the transistor M2 is electrically connected to the wiring 101 through the conductive layer 137 . The other one of the source and drain of transistor M2 is electrically connected to conductive layer 138 . The area where the conductive layer 133 and the conductive layer 138 overlap is used as the capacitor C1. The area where conductive layer 136 overlaps conductive layer 138 is used as capacitor C2.

Furthermore, the semiconductor layer 142 of the transistor M5 is provided on the conductive layer 141 . The conductive layer 141 and the semiconductor layer 142 have regions overlapping each other. A portion of the conductive layer 141 is used as the back gate of the transistor M5. The conductor 143 is used as the gate of the transistor M5 and is electrically connected to the wiring GLC in the contact hole 144 .

One of the source and drain of transistor M5 is electrically connected to conductive layer 138 . The other one of the source electrode and the drain electrode of the transistor M5 is electrically connected to the conductive layer 145 . The area where the conductive layer 141 and the conductive layer 145 overlap is used as the capacitor C3. The conductive layer 145 is electrically connected to the light emitting element 61 .

Furthermore, one of the source and the drain of the transistor M5 is electrically connected to the wiring 102 through the conductive layer 146 . The other of the source and the drain of the transistor M5 and one of the source and the drain of the transistor M8 are electrically connected to the conductive layer 141 through the conductive layer 147 . The other one of the source and the drain of the transistor M8 is electrically connected to the wiring 103 through the conductive layer 148 .

In addition, the conductive layer 138 is used as the node ND1. Conductive layer 136 is used as node ND2. Conductive layer 133 is used as node ND3. The conductive layer 141 is used as node ND4.

In addition, as shown in FIG. 7 , a wiring GLe may be provided so that the gate of the transistor M6 is electrically connected to the wiring GLe. In addition, a wiring GLf may be provided so that the gate of the transistor M4 and the wiring GLf are electrically connected. By arranging the wiring GLe and the wiring GLf, the on and off states of the transistors M1 to M8 can be controlled respectively.

Furthermore, as shown in FIG. 8 , one of the source and the drain of the transistor M2 and one of the source and the drain of the transistor M7 may be electrically connected to the wiring 101 . In addition, the wiring 103 and the wiring 104 may be electrically connected. That is, the cathode of the light-emitting element 61 and the wiring 103 may be electrically connected.

In addition, when the gate capacitance of the transistor M2 is sufficiently large, the capacitor C1 does not need to be formed. When the back gate capacitance of the transistor M2 is sufficiently large, the capacitor C2 does not need to be formed. When the gate capacitance of the transistor M5 is sufficiently large, the capacitor C3 does not need to be formed.

Furthermore, as shown in FIG. 9 , one of the source and the drain of the transistor M2 , one of the source and the drain of the transistor M4 , and one of the source and the drain of the transistor M7 may be electrically connected to the wiring 101 . connect.

Furthermore, as shown in FIG. 10 , one of the source and drain of the transistor M2 , one of the source and the drain of the transistor M7 , and the other of the source and drain of the transistor M6 may be connected to the wiring 101 Electrical connection.

In addition, as shown in FIG. 11 , one of the source and drain of the transistor M2 , one of the source and the drain of the transistor M4 , one of the source and the drain of the transistor M7 , and one of the source and drain of the transistor M6 may be used. The other one of the source electrode and the drain electrode is electrically connected to the wiring 101 . In the circuit structure shown in FIGS. 10 and 11 , the formation of the transistor M8 and the wiring GLd can be omitted.

Furthermore, as shown in FIG. 12 , one of the source and the drain of the transistor M4 may be electrically connected to the wiring 102 , and one of the source and the drain of the transistor M7 may be electrically connected to the wiring 106 . Alternatively, the other of the source and drain of the transistor M6 may be electrically connected to the wiring 103 , and one of the source and the drain of the transistor M8 may be electrically connected to the wiring 107 .

In addition, as shown in FIG. 13 , part or all of the transistors M6 , M7 , and M8 may be replaced with diodes. By replacing the transistor M7 with a diode, formation of the wiring GLC can be omitted. By replacing the transistor M8 with a diode, formation of the wiring GLd can be omitted.

In addition, as shown in FIG. 14 , part or all of the transistors M4 , M6 , M7 , and M8 may be replaced with diodes.

In addition, as shown in FIG. 15 , the transistor M9 may be provided between the gate of the transistor M2 and the wiring 103 .

The transistors constituting the pixel circuit 51A may be single-gate transistors including one gate between the source and the drain, or may be double-gate transistors. FIG. 16A shows an example of a circuit diagram symbol of the double-gate transistor 180A.

The transistor 180A has a structure in which the transistor Tr1 and the transistor Tr2 are connected in series. In FIG. 16A , one of the source and the drain of the transistor Tr1 is electrically connected to the terminal S, the other of the source and the drain of the transistor Tr1 is electrically connected to one of the source and the drain of the transistor Tr2, and The other one of the source and the drain of the transistor Tr2 is electrically connected to the terminal D. In addition, in FIG. 16A , the gate of the transistor Tr1 is electrically connected to the gate of the transistor Tr2 and is electrically connected to the terminal G.

The transistor 180A shown in FIG. 16A has a function of switching conduction and non-conduction between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor 180A of the double-gate transistor includes the transistor Tr1 and the transistor Tr2 and is used as one transistor. That is, in FIG. 16A , one of the source and the drain of the transistor 180A is electrically connected to the terminal S, the other of the source and the drain is electrically connected to the terminal D, and the gate is electrically connected to the terminal G.

In addition, the transistors constituting the pixel circuit 51A may be tri-gate transistors. FIG. 16B shows an example of a circuit diagram symbol of the tri-gate transistor 180B.

The transistor 180B has a structure in which the transistor Tr1, the transistor Tr2, and the transistor Tr3 are connected in series. In FIG. 16B , one of the source and drain of the transistor Tr1 is electrically connected to the terminal S, and the other of the source and drain of the transistor Tr1 is electrically connected to one of the source and drain of the transistor Tr2 . The other of the source and the drain of Tr2 is electrically connected to one of the source and drain of the transistor Tr3, and the other of the source and the drain of the transistor Tr3 is electrically connected to the terminal D. In addition, in FIG. 16B , the gates of the transistor Tr1 , the gate of the transistor Tr2 , and the gate of the transistor Tr3 are electrically connected to each other and to the terminal G.

The transistor 180B shown in FIG. 16B has a function of switching conduction and non-conduction between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor 180B of the tri-gate type transistor includes the transistor Tr1, the transistor Tr2, and the transistor Tr3 and is used as one transistor. That is, in FIG. 16B , one of the source and the drain of the transistor 180B is electrically connected to the terminal S, the other of the source and the drain is electrically connected to the terminal D, and the gate is electrically connected to the terminal G.

In addition, the transistors constituting the pixel circuit 51A may have a structure in which four or more transistors are connected in series. In the transistor 180C shown in FIG. 16C, six transistors (transistors Tr1 to transistors Tr6) are connected in series. In addition, the gates of the six transistors are electrically connected to the terminal G.

The transistor 180C shown in FIG. 16C has a function of switching conduction and non-conduction between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor 180C includes the transistors Tr1 to Tr6 and is used as one transistor. That is, in FIG. 16C , one of the source and the drain of the transistor 180C is electrically connected to the terminal S, the other of the source and the drain is electrically connected to the terminal D, and the gate is electrically connected to the terminal G.

A transistor such as transistor 180A, transistor 180B, and transistor 180C, which includes a plurality of gates and is electrically connected to each other, is sometimes called a “multi-gate transistor” or a “multi-gate transistor.”

For example, when operating a transistor in a saturation region, the channel length of the transistor may be lengthened in order to improve the electrical characteristics in the saturation region. To implement transistors with long channel lengths, multi-gate transistors can also be used.

As the light-emitting element 61, EL elements (EL elements including organic and inorganic substances, organic EL elements, or inorganic EL elements), LEDs (white LED, red LED, green LED, blue LED, etc.), micro LEDs, QLED ( Various display elements such as Quantum-dotLight Emitting Diode (Quantum-dotLight Emitting Diode) or electron-emitting elements.

<Work example>

Next, an operation example of the semiconductor device 100A shown in FIG. 1 will be described with reference to the drawings. FIG. 17 is a timing chart for explaining an operation example of the semiconductor device 100A. 18 to 24 are circuit diagrams for explaining an operation example of the semiconductor device 100A.

The wiring DL is supplied with the video signal Vdata. The wiring 101 is supplied with the potential Va, the wiring 102 is supplied with the potential V1, the wiring 103 is supplied with the potential V0, and the wiring 104 is supplied with the potential Vc. In addition, either the potential H or the potential L is supplied to each of the wiring GLa, the wiring GLb, the wiring GLc, and the wiring GLd.

The potential Va is the anode potential, and the potential Vc is the cathode potential. In addition, the potential V1 is a higher potential than the potential V0, and is also a potential at which the transistor can be turned on by supplying the potential V1 to the gate of the transistor. In addition, the potential V0 may be a potential at which the transistor is turned off by supplying the potential V0 to the gate of the transistor. The potential V0 is, for example, 0V or the potential L. In this embodiment and others, the potential V0 is set to 0V and the potential V1 is set to 3V. In addition, the potential Va is set to 15V, and the potential Vc is set to 0V.

The semiconductor device 100A has a function of controlling the magnitude of the current Ie (see FIG. 23 ) flowing through the light-emitting element 61 based on the video signal Vdata supplied from the wiring DL. The light-emitting brightness of the light-emitting element 61 is controlled according to the magnitude of the current Ie.

Note that in the drawings, symbols indicating potential (also referred to as "potential symbols") such as "H", "L", "V0", or "V1" may be attached adjacent to terminals, wiring, etc. In order to make it easier to understand the potential changes of terminals, wiring, etc., potential symbols attached to terminals, wiring, etc. that have undergone potential changes are sometimes shown in a framed format. In addition, an “×” symbol may be added overlapping with a transistor in an off state.

The current Ie flowing through the light emitting element 61 is mainly determined by the video signal Vdata and the Vth of the transistor M2. Therefore, when the Vth of the transistor M2 included in each pixel circuit is different, even if the same video signal Vdata is supplied to a plurality of pixel circuits, the current Ie will be different for each pixel. Therefore, unevenness in the Vth of the transistor M2 is a cause of deterioration in display quality.

Then, by obtaining the Vth of the transistor M2 for each pixel, the unevenness of the current Ie is reduced. Note that the operation of obtaining the Vth of the transistor M2 is sometimes called "threshold correction operation."

[Vth correction work]

First, the reset operation is performed during period T11. Specifically, the potential H is supplied to the wiring GLa, the wiring GLb, and the wiring GLd, and the potential L is supplied to the wiring GLc (see FIG. 18 ). Note that in this specification and the like, "potential H" is a potential that turns an n-channel transistor into an on state, and is also a potential that turns a p-channel transistor into an off state. In addition, "potential L" is a potential that turns an n-channel transistor into an off state, and is also a potential that turns a p-channel transistor into an on-state.

Therefore, the transistors M1, M3, M4, M6, and M8 are in the on state, and the transistor M7 is in the off state.

In addition, the node ND1 is supplied with the potential V0 through the transistor M6. Furthermore, the node ND3 is supplied with the potential V0 through the transistor M6 and the transistor M3. In addition, the node ND2 is supplied with the potential V1 through the transistor M4. In addition, the node ND4 is supplied with the potential V0 through the transistor M8. Therefore, transistor M5 is off.

In addition, during the period T11, the wiring DL and the wiring 103 are in a conductive state through the transistor M1, the transistor M3, and the transistor M6. Therefore, during the period T11, it is preferable that the wiring DL and the wiring 103 have the same potential or that the wiring DL be in a floating state. In addition, when the pixel circuit 51A has the structure of FIG. 7 , the wiring GLa and the wiring GLe are separated. Therefore, by supplying the potential L to the wiring GLa and the potential H to the wiring GLe, the reset operation in the period T11 can be performed.

Next, in the period T12, the potential L is supplied to the wiring GLa (see FIG. 19 ). At this time, the transistor M1 and the transistor M6 are in the off state.

Since the potential of the node ND2 is the potential V1, the transistor M2 is in an on state. Therefore, the electric charge passes through the wiring 101 and the transistor M2, and the potential of the node ND1 rises. In addition, since the transistor M3 is also in the on state, the potential of the node ND3 also increases. Specifically, the potentials of the nodes ND1 and ND3 rise to a value obtained by subtracting the Vth of the transistor M2 from the potential V1.

Next, in period T13, potential L is supplied to wiring GLb (see FIG. 20 ). Transistor M3 and transistor M4 are in an off state. Thereby, the node ND1, the node ND2, and the node ND3 are in a floating state, and the charge supplied to each node is maintained.

[Data writing work]

In the period T14, the potential H is supplied to the wiring GLa, the potential H is supplied to the wiring GLc, and the potential L is supplied to the wiring GLd (see FIG. 21 ). At this time, the transistor M1 is in the on state, and the node ND3 is supplied with the video signal Vdata. In addition, the transistor M6 is in the on state, and the node ND1 is supplied with the potential V0.

The node ND1 and the node ND2 form capacitive coupling through the capacitor C2. Therefore, when the potential of the node ND1 changes from V1-Vth to V0, the potential of the node ND2 also changes similarly. In this embodiment and others, since the potential V0 is 0V, the potential of the node ND2 is represented by the potential V1- (potential V1-Vth). That is, the potential of node ND2 is Vth.

In addition, the transistor M7 is in the on state and the transistor M8 is in the off state, whereby the node ND4 is supplied with the potential V1. Furthermore, the transistor M5 is in the on state, and the potential of the anode terminal of the light-emitting element 61 becomes the potential V0.

Next, in the period T15, the potential L is supplied to the wiring GLC (see FIG. 22 ). At this time, transistor M7 is in an off state and node ND4 is in a floating state.

[Glow work]

In the period T16, the potential L is supplied to the wiring GLa (see FIG. 23). At this time, the transistor M1 and the transistor M6 are in the off state. Electric current flows from wiring 101 to wiring 104 . That is, the current Ie flows through the light-emitting element 61, and the light-emitting element 61 emits light with a brightness corresponding to the current Ie. In addition, when a current flows from the wiring 101 to the wiring 104 , the potentials of the node ND1 and the anode terminal of the light-emitting element 61 rise.

In addition, the node ND2 and the node ND3 are in a floating state. Node ND1 and node ND3 form capacitive coupling through capacitor C1. During the period T16, when the potential of the node ND1 changes from the potential V0 to the potential Va1, the potential of the node ND3 also changes similarly. Here, the potential of the node ND3 is the video signal Vdata + the potential Va1. That is, even if the source potential of the transistor M2 changes, the potential difference (voltage) between the gate and the source of the transistor M2 maintains the video signal Vdata.

Similarly, as the potential of node ND1 changes, the potential of node ND2 becomes Vth + potential Va1. Therefore, the potential difference between the back gate and the source of transistor M2 maintains Vth.

In addition, the anode terminal of the light-emitting element 61 and the node ND4 are capacitively coupled via the capacitor C3. Accordingly, when the potential of the anode terminal of the light-emitting element 61 changes from the potential V0 to the potential Va2, the potential of the node ND4 also changes similarly. Here, the potential of the node ND4 is the potential V1 + the potential Va2. That is, even if the potential of the anode terminal of the light-emitting element 61 changes, the potential difference (voltage) between the gate and the source of the transistor M5 maintains the potential V1 - the potential V0.

For example, when the gate of the transistor M5 has a fixed potential, when the source potential of the transistor M5 rises, the potential difference between the gate and the source becomes smaller. When the potential difference between the gate and the source is less than the threshold voltage of the transistor M5, the transistor M5 is in a closed state. Therefore, even when the anode potential is raised, a high potential needs to be supplied to the gate, and a power supply or a power supply circuit needs to be provided.

In the semiconductor device 100A according to one embodiment of the present invention, the capacitor C3 is provided between the gate and the source of the transistor M5 to form a bootstrap circuit. Even if the anode potential is increased, the on state of the transistor M5 can be maintained without providing a power supply. circuit. Therefore, the current Ie is stably supplied to the light-emitting element 61. Note that capacitor C3 is sometimes referred to as the "bootstrap capacitor". In addition, capacitor C1 and capacitor C2 are each used as a bootstrap capacitor.

The semiconductor device 100A according to one embodiment of the present invention is suitably used not only for a single-structure light-emitting element but also for a series-structured light-emitting element that requires a larger driving voltage than a single-structure light-emitting element. Note that the structure of the light-emitting element will be described later.

In addition, as described above, the amount of current Ie flowing through the light-emitting element 61 is determined by the video signal Vdata and the Vth of the transistor M2. In the semiconductor device 100A according to one embodiment of the present invention, by performing the threshold correction operation, the amount of current Ie flowing through the light-emitting element 61 is controlled by the video signal Vdata.

The light-emitting brightness of the light-emitting element 61 is controlled by the video signal Vdata, so during the light-emitting operation, the transistor M5 needs to be in the on state reliably. In the semiconductor device 100A according to one embodiment of the present invention, the transistor M5 can be reliably turned on during the light emission operation. By using the semiconductor device 100A according to one embodiment of the present invention in a display device, the current Ie can be accurately controlled, thereby improving the color reproducibility of halftones in the display device. Therefore, the display quality of the display device can be improved.

[quenching work]

In the period T17, the potential H is supplied to the wiring GLd (see FIG. 24). At this time, transistor M8 is on. Therefore, the potential V0 is supplied from the wiring 103 to the node ND4, and the transistor M5 is in the off state. When the transistor M5 is in the off state, current does not flow through the light-emitting element 61, so the light emission of the light-emitting element 61 stops.

A display device using a light-emitting element such as an EL element as a display element can continuously cause the light-emitting element to emit light during one frame period. This driving method is also called "holding type" or "holding type drive". By adopting retention driving as a driving method of a display device, flickering of the display screen and the like can be reduced. On the other hand, retention-type driving is prone to afterimages and blurring of images when displaying moving images. The resolution perceived by humans when displaying moving images is also called "moving image resolution". In other words, the dynamic image resolution of the hold-type driver is likely to decrease.

In addition, "black insertion drive" is known as a method of improving afterimages and blurring of images when displaying moving images. "Black insertion drive" is also called "pseudo impulse type" or "pseudo impulse type drive". Black insertion driving is a driving method that performs black display every other frame or performs black display during a predetermined period in one frame.

The semiconductor device 100A according to one embodiment of the present invention easily implements black insertion driving through quenching operation. A display device using the semiconductor device 100A according to one embodiment of the present invention is less likely to have a moving image resolution that decreases, thereby enabling display of moving images with high display quality.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 2)

In this embodiment, a semiconductor device 100B according to one embodiment of the present invention will be described. Semiconductor device 100B is a modified example of semiconductor device 100A. Therefore, in order to reduce repetitive description, the differences between the semiconductor device 100B and the semiconductor device 100A will be mainly described.

<Structure example>

FIG. 25 shows an example of the circuit configuration of the semiconductor device 100B. The semiconductor device 100B includes a pixel circuit 51B and a light-emitting element 61 . The pixel circuit 51B has a structure in which the transistor M8 is removed from the pixel circuit 51A. Therefore, the wiring GLd electrically connected to the gate of the transistor M8 can be deleted. In addition, one of the source and the drain of the transistor M7 is electrically connected to the wiring GLC, and the gate of the transistor M7 is electrically connected to the wiring 105 .

<Work example>

Next, an operation example of the semiconductor device 100B will be described with reference to the drawings. FIG. 26 is a timing chart for explaining an operation example of the semiconductor device 100B. 27 to 32 are circuit diagrams for explaining an operation example of the semiconductor device 100B.

The wiring 105 is supplied with the potential V2. The potential V2 is higher than the potential V1. In addition, the potential V2 is a potential H or lower. In this embodiment and others, the potential V2 is set to 6V.

[Vth correction work]

First, the reset operation is performed during period T21. Specifically, the potential H is supplied to the wiring GLa and the wiring GLb, and the potential L is supplied to the wiring GLc (see FIG. 27 ). Therefore, the transistor M1, the transistor M3, the transistor M4, the transistor M6 and the transistor M7 are in an on state.

In addition, the node ND1 is supplied with the potential V0 through the transistor M6. Furthermore, the node ND3 is supplied with the potential V0 through the transistor M6 and the transistor M3. In addition, the node ND2 is supplied with the potential V1 through the transistor M4. In addition, the node ND4 is supplied with the potential L through the transistor M7. Therefore, transistor M5 is off.

In addition, similarly to the above-mentioned period T11, in the period T21, it is also preferable that the wiring DL and the wiring 103 have the same potential or that the wiring DL be in a floating state.

Next, in the period T22, the potential L is supplied to the wiring GLa (see FIG. 28 ). At this time, the transistor M1 and the transistor M6 are in the off state. Similar to the above-described period T12, the potentials of the nodes ND1 and ND3 rise to a value obtained by subtracting the Vth of the transistor M2 from the potential V1.

Next, in period T23, potential L is supplied to wiring GLb (see FIG. 29 ). At this time, the transistor M3 and the transistor M4 are in the off state. The node ND1, the node ND2, and the node ND3 are in a floating state and maintain the charge supplied to each node.

[Data writing work]

In the period T24, the potential H is supplied to the wiring GLa, and the potential H is supplied to the wiring GLC (see FIG. 30). At this time, the transistor M1 is in the on state, and the node ND3 is supplied with the video signal Vdata. In addition, the transistor M6 is in the on state, and the node ND1 is supplied with the potential V0. Similar to the above-mentioned period T14, the potential of the node ND2 is Vth.

In addition, the transistor M7 is in the on state, and charges are supplied from the wiring GLC to the node ND4. The potential of the node ND4 rises to a value obtained by subtracting the Vth of the transistor M7 from the potential H. In this embodiment and others, the potential H is 6V. When the Vth of the transistor M5 and the transistor M7 is 1V, the potential of the node ND4 (potential H-Vth) is 5V. Therefore, transistor M5 is on.

[Glow work]

During the period T25, the potential L is supplied to the wiring GLa (see FIG. 31). At this time, the transistor M1 and the transistor M6 are in the off state. Similar to the above-mentioned period T16, current flows from the wiring 101 to the wiring 104, and the light-emitting element 61 emits light with a brightness corresponding to the current Ie. In addition, the potentials of the node ND1 and the anode terminal of the light-emitting element 61 increase. The potential of node ND1 is potential Va1, and the potential of the anode terminal is potential Va2. In addition, the potential of the node ND3 is the video signal Vdata + the potential Va1, and the potential of the node ND2 is the Vth + the potential Va1.

The node ND4 is in a floating state, and the potential difference between the node ND4 and the anode terminal is maintained through the capacitor C3. Therefore, as the potential of the anode terminal of the light-emitting element 61 changes, the potential of the node ND4 also changes. When the potential of the anode terminal rises from the potential V0 to the potential Va2, the potential of the node ND4 becomes the potential H-Vth + the potential Va2. That is, even if the potential of the anode terminal corresponding to the source side of the transistor M5 rises, the on state of the transistor M5 is reliably maintained.

In this embodiment, the potential H and the potential V2 are both 6V (the same potential). Therefore, the potential of the node ND4 is higher than one of the source and the drain of the transistor M7 and the potential of the gate, causing the transistor M7 to be in an off state.

[quenching work]

In the period T26, the potential L is supplied to the wiring GLC (see FIG. 32). At this time, the transistor M7 is in the on state, and the potential of the node ND4 is the L potential. When the potential of the node ND4 is the L potential, the transistor M5 is in an off state, and the light emitting element 61 stops emitting light.

Like the semiconductor device 100A, the semiconductor device 100B can be suitably used not only for a single-structure light-emitting element but also for a series-structured light-emitting element that requires a higher driving voltage than a single-structure light-emitting element. In addition, black insertion driving can be performed similarly to the semiconductor device 100A. A display device using the semiconductor device 100B according to one embodiment of the present invention is less likely to have a moving image resolution that decreases, and thus can display a moving image with high display quality.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 3)

In this embodiment, a semiconductor device 100C according to one embodiment of the present invention will be described. Semiconductor device 100C is a modified example of semiconductor device 100B. Therefore, the semiconductor device 100C is also a modified example of the semiconductor device 100A. In order to reduce repetitive description, the differences between the semiconductor device 100C and the semiconductor device 100A and the semiconductor device 100B will be mainly described.

<Structure example>

FIG. 33 shows an example of the circuit configuration of the semiconductor device 100C. The semiconductor device 100C includes a pixel circuit 51C and a light-emitting element 61 . The pixel circuit 51C is different from the pixel circuit 51B in that the gate of the transistor M7 is electrically connected to the wiring GLa. Therefore, the wiring 105 shown in FIG. 25 does not need to be provided. Thereby, formation of the wiring 105 can be omitted.

Here, among the transistors constituting the pixel circuit 51C, the transistor M1, the transistor M3, the transistor M4, the transistor M6, and the transistor M7 are used as switches. Therefore, the semiconductor device 100C may be as shown in FIG. 34 .

<Work example>

Next, an operation example of the semiconductor device 100C will be described with reference to the drawings. FIG. 35 is a timing chart for explaining an operation example of the semiconductor device 100C. 36 to 41 are circuit diagrams for explaining an operation example of the semiconductor device 100C.

[Vth correction work]

First, in period T31, the same reset operation as in period T21 is performed. Specifically, the potential H is supplied to the wiring GLa and the wiring GLb, and the potential L is supplied to the wiring GLc (see FIG. 36 ). During the period T31, the transistor M1, the transistor M3, the transistor M4, the transistor M6, and the transistor M7 are in an on state.

In addition, the node ND1 is supplied with the potential V0 through the transistor M6. Furthermore, the node ND3 is supplied with the potential V0 through the transistor M6 and the transistor M3. In addition, the node ND2 is supplied with the potential V1 through the transistor M4. In addition, the node ND4 is supplied with the potential L through the transistor M7. Therefore, transistor M5 is off.

In addition, similarly to the above-mentioned period T21, in the period T31, it is also preferable that the wiring DL and the wiring 103 have the same potential or the wiring DL is in a floating state.

Next, in the period T32, the potential L is supplied to the wiring GLa (see FIG. 37 ). At this time, the transistor M1, the transistor M6 and the transistor M7 are in the off state. Similar to the above-described period T12, the potentials of the nodes ND1 and ND3 rise to a value obtained by subtracting the Vth of the transistor M2 from the potential V1. In addition, the node ND4 is in a floating state, maintaining the charge supplied to the node ND4.

Next, in period T33, potential L is supplied to wiring GLb (see FIG. 38 ). At this time, the transistor M3 and the transistor M4 are in the off state. The node ND1, the node ND2, and the node ND3 are in a floating state and maintain the charge supplied to each node.

[Data writing work]

In the period T34, the potential H is supplied to the wiring GLa, and the potential H is supplied to the wiring GLC (see FIG. 39). At this time, the transistor M1 is in the on state, and the node ND3 is supplied with the video signal Vdata. In addition, the transistor M6 is in the on state, and the node ND1 is supplied with the potential V0. Similar to the above-mentioned period T24, the potential of the node ND2 is Vth.

In addition, the transistor M7 is in the on state, and charges are supplied from the wiring GLC to the node ND4. The potential of the node ND4 rises to a value obtained by subtracting the Vth of the transistor M7 from the potential H. In this embodiment and others, the potential H is 6V, and when the Vth of the transistor M5 and the transistor M7 is 1V, the potential of the node ND4 (potential H-Vth) is 5V. Therefore, transistor M5 is on.

[Glow work]

In the period T35, the potential L is supplied to the wiring GLa (see FIG. 40). At this time, the transistor M1 and the transistor M6 are in an off state. Similar to the above-mentioned period T25, a current flows from the wiring 101 to the wiring 104, and the light-emitting element 61 responds to the current Ie. The potential of the node ND1 and the anode terminal of the light-emitting element 61 rises at this time. The potential of the node ND1 is the potential Va1, and the potential of the anode terminal is the potential Va2. In addition, the potential of the node ND3 is the video signal Vdata + the potential Va1 , the potential of node ND2 is Vth + potential Va1.

The node ND4 is in a floating state, and the potential difference between the node ND4 and the anode terminal is maintained through the capacitor C3. Therefore, as the potential of the anode terminal changes, the potential of node ND4 also changes. When the potential of the anode terminal rises from the potential V0 to the potential Va2, the potential of the node ND4 becomes the potential H-Vth + the potential Va2. That is, even if the potential of the anode terminal corresponding to the source side of the transistor M5 rises, the on state of the transistor M5 is reliably maintained.

[quenching work]

In period T36, the potential H is supplied to the wiring GLa and the potential L is supplied to the wiring GLC (see FIG. 41 ). At this time, the transistor M1, the transistor M6, and the transistor M7 are in the on state, the potential of the node ND1 is the potential V0, and the potential of the node ND4 is the L potential. When the potential of the node ND4 is the L potential, the transistor M5 is in an off state, and the light emitting element 61 stops emitting light.

In the period T36, the video signal Vdata written to the other semiconductor device 100C electrically connected to the wiring DL may be supplied to the node ND3 through the transistor M1. However, the transistor M5 is in an off state, so the quenching operation is not affected.

Like the semiconductor device 100A and the semiconductor device 100B, the semiconductor device 100C can be suitably used not only for a single-structure light-emitting element but also for a series-structured light-emitting element that requires a higher driving voltage than a single-structure light-emitting element. In addition, black insertion driving can be performed similarly to the semiconductor device 100A and the semiconductor device 100B. A display device using the semiconductor device 100C according to one embodiment of the present invention is less likely to have a moving image resolution that decreases, and thus can display a moving image with high display quality.

<Deformation example 1>

FIG. 42 shows a semiconductor device 100Ca which is a modified example of the semiconductor device 100C. The semiconductor device 100Ca shown in FIG. 42 includes a pixel circuit 51Ca. The pixel circuit 51Ca is different from the pixel circuit 51C shown in FIG. 33 in that the transistor M8 is provided between the wiring GLC and the node ND4.

Specifically, the gate of the transistor M8 is electrically connected to the wiring GLb, one of the source and the drain is electrically connected to the wiring GLc, and the other of the source and the drain is electrically connected to the node ND4.

In the circuit configuration example shown in FIG. 33 , during the period T32 during which the Vth correction operation is performed, the node ND4 is in a floating state. Therefore, the potential of the node ND4 fluctuates and the transistor M5 may be in a state close to the on state.

FIG. 43 is a circuit diagram showing the operating state of the semiconductor device 100Ca shown in FIG. 42 during the period T32. By including the transistor M8, the potential of the node ND4 can be fixed to the potential L by preventing the node ND4 from being in a floating state during the period T32 during which the Vth correction operation is performed. By including transistor M8, precise Vth correction operation can be achieved. Therefore, the display quality of the semiconductor device 100Ca can be improved.

<Deformation example 2>

FIG. 44 shows a semiconductor device 100Cb which is a modified example of the semiconductor device 100C shown in FIG. 33 . The semiconductor device 100Cb includes the pixel circuit 51Cb. The pixel circuit 51Cb is different from the pixel circuit 51C in that p-channel transistors are used as the transistor M6 and the transistor M7. In addition, the gates of the transistors M6 and M7 are electrically connected to the wiring GLd. As shown in the above-described embodiment, p-channel transistors may be used as at least some of the transistors constituting the semiconductor device 100C.

Furthermore, as shown in the above embodiments, transistors including various semiconductors can be used as transistors constituting the semiconductor device. As the p-channel transistor, for example, single crystal silicon or polycrystalline silicon may be used. Low Temperature Poly Silicon (LTPS: Low Temperature Poly Silicon) can also be used as the polycrystalline silicon.

In the case where the transistors M1 to M5 are formed from n-channel transistors and the transistors M6 and M7 are formed from p-channel transistors, for example, p-channel Si transistors containing single crystal silicon in the semiconductor layer may be stacked n-channel type OS transistor.

In FIG. 44 , the region 51 a including the Si transistor and the region 51 b including the OS transistor included in the pixel circuit 51Cb are shown by two-dot chain lines.

For example, the semiconductor device 100Cb may have a stacked structure of layer 40 , layer 50 , and layer 60 . FIG. 45 is a schematic perspective view of a case where the semiconductor device 100Cb has a stacked structure of the layer 40 , the layer 50 , and the layer 60 . FIG. 45 shows an example in which the transistor M6 and the transistor M7 of the p-channel Si transistor are formed in the layer 40 and the transistors M1 to M5 of the n-channel OS transistor are formed in the layer 50 . Thus, region 51a is formed in layer 40 and region 51b is formed in layer 50 (not shown in Figure 45). In other words, the area 51a and the area 51b may be overlapped. Furthermore, FIG. 45 shows an example in which the light-emitting element 61 is formed in the layer 60 .

In FIG. 45 , some of the transistors constituting the pixel circuit 51Cb are provided in the layer 40 , and some of the other transistors are provided in the layer 50 . By stacking the transistors constituting the pixel circuit 51Cb, the area occupied by the semiconductor device 100Cb can be reduced. Therefore, the mounting density of the semiconductor device 100Cb can be increased. In addition, since restrictions on the arrangement and transistor size of the transistors constituting the semiconductor device 100Cb are relaxed, the degree of freedom in designing the semiconductor device is improved. Therefore, the reliability of the semiconductor device can be improved.

Furthermore, by combining a Si transistor with a faster operating speed than an OS transistor and an OS transistor with a lower off-state current in the semiconductor device 100Cb, it is possible to improve the operating speed and reduce power consumption.

For example, by using a Si transistor in the semiconductor device 100Cb or the like, a high-speed reset operation can be achieved. Furthermore, by using the OS transistor, the video signal Vdata written to the node ND3 can be maintained for a long time. Therefore, in a display device using the semiconductor device 100Cb or the like as a pixel, power consumption can be reduced by performing idling stop driving or reducing the frame frequency when displaying a still image. By using OS transistors, the gray scale of the pixels can be maintained even if the frame frequency is significantly small (for example, 1 fps or less).

In addition, when the light-emitting element 61 is a bottom-emission light-emitting element, the layer 60 may be provided below the layer 40 and the layer 50 . Alternatively, layer 40 may be formed on layer 50.

<Deformation example 3>

FIG. 46 shows a semiconductor device 100Cc which is a modified example of the semiconductor device 100C. The semiconductor device 100Cc includes a pixel circuit 51Cc. The pixel circuit 51Cc uses an n-channel OS transistor as the transistor M2 and the transistor M5 and a p-channel Si transistor as the other transistors among the transistors M1 to M7 included in the pixel circuit 51C.

<Deformation example 4>

FIG. 47 shows a semiconductor device 100Cd which is a modified example of the semiconductor device 100C. The semiconductor device 100Cd includes a pixel circuit 51Cd. In addition, the pixel circuit 51Cd uses p-channel Si transistors as the transistors M5 and M6 and n-channel OS transistors as the transistors M1 to M4 among the transistors M1 to M7 included in the pixel circuit 51C. In addition, the gate of the transistor M6 is electrically connected to the wiring GLd. In addition, the transistor M7 and the capacitor C3 are not provided. By using a p-channel transistor as the transistor M5, the transistor M7 and the capacitor C3 can be omitted.

<Deformation example 5>

FIG. 48 shows a semiconductor device 100Ce which is a modified example of the semiconductor device 100Cd. As shown in FIG. 48 , a p-channel Si transistor may be used as the transistor M5 and an n-channel OS transistor may be used as the transistors M1 to M4 and M6. The gate of the transistor M6 is electrically connected to the wiring GLa.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 4)

In this embodiment mode, a semiconductor device 100D including four transistors, one capacitor, and one light-emitting element will be described. FIG. 49A shows an example of the circuit configuration of the semiconductor device 100D. The semiconductor device 100D includes a pixel circuit 51D and a light emitting element 61 . The pixel circuit 51D includes transistors M1 to M4 and a capacitor C1.

The gate of the transistor M1 is electrically connected to the wiring GLa, one of the source and the drain is electrically connected to the wiring DL, and the other of the source and the drain is electrically connected to the gate of the transistor M2. The transistor M1 has a function of selecting whether the gate of the transistor M2 and the wiring DL are in a conductive state or a non-conductive state.

Furthermore, the gate of the transistor M2 is electrically connected to one terminal of the capacitor C1, one of the source and the drain is electrically connected to the wiring 101, and the other of the source and the drain is electrically connected to the other terminal of the capacitor C1. In addition, transistor M2 includes a back gate. The back gate of transistor M2 is electrically connected to the other terminal of capacitor C1.

The gate of the transistor M3 is electrically connected to the wiring GLC, one of the source and the drain is electrically connected to one terminal of the capacitor C1 , and the other of the source and the drain is electrically connected to the wiring 103 . The transistor M3 has a function of selecting whether the gate of the transistor M2 and the wiring 103 are in a conductive state or a non-conductive state.

Furthermore, the gate of the transistor M4 is electrically connected to the wiring GLb, and one of the source and the drain of the transistor M4 is electrically connected to the other of the source and the drain of the transistor M2. In addition, the other one of the source and the drain of the transistor M4 is electrically connected to the wiring 103 . The transistor M4 has a function of selecting whether the wiring 103 and the other of the source and the drain of the transistor M2 are in a conductive state or a non-conductive state.

Furthermore, the other one of the source and the drain of the transistor M2 is electrically connected to one terminal (for example, an anode terminal) of the light emitting element 61 . In addition, the other terminal (eg, cathode terminal) of the light-emitting element 61 is electrically connected to the wiring 104 .

In addition, a region electrically connecting one terminal of the capacitor C1, the other of the source and the drain of the transistor M1, the gate of the transistor M2, and one of the source and the drain of the transistor M3 is also called a node ND1.

In addition, a region electrically connecting one terminal of the capacitor C1, the other of the source and drain of the transistor M2, and one terminal of the light-emitting element 61 is also called a node ND2.

In addition, as shown in FIG. 49B , a p-channel transistor may be used as the transistor M2. In this case, the other terminal of the capacitor C1 is electrically connected to the wiring 101 .

According to the semiconductor device 100D shown in this embodiment mode, the number of transistors can be reduced, so the occupied area can be reduced.

Furthermore, as shown in FIG. 50A , a semiconductor device 100E including four p-channel transistors, two capacitors, and one light-emitting element may be used. The semiconductor device 100E includes a pixel circuit 51E and a light-emitting element 61 . The pixel circuit 51E includes transistors M1 to M4, capacitors C1 and C2.

The gate of the transistor M1 is electrically connected to the wiring GLa, one of the source and the drain is electrically connected to the wiring DL, and the other of the source and the drain is electrically connected to the gate of the transistor M3. The transistor M1 has a function of selecting whether the gate of the transistor M3 and the wiring DL are in a conductive state or a non-conductive state.

The gate of the transistor M2 is electrically connected to the wiring GLb, one of the source and the drain is electrically connected to the wiring 101, and the other of the source and the drain is electrically connected to one of the source and the drain of the transistor M3.

The other of the source and the drain of the transistor M3 is electrically connected to one of the source and the drain of the transistor M4. The gate of the transistor M4 is electrically connected to the wiring GLC, and the other of the source and the drain is electrically connected to the wiring 103 .

In addition, the other one of the source and the drain of the transistor M3 is electrically connected to one terminal of the light-emitting element 61 . In addition, the other terminal of the light-emitting element 61 is electrically connected to the wiring 104 .

One terminal of capacitor C1 is electrically connected to one of the source and drain of transistor M3. The other terminal of capacitor C1 is electrically connected to the gate of transistor M3. One terminal of the capacitor C2 is electrically connected to the wiring 101 . The other terminal of capacitor C2 is electrically connected to one terminal of capacitor C1.

In addition, as shown in FIG. 50B , n-channel transistors may be used as the transistor M1 and the transistor M4.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 5)

In this embodiment, a semiconductor device 100F according to one embodiment of the present invention will be described. The semiconductor device 100F is a modified example of the semiconductor device 100C shown in FIG. 41 . In order to reduce repetitive description, the differences between the semiconductor device 100F and the semiconductor device 100C shown in FIG. 41 will be mainly described.

＜Structure example＞

FIG. 51 shows an example of the circuit configuration of the semiconductor device 100F. The semiconductor device 100F includes a pixel circuit 51F, a light-emitting element 61a, and a light-emitting element 61b. The pixel circuit 51F has the same structure as the pixel circuit 51C shown in FIG. 41, but is different from the pixel circuit 51C in that the other of the source and drain of the transistor M5 is connected to one terminal (for example, an anode) of the light-emitting element 61a. terminal) and one terminal (eg, anode terminal) of the light-emitting element 61b are electrically connected.

In addition, the other terminal (eg, cathode terminal) of the light-emitting element 61a is electrically connected to the wiring 104a. The other terminal (eg, cathode terminal) of the light-emitting element 61b is electrically connected to the wiring 104b.

Note that the transistor M1, M3, M4, M6, and M7 among the transistors constituting the pixel circuit 51F are used as switches. Therefore, the semiconductor device 100F can be represented as shown in FIG. 52 .

<Work example>

The semiconductor device 100F can control the light emission of the light-emitting element 61a and the light-emitting element 61b by controlling the potentials of the wiring 104a and the wiring 104b. For example, when it is desired to cause the light-emitting element 61a to emit light, a potential Vc is supplied to the wiring 104a and a potential equal to or higher than the potential Va is supplied to the wiring 104b. In addition, when it is desired to cause the light-emitting element 61b to emit light, the potential Vc may be supplied to the wiring 104b, and a potential equal to or higher than the potential Va may be supplied to the wiring 104a.

In addition, when it is desired to cause both the light-emitting element 61a and the light-emitting element 61b to emit light, the potential Vc may be supplied to both the wiring 104a and the wiring 104b.

The semiconductor device 100F can control the light emission of the two light-emitting elements 61 (the light-emitting element 61a and the light-emitting element 61b) with one pixel circuit 51F. Therefore, the area occupied by the pixel circuit of each pixel becomes smaller, making it easier to increase the pixel density of the display device. In addition, by reducing the area required for one pixel circuit, the degree of freedom in designing semiconductor devices and display devices is improved. Therefore, it is possible to easily realize high functionality of the semiconductor device and the display device and to improve reliability.

The structure shown in this embodiment mode can also be applied to the semiconductor device 100A and the semiconductor device 100B.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 6)

In this embodiment, a semiconductor device 100G according to one embodiment of the present invention will be described. The semiconductor device 100G is a modified example of the semiconductor device 100C shown in FIG. 41 . Therefore, the semiconductor device 100G is also a modified example of the semiconductor device 100F. In order to reduce repetitive description, the differences between the semiconductor device 100G and the semiconductor device 100C shown in FIG. 41 will be mainly described.

＜Structure example＞

FIG. 53 shows an example of the circuit configuration of the semiconductor device 100G. The semiconductor device 100G includes a pixel circuit 51G, a light-emitting element 61a, and a light-emitting element 61b. In addition, the pixel circuit 51G includes a circuit 52a and a circuit 52b.

Circuit 52a includes transistor M5a, transistor M7a, and capacitor C3a. The gate of the transistor M5a is electrically connected to one terminal of the capacitor C3a, and one of the source and the drain is electrically connected to the other of the source and the drain of the transistor M2. In addition, the other one of the source and the drain of the transistor M5a is electrically connected to the other terminal of the capacitor C3a and one terminal (for example, the anode terminal) of the light-emitting element 61a. The other terminal (eg, anode terminal) of the light-emitting element 61a is electrically connected to the wiring 104a. Furthermore, the gate of the transistor M7a is electrically connected to the wiring GLa, one of the source and the drain is electrically connected to the wiring GLC, and the other of the source and the drain is electrically connected to the gate of the transistor M5a.

In addition, a region electrically connecting the gate of the transistor M5a, one terminal of the capacitor C3a, and the other of the source and drain of the transistor M7a is also called a node ND4a.

Circuit 52b includes transistor M5b, transistor M7b, and capacitor C3b. The gate of the transistor M5b is electrically connected to one terminal of the capacitor C3b, and one of the source and the drain is electrically connected to the other of the source and the drain of the transistor M2. In addition, the other one of the source and the drain of the transistor M5b is electrically connected to the other terminal of the capacitor C3b and one terminal (eg, anode terminal) of the light-emitting element 61b. The other terminal (eg, anode terminal) of the light-emitting element 61b is electrically connected to the wiring 104b. Furthermore, the gate of the transistor M7b is electrically connected to the wiring GLa, one of the source and the drain is electrically connected to the wiring GLC, and the other of the source and the drain is electrically connected to the gate of the transistor M5b.

In addition, a region electrically connecting the gate of the transistor M5b, one terminal of the capacitor C3b, and the other of the source and drain of the transistor M7b is also called a node ND4b.

That is, the transistor M5a and the transistor M5b correspond to the transistor M5. The transistor M7a and the transistor M7b correspond to the transistor M7. Capacitor C3a and capacitor C3b correspond to capacitor C3. Node ND4a and node ND4b are equivalent to node ND4. In addition, the light-emitting element 61a and the light-emitting element 61b correspond to the light-emitting element 61, and the wiring 104a and the wiring 104b correspond to the wiring 104.

<Work example>

The semiconductor device 100G can control the light-emitting element 61a and the light-emitting element 61b to emit light by controlling the potentials of the wiring 104a and the wiring 104b. For example, when it is desired to cause the light-emitting element 61a to emit light, a potential Vc is supplied to the wiring 104a and a potential equal to or higher than the potential Va is supplied to the wiring 104b. In addition, when it is desired to cause the light-emitting element 61b to emit light, it is sufficient to supply the potential Vc to the wiring 104b and to supply a potential equal to or higher than the potential Va to the wiring 104a.

Furthermore, when it is desired to cause both the light-emitting element 61a and the light-emitting element 61b to emit light, the potential Vc may be supplied to both the wiring 104a and the wiring 104b.

The semiconductor device 100G can control the light emission of the two light-emitting elements 61 (the light-emitting element 61a and the light-emitting element 61b) using a combination of the transistor M1, the transistor M2, the transistor M3, the transistor M4, the transistor M6, the capacitor C1, and the capacitor C2. Therefore, the area occupied by the pixel circuit of one pixel becomes smaller, making it easier to increase the pixel density of the display device. In addition, by reducing the area required for one pixel circuit, the design freedom of semiconductor devices and display devices is improved. Therefore, it is possible to easily realize high functionality of the semiconductor device and the display device and to improve reliability.

The structure shown in this embodiment mode can be applied to the semiconductor device 100A and the semiconductor device 100B.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 7)

In this embodiment, a semiconductor device 100H according to one embodiment of the present invention will be described. The semiconductor device 100H is a modified example of the semiconductor device 100G shown in FIG. 53 . In order to reduce repetitive description, the differences between the semiconductor device 100H and the semiconductor device 100G will be mainly described.

＜Structure example＞

FIG. 54 shows an example of the circuit configuration of the semiconductor device 100H. The semiconductor device 100H includes a pixel circuit 51H, a light-emitting element 61a, and a light-emitting element 61b. In addition, the pixel circuit 51H includes a circuit 52a and a circuit 52b.

The semiconductor device 100H is different from the semiconductor device 100G in that one of the source and the drain of the transistor M7b included in the circuit 52b is electrically connected to the wiring GLd. In addition, both the cathode of the light-emitting element 61a and the cathode of the light-emitting element 61b are electrically connected to the wiring 104.

<Work example>

The semiconductor device 100H can control the light-emitting element 61a and the light-emitting element 61b to emit light by controlling the potentials of the wiring GLc and the wiring GLd. For example, when it is desired to cause only the light-emitting element 61a to emit light, the potential H is supplied to the wiring GLc and the potential L is supplied to the wiring GLd during the period T34 shown in the above embodiment. In addition, when it is desired to cause only the light-emitting element 61b to emit light, it is sufficient to supply the potential L to the wiring GLc and the potential H to the wiring GLd during the period T34 shown in the above embodiment.

In addition, when it is desired to cause both the light-emitting element 61a and the light-emitting element 61b to emit light, the potential H may be supplied to both the wiring GLc and the wiring GLd during the period T34 shown in the above embodiment.

Like the semiconductor device 100G, the semiconductor device 100H can also control two light-emitting elements 61 (the light-emitting element 61a and the light-emitting element 61b) using a set of the transistor M1, the transistor M2, the transistor M3, the transistor M4, the transistor M6, the capacitor C1, and the capacitor C2. of glowing. Therefore, the area occupied by the pixel circuit of one pixel becomes smaller, making it easier to increase the pixel density of the display device. In addition, by reducing the area required for one pixel circuit, the design freedom of semiconductor devices and display devices is improved. Therefore, it is possible to easily realize high functionality of the semiconductor device and the display device and to improve reliability.

The structure shown in this embodiment mode can be applied to the semiconductor device 100A and the semiconductor device 100B.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 8)

In this embodiment, the use of the semiconductor device 100 (semiconductor device 100A, semiconductor device 100B, semiconductor device 100C, semiconductor device 100Ca, semiconductor device 100Cb, semiconductor device 100Cc, semiconductor device 100Cd, semiconductor device 100Ce, semiconductor device 100D, semiconductor device 100E, semiconductor device 100F, semiconductor device 100G, or semiconductor device 100H) are structural examples of the display device 10 . FIG. 55A is a block diagram illustrating the display device 10. The display device 10 includes a display area 235 , a first driving circuit part 231 and a second driving circuit part 232 . The display area 235 includes a plurality of pixels 230 arranged in a matrix. The semiconductor device 100 according to one aspect of the present invention can be used for the pixel 230 .

The circuit included in the first drive circuit section 231 is used as a scanning line drive circuit, for example. The circuit included in the second drive circuit section 232 is used as a signal line drive circuit, for example. Note that a certain circuit may be provided at a position facing the first drive circuit unit 231 across the display area 235 . A certain circuit may be provided at a position facing the second drive circuit unit 232 across the display area 235 . Note that the circuits included in the first drive circuit section 231 and the second drive circuit section 232 are sometimes collectively referred to as “peripheral drive circuits” or “drive circuits”.

Various circuits such as shift registers, level converters, inverters, latches, analog switches, and logic circuits can also be used as peripheral drive circuits. Transistors and capacitive elements can be used in peripheral drive circuits. The transistors included in the peripheral driving circuit may also be formed through the same process as the transistors included in the pixel 230 .

For example, an OS transistor may be used as a transistor constituting the pixel 230, or a Si transistor may be used as a transistor constituting the peripheral drive circuit. The off-state current of the OS transistor is very low, thereby reducing power consumption. In addition, Si transistors operate faster than OS transistors, and thus Si transistors are preferably used in peripheral drive circuits. In addition, depending on the display device, the OS transistor may be used as both the transistor constituting the pixel 230 and the transistor constituting the peripheral drive circuit. In addition, according to the display device, Si transistors may be used as both transistors constituting the pixel 230 and transistors constituting the peripheral drive circuit. In addition, depending on the display device, a Si transistor may be used as a transistor constituting the pixel 230, or an OS transistor may be used as a transistor constituting the peripheral drive circuit.

In addition, both Si transistors and OS transistors may be used as transistors constituting the pixel 230 . In addition, both Si transistors and OS transistors may be used as transistors constituting the peripheral drive circuit.

In addition, the display device 10 includes m (m is an integer greater than or equal to 1) wirings 236 arranged substantially in parallel, and the potential of the m wirings 236 is controlled by the circuit included in the first drive circuit unit 231 , and n wirings 236 arranged substantially in parallel. (n is an integer of 1 or more) wirings 237 , and the potential of the n wirings 237 is controlled by a circuit included in the second drive circuit unit 232 .

Note that FIG. 55A shows an example in which the wiring 236 and the wiring 237 are connected to the pixel 230. Note that the wiring 236 and the wiring 237 are an example, and the wiring connected to the pixel 230 is not limited to the wiring 236 and the wiring 237.

The display area 235 includes a plurality of pixels 230 arranged in a matrix of m rows and n columns. For example, the pixel 230 arranged in the r-th row (r represents an arbitrary number, and in this embodiment and the like, r is an integer from 1 to m) is electrically connected to the first drive circuit unit 231 through the r-th wiring 236 . In addition, the pixel 230 arranged in the s-th column (s represents an arbitrary number, and in this embodiment and the like, s is an integer from 1 to n) is electrically connected to the second drive circuit unit 232 through the s-th wiring 237 .

The pixels 230 that control red light, the pixels 230 that control green light, and the pixels 230 that control blue light are arranged in a stripe shape, and are used together as one pixel 240 to control the amount of light emission (light emission brightness) of each pixel 230. Able to achieve full color display. Therefore, the three pixels 230 are respectively used as sub-pixels. In other words, the three sub-pixels respectively control the emission amounts of red light, green light, or blue light (see FIG. 55B1 ). In addition, the color of the light controlled by the three sub-pixels is not limited to the combination of red (R), green (G) and blue (B), but can also be cyan (C), magenta (M) and yellow (Y). (Refer to Figure 55B2).

In addition, as an arrangement method of three pixels 230 constituting one pixel 240, a delta arrangement may be adopted (see FIG. 55B3 ). Specifically, it may be arranged so that a line connecting the center points of each of the three pixels 230 constituting one pixel 240 forms a triangle.

In addition, the areas of each of the three sub-pixels (pixels 230) may be different. When the luminous efficiency, reliability, etc. differ depending on the luminescent color, the area of the sub-pixel may be changed according to the luminescent color (see FIG. 55B4 ). In addition, the arrangement of sub-pixels shown in FIG. 55B4 may also be called "S-stripe arrangement" or the like.

In addition, four sub-pixels may be used as one pixel. For example, a sub-pixel that controls white light may be added to three sub-pixels that respectively control red light, green light, and blue light (see FIG. 55B5 ). By adding sub-pixels that control white light, the brightness of the display area can be increased. In addition, a sub-pixel that controls yellow light may be added to the three sub-pixels that respectively control red light, green light, and blue light (see FIG. 55B6 ). In addition, a sub-pixel that controls white light may be added to the three sub-pixels that respectively control cyan light, magenta light, and yellow light (see FIG. 55B7 ).

The reproducibility of halftones can be improved by increasing the number of subpixels used as one pixel and using them in appropriate combination with subpixels that control light of red, green, blue, cyan, magenta, yellow, and the like. Therefore, display quality can be improved.

In addition, as shown in FIG. 56 , sub-pixels (pixels 230 ) arranged in an S stripe arrangement may be arranged so that sub-pixels of the same emission color are adjacent to each other between adjacent pixels 240 .

In addition, as shown in FIGS. 57A1 and 57A2 , among the pixels 240 in which the pixels 230 are arranged in a stripe shape, the pixels 230 controlling the same emission color may be arranged adjacent to each other between adjacent pixels 240 .

In FIG. 57A1 and FIG. 57A2 , the pixel 230a and the pixel 230b that control red light are adjacent in the row direction, the pixel 230a and the pixel 230b that control the green light are adjacent in the row direction, and the pixel 230a and the pixel 230b that control the blue light are adjacent in the row direction. Adjacent. The pixel 240 shown in FIGS. 57A1 and 57A2 can also be said to have a structure in which one pixel 230 is divided into two along the column direction. In addition, three or more pixels 230 of the same emission color may be adjacent. In other words, one pixel 230 can be divided into three or more.

As shown in FIG. 57A1 , one pixel 240 may be composed of a pixel 230 a that controls red light, a pixel 230 a that controls green light, and a pixel 230 a that controls blue light. In addition, as shown in FIG. 57A2 , one pixel 240 may be composed of pixels 230a and 230b that control red light, pixels 230a and 230b that control green light, and pixels 230a and 230b that control blue light.

By arranging a plurality of sub-pixels that control the same light emission color in one pixel 240, the number of grayscales that the display device 10 can reproduce can be increased. Therefore, the display quality of the display device can be improved.

In addition, as shown in FIG. 57B , the pixel 230 a and the pixel 230 b that control the same emission color may be provided adjacent to each other in the column direction. The pixel structure shown in FIG. 57B can also be said to be a structure in which the pixel 240 shown in FIG. 55B1 is divided into two in the row direction. By dividing the pixels 240, the pixel density of the display area 235 can be increased. Therefore, higher-definition image display can be achieved.

In addition, similarly to FIGS. 57A1 and 57A2 , in the pixels 240 arranged in S stripes, the pixels 230 serving as sub-pixels may be divided into a plurality of sub-pixels (see FIG. 57C ). The pixel 240 shown in FIG. 57C can operate similarly to the pixel 240 shown in FIGS. 57A1 and 57A2 .

In addition, a display device according to one aspect of the present invention can reproduce color gamuts of various specifications. For example, it can reproduce the color gamut of the following standards: PAL (Phase Alternating Line) standards used in television broadcasts and NTSC (National Television System Committee: National Television Standards Committee) standards; used in personal computers sRGB (standard RGB: standard RGB) specification and Adobe RGB specification widely used in display devices of electronic equipment such as digital cameras and printers; ITU-R BT used in HDTV (High Definition Television, also called high definition). 709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709: International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) specification; DCI-P3 (Digital Cinema InitiativesP3: Digital Cinema Initiatives Alliance P3) specification used in digital cinema projection ; Or the ITU-R BT.2020 (REC.2020 (Recommendation 2020: Recommendation 2020)) specification used in UHDTV (Ultra High Definition Television, also known as Ultra High Definition), etc.

In addition, by arranging the pixels 240 in a matrix of 1920×1080, a display capable of full-color display at a resolution called full high-definition (also referred to as “2K resolution”, “2K1K” or “2K”, etc.) can be realized Device 10. In addition, for example, by arranging the pixels 240 in a matrix of 3840×2160, it is possible to realize full-color display with a resolution called ultra-high definition (also called “4K resolution”, “4K2K” or “4K”, etc.) display device 10. In addition, for example, by arranging the pixels 240 in a matrix of 7680×4320, it is possible to realize full-color display with a resolution called ultra-high definition (also called “8K resolution”, “8K4K” or “8K”, etc.) display device 10. By adding pixels 240, a display device 10 capable of full-color display at a resolution of 16K or 32K can also be realized.

In addition, the pixel density of the display area 235 is preferably from 100 ppi to 10,000 ppi, and more preferably from 1,000 ppi to 10,000 ppi. For example, the pixel density of the display area 235 may be 2,000 ppi or more and 6,000 ppi or less, or may be 3,000 ppi or more and 5,000 ppi or less.

Note that the aspect ratio (screen ratio) of the display area 235 is not particularly limited. The display area 235 of the display device 10 may correspond to various aspect ratios such as 1:1 (square), 4:3, 16:9, 16:10, and the like.

The diagonal size of the display area 235 may be 0.1 inches or more and 100 inches or less, or may be 100 inches or more.

When the display device 10 is used as a display device for virtual reality (VR: Virtual Reality) or a display device for augmented reality (AR: Augmented Reality), the diagonal size of the display area 235 can be set to 0.1 inches or more and 5.0 inches. or less, preferably 0.5 inches or more and 2.0 inches or less, more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display area 235 may be set to 1.5 inches or approximately 1.5 inches. By setting the diagonal size of the display area 235 to 2.0 inches or less, preferably around 1.5 inches, the processing can be performed with a single exposure process by an exposure device (typically a scanning device), so the productivity of the manufacturing process can be improved.

In addition, the structure of the transistor used in the display area 235 may be appropriately selected according to the diagonal size of the display area 235 . For example, when a single crystal Si transistor is used for the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 3 inches or less. In addition, when an LTPS transistor is used for the display area 235, the diagonal size of the display area 235 is preferably 0.1 inch or more and 30 inches or less, and more preferably 1 inch or more and 30 inches or less. In addition, when LTPO (a structure combining an LTPS transistor and an OS transistor) is used for the display area 235, the diagonal size of the display area 235 is preferably 0.1 inch or more and 50 inches or less, and more preferably 1 inch or more and 50 inches or less. In addition, when an OS transistor is used for the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 200 inches or less, and more preferably 50 inches or more and 100 inches or less.

The size of a single crystal Si transistor is the size of a single crystal Si substrate, so it is very difficult to increase the size of a display panel. In addition, the LTPS transistor uses a laser crystallization device in the manufacturing process, so it is difficult to cope with the increase in the size of the display panel (typically a screen size of more than 30 inches in diagonal size). On the other hand, OS transistors are not limited by the use of laser crystallization equipment in the manufacturing process, or can be manufactured at a lower process temperature (typically 450°C or less), so they can also correspond to devices with a large area (typically is a display panel with a diagonal angle of 50 inches or more and less than 100 inches). In addition, LTPO can be used for display panel sizes in the area between when using LTPS transistors and when using OS transistors (typically a diagonal size of 1 inch or more and 50 inches or less).

<Structure example of light-emitting element>

A light-emitting element (also referred to as a light-emitting device) usable in a semiconductor device according to one embodiment of the present invention will be described.

As shown in FIG. 58A , the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (conductive layer 171 and conductive layer 173 ). The EL layer 172 may be composed of a plurality of layers such as the layer 4420, the light-emitting layer 4411, and the layer 4430. The layer 4420 may include, for example, a layer containing a substance with high electron injection properties (electron injection layer), a layer containing a substance with high electron transport properties (electron transport layer), and the like. The light-emitting layer 4411 contains, for example, a light-emitting compound. The layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

The structure including the layer 4420, the light-emitting layer 4411, and the layer 4430 provided between a pair of electrodes can be used as a single light-emitting unit. In this specification and the like, the structure of FIG. 58A is called a single structure.

In addition, FIG. 58B is a modified example of the EL layer 172 included in the light-emitting element 61 shown in FIG. 58A. Specifically, the light-emitting element 61 shown in FIG. 58B includes the layer 4430-1 on the conductive layer 171, the layer 4430-2 on the layer 4430-1, the light-emitting layer 4411 on the layer 4430-2, and the layer on the light-emitting layer 4411. 4420-1, layer 4420-2 on layer 4420-1, and conductive layer 173 on layer 4420-2. For example, when the conductive layer 171 and the conductive layer 173 are used as anode and cathode respectively, layer 4430-1 is used as a hole injection layer, layer 4430-2 is used as a hole transport layer, and layer 4420-1 is used as a hole transport layer. Electron transport layer, layer 4420-2 is used as an electron injection layer. Alternatively, when the conductive layer 171 and the conductive layer 173 are used as the cathode and the anode respectively, the layer 4430-1 is used as the electron injection layer, the layer 4430-2 is used as the electron transport layer, and the layer 4420-1 is used as the hole The transport layer, layer 4420-2, is used as a hole injection layer. By adopting such a layer structure, carriers can be efficiently injected into the light-emitting layer 4411, thereby improving the recombination efficiency of carriers in the light-emitting layer 4411.

In addition, as shown in FIG. 58C , a structure in which a plurality of light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, and light-emitting layer 4413) is provided between layer 4420 and layer 4430 is also a modified example of a single structure.

As shown in FIG. 58D , a structure in which a plurality of light-emitting units (EL layer 172 a and EL layer 172 b ) are connected in series via an intermediate layer (charge generation layer) 4440 is called a series structure or a stacked structure in this specification and the like. By adopting a tandem structure, the light-emitting element 61 capable of emitting light with high brightness can be realized.

In addition, when the light-emitting element 61 has the series structure shown in FIG. 58D, the EL layer 172a and the EL layer 172b can have the same emission color. For example, the EL layer 172a and the EL layer 172b may both emit green light. When the display area 235 includes three types of sub-pixels: R, G, and B, and each sub-pixel includes a light-emitting element, the light-emitting element of each sub-pixel may also have a series structure. Specifically, the EL layer 172a and EL layer 172b of the R sub-pixel both include materials capable of emitting red light, the EL layers 172a and EL layers 172b of the G sub-pixel both include materials capable of emitting green light, and the B sub-pixel Both the EL layer 172a and the EL layer 172b include materials capable of emitting blue light. In other words, the materials of the light-emitting layer 4411 and the light-emitting layer 4412 may be the same. By making the EL layer 172a and the EL layer 172b have the same emission color, the current density per unit emission luminance can be reduced. Therefore, the reliability of the light emitting element 61 can be improved.

The light-emitting color of the light-emitting element may be, for example, red, green, blue, cyan, magenta, yellow or white depending on the material constituting the EL layer 172 . In addition, by providing the light-emitting element with a microcavity structure, the color purity can be further improved.

The light-emitting layer may contain two or more light-emitting substances that emit light such as R (red), G (green), B (blue), Y (yellow), or O (orange). The white light-emitting element preferably has a structure in which the light-emitting layer contains two or more light-emitting substances. When using two luminescent substances to obtain white luminescence, it is sufficient to select a luminescent substance whose luminescent colors are in a complementary color relationship. Alternatively, for example, by bringing the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer into a complementary color relationship, a light-emitting element that emits white light as a whole can be obtained. The same applies to a light-emitting element including three or more light-emitting layers.

The light-emitting layer preferably contains two or more kinds of light-emitting substances that emit light such as R (red), G (green), B (blue), Y (yellow), O (orange), or the like. In addition, it is preferable that the light-emitting layer contains two or more kinds of light-emitting substances and that the emission of each light-emitting substance includes spectral components of two or more colors among R, G, and B.

Examples of luminescent substances include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), inorganic compounds (quantum dot materials, etc.), and substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence). Fluorescence: TADF) materials), etc. In addition, as the TADF material, a material in a thermal equilibrium state between a singlet excited state and a triplet excited state can also be used. Since such a TADF material has a short emission lifetime (excitation lifetime), it can suppress a decrease in efficiency in the high-brightness region of the light-emitting element.

<Formation method of light-emitting element>

An example of a method of forming the light emitting element 61 will be described below.

FIG. 59A shows a schematic top view of the light emitting element 61 . In FIG. 59A and the like, the light-emitting element 61 that displays red is referred to as the light-emitting element 61R, the light-emitting element 61 that exhibits the green color is referred to as the light-emitting element 61G, and the light-emitting element 61 that exhibits the blue color is referred to as the light-emitting element 61B. In FIG. 59A , in order to easily distinguish each light-emitting element, symbols "R", "G", and "B" are attached to the light-emitting area of each light-emitting element. In addition, the structure of the light-emitting element 61 shown in FIG. 59A may also be called an SBS (Side By Side) structure. In addition, FIG. 59A shows a structure having three emission colors of red (R), green (G), and blue (B) as an example, but the structure is not limited to this. For example, a structure having four or more colors may be adopted.

The light-emitting elements 61R, 61G, and 61B are all arranged in a matrix. FIG. 59A shows a so-called stripe arrangement, that is, an arrangement in which light-emitting elements of the same color are arranged in one direction. However, the arrangement method of the light-emitting elements is not limited to this. As an arrangement method of light-emitting elements, delta arrangement, zigzag arrangement, S-Stripe arrangement, pentile arrangement, etc. can be used.

As the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B, it is preferable to use organic EL devices such as OLED (Organic Light Emitting Diode: organic light emitting diode) or QOLED (Quantum-dot Organic Light Emitting Diode: quantum dot organic light emitting diode). Examples of the light-emitting substance included in the light-emitting element include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), an inorganic compound (quantum dot material, etc.), and a substance that exhibits thermally activated delayed fluorescence (thermal-activated delayed fluorescence). Fluorescent (Thermally activated delayed fluorescence: TADF) materials), etc.

FIG. 59B is a schematic cross-sectional view corresponding to the dash-dotted line A1-A2 in FIG. 59A. FIG. 59B shows cross sections of the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. The light-emitting elements 61R, 61G and 61B are all disposed on the insulating layer 363 and include a conductive layer 171 used as a pixel electrode and a conductive layer 173 used as a common electrode. As the insulating layer 363, one or both of an inorganic insulating film and an organic insulating film may be used. As the insulating layer 363, an inorganic insulating film is preferably used. Examples of the inorganic insulating film include oxide insulating films such as silicon oxide film, silicon oxynitride film, silicon oxynitride film, silicon nitride film, aluminum oxide film, aluminum oxynitride film, and hafnium oxide film, and nitrides. Insulating film.

The light emitting element 61R includes an EL layer 172R between the conductive layer 171 used as a pixel electrode and the conductive layer 173 used as a common electrode. The EL layer 172R contains a luminescent organic compound that emits light having intensity at least in the red wavelength region. The EL layer 172G in the light-emitting element 61G contains a light-emitting organic compound that emits light with intensity in at least the green wavelength range. The EL layer 172B in the light-emitting element 61B contains a light-emitting organic compound that emits light with intensity in at least the blue wavelength range.

In addition to the layer including the light-emitting organic compound (light-emitting layer), each of the EL layer 172R, the EL layer 172G, and the EL layer 172B may include at least one of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. .

Each light emitting element is provided with a conductive layer 171 used as a pixel electrode. In addition, the conductive layer 173 used as a common electrode is a continuous layer commonly used by each light-emitting element. One of the conductive layer 171 used as a pixel electrode and the conductive layer 173 used as a common electrode uses a conductive film that is translucent to visible light, and the other uses a conductive film that has reflectivity. By providing the conductive layer 171 used as a pixel electrode with light transmittance and the conductive layer 173 used as a common electrode with reflectivity, a bottom emission type (bottom emission structure) display device can be manufactured. The conductive layer 171 is reflective and the conductive layer 173 used as the common electrode is light-transmissive, so that a top-emitting (top-emitting structure) display device can be manufactured. Note that a double-sided emission type (double-sided emission structure) display device can also be manufactured by making both the conductive layer 171 used as a pixel electrode and the conductive layer 173 used as a common electrode have light transmittance.

For example, when the light-emitting element 61R has a top-emitting structure, the light 175R from the light-emitting element 61R is emitted to the conductive layer 173 side. When the light emitting element 61G has the top emission structure, the light 175G from the light emitting element 61G is emitted to the conductive layer 173 side. When the light emitting element 61B has a top emission structure, the light 175B from the light emitting element 61B is emitted to the conductive layer 173 side.

The insulating layer 272 is provided so as to cover the end portion of the conductive layer 171 used as a pixel electrode. The end of the insulating layer 272 is preferably tapered. The same material that can be used for the insulating layer 363 may be used for the insulating layer 272 .

The insulating layer 272 is provided to prevent the adjacent light-emitting elements 61 from being unintentionally electrically short-circuited and from unintentionally emitting light from the light-emitting elements 61 . In addition, the insulating layer 272 also has a function of preventing the metal mask from contacting the conductive layer 171 when the EL layer 172 is formed using a metal mask.

The EL layer 172R, the EL layer 172G, and the EL layer 172B each include a region in contact with the top surface of the conductive layer 171 used as a pixel electrode and a region in contact with the surface of the insulating layer 272. In addition, the end portions of the EL layer 172R, the EL layer 172G, and the EL layer 172B are located on the insulating layer 272 .

As shown in FIG. 59B, a gap is provided between the EL layers of the light-emitting elements exhibiting two different colors. In this way, it is preferable to provide the EL layer 172R, the EL layer 172G, and the EL layer 172B so as not to contact each other. This can appropriately prevent current from flowing through two adjacent EL layers and causing unintentional light emission (also called crosstalk). Therefore, the contrast ratio can be improved and a display device with high display quality can be realized.

For example, the EL layer 172R, the EL layer 172G, and the EL layer 172B can be formed separately by a vacuum evaporation method using a shadow mask such as a metal mask. In addition, the above-mentioned EL layer may be formed separately by photolithography. By utilizing the photolithography method, a high-definition display device that is difficult to achieve using a metal mask can be realized.

Note that in this specification and the like, a device manufactured using a metal mask or FMM (Fine Metal Mask) is sometimes referred to as a device with an MM (Metal Mask) structure. In addition, in this specification and the like, a device manufactured without using a metal mask or FMM may be referred to as a device with an MML (Metal Mask Less) structure. Since a display device with an MML structure is not manufactured using a metal mask, it has a higher degree of design freedom in terms of pixel arrangement and pixel shape than a display device with an MM structure.

The protective layer 271 is provided on the conductive layer 173 used as a common electrode so as to cover the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. The protective layer 271 has the function of preventing impurities such as water from diffusing into each light-emitting element from above.

The protective layer 271 may have a single-layer structure or a stacked-layer structure including at least an inorganic insulating film, for example. Examples of the inorganic insulating film include oxide films or nitride films such as silicon oxide films, silicon oxynitride films, silicon oxynitride films, silicon nitride films, aluminum oxide films, aluminum oxynitride films, and hafnium oxide films. . In addition, a semiconductor material such as indium gallium oxide or indium gallium zinc oxide (IGZO) may be used as the protective layer 271 . In addition, the protective layer 271 may be formed by the ALD method, CVD method or sputtering method. Note that the structure in which the protective layer 271 includes an inorganic insulating film is exemplified here, but is not limited to this. For example, the protective layer 271 may have a stacked structure of an inorganic insulating film and an organic insulating film.

In this specification, nitrogen oxide refers to a compound with a nitrogen content greater than that of oxygen. In addition, oxynitride refers to a compound with an oxygen content greater than that of nitrogen. In addition, the content of each element can be measured using, for example, Rutherford Backscattering Spectrometry (RBS: Rutherford Backscattering Spectrometry).

When the protective layer 271 uses indium gallium zinc oxide, it can be processed by wet etching or dry etching. For example, when the protective layer 271 uses IGZO, a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed aluminum acid etching solution)) may be used. The mixed aluminum acid etching solution can be prepared with a volume ratio of phosphoric acid: acetic acid: nitric acid: water = around 53.3:6.7:3.3:36.7.

FIG. 59C shows an example different from the above-mentioned structure. Specifically, in FIG. 59C , the light-emitting element 61 includes a light-emitting element 61W that emits white light. The light-emitting element 61W includes an EL layer 172W that exhibits white light between the conductive layer 171 used as a pixel electrode and the conductive layer 173 used as a common electrode.

The EL layer 172W may have, for example, a structure in which two light-emitting layers selected so that their respective light-emitting colors are in a complementary color relationship are laminated. Alternatively, a stacked EL layer in which a charge generation layer is sandwiched between light-emitting layers may be used. In addition, the EL layer 172W may include three or more light-emitting layers.

FIG. 59C shows three light-emitting elements 61W side by side. A colored layer 264R is provided on the upper part of the left light-emitting element 61W. The colored layer 264R is used as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on the upper part of the middle light-emitting element 61W, and a colored layer 264B that transmits blue light is provided on the upper part of the right light-emitting element 61W. This allows the display device to display a color image.

Here, between two adjacent light emitting elements 61W, the EL layer 172W and the conductive layer 173 used as a common electrode are separated from each other. This can prevent the two adjacent light-emitting elements 61W from causing unintentional light emission due to current flowing through the EL layer 172W. In particular, when using a stacked EL layer with a charge generation layer between two light-emitting layers as the EL layer 172W, there is a problem that the higher the definition, that is, the smaller the distance between adjacent pixels, the smaller the influence of crosstalk. The more obvious it is, and the contrast is reduced. Therefore, by adopting this structure, a display device having both high definition and high contrast can be realized.

The EL layer 172W and the conductive layer 173 used as a common electrode are preferably separated using photolithography. This makes it possible to reduce the gap between the light-emitting elements, so that a display device having a high aperture ratio can be realized compared to when a shadow mask such as a metal mask is used.

Note that when a light-emitting element with a bottom emission structure is used in a display device according to one embodiment of the present invention, a colored layer may be provided between the conductive layer 171 used as a pixel electrode and the insulating layer 363 .

Fig. 59D shows an example different from the above-mentioned structure. Specifically, in FIG. 59D , the insulating layer 272 is not provided between the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. By adopting this structure, a higher opening ratio can be achieved. In addition, since the insulating layer 272 is not provided and the unevenness of the light-emitting element 61 is reduced, a display device with an improved viewing angle can be realized. Specifically, the viewing angle can be 150° or more and less than 180°, preferably 160° or more and less than 180°, more preferably 160° or more and less than 180°.

In addition, the protective layer 271 covers the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. By adopting this structure, it is possible to suppress impurities (typically water, etc.) that may enter from the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. Therefore, leakage current between adjacent light-emitting elements 61 is reduced, so chroma and contrast are improved and power consumption is reduced.

In addition, in the structure shown in FIG. 59D , the shapes of the top surfaces of the conductive layer 171 , the EL layer 172R, and the conductive layer 173 are substantially the same. This structure can be formed simultaneously using a resist mask or the like after forming the conductive layer 171, the EL layer 172R, and the conductive layer 173. This process can also be called self-aligned patterning because the conductive layer 173 is used as a mask to process the EL layer 172R and the conductive layer 173 . Note that although the EL layer 172R is described here, the EL layer 172G and the EL layer 172B may also adopt the same structure.

In addition, in FIG. 59D , a protective layer 273 is also provided on the protective layer 271 . For example, the protective layer 271 is formed by using an apparatus capable of depositing a film with high coverage (typically an ALD apparatus, etc.) and using an apparatus (typically a sputtering apparatus, etc.) that can deposit a film having lower coverage than the protective layer 271 . To form the protective layer 273, a region 275 may be provided between the protective layer 271 and the protective layer 273. In other words, region 275 is located between EL layer 172R and EL layer 172G and between EL layer 172G and EL layer 172B.

Region 275 includes, for example, any one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically helium, neon, argon, xenon, krypton, etc.). In addition, region 275 sometimes contains gas used when depositing protective layer 273 , for example. For example, when the protective layer 273 is deposited by sputtering, the region 275 sometimes contains any one or more of the above-mentioned Group 18 elements. Note that when region 275 contains gas, gas chromatography or the like can be used to identify the gas. In addition, when the protective layer 273 is deposited by the sputtering method, the film of the protective layer 273 may contain a gas used during sputtering. In this case, when the protective layer 273 is analyzed using energy dispersive X-ray analysis (EDX analysis) or the like, elements such as argon may be detected.

In addition, when the refractive index of the region 275 is lower than the refractive index of the protective layer 271 , the light emitted by the EL layer 172R, the EL layer 172G or the EL layer 172B is reflected at the interface between the protective layer 271 and the region 275 . Thereby, it is sometimes possible to suppress light emitted from the EL layer 172R, the EL layer 172G, or the EL layer 172B from being incident on adjacent pixels. This can suppress mixing of different light emission colors from adjacent pixels, thereby improving the display quality of the display device.

In addition, when the structure shown in FIG. 59D is adopted, the area between the light-emitting element 61R and the light-emitting element 61G or the area between the light-emitting element 61G and the light-emitting element 61B (hereinafter simply referred to as the distance between the light-emitting elements) can be narrowed. . Specifically, the distance between the light-emitting elements can be 1 μm or less, preferably 500 nm or less, more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. . In other words, there is a region where the distance between the side surfaces of the EL layer 172R and the side surfaces of the EL layer 172G or the distance between the side surfaces of the EL layer 172G and the side surfaces of the EL layer 172B is 1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably Area below 100nm.

In addition, for example, when the region 275 contains a gas, it is possible to perform element isolation between light-emitting elements while suppressing mixing of light from each light-emitting element, crosstalk, and the like.

Additionally, area 275 may also be filled with filler. Examples of fillers include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, and PVB (polyvinyl butyral) resin. Or EVA (ethylene vinyl acetate) resin, etc. In addition, a photoresist can also be used as a filler. The photoresist used as the filler can be either a positive photoresist or a negative photoresist.

In addition, when comparing the above-mentioned white light-emitting device (single structure or series structure) and the light-emitting device of the SBS structure, the power consumption of the light-emitting device of the SBS structure can be made lower than that of the white light-emitting device. When it is desired to reduce power consumption, it is preferred to use a light-emitting device with an SBS structure. On the other hand, the manufacturing process of a white light-emitting device is simpler than that of a light-emitting device with an SBS structure, so that the manufacturing cost can be reduced or the manufacturing yield can be improved, so it is preferable.

FIG. 60A shows an example different from the above-mentioned structure. Specifically, the structure shown in FIG. 60A is different from the structure shown in FIG. 59D in the structure of the insulating layer 363. When processing the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B, a part of the top surface of the insulating layer 363 is shaved off and has a recessed portion. A protective layer 271 is formed in this recess. In other words, there is a region in which the bottom surface of the protective layer 271 is located below the bottom surface of the conductive layer 171 when viewed in cross section. By having this region, impurities (typically water, etc.) that can enter the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B from below can be appropriately suppressed. In addition, the above-mentioned recessed portion may be formed when impurities (also referred to as residues) that may adhere to the side surfaces of the light-emitting elements 61R, 61G, and 61B during processing of the light-emitting elements 61R, 61G, and 61B are removed by wet etching or the like. By covering the side surfaces of each light-emitting element with the protective layer 271 after removing the above-mentioned residues, a highly reliable display device can be obtained.

In addition, FIG. 60B shows an example different from the above-mentioned structure. Specifically, the structure shown in FIG. 60B includes an insulating layer 276 and a microlens array 277 in addition to the structure shown in FIG. 60A. Insulating layer 276 is used as an adhesive layer. In addition, when the refractive index of the insulating layer 276 is lower than the refractive index of the microlens array 277, the microlens array 277 can collect the light emitted by the light emitting element 61R, the light emitting element 61G and the light emitting element 61B. As a result, the light extraction efficiency of the display device can be improved. This is particularly preferable because a bright image can be seen when the user looks at the display surface of the display device from the front. In addition, as the insulating layer 276, various curing adhesives such as photo-curing adhesives such as ultraviolet curing adhesives, reaction curing adhesives, thermosetting adhesives, and anaerobic adhesives can be used. Examples of these binders include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) ) resin or EVA (ethylene vinyl acetate) resin, etc. In particular, materials with low moisture permeability such as epoxy resin are preferably used. In addition, a two-liquid mixed resin can also be used. In addition, an adhesive sheet or the like may also be used.

In addition, FIG. 60C shows an example different from the above-mentioned structure. Specifically, the structure shown in FIG. 60C includes three light-emitting elements 61W instead of the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B in the structure shown in FIG. 60A. In addition, an insulating layer 276 is provided above the three light emitting elements 61W, and a colored layer 264R, a colored layer 264G, and a colored layer 264B are provided above the insulating layer 276 . Specifically, a colored layer 264R that transmits red light is provided overlapping the light-emitting element 61W on the left, a colored layer 264G that transmits green light is provided overlapping the light-emitting element 61W in the center, and a colored layer 264G that transmits green light is provided overlapping the light-emitting element 61W on the right. A colored layer 264B that transmits blue light is provided at the position of the light-emitting element 61W on the side. As a result, the display device can display color images. The structure shown in FIG. 60C is also a modified example of the structure shown in FIG. 59C.

In addition, FIG. 60D shows an example different from the above-mentioned structure. Specifically, in the structure shown in FIG. 60D , the protective layer 271 is provided adjacent to the side surfaces of the conductive layer 171 and the EL layer 172 . In addition, the conductive layer 173 is provided as a continuous layer commonly used by each light-emitting element. In addition, in the structure shown in FIG. 60D , region 275 is preferably filled with filler.

By providing the light-emitting element 61 with an optical microcavity resonator (microcavity) structure, the color purity of the emitted color can be improved. When the light-emitting element 61 has a microcavity structure, the product (optical distance) of the distance d between the conductive layer 171 and the conductive layer 173 and the refractive index n of the EL layer 172 is set to one-half the wavelength λ. m times (m is an integer above 1), that's it. The distance d can be calculated from Equation 1.

d=m×λ/(2×n) (Equation 1).

According to Equation 1, the distance d is determined based on the wavelength (light emission color) of the emitted light in the light-emitting element 61 with a microcavity structure. The distance d corresponds to the thickness of the EL layer 172 . Therefore, the EL layer 172G may be provided thicker than the EL layer 172B, and the EL layer 172R may be provided thicker than the EL layer 172G.

Note that, strictly speaking, the distance d is the distance from the reflective area in the conductive layer 171 used as a reflective electrode to the reflective area in the conductive layer 173 used as a semi-transmissive-semi-reflective electrode. For example, when the conductive layer 171 is a stack of silver and ITO (Indium Tin Oxide), a transparent conductive film, and the ITO is located on the EL layer 172 side, the distance d corresponding to the emission color can be set by adjusting the thickness of the ITO. That is, even if the thicknesses of the EL layer 172R, the EL layer 172G, and the EL layer 172B are all the same, the distance d suitable for the emission color can be obtained by changing the thickness of the ITO.

However, it is sometimes difficult to strictly determine the positions of the reflective regions in the conductive layer 171 and the conductive layer 173 . At this time, the microcavity effect can be fully obtained by assuming that any position in the conductive layer 171 and the conductive layer 173 is a reflective region.

The light-emitting element 61 is composed of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, or the like. Detailed structural examples of the light emitting element 61 will be described in other embodiments. In order to improve the light extraction efficiency of the microcavity structure, it is preferable to set the optical distance from the conductive layer 171 used as a reflective electrode to the light-emitting layer to an odd multiple of λ/4. In order to realize this optical distance, it is preferable to adjust the thickness of each layer constituting the light-emitting element 61 .

In addition, when light is emitted from the conductive layer 173 side, the reflectance of the conductive layer 173 is preferably higher than the transmittance. The light transmittance of the conductive layer 173 is preferably 2% or more and 50% or less, more preferably 2% or more and 60% or less, and still more preferably 2% or more and 10% or less. By reducing the transmittance (increasing the reflectivity) of the conductive layer 173, the microcavity effect can be increased.

FIG. 61A shows an example different from the above-mentioned structure. Specifically, in the structure shown in FIG. 61A , the EL layer 172 extends beyond the end of the conductive layer 171 in each of the light-emitting elements 61R, 61G, and 61B. For example, in the light-emitting element 61R, the EL layer 172R extends beyond the end of the conductive layer 171 . In addition, in the light-emitting element 61G, the EL layer 172G extends beyond the end of the conductive layer 171 . In addition, in the light-emitting element 61B, the EL layer 172B extends beyond the end of the conductive layer 171 .

In addition, in each of the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B, the EL layer 172 and the protective layer 271 have an overlapping region with the insulating layer 270 interposed therebetween. In addition, in the area between adjacent light emitting elements 61, the insulating layer 278 is provided on the protective layer 271.

Examples of the insulating layer 278 include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, and PVB (polyvinyl butyral). Resin or EVA (ethylene vinyl acetate) resin, etc. In addition, a photoresist may be used as the insulating layer 278 . The photoresist used as the insulating layer 278 may be either a positive photoresist or a negative photoresist.

A common layer 174 is provided on the light-emitting elements 61R, 61G, 61B and the insulating layer 278, and a conductive layer 173 is provided on the common layer 174. The common layer 174 has a region in contact with the EL layer 172R, a region in contact with the EL layer 172G, and a region in contact with the EL layer 172B. The light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B share the common layer 174 .

As the common layer 174, more than one of a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer and an electron injection layer may be used. For example, the common layer 174 may also be a carrier injection layer (a hole injection layer or an electron injection layer). In addition, the common layer 174 can also be said to be a part of the EL layer 172 . In addition, the common layer 174 can be provided as needed. When the common layer 174 is provided, a layer having the same function as the common layer 174 may not be provided as a layer included in the EL layer 172 .

The protective layer 273 is provided on the conductive layer 173 , and the insulating layer 276 is provided on the protective layer 273 .

In addition, FIG. 61B shows an example different from the above-mentioned structure. Specifically, the structure shown in FIG. 61B includes three light-emitting elements 61W instead of the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B in the structure shown in FIG. 61A. In addition, an insulating layer 276 is provided above the three light emitting elements 61W, and a colored layer 264R, a colored layer 264G, and a colored layer 264B are provided above the insulating layer 276 . Specifically, a colored layer 264R that transmits red light is provided overlapping the light-emitting element 61W on the left, a colored layer 264G that transmits green light is provided overlapping the light-emitting element 61W in the center, and a colored layer 264G that transmits green light is provided overlapping the light-emitting element 61W on the right. A colored layer 264B that transmits blue light is provided at the position of the light-emitting element 61W on the side. As a result, the display device can display color images. The structure shown in FIG. 61B is also a modified example of the structure shown in FIG. 60C.

FIG. 62A shows a schematic top view of the light emitting element 61 . Like FIG. 57A1 , FIG. 62A shows an example in which a plurality of light-emitting elements 61 having the same emission color are arranged adjacent to each other. In FIG. 62A, two light-emitting elements 61R are adjacent, two light-emitting elements 61G are adjacent, and two light-emitting elements 61B are adjacent. Note that three or more light-emitting elements 61 of the same light-emitting color may be adjacent. In addition, FIG. 62A shows a structure having three emission colors of red (R), green (G), and blue (B) as an example, but the structure is not limited thereto. For example, a structure having four or more luminous colors may be adopted.

In addition, FIG. 62A shows that the light-emitting elements 61 are arranged in a stripe arrangement, but the arrangement method of the light-emitting elements 61 is not limited to this. As an arrangement method of the light-emitting elements 61, delta arrangement, zigzag arrangement, S-stripe arrangement, pentile arrangement, etc. can be adopted.

62B and 62C are schematic cross-sectional views corresponding to the dashed-dotted line A3-A4 in FIG. 62A. FIG. 62B corresponds to a modified example of the structure shown in FIG. 60C. FIG. 62C corresponds to a modified example of the structure shown in FIG. 60D.

By using a plurality of light-emitting elements 61 of the same light-emitting color together as one sub-pixel, the number of grayscales that can be reproduced can be increased. Therefore, the display quality of the display device can be improved.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 9)

In this embodiment, an example of a stacked structure of the display device 10 will be described.

63A and 63B show perspective views of the display device 10. The display device 10 shown in FIG. 63A includes layer 60 overlapping layer 50. The layer 50 includes a plurality of pixel circuits 51 arranged in a matrix, a first drive circuit unit 231 , a second drive circuit unit 232 , and an input/output terminal unit 29 . Layer 60 includes a plurality of light emitting elements 61 arranged in a matrix.

In the display device 10 shown in FIGS. 63A and 63B , one pixel circuit 51 and one light-emitting element 61 are electrically connected to each other to serve as one pixel 230 . Therefore, an area in which the plurality of pixel circuits 51 included in the layer 50 and the plurality of light-emitting elements 61 included in the layer 60 overlap each other is used as the display area 235 . As the pixel 230 included in the display device 10 shown in FIGS. 63A and 63B , for example, the semiconductor device 100A, the semiconductor device 100B, or the semiconductor device 100C shown in the above-described embodiment can be used.

Power, signals, and the like required for the operation of the display device 10 are supplied to the display device 10 through the input/output terminal portion 29 . In the display device 10 shown in FIG. 63A , the transistors included in the peripheral driving circuit and the transistors included in the pixel 230 can be formed through the same process.

In addition, as shown in FIG. 63B , the display device 10 may provide layer 40 , layer 50 , and layer 60 in an overlapping manner. In FIG. 63B , the layer 50 is provided with a plurality of pixel circuits 51 arranged in a matrix, and the layer 40 is provided with the first drive circuit unit 231 and the second drive circuit unit 232 . By providing the first drive circuit unit 231 and the second drive circuit unit 232 in a layer different from the pixel circuit 51 , the frame around the display area 235 can be narrowed, thereby enlarging the occupied area of the display area 235 .

The resolution can be improved by enlarging the occupied area of the display area 235 . When the resolution of the display area 235 is fixed, the area occupied by each pixel can be expanded. Therefore, the light emission brightness of the display area 235 can be improved. In addition, the ratio of the light-emitting area to the occupied area of one pixel (also called "aperture ratio") can be increased. For example, the aperture ratio of the pixels may be 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. In addition, by enlarging the occupied area of each pixel, the current density supplied to the light-emitting element 61 can be reduced. Therefore, the load applied to the light-emitting element 61 is reduced, and the reliability of the semiconductor device 100 can be improved. Therefore, the reliability of the display device 10 including the semiconductor device 100 can be improved.

In addition, by stacking the display area 235 and peripheral drive circuits and the like, the wiring electrically connecting them can be shortened. Therefore, by reducing wiring resistance and parasitic capacitance, the operating speed of the semiconductor device 100 can be increased. In addition, the power consumption of the semiconductor device 100 is reduced.

In addition, the layer 40 may include a CPU 23 (Central Processing Unit: Central Processing Unit), a GPU 24 (Graphics Processing Unit: Graphics Processing Unit), and a storage circuit unit 25 in addition to the peripheral drive circuit. In the present embodiment and the like, the CPU 23 , the GPU 24 , the storage circuit unit 25 , etc. may be collectively referred to as “functional circuits”.

For example, the CPU 23 has a function of controlling the operations of the circuits provided in the GPU 24 and the layer 40 based on the program stored in the storage circuit unit 25 . The GPU 24 has a function of performing arithmetic processing for forming image data. In addition, the GPU 24 can perform a large number of row-column calculations (sum-of-product calculations) in parallel, and therefore can perform calculation processing using a neural network at high speed, for example. For example, the GPU 24 has a function of correcting image data using correction data stored in the storage circuit unit 25 . For example, the GPU 24 has a function of generating image data in which brightness, color, contrast, etc. are corrected.

The display device 10 may use the GPU 24 to perform up-conversion or down-conversion of image data. In addition, layer 40 may also be provided with a super-resolution circuit. The super-resolution circuit has a function of determining the potential of any pixel in the display area 235 using a sum-of-product operation of the potentials of pixels surrounding the pixel and weights. The super-resolution circuit has a function of up-converting image data with a lower resolution than the display area 235 . In addition, the super-resolution circuit has a function of down-converting image data having a resolution higher than that of the display area 235 .

The display device 10 can reduce the load on the GPU 24 by including the super-resolution circuit. For example, the load of the GPU 24 can be reduced by performing processing to 2K resolution (or 4K resolution) using the GPU 24 and up-converting to 4K resolution (or 8K resolution) using a super-resolution circuit. Down conversion can also be done similarly.

Note that the functional circuit included in layer 40 may not include all of these components, or may include other components. For example, it may include a potential generation circuit that generates a plurality of different potentials and/or a power management circuit that separately controls power supply and stop of power supply to each circuit of the display device 10 .

Power supply can be supplied and stopped for each circuit constituting the CPU 23. For example, power consumption can be reduced by stopping power supply to a circuit that is determined to be temporarily unused among the circuits constituting the CPU 23 and restarting power supply when necessary. Data necessary for restarting power supply may be stored in the storage circuit or storage circuit unit 25 or the like in the CPU 23 before the circuit is stopped. Quick recovery of a stopped circuit can be achieved by storing data needed when the circuit is restored. In addition, the supply of the clock signal can also be stopped to stop the circuit operation.

In addition, functional circuits may also include DSP circuits, sensor circuits, communication circuits, and/or FPGA (Field Programmable Gate Array), etc.

When the peripheral driving circuit and the display area 235 are overlapped and arranged, the conductive layer 701 may also be provided between the peripheral driving circuit and the display area 235 . In addition, when the peripheral driving circuit and the functional circuit are overlapped with the display area 235 , the conductive layer 701 may be provided between the peripheral driving circuit and the functional circuit and the display area 235 .

FIG. 64A shows a perspective view of the display device 10 including the conductive layer 701 between the peripheral driving circuit and functional circuit and the display area 235 . FIG. 64B is a plan view of the display device 10 shown in FIG. 64A viewed from the display area 235 side. Note that in FIG. 64B , in order to easily understand the relationship between the display area 235 and the conductive layer 701 , the description of a part of the display area 235 is omitted.

Peripheral drive circuits and functional circuits may each generate electromagnetic noise during operation. When the electromagnetic noise reaches the display area 235, the display quality of the display device 10 may be degraded. Specifically, this electromagnetic noise affects the floating nodes (nodes ND1 to ND4) of the pixel circuit 51 included in the display area 235, and accurate potential maintenance may be hindered. As a result, the stable operation of the pixel circuit 51 is destroyed, and the display quality of the display device 10 is degraded.

By disposing the conductive layer 701 between the peripheral driving circuit and functional circuit and the display area 235, the electromagnetic noise generated during the operation of the peripheral driving circuit and functional circuit is blocked, thereby preventing the display quality from deteriorating. In addition, by blocking electromagnetic noise, the operation of the pixel circuit 51 is stable, and higher-precision potential control can be achieved. As a result, the display quality of the display device 10 can be improved.

In addition, when viewed from the conductive layer 701 side, the conductive layer 701 preferably covers the entire display area 235 . Therefore, the conductive layer 701 and the display area 235 preferably have areas that overlap each other. In addition, the display area 235 includes a plurality of pixel circuits 51 . Therefore, the conductive layer 701 and the plurality of pixel circuits 51 preferably have regions that overlap each other.

Note that the conductive layer 701 is not limited to a planar shape, and may also be in a mesh shape, a stripe shape, or the like. When the internal stress of the conductive layer 701 is large, or when the conductive layer 701 is provided in a wide planar shape, the layers constituting the display device 10 may be distorted, and the reliability of the display device 10 may be reduced. By adopting a mesh shape, a stripe shape, or the like as the conductive layer 701, electromagnetic noise can be blocked and the stress of the conductive layer 701 can be relaxed.

65 is a perspective view of the display device 10 including the conductive layer 702 (conductive layer 702a, conductive layer 702b, conductive layer 702c, conductive layer 702d, and conductive layer 702e) between the peripheral driving circuit and functional circuit and the display area 235. In the example shown in FIG. 65 , the conductive layer 702 a is provided to overlap the first drive circuit unit 231 , the conductive layer 702 b is provided to overlap the second drive circuit unit 232 , the conductive layer 702 c is provided to overlap the CPU 23 , and the conductive layer 702 c is provided to overlap the GPU 24 . A conductive layer 702d is provided, and a conductive layer 702e is provided so as to overlap the memory circuit unit 25. Each of the conductive layers 702 preferably completely covers each of the peripheral drive circuits and functional circuits. However, a structure covering a part of each of the peripheral drive circuit and the functional circuit may be adopted.

FIG. 66A is a perspective view of the display device 10 including the conductive layer 701 and the conductive layer 702 between the peripheral driving circuit and the functional circuit and the display area 235 . By providing the conductive layer 701 in addition to the conductive layer 702, the electromagnetic noise blocking effect can be further improved.

Therefore, conductive layer 701 and conductive layer 702 are used as electromagnetic shields (sometimes referred to as "shielding layers" or "shielding layers"). The conductive layer 701 and the conductive layer 702 may be in a floating state, but are preferably supplied with a fixed potential such as a high power supply potential VDD, a low power supply potential VSS, a common potential COM, or a ground potential GND. For example, it suffices to supply the conductive layer 701 and the conductive layer 702 with the ground potential GND. When the display device 10 includes both the conductive layer 701 and the conductive layer 702, the conductive layer 701 and the conductive layer 702 may have the same potential or different potentials. Alternatively, one of the conductive layer 701 and the conductive layer 702 may be in a floating state.

In addition, FIG. 66A shows an example in which the display device 10 includes two layers of conductors for electromagnetic shielding. However, the display device 10 may also include three or more layers of conductors for electromagnetic shielding. By including multiple layers of electromagnetic shielding, the blocking effect of electromagnetic noise can be improved. When multiple layers of electromagnetic shielding are provided, each layer of electromagnetic shielding can be stacked via an insulator.

In addition, like the conductive layer 701, the conductive layer 702 is not limited to a planar shape, and the conductive layer 702 may also be in a mesh shape (see FIG. 66B), a stripe shape (see FIG. 66C), or the like.

In addition, the conductive layer used as wiring may be used as electromagnetic shielding instead of using the conductive layer 701 and the conductive layer 702 as electromagnetic shielding. For example, wiring for supplying a fixed potential such as an anode potential or a cathode potential may be formed on a lower layer of the plurality of pixel circuits 51 and the wiring may be used as an electromagnetic shield. By using a conductive layer used as a wiring as an electromagnetic shield, the number of layers constituting the display device 10 can be reduced. Therefore, the productivity of the display device 10 can be improved.

In addition, a part of the transistors constituting the functional circuit included in layer 40 may be provided in layer 50 . In addition, a part of the transistors constituting the pixel circuit 51 included in the layer 50 may be provided in the layer 40 . Therefore, the functional circuit may also include Si transistors and OS transistors. In addition, the pixel circuit 51 may include Si transistors and OS transistors.

The transistors included in the display device 10 may be n-channel transistors or p-channel transistors. The display device 10 may use both n-channel transistors and p-channel transistors. For example, the circuit included in the display device 10 may adopt a CMOS structure in which n-channel transistors and p-channel transistors are combined.

Furthermore, for example, when the pixel circuit 51 is composed of a plurality of types of transistors using different semiconductor materials, the transistors may be provided in different layers according to the types of transistors. For example, when the pixel circuit 51 includes a region 51a including a Si transistor and a region 51b including an OS transistor, the region 51a may be formed in the layer 40 and the region 51b may be formed in the layer 50 (see FIG. 67 ). In addition, by overlapping the region 51a and the region 51b, the area occupied by the pixel circuit 51 can be reduced. Therefore, the clarity of the display device 10 can be improved.

In addition, as the transistor included in the region 51a, a transistor including a low temperature polysilicon (LTPS (Low Temperature Poly Silicon)) in the semiconductor layer (hereinafter also referred to as an LTPS transistor) may be used. LTPS transistors have high field-effect mobility and good frequency characteristics. The structure that combines LTPS transistors and OS transistors is sometimes called LTPO.

The conductivity types of the transistors included in the region 51a and the region 51b may be different or the same. For example, the region 51a may include a p-channel transistor, and the region 51b may include an n-channel transistor. In addition, both the region 51a and the region 51b may include n-channel transistors. In addition, both the region 51a and the region 51b may include n-channel transistors and p-channel transistors.

Furthermore, for example, when the peripheral drive circuit is composed of multiple types of transistors using different semiconductor materials, the transistors may be provided in different layers according to the types of transistors. For example, when the first drive circuit unit 231 is composed of a region 231 a including a Si transistor and a region 231 b including an OS transistor, the region 231 a may be formed in the layer 40 and the region 231 b may be formed in the layer 50 . For example, when the second drive circuit unit 232 includes the region 232a including the Si transistor and the region 232b including the OS transistor, the region 232a may be formed in the layer 40 and the region 232b may be formed in the layer 50 . For example, the peripheral drive circuit can also be composed of LTPO.

The conductivity types of the transistors included in the region 231a and the region 231b may be different or the same. For example, the region 231a may include a p-channel transistor and the region 231b may include an n-channel transistor. In addition, both the region 231a and the region 231b may include n-channel transistors. In addition, both the region 231a and the region 231b may include n-channel transistors and p-channel transistors.

The conductivity types of the transistors included in the region 232a and the region 232b may be different or the same. For example, region 232a may include a p-channel transistor and region 232b may include an n-channel transistor. In addition, both the region 232a and the region 232b may include n-channel transistors and p-channel transistors.

FIGS. 68A and 68B illustrate modified examples of the display device 10 shown in FIGS. 63A and 63B. The display device 10 shown in FIG. 68A has a structure in which one pixel circuit 51 and two light-emitting elements 61 (the light-emitting element 61a and the light-emitting element 61b) are electrically connected. One pixel circuit 51 can be used to alternately control the light emission of the two light-emitting elements 61 . In other words, one pixel circuit 51 can be used to control the operation of two pixels 230 (pixel 230a and pixel 230b). In addition, the light-emitting element 61a and the light-emitting element 61b may be used as one pixel 230 by causing them to emit light at the same time.

As the pixel 230 included in the display device 10 shown in FIGS. 68A and 68B , for example, the semiconductor device 100F, the semiconductor device 100G, or the semiconductor device 100H shown in the above-mentioned embodiments can be used. As described above, the semiconductor device 100F, the semiconductor device 100G, and the semiconductor device 100H are suitable for use in a display device with a high pixel density.

In addition, similarly to the display device 10 shown in FIG. 63B , the layer 40 may be provided in the display device 10 shown in FIG. 68A (see FIG. 68B ).

Note that in this embodiment, a structure is shown in which one pixel circuit 51 is used to control two light-emitting elements 61 , but one pixel circuit 51 may be used to control three or more light-emitting elements 61 .

<Structure example of display module>

Next, a structural example of a display module including a display device according to one embodiment of the present invention will be described.

69A to 69C are three-dimensional schematic views of the display module 400. In the display module 400 , the input/output terminal portion 29 of the display device 10 has FPC 404 (FPC: Flexible printed circuits). FPC404 has a structure including wiring in a thin film made of an insulator. In addition, FPC404 is flexible. The FPC 404 is used as a wiring for supplying video signals, control signals, power supply potential, and the like to the display device 10 from the outside. Alternatively, the IC can be mounted on the FPC404.

The display module 400 shown in FIG. 69B has a structure including the display device 10 on a printed circuit board 401. The printed circuit board 401 has a structure including wiring inside or on the surface or both the inside and the surface of a substrate made of an insulator.

In the display module 400 shown in FIG. 69B , the input/output terminal portion 29 of the display device 10 is electrically connected to the terminal portion 402 of the printed circuit board 401 through the lead wire 403 . Leads 403 may be formed by wire bonding. In addition, wire bonding may use ball bonding or wedge bonding.

In addition, after the lead 403 is formed, the lead 403 may be covered with a resin material or the like. Note that the display device 10 and the printed circuit board 401 may be electrically connected by methods other than wire bonding. For example, the display device 10 and the printed circuit board 401 may be electrically connected through anisotropic conductive adhesive, bumps, or the like.

In the display module 400 shown in FIG. 69B , the terminal portion 402 of the printed circuit board 401 and the FPC 404 are electrically connected. For example, when the pitch of the electrodes included in the input/output terminal portion 29 of the display device 10 is different from the pitch of the electrodes included in the FPC 404 , the input/output terminal portion 29 and the FPC 404 may be electrically connected through the printed circuit board 401 . Specifically, the intervals (pitch) of the plurality of electrodes included in the input/output terminal portion 29 can be changed to the intervals (pitch) of the plurality of electrodes included in the terminal portion 402 using wiring formed in the printed circuit board 401 . That is, even when the pitch of the electrodes included in the input/output terminal portion 29 is different from the pitch of the electrodes included in the FPC 404, electrical connection between the two electrodes can be achieved.

In addition, various elements such as resistors, capacitive elements, and semiconductor elements may be provided on the printed circuit board 401 .

In addition, like the display module 400 shown in FIG. 69C , the terminal portion 402 may be electrically connected to the connection portion 405 provided on the bottom surface of the printed circuit board 401 (the surface on which the display device 10 is not provided). For example, by using a socket-type connection part as the connection part 405, the display module 400 can be easily attached and detached from other devices.

FIG. 70 shows an example of a cross-sectional structure of a part of the display device 10 shown in FIG. 63A. The display device 10 shown in FIG. 70 includes a layer 50 including a substrate 301, a capacitor 246, and a transistor 310, and a layer 60 including a light-emitting element 61R, a light-emitting element 61G, and a light-emitting element 61B. Layer 60 is provided on insulating layer 363 included in layer 50 .

The transistor 310 is a transistor having a channel formation region in the substrate 301 . As the substrate 301, for example, a semiconductor substrate such as a single crystal silicon substrate can be used. The transistor 310 includes a portion of the substrate 301 , a conductive layer 311 , a low-resistance region 312 , an insulating layer 313 and an insulating layer 314 . The conductive layer 311 is used as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and is used as a gate insulating layer. The low resistance region 312 is a region doped with impurities in the substrate 301 and is used as one of the source and drain electrodes. The insulating layer 314 covers the sides of the conductive layer 311 and serves as an insulating layer.

In addition, an element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .

In addition, an insulating layer 261 is provided to cover the transistor 310, and the capacitor 246 is provided on the insulating layer 261.

The capacitor 246 includes a conductive layer 241, a conductive layer 245, and an insulating layer 243 between them. The conductive layer 241 is used as one electrode of the capacitor 246 , the conductive layer 245 is used as the other electrode of the capacitor 246 , and the insulating layer 243 is used as the dielectric of the capacitor 246 .

The conductive layer 241 is disposed on the insulating layer 261 and embedded in the insulating layer 254 . The conductive layer 241 is electrically connected to one of the source and drain electrodes of the transistor 310 through a plug 266 embedded in the insulating layer 261 . The insulating layer 243 covers the conductive layer 241 and is provided. The conductive layer 245 is provided in a region overlapping the conductive layer 241 with the insulating layer 243 interposed therebetween.

The insulating layer 255 is provided to cover the capacitor 246 , the insulating layer 363 is provided on the insulating layer 255 , and the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B are provided on the insulating layer 363 . The protective layer 415 is provided on the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. The substrate 420 is provided on the top surface of the protective layer 415 with the resin layer 419 interposed therebetween.

The pixel electrode of the light-emitting element is electrically connected to one of the source and drain electrodes of the transistor 310 through the plug 256 embedded in the insulating layer 255 and the insulating layer 363, the conductive layer 241 embedded in the insulating layer 254, and the plug 266 embedded in the insulating layer 261. connect.

FIG. 71 shows a modified example of the cross-sectional structure example shown in FIG. 70 . The main difference between the cross-sectional structure example of the display device 10 shown in FIG. 71 and the cross-sectional structure example shown in FIG. 70 is that a transistor 320 is included instead of the transistor 310 . Note that description of the same parts as in FIG. 70 may be omitted.

The transistor 320 is a transistor using a metal oxide (also called an oxide semiconductor) in a semiconductor layer forming a channel.

The transistor 320 includes a semiconductor layer 321, an insulating layer 323, a conductive layer 324, a pair of conductive layers 325, an insulating layer 326 and a conductive layer 327.

As the substrate 331, an insulating substrate or a semiconductor substrate can be used.

An insulating layer 332 is provided on the substrate 331. The insulating layer 332 serves as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320 and prevents oxygen from escaping from the semiconductor layer 321 to the insulating layer 332 side. As the insulating layer 332, for example, a film such as an aluminum oxide film, a hafnium oxide film, a silicon nitride film, or the like, which is less likely to diffuse hydrogen or oxygen than a silicon oxide film, can be used.

The conductive layer 327 is provided on the insulating layer 332, and the insulating layer 326 is provided to cover the conductive layer 327. The conductive layer 327 is used as a first gate electrode of the transistor 320, and a part of the insulating layer 326 is used as a first gate insulating layer. At least a portion of the insulating layer 326 that contacts the semiconductor layer 321 is preferably made of an oxide insulating film such as a silicon oxide film. The top surface of insulating layer 326 is preferably planarized.

The semiconductor layer 321 is provided on the insulating layer 326. The semiconductor layer 321 preferably contains a metal oxide (also referred to as an oxide semiconductor) film having semiconductor characteristics. Materials that can be used for the semiconductor layer 321 will be described in detail later.

A pair of conductive layers 325 are in contact with the semiconductor layer 321 and serve as source electrodes and drain electrodes.

In addition, an insulating layer 328 is provided to cover the top and side surfaces of the pair of conductive layers 325 and the side surfaces of the semiconductor layer 321 , and the insulating layer 264 is provided on the insulating layer 328 . The insulating layer 328 is used as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 264 and the like to the semiconductor layer 321 and oxygen from being detached from the semiconductor layer 321 . As the insulating layer 328, the same insulating film as the above-mentioned insulating layer 332 can be used.

Openings reaching the semiconductor layer 321 are provided in the insulating layer 328 and the insulating layer 264 . The opening is embedded with an insulating layer 323 and a conductive layer 324 that are in contact with the side surfaces of the insulating layer 264 , the insulating layer 328 and the conductive layer 325 and the top surface of the semiconductor layer 321 . The conductive layer 324 is used as the second gate electrode, and the insulating layer 323 is used as the second gate insulating layer.

The top surface of the conductive layer 324, the top surface of the insulating layer 323, and the top surface of the insulating layer 264 are planarized so that their heights are substantially the same, and the insulating layer 329 and the insulating layer 265 are provided to cover them.

The insulating layer 264 and the insulating layer 265 are used as interlayer insulating layers. The insulating layer 329 is used as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 265 and the like to the transistor 320 . The insulating layer 329 may use the same insulating film as the insulating layer 328 and the insulating layer 332 described above.

The plug 274 electrically connected to one of the pair of conductive layers 325 is embedded in the insulating layer 265 , the insulating layer 329 and the insulating layer 264 . Here, the plug 274 preferably has a conductive layer 274a covering the side surfaces of the respective openings of the insulating layer 265, the insulating layer 329, the insulating layer 264 and the insulating layer 328 and a part of the top surface of the conductive layer 325, and is in contact with the top surface of the conductive layer 274a. conductive layer 274b. At this time, it is preferable to use a conductive material that does not easily diffuse hydrogen and oxygen as the conductive layer 274a.

FIG. 72 shows an example of a cross-sectional structure of a part of the display device 10 shown in FIG. 63B. In the display device 10 shown in FIG. 72 , a transistor 310A with a channel formed in the substrate 301A included in the layer 40 and a transistor 310B with a channel formed in the substrate 301A included in the layer 40 are stacked. The same material as the substrate 301 may be used for the substrate 301A.

In the display device 10 shown in FIG. 72 , the layer 60 on which the light-emitting element 61 is provided, the layer 50 on which the substrate 301B, the transistor 310B and the capacitor 246 are provided, and the layer 40 on which the substrate 301A and the transistor 310A are provided are bonded together.

The substrate 301B is provided with a plug 343 penetrating the substrate 301B. The plug 343 is used as a through silicon via (TSV). The plug 343 is electrically connected to the conductive layer 342 provided on the back surface of the substrate 301B (the surface opposite to the substrate 420 side). On the other hand, the conductive layer 341 is provided on the insulating layer 261 of the substrate 301A.

By bonding conductive layer 341 and conductive layer 342, layer 40 and layer 50 are electrically connected.

It is preferable to use the same conductive material as the conductive layer 341 and the conductive layer 342 . For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Sn, Zn, Au, Ag, Pt, Ti, Mo, and W or a metal nitride film (nitride film) containing the above elements as a component can be used. Titanium film, molybdenum nitride film or tungsten nitride film), etc. It is particularly preferable to use copper as the conductive layer 341 and the conductive layer 342 . Thus, it is possible to adopt Cu-Cu (copper-copper) direct bonding technology (a technology in which electrical conduction is achieved by connecting Cu (copper) pads to each other). In addition, the conductive layer 341 and the conductive layer 342 may be connected through bumps.

FIG. 73 shows a modified example of the cross-sectional structure example shown in FIG. 72 . In the cross-sectional structure example of the display device 10 shown in FIG. 73 , a transistor 310A in which a channel is formed in a substrate 301A and a transistor 320 in which a metal oxide is included in a semiconductor layer forming the channel are laminated. Note that description of the same parts as in FIGS. 70 to 72 may be omitted.

The layer 50 shown in FIG. 73 has a structure in which the substrate 331 is removed from the layer 50 shown in FIG. 71 . Furthermore, in layer 40 shown in FIG. 73 , insulating layer 261 is provided to cover transistor 310A, and conductive layer 251 is provided on insulating layer 261 . In addition, an insulating layer 262 is provided to cover the conductive layer 251 , and the conductive layer 252 is provided on the insulating layer 262 . The conductive layer 251 and the conductive layer 252 are each used as wiring. In addition, an insulating layer 263 and an insulating layer 332 are provided to cover the conductive layer 252, and the transistor 320 is provided on the insulating layer 332. In addition, an insulating layer 265 is provided to cover the transistor 320 , and the capacitor 246 is provided on the insulating layer 265 . Capacitor 246 and transistor 320 are electrically connected through plug 274 . The layer 50 is provided to overlap the insulating layer 263 included in the layer 40 .

The transistor 320 may be used as a transistor constituting the pixel circuit 51 . The transistor 310 may be used as a transistor constituting the pixel circuit 51 or a transistor constituting a peripheral driving circuit. The transistor 310 and the transistor 320 may be used as transistors constituting a functional circuit such as an arithmetic circuit or a memory circuit, for example.

By having this structure, a peripheral drive circuit and the like can be formed in addition to the pixel circuit 51 just below the layer 60 including the light-emitting element 61 . Therefore, compared with the case where the drive circuit is provided around the display area, the display device can be miniaturized.

FIG. 74 shows an example of a cross-sectional structure of a part of the display device 10 shown in FIGS. 64A and 64B. FIG. 74 is a modified example of the cross-sectional structure example shown in FIG. 70 . In FIG. 74 , a conductive layer 701 is provided on the insulating layer 263 , and an insulating layer 333 is provided on the conductive layer 701 . In addition, an insulating layer 332 is provided on the insulating layer 333 .

Conductive layer 701 is not electrically connected to the electrical conductors (plugs, etc.) used to supply signals from the circuitry in layer 40 to the circuitry in layer 50 . Likewise, conductive layer 701 is not electrically connected to the electrical conductors (plugs, etc.) used to supply signals from the circuitry in layer 50 to the circuitry in layer 40 .

FIG. 74 shows an example of the cross-sectional structure in which the conductive layer 701 is provided between the layer 40 and the layer 50 . However, the conductive layer 701 may also be provided in the layer 40 or the layer 50 .

FIG. 75 shows an example of a cross-sectional structure of a part of the display device 10 shown in FIG. 66 . FIG. 75 is also a modified example of the cross-sectional structure example shown in FIG. 74 . In FIG. 75 , the conductive layer 702 is provided on the insulating layer 263 , and the insulating layer 334 is provided on the conductive layer 702 . In addition, the conductive layer 701 is provided on the insulating layer 334, and the insulating layer 333 is provided on the conductive layer 701. In addition, an insulating layer 332 is provided on the insulating layer 333 .

Like conductive layer 701 , conductive layer 702 is not electrically connected to a conductor (plug, etc.) that supplies a signal from the circuit in layer 40 to the circuit in layer 50 . Furthermore, conductive layer 702 is not electrically connected to conductors (plugs, etc.) that supply signals from the circuitry in layer 50 to the circuitry in layer 40 . Note that the conductive layer 701 and the conductive layer 702 may also be electrically connected.

FIG. 75 shows an example of the cross-sectional structure in which the conductive layer 701 and the conductive layer 702 are provided between the layer 40 and the layer 50 . However, the conductive layer 701 and the conductive layer 702 may also be provided in the layer 40 or the layer 50 . In addition, the conductive layer 702 may also be provided in the layer 40 , and the conductive layer 701 may also be provided in the layer 50 .

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 10)

The display device 10 according to one embodiment of the present invention can realize image display using interlaced scanning drive. In this embodiment, interlaced scanning driving of the display device 10 will be described.

[Drive method 1]

FIG. 76A shows a block diagram of the display device 10. FIG. 76A shows pixels 230 in four rows and three columns among the pixels 230 arranged in a matrix of m rows and n columns. The pixels 230 in the first row are electrically connected to the first drive circuit unit 231 through the wiring GLa[1]. The pixels 230 in the second row are electrically connected to the first drive circuit unit 231 through the wiring GLa[2]. The pixels 230 in the third row are electrically connected to the first drive circuit unit 231 through the wiring GLa[3]. The pixels 230 in the fourth row are electrically connected to the first drive circuit unit 231 through the wiring GLa[4]. The wiring GLa is used as a scan line.

In addition, the pixels 230 in the first column are electrically connected to the second drive circuit section 232 through the wiring DL[1]. The pixels 230 in the second column are electrically connected to the second drive circuit unit 232 through the wiring DL[2]. The pixels 230 in the third column are electrically connected to the second drive circuit unit 232 through the wiring DL[3]. The wiring DL is used as a video signal line.

In FIG. 76A, the pixel 230 in the 4th row and 3rd column is represented as pixel 230[4, 3]. In addition, the pixel 230 in the m-th row and the third column is represented as pixel 230[m, 3]. Note that in FIG. 76A , description of wirings other than the wiring GLa and the wiring DL is omitted.

The start pulse VSP and the clock signal VCLK are supplied to the first drive circuit unit 231 .

FIG. 76B is a timing chart explaining the operation of the display device 10 shown in FIG. 76A. When the start pulse VSP is supplied to the first drive circuit section 231, the wiring GLa is sequentially selected in synchronization with the clock signal VCLK. While the wiring GLa is selected, the video signal is supplied to the pixel 230 from the second drive circuit unit 232 . The period in which the wiring GLa[1] to the wiring GLa[m] are sequentially selected is called a "frame" or a "frame period." Generally speaking, during the image display period, selection of wiring GLa[1] to wiring GLa[m] is repeated. Therefore, the start pulse VSP is supplied every frame period.

For example, depending on the image source of the display, etc., the display quality may be similar even if the pixel density is lower than that of the display device 10 . At this time, by switching the selection of wiring GLa in odd-numbered rows and even-numbered rows on a frame-by-frame basis, the load on the light-emitting element 61 can be reduced while maintaining display quality. Therefore, the reliability of the display device 10 can be improved.

The timing chart shown in FIG. 76B shows an operation example in which the wiring GLa of the odd-numbered rows is sequentially selected in the first frame (odd-numbered frame) without selecting the wiring GLa of the even-numbered rows. Furthermore, an operation example is shown in which the wiring GLa of the even-numbered rows is sequentially selected in the second frame (even-numbered frame) without selecting the wiring GLa of the odd-numbered rows. Note that the wiring GLa of even-numbered rows may be sequentially selected in odd-numbered frames and the wiring GLa of odd-numbered rows may be sequentially selected in even-numbered frames. In this way, the driving method of switching the lines in which the video signal is written frame by frame is called "interlaced scanning" or "interlaced scanning driving". In addition, the driving method of writing video signals to all pixels in one frame is called "progressive scan" or "progressive scan drive".

Note that when it is desired to increase the light emission brightness, the light-emitting element 61a and the light-emitting element 61b can emit light at the same time without interlaced scanning driving, and the display operation can be performed by progressive scanning driving. Alternatively, the frame frequency in interlaced drive can be increased. The frame frequency is preferably 60 Hz or more, more preferably 120 Hz or more, and still more preferably 240 Hz or more. Interlaced scanning driving and progressive scanning driving can be performed by switching appropriately.

[Drive method 2]

Next, interlaced scanning driving when the semiconductor device 100F or the semiconductor device 100G is used as the pixel 230 will be described using FIG. 77 . Note that, in order to reduce repeated explanation, parts different from those in FIG. 76 will be mainly explained.

As shown in the above-described embodiment, the semiconductor device 100F and the semiconductor device 100G each include a light-emitting element 61 a having a cathode electrically connected to the wiring 104 a and a light-emitting element 61 b having a cathode electrically connected to the wiring 104 b.

FIG. 77A is a block diagram of the display device 10 using the semiconductor device 100F or the semiconductor device 100G as the pixel 230. In FIG. 77A , the pixels 230 in the odd-numbered rows are electrically connected to the wiring 104 a and the pixels 230 in the even-numbered rows are electrically connected to the wiring 104 b. Note that the pixels 230 in the even rows may also be electrically connected to the wiring 104a and the pixels 230 in the odd rows may also be electrically connected to the wiring 104b.

Note that description of wirings other than the wiring GLa and the wiring DL is omitted in FIG. 77A .

Furthermore, in the semiconductor device 100F and the semiconductor device 100G, the light-emitting element 61 a and the light-emitting element 61 b can be driven by one pixel circuit 51 , and the number of wirings GLa can be reduced by half. In FIG. 77A , the pixels 230 in the first row and the pixels 230 in the second row are electrically connected to the wiring GLa[1] of the first wiring GLa, and the pixels 230 in the third row and the pixels 230 in the fourth row are electrically connected to the wiring GLa[1] of the first wiring GLa. The wiring GLa[2] of the wiring GLa is electrically connected.

In FIG. 77A , the wiring GLa electrically connected to the pixel 230 in the m-th row is represented as wiring GLa[p]. When m is an even number, p is half of m, and when m is an odd number, p is half of m+1.

In addition, the light-emitting element 61a is used as the pixel 230 in the odd-numbered rows, and the light-emitting element 61b is used as the pixel 230 in the even-numbered rows. Note that the light-emitting element 61a can also be used as the pixels 230 of the even-numbered rows and the light-emitting element 61b can also be used as the pixels 230 of the odd-numbered rows.

FIG. 77B is a timing chart explaining the operation of the display device 10 shown in FIG. 77A. The first to p-th wirings GLa are sequentially selected frame by frame in synchronization with the clock signal VCLK. Furthermore, in the first frame (odd-numbered frame), the wiring 104a is supplied with the potential Vc and the wiring 104b is supplied with the potential Va. Furthermore, in the second frame (even-numbered frame), the wiring 104a is supplied with the potential Va and the wiring 104b is supplied with the potential Vc. This enables interlaced scanning driving.

As shown in the above embodiment, the pixel circuit 51F and the pixel circuit 51G that control the light emission of the light emitting element 61 occupy a small area, and therefore the semiconductor device 100F and the semiconductor device 100G are preferable in terms of improving the resolution of the display device. By operating the display device 10 using the semiconductor device 100F or the semiconductor device 100G in the pixel 230 with interlaced scanning driving, a display device with a high pixel density can be displayed.

[Drive method 3]

Next, interlaced scanning driving in the case of using the semiconductor device 100H as the pixel 230 will be described using FIG. 78 . Note that FIG. 78 is a modified example of FIG. 77 . Therefore, in order to reduce repetitive description, description will be mainly given on portions different from those in FIG. 77 .

As shown in the above-mentioned embodiment, the semiconductor device 100H includes the circuit 52a, the circuit 52b, the light-emitting element 61a, and the light-emitting element 61b. The circuit 52a is used as a switch for selecting whether the light-emitting element 61a emits light or not, and the circuit 52b is used as a switch for selecting whether the light-emitting element 61b emits light or not. Furthermore, the circuit 52a is electrically connected to the wiring GLc, and the circuit 52b is electrically connected to the wiring GLd.

When the light-emitting element 61 a is used for the pixels 230 in odd-numbered rows, the pixels 230 in the odd-numbered rows are electrically connected to the wiring GLC. In addition, when the light-emitting element 61b is used for the pixels 230 of the even-numbered rows, the pixels 230 of the even-numbered rows are electrically connected to the wiring GLd.

FIG. 78B is an explanatory timing chart illustrating the operation of the display device 10 shown in FIG. 78A. The first to p-th wirings GLa are sequentially selected frame by frame in synchronization with the clock signal VCLK. Furthermore, in the first frame (odd-numbered frame), the wiring GLC is sequentially selected in synchronization with the wiring GLa. For example, when the wiring GLa[1] is selected, the wiring GLC[1] is also selected. In the first frame (odd frame), all wiring GLd is not selected. Therefore, the light-emitting element 61a emits light and the light-emitting element 61b does not emit light.

In the second frame (even-numbered frame), the wiring GLd is sequentially selected in synchronization with the wiring GLa. For example, when the wiring GLa[1] is selected, the wiring GLd[1] is also selected. In the second frame (even-numbered frame), all wiring GLC is not selected. Therefore, the light-emitting element 61b emits light and the light-emitting element 61a does not emit light. This enables interlaced scanning driving.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 11)

In this embodiment mode, a transistor that can be used in a semiconductor device according to one embodiment of the present invention is described.

<Structure example of transistor>

79A, 79B, and 79C are top views and cross-sectional views of a transistor 500 that can be used in a semiconductor device according to one embodiment of the present invention. The transistor 500 can be applied to a semiconductor device according to one embodiment of the present invention.

FIG. 79A is a top view of transistor 500. In addition, FIG. 79B and FIG. 79C are cross-sectional views of the transistor 500. Here, FIG. 79B is a cross-sectional view along the chain line A1 - A2 in FIG. 79A , and this cross-sectional view corresponds to a cross-sectional view in the channel length direction of the transistor 500 . FIG. 79C is a cross-sectional view along the dashed-dotted line A3 - A4 in FIG. 79A , and this cross-sectional view corresponds to a cross-sectional view in the channel width direction of the transistor 500 . Note that, for ease of understanding, some components are omitted in the plan view of FIG. 79A .

As shown in FIG. 79, the transistor 500 includes: a metal oxide 531a arranged on a substrate (not shown); a metal oxide 531b arranged on the metal oxide 531a; and mutually separated electrodes arranged on the metal oxide 531b. Conductor 542a and conductor 542b; insulator 580 disposed on conductor 542a and conductor 542b and forming an opening between conductor 542a and conductor 542b; conductor 560 disposed in the opening; metal oxide disposed on 531b, conductor 542a, conductor 542b, and insulator 550 between insulator 580 and conductor 560; and metal oxide 531c disposed between metal oxide 531b, conductor 542a, conductor 542b, insulator 580, and insulator 550 . Here, as shown in FIGS. 79B and 79C , the top surface of the conductor 560 is preferably substantially aligned with the top surfaces of the insulator 550 , the insulator 554 , the metal oxide 531 c and the insulator 580 . Hereinafter, the metal oxide 531a, the metal oxide 531b, and the metal oxide 531c may be collectively referred to as the metal oxide 531. In addition, the conductor 542a and the conductor 542b may be collectively referred to as the conductor 542.

In the transistor 500 shown in FIG. 79 , the side surfaces of the conductor 542 a and the conductor 542 b on the side of the conductor 560 have a substantially vertical shape. In addition, the transistor 500 shown in FIG. 79 is not limited to this, and the angle formed by the side surface and the bottom surface of the conductor 542a and the conductor 542b may be 10° or more and 80° or less, preferably 30° or more and 60° or less. In addition, the opposite side surfaces of the conductor 542a and the conductor 542b may have a plurality of surfaces.

As shown in FIG. 79 , the insulator 554 is preferably disposed between the insulator 524 , the metal oxide 531 a , the metal oxide 531 b , the conductor 542 a , the conductor 542 b , and the metal oxide 531 c , and the insulator 580 . Here, as shown in FIGS. 79B and 79C , the insulator 554 is preferably connected to the side surfaces of the metal oxide 531c, the top surface and side surfaces of the conductor 542a, the top surface and side surfaces of the conductor 542b, the metal oxide 531a, and the metal oxide 531b. and the top surface of insulator 524 are in contact.

Note that the transistor 500 has a three-layer structure in which a metal oxide 531a, a metal oxide 531b, and a metal oxide 531c are stacked in and around a region where a channel is formed (hereinafter also referred to as a channel formation region). However, The present invention is not limited to this. For example, it may have a two-layer structure of metal oxide 531b and metal oxide 531c or a stacked structure of four or more layers. Furthermore, in the transistor 500, the conductor 560 has a two-layer structure, but the present invention is not limited thereto. For example, the conductor 560 may have a single-layer structure or a stacked structure of three or more layers. In addition, the metal oxide 531a, the metal oxide 531b, and the metal oxide 531c may each have a laminated structure of two or more layers.

For example, in the case where the metal oxide 531c has a stacked structure composed of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has a structure similar to that of the metal oxide. 531b has the same composition, and the second metal oxide has the same composition as metal oxide 531a.

Here, the conductor 560 is used as the gate electrode of the transistor, and the conductor 542a and the conductor 542b are each used as the source electrode or the drain electrode of the transistor. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and sandwiched between the conductor 542a and the conductor 542b. Here, the arrangement of the conductor 560, the conductor 542a, and the conductor 542b is selected to be self-aligned with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode may be arranged between the source electrode and the drain electrode in a self-aligned manner. This allows the conductor 560 to be formed without leaving any room for alignment, so the area occupied by the transistor 500 can be reduced. This makes it possible to realize a high-definition display device. In addition, a display device with a narrow frame can be realized.

As shown in FIG. 79 , the conductor 560 preferably includes a conductor 560 a disposed inside the insulator 550 and a conductor 560 b disposed to be embedded inside the conductor 560 a.

The transistor 500 preferably includes an insulator 514 arranged on a substrate (not shown), an insulator 516 arranged on the insulator 514, a conductor 505 arranged to be embedded in the insulator 516, and an insulator arranged on the insulator 516 and the conductor 505. 522 and an insulator 524 arranged on the insulator 522. It is preferable that the metal oxide 531a is arranged on the insulator 524.

It is preferable that insulators 574 and 581 used as interlayer films are disposed on the transistor 500 . Here, the insulator 574 is preferably in contact with the conductor 560 , the insulator 550 , the insulator 554 , the metal oxide 531 c and the top surface of the insulator 580 .

The insulator 522, the insulator 554, and the insulator 574 preferably have the function of suppressing the diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, etc.). For example, the hydrogen permeability of the insulator 522 , the insulator 554 , and the insulator 574 is preferably lower than that of the insulator 524 , the insulator 550 , and the insulator 580 . In addition, the insulator 522 and the insulator 554 preferably have a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). For example, the oxygen permeability of insulator 522 and insulator 554 is preferably lower than that of insulator 524 , insulator 550 and insulator 580 .

Here, the insulator 524 , the metal oxide 531 and the insulator 550 are separated from the insulator 580 and the insulator 581 by the insulator 554 and the insulator 574 . This can prevent impurities such as hydrogen and excess oxygen contained in the insulator 580 and the insulator 581 from being mixed into the insulator 524 , the metal oxide 531 and the insulator 550 .

It is preferable to provide conductors 545 (conductors 545a and 545b) that are electrically connected to the transistor 500 and serve as plugs. In addition, an insulator 541 (insulator 541a and insulator 541b) in contact with the side surface of the conductor 545 used as a plug is also included. That is, the insulator 541 is formed in contact with the inner walls of the openings of the insulators 554 , 580 , 574 and 581 . Furthermore, the first conductor of the conductor 545 may be provided in contact with the side surface of the insulator 541 and the second conductor of the conductor 545 may be provided inside the first conductor of the conductor 545 . Here, the height of the top surface of the conductor 545 and the height of the top surface of the insulator 581 may be substantially the same. In addition, although the transistor 500 has a structure in which the first conductor of the conductor 545 and the second conductor of the conductor 545 are laminated, the present invention is not limited thereto. For example, the conductor 545 may have a single-layer structure or a stacked structure of three or more layers. When a structure has a laminated structure, an ordinal number may be given in order of formation to distinguish them.

In the transistor 500, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) used as an oxide semiconductor for the metal oxide 531 (metal oxide 531a, metal oxide 531b and metal oxide 531) including the channel formation region. Object 531c). For example, as the metal oxide that forms the channel formation region of the metal oxide 531, it is preferable to use a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more.

The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, indium (In) and zinc (Zn) are preferably contained. Furthermore, the element M is preferably contained in addition to this. Element M can be aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg) and cobalt (Co) More than one kind. In particular, the element M is preferably one or more types of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). In addition, the element M more preferably contains one or both of Ga and Sn.

In addition, as shown in FIG. 79B , the thickness of a region of the metal oxide 531 b that does not overlap with the conductor 542 may be thinner than the thickness of a region that overlaps with the conductor 542 . This thin region is formed by removing a part of the top surface of the metal oxide 531b when forming the conductor 542a and the conductor 542b. Here, when a conductive film serving as the conductor 542 is deposited on the top surface of the metal oxide 531b, a low-resistance region may be formed near the interface with the conductive film. In this way, by removing the low-resistance region between the conductor 542a and the conductor 542b on the top surface of the metal oxide 531b, the formation of a channel in this region can be suppressed.

By including a small-sized transistor in one aspect of the present invention, a display device with high definition can be provided. In addition, by including a transistor with a large on-state current, a display device with high brightness can be provided. Furthermore, by including a fast operating speed transistor, it is possible to provide a fast operating speed display device. Furthermore, by including a transistor with stable electrical characteristics, a highly reliable display device can be provided. In addition, by including a transistor with a small off-state current, a display device with low power consumption can be provided.

The detailed structure of the transistor 500 that can be used in the display device according to one embodiment of the present invention will be described.

The conductor 505 is arranged to include a region overlapping the metal oxide 531 and the conductor 560 . Furthermore, the conductor 505 is preferably provided embedded in the insulator 516 .

The conductor 505 includes a conductor 505a, a conductor 505b, and a conductor 505c. The conductor 505a is in contact with the bottom surface and side walls of the opening provided in the insulator 516. The conductor 505b is provided so as to be embedded in the recess formed in the conductor 505a. Here, the top surface of the conductor 505b is lower than the top surface of the conductor 505a and the top surface of the insulator 516. The conductor 505c is in contact with the top surface of the conductor 505b and the side surface of the conductor 505a. Here, the height of the top surface of the conductor 505c is substantially consistent with the height of the top surface of the conductor 505a and the height of the top surface of the insulator 516. In other words, the conductor 505b is surrounded by the conductor 505a and the conductor 505c.

As the conductor 505a and the conductor 505c, it is preferable to use a conductor having the ability to suppress the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N ₂ O, NO, NO _2, etc.) or copper atoms. Functional conductive materials. Alternatively, it is preferable to use a conductive material having a function of suppressing diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

By using a conductive material having a function of suppressing the diffusion of hydrogen as the conductor 505a and the conductor 505c, impurities such as hydrogen contained in the conductor 505b can be suppressed from diffusing to the metal oxide 531 through the insulator 524 and the like. In addition, by using a conductive material that has a function of suppressing the diffusion of oxygen as the conductor 505a and the conductor 505c, it is possible to prevent the conductor 505b from being oxidized and causing a decrease in conductivity. As the conductive material having a function of suppressing oxygen diffusion, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium or ruthenium oxide is preferably used. Therefore, the conductor 505a may be a single layer or a stack of the above-mentioned conductive materials. For example, titanium nitride may be used as the conductor 505a.

In addition, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum as the conductor 505b. For example, tungsten can be used as the conductor 505b.

Here, the conductor 560 is sometimes used as a first gate (also called a top gate) electrode. In addition, the conductor 505 is sometimes used as a second gate (also called a bottom gate) electrode. In this case, V _th of the transistor 500 can be controlled by changing the potential supplied to the conductor 505 independently of the potential supplied to the conductor 560 . In particular, by supplying the conductor 505 with a negative potential, the _Vth of the transistor 500 can be made greater than 0V and the off-state current can be reduced. Therefore, when the negative potential is supplied to the conductor 505 , the drain current when the potential supplied to the conductor 560 is 0 V can be reduced compared to when the negative potential is not supplied to the conductor 505 .

The conductor 505 is preferably larger than the channel formation area in the metal oxide 531 . In particular, as shown in FIG. 79C , the conductor 505 preferably extends to a region outside the end portion intersecting the metal oxide 531 in the channel width direction. That is, it is preferable that the conductor 505 and the conductor 560 overlap with each other via an insulator outside the side surface of the metal oxide 531 in the channel width direction.

By having the above-described structure, a region can be electrically formed around the channel of the metal oxide 531 by the electric field of the conductor 560 used as the first gate electrode and the electric field of the conductor 505 used as the second gate electrode.

As shown in FIG. 79C , the conductor 505 is extended to serve as a wiring. However, the present invention is not limited to this, and a conductor used as a wiring may be provided under the conductor 505 .

The insulator 514 is preferably used as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 500 from the substrate side. Therefore, it is preferable to use an insulator 514 that has the _function (not _easily Insulating material that allows the above-mentioned impurities to pass through). Alternatively, it is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (making it difficult for the oxygen to permeate).

For example, it is preferable to use aluminum oxide, silicon nitride, or the like as the insulator 514 . This can suppress impurities such as water or hydrogen from diffusing from the side closer to the substrate than the insulator 514 to the transistor 500 side. Alternatively, oxygen contained in the insulator 524 and the like can be suppressed from diffusing to the side closer to the substrate than the insulator 514 .

The dielectric constants of the insulators 516 , 580 and 581 used as interlayer films are preferably lower than those of the insulator 514 . By using a material with a low dielectric constant as an interlayer film, parasitic capacitance generated between wirings can be reduced. For example, as the insulator 516, the insulator 580 and the insulator 581, silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon- and nitrogen-added silicon oxide are appropriately used. Silicon oxide or silicon oxide with pores, etc.

Insulator 522 and insulator 524 are used as gate insulators.

Here, in the insulator 524 in contact with the metal oxide 531, it is preferable to desorb oxygen by heating. In this specification, oxygen desorbed by heating may be called excess oxygen. For example, silicon oxide, silicon oxynitride, or the like may be used as the insulator 524 as appropriate. By providing an insulator containing oxygen in contact with the metal oxide 531 , oxygen vacancies in the metal oxide 531 can be reduced, so that the reliability of the transistor 500 can be improved.

Specifically, as the insulator 524, it is preferable to use an oxide material that desorbs part of the oxygen by heating. An oxide that desorbs oxygen by heating means that the desorbed amount of oxygen converted into oxygen atoms in TDS (Thermal Desorption Spectroscopy) analysis is 1.0×10 ¹⁸ atoms/cm ³ or more, preferably 1.0×10 ¹⁹ atoms/cm ³ or more, more preferably 2.0×10 ¹⁹ atoms/cm ³ or more, or an oxide film of 3.0×10 ²⁰ atoms/cm ³ or more. In addition, the surface temperature of the film when performing the above-mentioned TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

As shown in FIG. 79C , the thickness of a region of the insulator 524 that does not overlap the insulator 554 and the metal oxide 531 b may be thinner than that of other regions. In the insulator 524, a region that does not overlap the insulator 554 and does not overlap the metal oxide 531b preferably has a thickness sufficient to diffuse the above-mentioned oxygen.

Like the insulator 514 and the like, the insulator 522 is preferably used as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 500 from the substrate side. For example, the hydrogen permeability of the insulator 522 is preferably lower than that of the insulator 524 . By surrounding the insulator 524 , the metal oxide 531 , the insulator 550 , and the like with the insulator 522 , the insulator 554 , and the insulator 574 , impurities such as water and hydrogen can be suppressed from entering the transistor 500 from the outside.

Furthermore, the insulator 522 preferably has a function of inhibiting the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (making it difficult for the oxygen to permeate). For example, the oxygen permeability of the insulator 522 is preferably lower than that of the insulator 524 . By providing the insulator 522 with a function of suppressing the diffusion of oxygen and impurities, it is preferable to reduce the diffusion of oxygen contained in the metal oxide 531 to the substrate side. In addition, the conductor 505 can be suppressed from reacting with the oxygen contained in the insulator 524 and the metal oxide 531 .

The insulator 522 is preferably an insulator containing an oxide of one or both of aluminum and hafnium as insulating materials. As an insulator containing an oxide of one or both of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. When the insulator 522 is formed using such a material, the insulator 522 serves as a layer that suppresses oxygen from being released from the metal oxide 531 and impurities such as hydrogen from entering the metal oxide 531 from the peripheral portion of the transistor 500 .

Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator. Alternatively, the insulator may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be laminated on the above-mentioned insulator.

As the insulator 522, for example, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ) or (Ba, Sr) TiO ₃ may be used in a single layer or a stacked layer. (BST) and other so-called high-k material insulators. When transistors are miniaturized and highly integrated, problems such as leakage current may occur due to the thinning of gate insulators. By using a high-k material as the insulator used as the gate insulator, the gate potential of the transistor can be reduced while maintaining the physical thickness.

In addition, the insulator 522 and the insulator 524 may have a laminated structure of two or more layers. In this case, the structure is not limited to a laminated structure composed of the same material, but may also be a laminated structure composed of different materials. For example, the same insulator as the insulator 524 may be provided under the insulator 522 .

The metal oxide 531 includes a metal oxide 531a, a metal oxide 531b on the metal oxide 531a, and a metal oxide 531c on the metal oxide 531b. When the metal oxide 531a is provided under the metal oxide 531b, diffusion of impurities from the structure formed under the metal oxide 531a to the metal oxide 531b can be suppressed. When the metal oxide 531c is provided on the metal oxide 531b, diffusion of impurities from the structure formed above the metal oxide 531c to the metal oxide 531b can be suppressed.

In addition, the metal oxide 531 preferably has a stacked structure of oxide layers in which the atomic number ratios of metal atoms are different from each other. For example, when the metal oxide 531 contains at least indium (In) and the element M, the atomic number ratio of the element M to other elements among the constituent elements of the metal oxide 531a is preferably greater than that of the constituent elements of the metal oxide 531b. The ratio of the number of atoms of element M to other elements. In addition, the atomic number ratio of the element M to In in the metal oxide 531a is preferably greater than the atomic number ratio of the element M to In in the metal oxide 531b. Here, as the metal oxide 531c, a metal oxide that can be used for the metal oxide 531a or the metal oxide 531b can be used.

It is preferable that the energy of the conduction band bottom of the metal oxide 531a and the metal oxide 531c be higher than the energy of the conduction band bottom of the metal oxide 531b. In other words, the electron affinity of the metal oxide 531a and the metal oxide 531c is preferably smaller than the electron affinity of the metal oxide 531b. In this case, the metal oxide 531c preferably uses a metal oxide that can be used for the metal oxide 531a. Specifically, the atomic number ratio between element M and other elements among the constituent elements of the metal oxide 531c is preferably greater than the atomic number ratio between the element M and other elements among the constituent elements of the metal oxide 531b. In addition, the atomic number ratio of the element M to In in the metal oxide 531c is preferably greater than the atomic number ratio of the element M to In in the metal oxide 531b.

Here, in the junction of the metal oxide 531a, the metal oxide 531b, and the metal oxide 531c, the energy level of the conduction band bottom changes gently. In other words, the above situation can also be expressed as the energy level of the conduction band bottom of the joint portion of the metal oxide 531a, the metal oxide 531b, and the metal oxide 531c continuously changes or joins continuously. For this purpose, it is preferable to reduce the defect state density of the mixed layer formed at the interface between the metal oxide 531a and the metal oxide 531b and the interface between the metal oxide 531b and the metal oxide 531c.

Specifically, by making the metal oxide 531a and the metal oxide 531b and the metal oxide 531b and the metal oxide 531c contain a common element (as a main component) in addition to oxygen, a mixed layer with a low defect state density can be formed. For example, when the metal oxide 531b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc. can be used as the metal oxide 531a and the metal oxide 531c. In addition, the metal oxide 531c may have a stacked structure. For example, a stacked structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide may be used, or a stacked structure of In-Ga-Zn oxide and the In-Ga-Zn oxide may be used. Gallium oxide on oxide stack structure. In other words, as the metal oxide 531c, a stacked structure of an In-Ga-Zn oxide and an oxide not containing In may be used.

Specifically, it is sufficient to use a metal oxide having In:Ga:Zn=1:3:4 [atomic number ratio] or 1:1:0.5 [atomic number ratio] as the metal oxide 531a. In addition, as the metal oxide 531b, a metal oxide having In:Ga:Zn=4:2:3 [atomic number ratio] or 3:1:2 [atomic number ratio] may be used. In addition, as the metal oxide 531c, In: Ga: Zn = 1: 3: 4 [atomic number ratio], In: Ga: Zn = 4: 2: 3 [ atomic number ratio], Ga: Zn = 2: A metal oxide with a ratio of 1 [atomic number] or Ga:Zn=2:5 [atomic number ratio] is sufficient. In addition, as a specific example when the metal oxide 531c has a laminated structure, In: Ga: Zn = 4: 2: 3 [atom number ratio] and Ga: Zn = 2: 1 [atom number ratio]. Ratio], a stacked structure of In: Ga: Zn = 4: 2: 3 [atom number ratio] and Ga: Zn = 2: 5 [atom number ratio] or In: Ga: Zn = 4 :2:3 [atomic number ratio] and gallium oxide stacked structure, etc.

At this time, the main path of carriers is the metal oxide 531b. By having the metal oxide 531a and the metal oxide 531c have the above-mentioned structure, the defect state density at the interface between the metal oxide 531a and the metal oxide 531b and the interface between the metal oxide 531b and the metal oxide 531c can be reduced. Therefore, the impact of interface scattering on carrier conduction is reduced, so that the transistor 500 can obtain large on-state current and high-frequency characteristics. In addition, when the metal oxide 531c has a laminated structure, it is expected to exert an effect of reducing the density of defect states at the interface between the metal oxide 531b and the metal oxide 531c and suppress diffusion of constituent elements contained in the metal oxide 531c into the insulator 550 one side. More specifically, the metal oxide 531c has a stacked structure and does not contain In oxide at a position above the stacked structure. Therefore, In can be suppressed from diffusing on the insulator 550 side. The insulator 550 is used as a gate insulator, thus causing poor characteristics of the transistor when In is diffused. Therefore, by providing the metal oxide 531c with a laminated structure, a highly reliable display device can be provided.

Conductors 542 (conductors 542a and conductors 542b) used as source electrodes and drain electrodes are provided on the metal oxide 531b. The conductor 542 is preferably selected from the group consisting of aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, and iridium. , metal elements in strontium and lanthanum, alloys containing the above metal elements as components or alloys combining the above metal elements, etc. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium or oxides containing lanthanum and nickel are preferably used. Oxides etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium or oxides containing lanthanum and nickel are not Conductive materials that are easily oxidized or materials that maintain conductivity even after absorbing oxygen are preferred.

By forming the conductor 542 in contact with the metal oxide 531 , the oxygen concentration in the vicinity of the conductor 542 in the metal oxide 531 may be reduced. In addition, a metal compound layer including the metal contained in the conductor 542 and components of the metal oxide 531 may be formed near the conductor 542 in the metal oxide 531. In this case, the carrier concentration in the region near the conductor 542 of the metal oxide 531 increases, and the resistance of this region decreases.

Here, the area between the conductor 542a and the conductor 542b is formed so as to overlap with the opening of the insulator 580. Therefore, the conductor 560 can be arranged in a self-aligned manner between the conductor 542a and the conductor 542b.

Insulator 550 is used as a gate insulator. The insulator 550 is preferably disposed in contact with the top surface of the metal oxide 531c. The insulator 550 may use silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon-nitrogen-added silicon oxide, or silicon oxide having pores. In particular, silicon oxide and silicon oxynitride are preferred because of their thermal stability.

Like the insulator 524 , it is preferable to reduce the concentration of impurities such as water and hydrogen in the insulator 550 . The thickness of the insulator 550 is preferably 1 nm or more and 20 nm or less.

A metal oxide may be provided between the insulator 550 and the conductor 560 . The metal oxide preferably inhibits diffusion of oxygen from insulator 550 to conductor 560 . This can suppress oxidation of the conductor 560 due to oxygen in the insulator 550 .

This metal oxide is sometimes used as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, or the like is used for the insulator 550 , it is preferable to use a metal oxide that is a high-k material with a high relative dielectric constant as the metal oxide. By providing the gate insulator with a laminated structure of the insulator 550 and the metal oxide, a laminated structure having thermal stability and a high relative dielectric constant can be formed. Therefore, the gate potential applied during operation of the transistor can be reduced while maintaining the physical thickness of the gate insulator. In addition, the equivalent oxide thickness (EOT) of an insulator used as a gate insulator can be reduced.

Specifically, a metal oxide containing one or two or more types selected from the group consisting of hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like can be used. In particular, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. which are insulators containing oxides of one or both of aluminum and hafnium.

Although the conductor 560 has a two-layer structure in FIG. 79, it may have a single-layer structure or a stacked structure of three or more layers.

As the conductor 560a, it is preferable to use the conductor described above that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N ₂ O, NO, NO _2, etc.) or copper atoms. . Furthermore, it is preferable to use a conductive material having a function of suppressing diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

When the conductor 560a has the function of suppressing the diffusion of oxygen, it can be suppressed that the oxygen contained in the insulator 550 oxidizes the conductor 560b and causes a decrease in conductivity. As the conductive material having the function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium or ruthenium oxide is preferably used.

As the conductor 560b, it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component. In addition, since the conductor 560 is also used as a wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper or aluminum can be used. In addition, the conductor 560b may have a laminated structure. For example, it may have a laminated structure of titanium or titanium nitride and the above-mentioned conductive materials.

As shown in FIGS. 79A and 79C , in the region of the metal oxide 531 b that does not overlap the conductor 542 , that is, in the channel formation region of the metal oxide 531 , the side surfaces of the metal oxide 531 are covered with the conductor 560 . Thereby, the electric field of the conductor 560 used as the first gate electrode can be easily affected on the side surface of the metal oxide 531 . As a result, the on-state current and frequency characteristics of the transistor 500 can be improved.

Like the insulator 514 and the like, the insulator 554 is preferably used as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 500 from the insulator 580 side. For example, the hydrogen permeability of insulator 554 is preferably lower than that of insulator 524 . Furthermore, as shown in FIGS. 79B and 79C , the insulator 554 is preferably in contact with the side surfaces of the metal oxide 531c, the top surface and side surfaces of the conductor 542a, the top surface and side surfaces of the conductor 542b, the metal oxide 531a, and the metal oxide 531b. and the top surface of insulator 524 are in contact. By adopting this structure, hydrogen contained in the insulator 580 can be prevented from entering the metal oxide 531 from the top or side surfaces of the conductors 542a, 542b, metal oxides 531a, 531b, and the insulator 524.

In addition, the insulator 554 also has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (making it difficult for the oxygen to permeate). For example, insulator 554 preferably has lower oxygen permeability than insulator 580 or insulator 524 .

Insulator 554 is preferably deposited by sputtering. By depositing insulator 554 using sputtering in an atmosphere containing oxygen, oxygen can be added to the vicinity of the area of insulator 524 that is in contact with insulator 554 . Thereby, oxygen can be supplied from this area through the insulator 524 into the metal oxide 531 . Here, by providing the insulator 554 with a function of suppressing diffusion of oxygen upward, it is possible to prevent oxygen from diffusing from the metal oxide 531 to the insulator 580 . In addition, by providing the insulator 522 with a function of suppressing the diffusion of oxygen downward, it is possible to prevent oxygen from diffusing from the metal oxide 531 to the substrate side. In this way, oxygen is supplied to the channel formation region in the metal oxide 531 . Thereby, the oxygen vacancies in the metal oxide 531 can be reduced and the normally-on state of the transistor can be suppressed.

As the insulator 554, for example, an insulator containing an oxide of one or both of aluminum and hafnium may be deposited. Note that as an insulator containing an oxide of one or both of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like.

Insulator 580 is separated from insulator 524 , metal oxide 531 and insulator 550 by insulator 554 covering insulator 524 , insulator 550 and metal oxide 531 with insulator 554 having a barrier to hydrogen. This can prevent impurities such as hydrogen from entering from outside the transistor 500 . Therefore, good electrical characteristics and reliability can be provided to the transistor 500 .

The insulator 580 is preferably provided on the insulator 524, the metal oxide 531, and the conductor 542 with the insulator 554 interposed therebetween. For example, the insulator 580 preferably includes silicon oxide, silicon oxynitride, silicon oxynitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon-nitrogen-added silicon oxide, or silicon oxide having pores. . In particular, silicon oxide and silicon oxynitride are preferred because of their thermal stability. In particular, materials such as silicon oxide, silicon oxynitride, or silicon oxide having pores are preferred because a region containing oxygen desorbed by heating is easily formed.

It is preferable that the concentration of impurities such as water and hydrogen in the insulator 580 is reduced. Additionally, the top surface of insulator 580 may also be planarized.

The insulator 574 is preferably used as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the insulator 580 from above, like the insulator 514 and the like. As the insulator 574, for example, an insulator that can be used for the insulator 514, the insulator 554, etc. can be used.

It is preferable to provide an insulator 581 serving as an interlayer film on the insulator 574 . Like the insulator 524 and the like, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 581 be reduced.

The conductor 545a and the conductor 545b are arranged in the openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 554. In addition, the conductor 545a and the conductor 545b are provided with the conductor 560 sandwiched therebetween. In addition, the heights of the top surfaces of the conductors 545a and 545b and the top surface of the insulator 581 may be located on the same plane.

In addition, the insulator 541a is provided in contact with the inner wall of the opening of the insulator 581, 574, 580 and the insulator 554, and the first conductor 545a of the conductor 545a is formed in contact with the side surface of the insulator 541a. The conductor 542a is located in at least a portion of the bottom of the opening and is in contact with the conductor 545a. Similarly, the insulator 541b is provided in contact with the inner wall of the opening of the insulator 581, 574, 580 and the insulator 554, and the first conductor 545b is formed in contact with the side surface of the insulator 541b. The conductor 542b is located in at least a portion of the bottom of the opening and is in contact with the conductor 545b.

It is preferable to use a conductive material containing tungsten, copper or aluminum as a main component for the conductor 545a and the conductor 545b. In addition, the conductor 545a and the conductor 545b may have a laminated structure.

When a laminated structure is adopted as the conductor 545, it is preferable to use the above-mentioned conductor having the ability to inhibit water or hydrogen as the conductor in contact with the metal oxide 531a, the metal oxide 531b, the conductor 542, the insulator 554, the insulator 580, the insulator 574 and the insulator 581. A conductor with the function of diffusion of impurities. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, etc. are preferably used. A conductive material having a function of suppressing the diffusion of impurities such as water or hydrogen can be used in a single layer or a stacked layer. By using this conductive material, oxygen added to the insulator 580 can be prevented from being absorbed by the conductor 545a and the conductor 545b. In addition, impurities such as water and hydrogen can be prevented from entering the metal oxide 531 from the layer above the insulator 581 through the conductor 545a and the conductor 545b.

As the insulator 541a and the insulator 541b, for example, an insulator that can be used for the insulator 554 and the like may be used. Since the insulator 541a and the insulator 541b are provided in contact with the insulator 554, impurities such as water and hydrogen can be suppressed from being mixed into the metal oxide 531 from the insulator 580 and the like through the conductor 545a and the conductor 545b. In addition, the insulator 541a and the insulator 541b can prevent oxygen contained in the insulator 580 from being absorbed by the conductor 545a and the conductor 545b.

Although not shown in the figure, the conductor used as a wiring may be arranged so as to be in contact with the top surfaces of the conductor 545a and the conductor 545b. It is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component as a conductor used for wiring. Furthermore, the conductor may have a laminated structure. For example, it may have a laminated structure of titanium or titanium nitride and the above-mentioned conductive material. The electrical conductor may also be formed to be embedded in the opening of the insulator.

<Materials constituting transistors>

The following describes the constituent materials that can be used for transistors.

[Substrate]

As a substrate on which the transistor 500 is formed, an insulating substrate, a semiconductor substrate, or a conductive substrate can be used, for example. Examples of the insulating substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (for example, a yttria-stabilized zirconia substrate, etc.), a resin substrate, and the like. Examples of the semiconductor substrate include a semiconductor substrate made of silicon, germanium, or the like, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, or the like. wait. Furthermore, there may also be mentioned a semiconductor substrate having an insulator region inside the semiconductor substrate, such as an SOI (Silicon On Insulator) substrate. Examples of the conductive substrate include a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate, and the like. Examples of the substrate include a substrate containing metal nitride, a substrate containing metal oxide, and the like. Furthermore, an insulator substrate provided with a conductor or a semiconductor, a semiconductor substrate provided with a conductor or an insulator, or a conductor substrate provided with a semiconductor or an insulator, etc. are also included. In addition, substrates in which elements are provided on these substrates can also be used. Examples of elements provided on the substrate include capacitive elements, resistive elements, switching elements, light-emitting elements, memory elements, and the like.

[insulator]

Examples of insulators include insulating oxides, nitrides, oxynitrides, oxynitrides, metal oxides, metal oxynitrides, or metal oxynitrides.

For example, when transistors are miniaturized and highly integrated, problems such as leakage current may occur due to thinning of gate insulators. By using high-k materials as insulators used as gate insulators, it is possible to achieve lower voltages during transistor operation while maintaining physical thickness. On the other hand, by using a material with a low relative dielectric constant for an insulator used as an interlayer film, parasitic capacitance generated between wirings can be reduced. Therefore, it is preferable to select the material of the insulator according to the function.

Examples of insulators with high relative dielectric constants include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxides containing silicon and Hafnium oxynitride or nitride containing silicon and hafnium, etc.

Examples of insulators with a low relative dielectric constant include silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, and carbon and nitrogen-added oxide. Silicon, silica with pores or resin, etc.

By surrounding a transistor using an oxide semiconductor with an insulator (insulator 514, insulator 522, insulator 554, insulator 574, etc.) that has the function of suppressing the transmission of impurities such as hydrogen and oxygen, the electrical characteristics of the transistor can be stabilized. As the insulator having the function of suppressing the transmission of impurities such as hydrogen and oxygen, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, etc. can be used in a single layer or a stacked layer. Insulators of germanium, yttrium, zirconium, lanthanum, neodymium, hafnium or tantalum. Specifically, as the insulator having the function of suppressing the transmission of impurities such as hydrogen and oxygen, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or oxide Metal oxides such as tantalum, metal nitrides such as aluminum nitride, titanium aluminum nitride, titanium nitride, silicon oxynitride or silicon nitride.

The insulator used as the gate insulator is preferably an insulator having a region containing oxygen desorbed by heating. For example, by employing a structure in which silicon oxide or silicon oxynitride having a region containing oxygen desorbed by heating is in contact with the metal oxide 531 , oxygen vacancies contained in the metal oxide 531 can be filled.

[Conductor]

As the conductor, it is preferable to use one selected from the group consisting of aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, Metal elements such as strontium and lanthanum, alloys containing the above metal elements as components, or alloys combining the above metal elements, etc. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium or oxides containing lanthanum and nickel are preferably used. Oxides etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium or oxides containing lanthanum and nickel are not Conductive materials that are easily oxidized or materials that maintain conductivity even after absorbing oxygen are preferred. In addition, a highly conductive semiconductor such as polycrystalline silicon containing impurity elements such as phosphorus or a silicide such as nickel silicide may also be used.

A plurality of conductors made of the above-mentioned materials may be laminated. For example, a laminated structure in which a material containing the above-mentioned metal element and a conductive material containing oxygen are combined may be adopted. In addition, a laminated structure in which a material containing the above-mentioned metal element and a conductive material containing nitrogen are combined may be adopted. In addition, a laminated structure in which a material containing the above-mentioned metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined may be adopted.

Furthermore, when a metal oxide is used for a channel formation region of a transistor, it is preferable that a conductor used as a gate electrode adopt a laminated structure in which a material containing the above-mentioned metal element and a conductive material containing oxygen are combined. In this case, it is preferable to provide the conductive material containing oxygen on the channel formation region side. By arranging the conductive material containing oxygen on the channel formation region side, oxygen detached from the conductive material is easily supplied to the channel formation region.

In particular, as a conductor used as a gate electrode, it is preferable to use a conductive material containing a metal element contained in a metal oxide forming a channel and oxygen. In addition, a conductive material containing the above-mentioned metal elements and nitrogen may also be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride can also be used. In addition, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide or added Indium tin oxide of silicon. In addition, nitrogen-containing indium gallium zinc oxide may also be used. By using the above materials, hydrogen contained in the metal oxide forming the channel can sometimes be trapped. In addition, hydrogen entering from an external insulator or the like may be trapped.

At least part of this embodiment can be implemented in appropriate combination with other embodiments described in this specification.

The structure shown in this embodiment mode can be combined appropriately with the structure shown in other embodiment modes and examples and implemented.

(Embodiment 12)

In this embodiment mode, a metal oxide (hereinafter referred to as an oxide semiconductor) usable for the OS transistor described in the above embodiment mode will be described.

<Classification of crystal structures>

First, the classification of crystal structures in oxide semiconductors will be described with reference to FIG. 80A. 80A is a diagram illustrating the classification of crystal structures of oxide semiconductors, typically IGZO (metal oxide containing In, Ga, and Zn).

As shown in FIG. 80A , oxide semiconductors are roughly classified into "Amorphous (amorphous)", "Crystalline (crystalline)" and "Crystal (crystalline)". Also, in "Amorphous" includes completely amorphous. In addition, "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite) (excluding single crystal and poly crystal). In addition, single crystal (single crystal), poly crystal (polycrystalline) and completely amorphous are not included in the "Crystalline" classification. In addition, the "Crystal" category includes single crystal and polycrystal.

In addition, the structure in the portion with a thickened outer frame shown in Figure 80A is an intermediate state between "Amorphous (amorphous)" and "Crystal (crystalline)" and belongs to the new boundary region (New crystalline). phase) structure. In other words, this structure can be said to be a completely different structure from "Crystal" or "Amorphous" which is energetically unstable.

In addition, X-ray diffraction (XRD: X-Ray Diffraction) spectroscopy can be used to evaluate the crystal structure of the film or substrate. FIG. 80B shows the XRD spectrum measured by GIXD (Grazing-Incidence XRD) of the CAAC-IGZO film classified as "Crystalline". In addition, the GIXD method is also called the thin film method or the Seemann-Bohlin method. Next, the XRD spectrum obtained by GLCD measurement shown in FIG. 80B is simply referred to as an XRD spectrum. In addition, the composition of the CAAC-IGZO film shown in FIG. 80B is around In:Ga:Zn=4:2:3 [atomic number ratio]. In addition, the thickness of the CAAC-IGZO film shown in FIG. 80B is 500 nm.

As shown in FIG. 80B , a peak indicating clear crystallinity was detected in the XRD spectrum of the CAAC-IGZO film. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation was detected near 2θ=31°. In addition, as shown in FIG. 80B , the peak near 2θ=31° is asymmetrical around the axis at which the peak intensity (Intensity) is detected.

The crystal structure of the film or substrate can be evaluated using a diffraction pattern (also called a nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). Figure 80C shows the diffraction pattern of the CAAC-IGZO film. Figure 80C is a diffraction pattern observed by NBED in which the electron beam is incident in a direction parallel to the substrate. In addition, the composition of the CAAC-IGZO film shown in FIG. 80C is around In:Ga:Zn=4:2:3 [atomic number ratio]. Furthermore, in the nanobeam electron diffraction method, electron diffraction with a beam diameter of 1 nm was performed.

As shown in FIG. 80C , a plurality of spots indicating the c-axis orientation were observed in the diffraction pattern of the CAAC-IGZO film.

[Structure of Oxide Semiconductor]

In addition, when focusing on the crystal structure of the oxide semiconductor, the classification of the oxide semiconductor may be different from that in FIG. 80A . For example, oxide semiconductors can be classified into single crystal oxide semiconductors and other than single crystal oxide semiconductors. Examples of non-single crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. In addition, non-single crystal oxide semiconductors include polycrystalline oxide semiconductors, a-like OS (amorphous-like oxide semiconductor), amorphous oxide semiconductors, and the like.

Here, the details of the above-mentioned CAAC-OS, nc-OS and a-like OS are explained.

[CAAC-OS]

CAAC-OS is an oxide semiconductor including a plurality of crystallized regions and the c-axes of the plurality of crystallized regions are oriented in a specific direction. In addition, the specific direction refers to the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. Furthermore, the crystalline region is a region having periodicity in the arrangement of atoms. Note that when considering the atomic arrangement as a lattice arrangement, the crystalline region is also an area in which the lattice arrangement is consistent. Furthermore, CAAC-OS has a region in which a plurality of crystal regions are connected in the a-b plane direction, and this region may have distortion. In addition, distortion refers to a portion in which the direction of the lattice arrangement changes between a region in which a plurality of crystallographic regions are connected and a region in which the lattice arrangement is consistent with another region in which the lattice arrangement is consistent. In other words, CAAC-OS refers to an oxide semiconductor with a c-axis orientation and no obvious orientation in the a-b plane direction.

In addition, each of the plurality of crystal regions is composed of one or more fine crystals (crystals with a maximum diameter less than 10 nm). When the crystalline region is composed of one microcrystal, the maximum diameter of the crystalline region is less than 10 nm. In addition, when the crystal region is composed of a plurality of fine crystals, the size of the crystal region may be on the order of several tens of nanometers.

In In-M-Zn oxide (element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS includes a layer containing stacked indium (In) and oxygen. (Hereinafter, In layer) and a layer containing elements M, zinc (Zn), and oxygen (Hereinafter, (M, Zn) layer) tend to have a layered crystal structure (also called a layered structure). Furthermore, indium and element M may be substituted for each other. Therefore, the (M, Zn) layer sometimes contains indium. Furthermore, sometimes the In layer contains element M. Note that sometimes the In layer contains Zn. This layered structure is observed as a lattice image in a high-resolution TEM (Transmission Electron Microscope) image, for example.

For example, when structural analysis was performed on the CAAC-OS film using an XRD apparatus, a peak indicating c-axis orientation was detected at or near 2θ = 31° in Out-of-plane XRD measurement using θ/2θ scanning. Note that the position (2θ value) of the peak indicating c-axis orientation may vary depending on the type, composition, etc. of the metal elements constituting CAAC-OS.

For example, multiple bright spots (spots) were observed in the electron diffraction pattern of the CAAC-OS film. In addition, when the spot of the incident electron beam transmitted through the sample (also called a direct spot) is the center of symmetry, a certain spot and other spots are observed at point-symmetric positions.

When a crystal region is viewed from the above-mentioned specific direction, the lattice arrangement in the crystal region is basically a hexagonal lattice. However, the unit lattice is not limited to a regular hexagon and may be a non-regular hexagon. In addition, the above-mentioned distortion may have a lattice arrangement such as a pentagon or a heptagon. In addition, in CAAC-OS, clear grain boundaries cannot be observed near distortion. That is, distortion of the lattice arrangement inhibits the formation of grain boundaries. This is considered because CAAC-OS can accommodate distortion due to the low density of oxygen atoms arranged in the a-b plane direction or the change in the bonding distance between atoms due to substitution of metal elements.

In addition, a crystal structure in which clear grain boundaries are confirmed is called a so-called polycrystal (polycrystal). The grain boundary becomes a recombination center and carriers are trapped, which may lead to, for example, a decrease in the on-state current of the transistor or a decrease in field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not confirmed, is one of the crystalline oxides that provides an excellent crystal structure to the semiconductor layer of the transistor. Note that CAAC-OS preferably has a structure containing Zn. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they can further suppress the occurrence of grain boundaries compared to In oxide.

CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries can be recognized. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is less likely to occur. In addition, the crystallinity of an oxide semiconductor may be reduced due to the mixing of impurities and the generation of defects. Therefore, it can be said that CAAC-OS is an oxide semiconductor with few impurities and defects (oxygen vacancies, etc.). Therefore, the physical properties of the oxide semiconductor including CAAC-OS are stable. Therefore, the oxide semiconductor including CAAC-OS has high heat resistance and high reliability. In addition, CAAC-OS is also stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, by using CAAC-OS in the OS transistor, the degree of freedom of the manufacturing process can be expanded.

[nc-OS]

In nc-OS, the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, especially a region of 1 nm or more and 3 nm or less) has periodicity. In other words, nc-OS has tiny crystals. Furthermore, for example, the size of the minute crystals is 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less. Therefore, these tiny crystals are also called nanocrystals. In addition, no regularity in crystallographic orientation is observed between different nanocrystals in nc-OS. Therefore, no orientation is observed in the entire film. Therefore, sometimes nc-OS is no different from a-like OS and amorphous oxide semiconductor in some analysis methods. For example, when the nc-OS film was structurally analyzed using an XRD device, no peak indicating crystallinity was detected in Out-of-plane XRD measurement using θ/2θ scanning. Furthermore, when the nc-OS film was subjected to electron diffraction (also called selected area electron diffraction) using an electron beam whose beam diameter is larger than that of the nanocrystal (for example, 50 nm or more), a diffraction pattern similar to a halo pattern was observed. On the other hand, when the nc-OS film is subjected to electron diffraction (also called nanobeam electron diffraction) using an electron beam whose beam diameter is close to or smaller than the size of the nanocrystal (for example, 1 nm or more and 30 nm or less), Sometimes an electron diffraction pattern is obtained in which multiple spots are observed in a ring-shaped area centered on a direct spot.

[a-like OS]

a-like OS is an oxide semiconductor with a structure between nc-OS and amorphous oxide semiconductor. A-like OS contains holes or low-density areas. In other words, the crystallinity of a-like OS is lower than that of nc-OS and CAAC-OS. In addition, the hydrogen concentration in the membrane of a-like OS is higher than that in the membranes of nc-OS and CAAC-OS.

[Constitution of Oxide Semiconductor]

Next, the details of the above-mentioned CAC-OS will be described. In addition, CAC-OS is related to material composition.

[CAC-OS]

CAC-OS, for example, refers to a structure in which elements contained in a metal oxide are unevenly distributed, and the size of the material containing the unevenly distributed elements is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or approximately size of. Note that in the following, a state in which one or more metal elements are unevenly distributed in a metal oxide and regions containing the metal elements are mixed is also called a mosaic-like or patch-like state, and the size of this region is 0.5 nm or more. And 10 nm or less, preferably 1 nm or more and 3 nm or less or a similar size.

In addition, CAC-OS refers to a structure in which the material is divided into a first region and a second region to form a mosaic shape, and the first region is distributed in the film (hereinafter also referred to as a cloud shape). That is, CAC-OS refers to a composite metal oxide having a composition in which the first region and the second region are mixed.

Here, each of the atomic number ratios of In, Ga, and Zn with respect to the metal elements constituting the CAC-OS of the In-Ga-Zn oxide is expressed as [In], [Ga], and [Zn]. For example, in CAC-OS of In-Ga-Zn oxide, the first region is a region in which [In] is larger than [In] in the composition of the CAC-OS film. Furthermore, the second region is a region whose [Ga] is larger than [Ga] in the composition of the CAC-OS film. Furthermore, for example, the first region is a region whose [In] is larger than [In] in the second region and whose [Ga] is smaller than [Ga] in the second region. Furthermore, the second region is a region whose [Ga] is larger than [Ga] in the first region and whose [In] is smaller than [In] in the first region.

Specifically, the first region is a region containing indium oxide, indium zinc oxide, or the like as a main component. In addition, the above-mentioned second region is a region containing gallium oxide, gallium zinc oxide, or the like as a main component. In other words, the above-mentioned first region can be called a region containing In as a main component. In addition, the above-mentioned second region can be called a region containing Ga as a main component.

Note that sometimes it is not possible to observe a clear boundary between the first region and the second region.

For example, in CAC-OS of In-Ga-Zn oxide, based on the EDX surface analysis (mapping) image obtained by energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy), it can be confirmed that the A region in which In is a main component (first region) and a region in which Ga is a main component (second region) are unevenly distributed and mixed.

When CAC-OS is used for a transistor, the CAC-OS can have a switching function (function to control on/off) through the complementary effects of conductivity due to the first region and insulation due to the second region. . In other words, one part of the CAC-OS material has a conductive function and another part has an insulating function, and the entire material has a semiconductor function. By separating the conductive function and the insulating function, each function can be maximized. Therefore, by using CAC-OS for transistors, large on-state current (I _on ), high field-effect mobility (μ), and good switching operation can be achieved.

Oxide semiconductors have various structures and various properties. The oxide semiconductor according to one aspect of the present invention may include two or more types of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-likeOS, CAC-OS, nc-OS, and CAAC-OS.

<Transistor with oxide semiconductor>

Next, a case in which the above-mentioned oxide semiconductor is used in a transistor will be described.

By using the above-mentioned oxide semiconductor for a transistor, a transistor with high field effect mobility can be realized. In addition, a highly reliable transistor can be realized.

In particular, as the semiconductor layer forming the channel, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also described as "IGZO"). Alternatively, as the semiconductor layer, an oxide (also described as "IAZO") containing indium (In), aluminum (Al), and zinc (Zn) may be used. Alternatively, as the semiconductor layer, an oxide (also described as "IAGZO") containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) may be used.

An oxide semiconductor with a low carrier concentration is preferably used for a transistor. For example, the carrier concentration of the oxide semiconductor may be 1×10 ¹⁷ cm ^-3 or less, preferably 1×10 ¹⁵ cm ^-3 or less, more preferably 1×10 ¹³ cm ^-3 or less, still more preferably 1×10 ¹¹ cm ^-3 or less, more preferably less than 1×10 ¹⁰ cm ^-3 and 1×10 ^-9 cm ^-3 or more. When the purpose is to reduce the carrier concentration in the oxide semiconductor, the impurity concentration in the oxide semiconductor can be reduced to reduce the defect state density. In this specification and the like, a state in which the impurity concentration is low and the density of defect states is low is called high-purity intrinsic or substantially high-purity intrinsic. In addition, an oxide semiconductor with a low carrier concentration is sometimes referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.

Because a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor has a lower density of defect states, it is possible to have a lower density of trap states.

It takes a long time for the charges trapped in the trap state of the oxide semiconductor to disappear, and sometimes they behave like fixed charges. Therefore, the electrical characteristics of a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap state density may become unstable.

Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration of the oxide semiconductor. In order to reduce the impurity concentration of the oxide semiconductor, it is preferable to also reduce the impurity concentration of the nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

<Impurities>

Here, the influence of each impurity in the oxide semiconductor will be described.

When the oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, a defect state is formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (the concentration measured by SIMS (Secondary Ion Mass Spectrometry)) are set It is 2×10 ¹⁸ atoms/cm ³ or less, preferably 2×10 ¹⁷ atoms/cm ³ or less.

When the oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect state may be formed to form a carrier. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to have normally-on characteristics. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor measured by SIMS is 1×10 ¹⁸ atoms/cm ³ or less, preferably 2×10 ¹⁶ atoms/cm ³ or less.

When the oxide semiconductor contains nitrogen, electrons as carriers are generated, thereby increasing the carrier concentration and easily becoming n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to have normally-on characteristics. Alternatively, when the oxide semiconductor contains nitrogen, a trap state may be formed. As a result, the electrical characteristics of the transistor may become unstable. Therefore, the nitrogen concentration in the oxide semiconductor measured by SIMS is set to less than 5×10 ¹⁹ atoms/cm ³ , preferably 5×10 ¹⁸ atoms/cm ³ or less, and more preferably 1×10 ¹⁸ atoms/cm 3 cm ³ or less, more preferably 5×10 ¹⁷ atoms/cm ³ or less.

Hydrogen contained in the oxide semiconductor reacts with oxygen bonded to the metal atom to generate water, so an oxygen vacancy may be formed. When hydrogen enters this oxygen vacancy, electrons as carriers are sometimes generated. In addition, electrons as carriers may be generated because part of the hydrogen is bonded to oxygen bonded to the metal atom. Therefore, transistors using oxide semiconductors containing hydrogen tend to have normally-on characteristics. Therefore, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration measured by SIMS is set to less than 1×10 ²⁰ atoms/cm ³ , preferably less than 1×10 ¹⁹ atoms/cm ³ , and more preferably less than 5× 10 ¹⁸ atoms/cm ³ , more preferably less than 1×10 ¹⁸ atoms/cm ³ .

By using an oxide semiconductor in which impurities are sufficiently reduced for the channel formation region of a transistor, it is possible to have stable electrical characteristics.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

(Embodiment 13)

In this embodiment, an electronic device to which a semiconductor device according to one embodiment of the present invention can be applied will be described.

The semiconductor device according to one aspect of the present invention can be used in a display unit of an electronic device. This makes it possible to realize an electronic device with high display quality. Alternatively, extremely high precision electronics can be achieved. Alternatively, highly reliable electronic devices can be realized.

Examples of electronic equipment such as semiconductor devices using one embodiment of the present invention include display devices such as televisions and monitors, lighting devices, desktop or notebook personal computers, word processors, and DVDs (Digital Versatile Discs) that reproduce and store data on DVDs. Image reproducing devices for still images or moving images from recording media such as general-purpose optical discs, portable CD players, radios, tape recorders, headphone stereos, stereos, desk clocks, wall clocks, cordless telephones, radio transceivers Machines, car phones, mobile phones, portable information terminals, tablet terminals, portable game consoles, pinball machines and other fixed game consoles, calculators, electronic notebooks, e-book reader terminals, electronic translators, voice input devices, cameras, Digital still cameras, electric scrapers, high-frequency heating devices such as microwave ovens, rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioning equipment such as air conditioners, humidifiers, dehumidifiers, etc., dishwashers, dish dryers, Clothes dryers, quilt dryers, refrigerators, electric freezers, electric freezers, DNA preservation freezers, flashlights, chain saws and other tools, smoke detectors or dialysis devices and other medical equipment, etc. Furthermore, industrial equipment such as guide lights, signals, conveyor belts, elevators, escalators, industrial robots, power storage systems, power storage devices for power equalization and smart grids, etc. can also be cited. In addition, mobile objects propelled by an engine using fuel or an electric motor using electric power from a storage device may also be included in the category of electronic equipment. Examples of the mobile body include electric vehicles (EV), hybrid vehicles (HV) having both an internal combustion engine and an electric motor, plug-in hybrid vehicles (PHV), and crawler vehicles using crawlers instead of wheels. Electrically assisted bicycles, bicycles with engines, motorcycles, electric wheelchairs, golf carts, small or large ships, submarines, helicopters, airplanes, rockets, satellites, space probes, planetary probes or spacecraft, etc.

An electronic device according to one aspect of the present invention may include a secondary battery (battery), and preferably the secondary battery can be charged by non-contact power transmission.

Examples of secondary batteries include lithium ion secondary batteries, nickel hydrogen batteries, nickel cadmium batteries, organic radical batteries, lead acid batteries, air secondary batteries, nickel zinc batteries, and silver zinc batteries.

An electronic device according to one aspect of the present invention may include an antenna. By receiving signals via the antenna, images, information, etc. can be displayed on the display unit. In addition, when the electronic device includes an antenna and a secondary battery, the antenna can be used for non-contact power transmission.

An electronic device according to one aspect of the present invention may also include a sensor (the sensor has the function of measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound , time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, smell or infrared, etc.).

An electronic device according to one aspect of the present invention may have various functions. For example, it may have the following functions: a function of displaying various information (still images, dynamic images, text images, etc.) on the display unit; a touch panel function; a function of displaying calendar, date, time, etc.; and executing various software ( program) function; the function of wireless communication; or the function of reading programs or data stored in storage media; etc.

Furthermore, an electronic device including a plurality of display units may have a function of mainly displaying image information on a part of the display unit and mainly displaying text information on other parts of the display unit, or may have a function of displaying an image taking parallax into consideration on the plurality of display units. Come up with the function of displaying three-dimensional images, etc. Furthermore, the electronic device having the image receiving unit may have the following functions: capture still images; capture dynamic images; automatically or manually correct the captured images; store the captured images in a recording medium (external or built-in in the electronic device) ); or display the captured image on the display; etc. In addition, the functions of the electronic device according to one aspect of the present invention are not limited to this, and may have various functions.

A semiconductor device according to one aspect of the present invention can display high-definition images. This makes it particularly suitable for use in portable electronic devices (wearable electronic devices), e-book readers, and the like. For example, it can be suitably used for xR devices such as VR devices and AR devices.

FIG. 81A is an external view of the camera 8000 with the viewfinder 8100 attached.

The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, a shutter button 8004, and the like. In addition, the camera 8000 is equipped with a detachable lens 8006. In the camera 8000, the lens 8006 and the frame may be integrated.

The camera 8000 can capture images by pressing the shutter button 8004 or touching the display portion 8002 serving as a touch panel.

The frame 8001 includes an inserter having electrodes, and can be connected to a flash device, etc. in addition to the viewfinder 8100 .

Viewfinder 8100 includes a frame 8101, a display unit 8102, buttons 8103, and the like.

The frame 8101 is attached to the camera 8000 via an inserter fitted to the camera 8000 . The viewfinder 8100 can display images and the like received from the camera 8000 on the display unit 8102 .

Button 8103 is used as a power button or the like.

The semiconductor device according to one embodiment of the present invention can be used in the display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 . In addition, the camera 8000 may have a built-in viewfinder 8100 .

FIG. 81B is an external view of the head-mounted display 8200.

The head mounted display 8200 includes a mounting part 8201, a lens 8202, a main body 8203, a display part 8204, a cable 8205, and the like. In addition, a battery 8206 is built into the mounting part 8201.

The cable 8205 has a function of supplying power from the battery 8206 to the main body 8203. The main body 8203 includes a wireless receiver and the like, and can display received image information and the like on the display unit 8204. Furthermore, since the main body 8203 has a camera, information on the movement of the user's eyeballs or eyelids can be used as an input method.

In addition, a plurality of electrodes may be provided at the position of the mounting part 8201 that is contacted by the user to detect the current flowing through the electrodes according to the movement of the user's eyeballs, thereby realizing the function of identifying the user's line of sight. In addition, it may also have a function of monitoring the user's pulse based on the current flowing through the electrode. The mounting part 8201 may have various sensors such as a temperature sensor, a pressure sensor, or an acceleration sensor, and may have a function of displaying the user's biological information on the display part 8204 or displaying it on the display in synchronization with the movement of the user's head. The function of image change on the part 8204, etc.

The semiconductor device according to one embodiment of the present invention can be used in the display unit 8204.

81C to 81E are appearance views of the head-mounted display 8300. The head mounted display 8300 includes a frame 8301, a display unit 8302, a belt-shaped fixing tool 8304, and a pair of lenses 8305.

The user can see the display on the display part 8302 through the lens 8305. It is preferable to arrange the display portion 8302 in a curved manner because the user can experience a high sense of reality. In addition, images displayed on different areas of the display unit 8302 can be viewed through the lens 8305, so that three-dimensional display using parallax, etc. can be performed. In addition, one aspect of the present invention is not limited to a structure in which one display unit 8302 is provided. Two display units 8302 may be provided so that one display unit is arranged for each pair of eyes of the user.

The semiconductor device according to one embodiment of the present invention can be used in the display unit 8302. The semiconductor device according to one aspect of the present invention can also achieve extremely high definition. For example, as shown in Figure 81E, even if the display is magnified using lens 8305, the pixels are not easily visible to the user. In other words, the display unit 8302 can be used to allow the user to view images with a higher sense of reality.

FIG. 81F is an appearance view of the goggle-type head-mounted display 8400. The head mounted display 8400 includes a pair of frames 8401, a mounting part 8402, and a buffer member 8403. A display unit 8404 and a lens 8405 are respectively provided in the pair of frames 8401. By causing the pair of display units 8404 to display mutually different images, three-dimensional display using parallax can be performed.

The user can see the display part 8404 through the lens 8405. The lens 8405 has a focus adjustment mechanism, which can adjust the position of the lens 8405 according to the user's vision. The display portion 8404 is preferably square or laterally elongated rectangular. Thus, the sense of realism can be improved.

The mounting part 8402 preferably has plasticity and elasticity so that it can be adjusted according to the user's face size without falling off. In addition, it is preferable that a part of the mounting portion 8402 has a vibration mechanism used as a bone conduction earphone. As a result, you can enjoy images and sounds just by installing them, without the need for audio equipment such as headphones or speakers. In addition, it may also have a function of outputting sound data into the housing 8401 through wireless communication.

The mounting part 8402 and the buffer member 8403 are parts that come into contact with the user's face (forehead, cheeks, etc.). By bringing the buffer member 8403 into close contact with the user's face, light leakage can be prevented, thereby further improving the immersion feeling. The cushioning member 8403 is preferably made of soft material so that it can be in close contact with the user's face when the user puts on the head-mounted display 8400 . For example, materials such as rubber, silicone rubber, polyurethane or sponge can be used. In addition, when a member covering the surface of a sponge or the like with cloth or leather (natural leather or synthetic leather) or the like is used as the cushioning member 8403, a gap is less likely to occur between the user's face and the cushioning member 8403, thereby appropriately preventing Light leakage. In addition, when using this material, it not only makes the user feel skin-friendly, but also prevents the user from feeling cold when installed in cold seasons, etc., so it is preferable. It is preferable that the members that come into contact with the user's skin, such as the buffer member 8403 or the mounting portion 8402, have a detachable structure because they can be easily cleaned and replaced.

FIG. 82A shows an example of a television device. In the television device 7100, a display unit 7000 is incorporated in a housing 7101. Here, a structure in which the frame 7101 is supported by the bracket 7103 is shown.

The semiconductor device according to one embodiment of the present invention can be applied to the display unit 7000 .

The operation of the television device 7100 shown in FIG. 82A can be performed by using an operation switch included in the housing 7101 or a separately provided remote control operating device 7111. Alternatively, the display unit 7000 may include a touch sensor, and the television device 7100 may be operated by touching the display unit 7000 with a finger or the like. Furthermore, the remote control unit 7111 may include a display unit that displays information output from the remote control unit 7111 . By using the operation keys or the touch panel included in the remote control unit 7111, the channel or volume can be operated. In addition, the image displayed on the display unit 7000 can be operated.

In addition, the television device 7100 includes a receiver, a modem, and the like. General television broadcasts can be received by using a receiver. Furthermore, by connecting to a wired or wireless communication network through a modem, one-way (from the sender to the receiver) or two-way (between the sender and the receiver, or between receivers, etc.) information communication is performed.

FIG. 82B shows an example of a notebook personal computer. The notebook personal computer 7200 includes a frame 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. The display unit 7000 is assembled in the housing 7211.

The semiconductor device according to one embodiment of the present invention can be applied to the display unit 7000 .

Figures 82C and 82D illustrate an example of digital signage.

Digital signage 7300 shown in FIG. 82C includes a frame 7301, a display unit 7000, a speaker 7303, and the like. In addition, it can also include LED lights, operation keys (including power switches or operation switches), connection terminals, various sensors or microphones, etc.

Figure 82D shows a digital signage 7400 installed on a cylindrical pillar 7401. Digital signage 7400 includes a display portion 7000 disposed along the curved surface of pillar 7401.

In FIGS. 82C and 82D , the semiconductor device according to one embodiment of the present invention can be applied to the display unit 7000 .

The larger the display unit 7000 is, the greater the amount of information that can be provided at one time. The larger the display unit 7000 is, the easier it is to attract attention, which can improve the effect of advertising, for example.

By using a touch panel for the display unit 7000, not only a still image or a moving image can be displayed on the display unit 7000, but also the user can perform operations intuitively, which is preferable. In addition, when used to provide information such as route information or traffic information, the usability can be improved through intuitive operations.

As shown in FIGS. 82C and 82D , the digital signage 7300 or the digital signage 7400 can preferably be linked to the information terminal device 7311 or the information terminal device 7411 such as a smartphone carried by the user through wireless communication. For example, the advertisement information displayed on the display part 7000 may be displayed on the screen of the information terminal device 7311 or the information terminal device 7411. In addition, by operating the information terminal device 7311 or the information terminal device 7411, the display of the display unit 7000 can be switched.

In addition, the game can be executed on the digital signage 7300 or the digital signage 7400 using the screen of the information terminal device 7311 or the information terminal device 7411 as an operating unit (controller). As a result, multiple unspecified users can participate in the game at the same time and enjoy the fun of the game.

The information terminal 7550 shown in FIG. 82E includes a housing 7551, a display unit 7552, a microphone 7557, a speaker unit 7554, a camera 7553, an operation switch 7555, and the like. The semiconductor device according to one embodiment of the present invention can be used in the display unit 7552 . The display part 7552 can be used as a touch panel. In addition, the information terminal 7550 may have an antenna, a battery, etc. inside the housing 7551. The information terminal 7550 may be used, for example, as a smartphone, a mobile phone, a tablet information terminal, a tablet computer, or an e-book reader terminal.

FIG. 82F shows an example of a watch-type information terminal. The information terminal 7660 includes a housing 7661, a display unit 7662, a watch strap 7663, a buckle 7664, an operation switch 7665, an input/output terminal 7666, and the like. In addition, the information terminal 7660 has an antenna, a battery, etc. inside the housing 7661. The information terminal 7660 can execute various applications such as mobile phone calls, emails, article reading and writing, music playback, network communication, or computer games.

In addition, the display unit 7662 includes a touch sensor and can be operated by touching the screen with a finger, a stylus pen, or the like. For example, the application can be started by touching the icon 7667 displayed on the display unit 7662. In addition to time setting, the operation switch 7665 may also have various functions such as a power switch, a wireless communication switch, setting or canceling the silent mode, or setting or canceling the power saving mode. For example, by using the operating system incorporated in the information terminal 7660, the function of the operation switch 7665 can also be set.

In addition, the portable information terminal 7660 can perform short-range wireless communication standardized by communication. For example, hands-free calls can be made by communicating with a headset that can communicate wirelessly. In addition, the information terminal 7660 may have an input/output terminal 7666 and transmit and receive data with other information terminals through the input/output terminal 7666. In addition, charging can also be performed through the input and output terminal 7666. In addition, charging can also be performed using wireless power supply instead of through the output and input terminals 7666.

FIG. 83A shows the appearance of car 9700. Figure 83B shows the driver's seat of automobile 9700. The car 9700 includes a body 9701, wheels 9702, an instrument panel 9703, lights 9704, etc. A display device according to one aspect of the present invention can be used in a display unit of a car 9700 or the like. For example, the display device according to one embodiment of the present invention can be used in each of the display portions 9710 to 9715 shown in FIG. 83B .

The display unit 9710 and the display unit 9711 are display devices provided on the windshield of the automobile. By using a light-transmissive conductive material to manufacture the electrodes in the display device, the display device according to one embodiment of the present invention can be a so-called see-through display device in which the opposite side can be viewed. The see-through display device does not obstruct the view even when driving the 9700. Therefore, the display device according to one embodiment of the present invention can be installed on the windshield of automobile 9700. When a display device is provided with a transistor for driving the display device, it is preferable to use a light-transmitting transistor such as an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor.

The display unit 9712 is a display device provided on the column. For example, by displaying an image captured by a camera unit installed on the vehicle body on the display unit 9712, the field of view blocked by the pillar can be compensated. The display unit 9713 is a display device provided on the instrument panel. For example, by displaying an image captured by a camera unit installed on the vehicle body on the display unit 9713, the field of view blocked by the instrument panel can be compensated. That is, by displaying the image captured by the camera unit installed on the outside of the car, blind spots can be compensated and safety can be improved. In addition, by displaying images that make up for invisible parts, safety can be confirmed more naturally and comfortably.

In addition, FIG. 84 shows a car interior using bench seats as the driver's seat and the passenger's seat. The display unit 9721 is a display device provided in the vehicle door. For example, by displaying an image captured by a camera unit installed on the vehicle body on the display unit 9721, the field of view blocked by the vehicle door can be compensated. In addition, the display unit 9722 is a display device provided on the steering wheel. The display unit 9723 is a display device provided in the center of the seat of the bench seat.

The display unit 9714, the display unit 9715, or the display unit 9722 can provide various information by displaying navigation information, driving speed, engine speed, driving distance, remaining fuel capacity, gear status, air conditioning settings, and the like. In addition, the user can appropriately change the display content and arrangement displayed on the display unit. In addition, the display portions 9710 to 9713, the display portion 9721, and the display portion 9723 may display the above information. The display portions 9710 to 9715 and the display portions 9721 to 9723 may also be used as lighting devices.

The structure shown in this embodiment mode can be used in appropriate combination with the structures shown in other embodiment modes and examples.

[Example 1]

In this embodiment, the evaluation results of the Id-Vd characteristics of a Si transistor estimated through simulation and an actually manufactured OS transistor will be described.

85A, 85B, and 85C are graphs showing evaluation results of Id-Vd characteristics. In each of FIGS. 85A, 85B, and 85C, the horizontal axis represents the absolute value of the voltage between the source and the drain (also referred to as "voltage Vd"), and the vertical axis represents the voltage flowing between the source and the drain. The absolute value of the current (also called "current Id"). In addition, FIG. 85A , FIG. 85B , and FIG. 85C each show a plurality of Id-Vd characteristics evaluated by changing the voltage between the source and the gate (also referred to as “voltage Vg”) every 0.025 V.

FIG. 85A shows calculation results of the Id-Vd characteristics of the Si transistor 801 estimated through simulation. The Si transistor 801 is a single-gate p-channel transistor with a channel length L of 1.5 μm and a channel width W of 1.4 μm. Note that SPICE is used as the simulation software.

The Id-Vd curve 811a shown in FIG. 85A shows the Id-Vd characteristic when the voltage Vg is 0.775V. The Id-Vd curve 811b shows the Id-Vd characteristic when the voltage Vg is 0.750V. The Id-Vd curve 811c represents the Id-Vd characteristic when the voltage Vg is 0.725V. In addition, FIG. 85A also shows the calculation results of a plurality of Id-Vd characteristics in which the voltage Vg is changed every 0.025V.

FIG. 85B shows the measurement results of the Id-Vd characteristics of the actually manufactured OS transistor 802. The OS transistor 802 is a single-gate n-channel transistor with a channel length L of 200 nm and a channel width W of 60 nm. OS transistor 802 includes a back gate electrically connected to a terminal serving as a source of OS transistor 802 .

The Id-Vd curve 821a shown in FIG. 85B represents the Id-Vd characteristic when the voltage Vg is 0.925V. The Id-Vd curve 821b represents the Id-Vd characteristic when the voltage Vg is 0.900V. The Id-Vd curve 821c represents the Id-Vd characteristic when the voltage Vg is 0.875V. In addition, FIG. 85B also shows a plurality of Id-Vd characteristics measured as the voltage Vg changes by 0.025V.

FIG. 85C shows the measurement results of the Id-Vd characteristics of the actually manufactured OS transistor 803. The OS transistor 803 is a multi-gate transistor in which six single-gate n-channel OS transistors with a channel length L of 200 nm and a channel width W of 60 nm are connected in series and the respective gates are electrically connected. Each of the six transistors included in the OS transistor 803 includes a back gate. Each back gate is electrically connected to a terminal serving as the source of the OS transistor 803 .

The Id-Vd curve 831a shown in FIG. 85C represents the Id-Vd characteristic when the voltage Vg is 2.125V. The Id-Vd curve 831b represents the Id-Vd characteristic when the voltage Vg is 2.100V. The Id-Vd curve 831c represents the Id-Vd characteristic when the voltage Vg is 2.075V. In addition, FIG. 85C also shows a plurality of Id-Vd characteristics measured as the voltage Vg changes by 0.025V.

It can be confirmed from FIGS. 85A and 85B that the OS transistor 802 has more noise components than the Si transistor 801, but both can control the current Id with the voltage Vg. On the other hand, among the two, the current Id is easily affected by changes in the voltage Vd, and good saturation characteristics are not obtained.

In addition, it can be confirmed from FIG. 85C that the OS transistor 803 of the multi-gate transistor has less change in the current Id with respect to the change in the voltage Vd than the Si transistor 801 and the OS transistor 802 . That is, the OS transistor 803 of the multi-gate transistor has higher saturation characteristics than the Si transistor 801 and the OS transistor 802 .

In addition, since the noise component of the OS transistor 803 is suppressed compared with the OS transistor 802, more precise control of the current Id by the voltage Vg can be achieved. For example, by using the OS transistor 803 as the transistor M2 shown in the above-described embodiment, more precise control of the light emission brightness of the light emitting element 61 can be achieved.

As the transistor M2, a single-gate transistor such as the Si transistor 801 or the OS transistor 802 can be used, but a multi-gate transistor such as the OS transistor 803 is preferably used. The number of transistors (number of transistors in series) included in the multi-gate transistor is preferably two or more, more preferably four or more, and still more preferably six or more.

[Example 2]

In this embodiment, the evaluation results of the dielectric breakdown voltage between the source and the drain of an OS transistor actually manufactured will be described.

FIG. 86 is a graph showing the evaluation results of the insulation breakdown voltage of the OS transistor 802 actually manufactured. As explained in the above embodiment, the OS transistor 802 is a single-gate n-channel transistor with a channel length L of 200 nm and a channel width W of 60 nm. OS transistor 802 includes a back gate electrically connected to a terminal serving as a source of OS transistor 802 .

The horizontal axis of FIG. 86 represents voltage Vd, and the vertical axis represents current Id. FIG. 86 shows changes in current Id when voltage Vg is 0V and voltage Vd is changed from 0V to 30V. That is, the change in the current Id with respect to the voltage Vd when the OS transistor 802 is in the off state is shown.

As shown in FIG. 86 , dielectric breakdown occurs in the OS transistor 802 when the voltage Vd is approximately 20V. In addition, even if the voltage Vd rises, the current Id rises to a small extent to cause dielectric breakdown. From this, it can be seen that even when the voltage Vd of the OS transistor increases, the increase in off-state current is small, and the OS transistor has a high insulation breakdown voltage between the source and the drain.

For example, it is preferable to use an OS transistor as one or both of the transistor M2 and the transistor M5 shown in the above-mentioned embodiment. By using the OS transistor, the operation of the semiconductor device is stable even if the potential difference between the potential Va and the potential Vc shown in the above-described embodiment is large, and therefore a highly reliable semiconductor device can be realized.

[Symbol Description]

10: Display device, 23: CPU, 24: GPU, 25: Storage circuit section, 29: Input and output terminal section, 40: Layer, 50: Layer, 51: Pixel circuit, 60: Layer, 61: Light emitting element, 100: Semiconductor device, 101: Wiring, 102: Wiring, 103: Wiring, 104: Wiring, 105: Wiring, 171: Conductive layer, 172: EL layer, 173: Conductive layer, 230: Pixel.

Claims (42)

1. A semiconductor device, comprising:

first and second transistors;

first to fifth switches;

first to third capacitors; and

the display element is arranged such that,

wherein the first transistor comprises a back gate,

the gate of the first transistor is electrically connected to the first switch,

the second switch and the first capacitor are included between the gate and source of the first transistor,

the back gate of the first transistor is electrically connected to the third switch,

the second capacitor is included between the back gate and source of the first transistor,

the source of the first transistor is electrically connected to the drain of the fourth switch and the second transistor,

the gate of the second transistor is electrically connected to the fifth switch,

the third capacitor is included between the gate and source of the second transistor,

And a source of the second transistor is electrically connected to one terminal of the display element.

2. The semiconductor device according to claim 1,

wherein the first switch has a function of selecting conduction or non-conduction between the first wiring and the gate of the first transistor,

the second switch has the function of selecting conduction or non-conduction between the gate and the source of the first transistor,

the third switch has a function of selecting conduction or non-conduction between the second wiring and the back gate of the first transistor,

the fourth switch has a function of selecting conduction or non-conduction between the third wiring and the source electrode of the first transistor,

and the fifth switch has a function of selecting conduction or non-conduction between the fourth wiring and the gate of the second transistor.

3. The semiconductor device according to claim 1 or 2,

wherein the first to fifth switches are transistors.

4. The semiconductor device according to any one of claim 1 to 3,

wherein the fourth switch and the fifth switch are p-channel transistors.

5. The semiconductor device according to any one of claim 1 to 4,

wherein the fourth switch and the fifth switch are transistors including silicon in a semiconductor layer forming a channel.

6. The semiconductor device according to any one of claim 1 to 5,

wherein the first transistor and the second transistor include an oxide semiconductor in a semiconductor layer forming a channel.

7. The semiconductor device according to claim 6,

wherein the oxide semiconductor contains at least one of indium and zinc.

8. The semiconductor device according to any one of claim 1 to 7,

wherein the display element is an organic EL element having a series structure.

9. A semiconductor device, comprising:

first and second transistors;

first to fifth switches;

first to third capacitors;

a first display element; and

the second display element is arranged to display a second image,

wherein the first transistor comprises a back gate,

the gate of the first transistor is electrically connected to the first switch,

the second switch and the first capacitor are included between the gate and source of the first transistor,

the back gate of the first transistor is electrically connected to the third switch,

the second capacitor is included between the back gate and source of the first transistor,

the source of the first transistor is electrically connected to the drain of the fourth switch and the second transistor,

The gate of the second transistor is electrically connected to the fifth switch,

the third capacitor is included between the gate and source of the second transistor,

and a source of the second transistor is electrically connected to one terminal of the first display element and one terminal of the second display element.

10. The semiconductor device according to claim 9,

wherein the first switch has a function of selecting conduction or non-conduction between the first wiring and the gate of the first transistor,

the second switch has the function of selecting conduction or non-conduction between the gate and the source of the first transistor,

the third switch has a function of selecting conduction or non-conduction between the second wiring and the back gate of the first transistor,

the fourth switch has a function of selecting conduction or non-conduction between the third wiring and the source electrode of the first transistor,

and the fifth switch has a function of selecting conduction or non-conduction between the fourth wiring and the gate of the second transistor.

11. The semiconductor device according to claim 9 or 10,

wherein the first capacitor has a function of maintaining a potential difference between a gate and a source of the first transistor,

the second capacitor has a function of maintaining a potential difference between the back gate and the source of the first transistor,

And the third capacitor has a function of maintaining a potential difference between the gate and the source of the second transistor.

12. The semiconductor device according to any one of claim 9 to 11,

wherein a drain of the first transistor is electrically connected to a fifth wiring.

13. The semiconductor device according to any one of claim 9 to 12,

wherein the other terminal of the first display element is electrically connected to a sixth wiring,

and the other terminal of the second display element is electrically connected to the seventh wiring.

14. The semiconductor device according to any one of claim 9 to 13,

wherein the semiconductor of the first transistor forming a channel includes an oxide semiconductor.

15. The semiconductor device according to claim 14,

wherein the oxide semiconductor contains at least one of indium and zinc.

16. The semiconductor device according to any one of claim 9 to 15,

wherein the semiconductor of the second transistor forming a channel includes an oxide semiconductor.

17. The semiconductor device according to claim 16,

wherein the oxide semiconductor contains at least one of indium and zinc.

18. The semiconductor device according to any one of claim 9 to 17,

Wherein the display element is an organic EL element having a series structure.

19. A display device, which is used for displaying a display image,

the semiconductor device according to any one of claims 9 to 18, wherein the semiconductor device is arranged in a matrix,

the first display elements are arranged in odd rows,

the second display elements are arranged in even rows,

the display device further includes:

a function of causing the first display element to emit light during an odd frame; and

and a function of causing the second display element to emit light during even frames.

20. A semiconductor device, comprising:

first to eighth transistors;

first to third capacitors; and

the display element is arranged such that,

wherein the gate of the first transistor and the gate of the sixth transistor are electrically connected to a first wiring,

the gate of the third transistor and the gate of the fourth transistor are electrically connected to a second wiring,

the gate of the seventh transistor is electrically connected to the third wiring,

the gate of the eighth transistor is electrically connected to the fourth wiring,

one of a source and a drain of the first transistor is electrically connected to a fifth wiring,

the other of the source and the drain of the first transistor is electrically connected to the gate of the second transistor, one of the source and the drain of the third transistor, and one terminal of the first capacitor,

One of a source and a drain of the second transistor is electrically connected to a sixth wiring,

one of a source and a drain of the fourth transistor is electrically connected to a seventh wiring,

the other of the source and the drain of the fourth transistor is electrically connected to one terminal of the second capacitor,

the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the third transistor, the other terminal of the first capacitor, the other terminal of the second capacitor, the one of the source and the drain of the fifth transistor, and the one of the source and the drain of the sixth transistor,

one of a source and a drain of the seventh transistor is electrically connected to the seventh wiring,

the gate of the fifth transistor is electrically connected to the other of the source and the drain of the seventh transistor, one of the source and the drain of the eighth transistor, and one terminal of the third capacitor,

the other of the source and the drain of the sixth transistor and the other of the source and the drain of the eighth transistor are electrically connected to an eighth wiring,

the other of the source and the drain of the fifth transistor is electrically connected to the other terminal of the third capacitor and one terminal of the display element,

The other terminal of the display element is electrically connected to a ninth wiring,

the second transistor includes a back gate,

and the back gate is electrically connected to the other of the source and the drain of the fourth transistor and one terminal of the second capacitor.

21. The semiconductor device according to claim 20,

wherein the semiconductor of the second transistor forming a channel includes an oxide semiconductor.

22. The semiconductor device according to claim 21,

wherein the oxide semiconductor contains at least one of indium and zinc.

23. The semiconductor device according to any one of claim 20 to 22,

wherein the semiconductor of the fifth transistor forming a channel includes an oxide semiconductor.

24. The semiconductor device according to claim 23,

wherein the oxide semiconductor contains at least one of indium and zinc.

25. The semiconductor device according to any one of claim 20 to 24,

wherein the display element is an organic EL element having a series structure.

26. The semiconductor device according to any one of claim 20 to 25,

the semiconductor device has a function of changing a gate potential and a back gate potential of the second transistor in accordance with a potential change of the other of the source and the drain of the second transistor.

27. The semiconductor device according to any one of claims 20 to 26,

the semiconductor device has a potential variation according to one terminal of the display element,

and a function of changing a gate potential of the fifth transistor.

28. A semiconductor device, comprising:

first and second transistors;

first to sixth switches;

first to third capacitors; and

the display element is arranged such that,

wherein the first transistor comprises a back gate,

the gate of the first transistor is electrically connected to the first switch,

the second switch and the first capacitor are included between the gate and source of the first transistor,

the back gate of the first transistor is electrically connected to the third switch,

the second capacitor is included between the back gate and source of the first transistor,

the source of the first transistor is electrically connected to the drain of the fourth switch and the second transistor,

the gate of the second transistor is electrically connected to the fifth switch and the sixth switch,

the third capacitor is included between the gate and source of the second transistor,

and a source of the second transistor is electrically connected to one terminal of the display element.

29. The semiconductor device according to claim 28,

wherein the first switch has a function of selecting conduction or non-conduction between the first wiring and the gate of the first transistor,

the second switch has the function of selecting conduction or non-conduction between the gate and the source of the first transistor,

the third switch has a function of selecting conduction or non-conduction between the second wiring and the back gate of the first transistor,

the fourth switch has a function of selecting conduction or non-conduction between the third wiring and the source electrode of the first transistor,

the fifth switch has a function of selecting conduction or non-conduction between the second wiring and the gate of the second transistor,

and the sixth switch has a function of selecting conduction or non-conduction between the third wiring and the gate of the second transistor.

30. The semiconductor device according to claim 28 or 29,

wherein the first capacitor has a function of maintaining a potential difference between a gate and a source of the first transistor,

the second capacitor has a function of maintaining a potential difference between the back gate and the source of the first transistor,

and the third capacitor has a function of maintaining a potential difference between the gate and the source of the second transistor.

31. The semiconductor device according to any one of claims 28 to 30,

wherein the semiconductor of the first transistor forming a channel includes an oxide semiconductor.

32. The semiconductor device according to claim 31,

wherein the oxide semiconductor contains at least one of indium and zinc.

33. The semiconductor device according to any one of claims 28 to 32,

wherein the semiconductor of the second transistor forming a channel includes an oxide semiconductor.

34. The semiconductor device according to claim 33,

wherein the oxide semiconductor contains at least one of indium and zinc.

35. The semiconductor device according to any one of claims 28 to 34,

wherein the display element is an organic EL element having a series structure.

36. A display device, comprising:

a first layer having a driving circuit;

a second layer having a plurality of pixel circuits; and

a third layer having a plurality of light emitting elements,

wherein the second layer is disposed on the first layer,

the third layer is disposed on the second layer,

the driving circuit has a function of controlling operations of the plurality of pixel circuits,

one of the plurality of pixel circuits is electrically connected to one of the plurality of light emitting elements,

The pixel circuit has a function of controlling the light emission luminance of the light emitting element,

and a conductive layer is included between the driving circuit and the plurality of pixel circuits.

37. The display device according to claim 36,

wherein the conductive layer and the plurality of pixel circuits have regions overlapping each other.

38. The display device according to claim 36 or 37,

wherein the conductive layer is a netlike conductive layer.

39. The display device according to any one of claims 36 to 38,

wherein a fixed potential is supplied to the conductive layer.

40. The display device according to any one of claims 36 to 39,

wherein the drive circuit comprises a Si transistor,

and the pixel circuit includes an OS transistor.

41. The display device according to any one of claims 36 to 40,

wherein the light emitting element is an organic EL element.

42. The display device according to claim 41,

wherein the light emitting element is a light emitting element having a series structure.