CN116779459A - Wafer bonding method and bonded device structure - Google Patents

Abstract

In an embodiment, a wafer bonding method includes: receiving a first wafer and a second wafer, the first wafer comprising a first alignment mark, the first alignment mark comprising a first grid of first magnetic components, the second wafer comprising a second alignment mark, the second alignment mark comprising a second grid of second magnetic components; aligning the first alignment mark with the second alignment mark in an optical alignment process; after the optical alignment process, aligning the first alignment mark with the second alignment mark in a magnetic alignment process, a north pole of the first magnetic component being aligned with a south pole of the second magnetic component, a south pole of the first magnetic component being aligned with a north pole of the second magnetic component; and forming a bond between the first wafer and the second wafer. Embodiments of the present invention also provide for bonding device structures.

Description

Wafer bonding method and bonded device structure

Technical Field

Embodiments of the present invention relate to wafer bonding methods and bonded device structures.

Background

Since the development of Integrated Circuits (ICs), the semiconductor industry has experienced a continual rapid increase as various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) continue to improve in terms of integration density. In most cases, these improvements in integration density result from repeated reductions in minimum feature size, which allows for more components to be integrated into a given area. As the demand for miniaturization, higher speed, greater bandwidth, and lower power consumption and delay increases, so does the demand for smaller and more innovative technologies for packaging semiconductor chips.

Stacked semiconductor devices have become an effective technique for further reducing the physical size of the semiconductor devices. In stacked semiconductor devices, active circuits such as logic circuits and memory circuits are fabricated on different semiconductor wafers. Two or more semiconductor wafers may be bonded together by suitable bonding techniques to further reduce the form factor of the semiconductor device.

Disclosure of Invention

Some embodiments of the present invention provide a wafer bonding method comprising: receiving a first wafer and a second wafer, the first wafer comprising a first alignment mark, the first alignment mark comprising a first grid of first magnetic components, the second wafer comprising a second alignment mark, the second alignment mark comprising a second grid of second magnetic components; aligning the first alignment mark with the second alignment mark in an optical alignment process; after the optical alignment process, aligning the first alignment mark with the second alignment mark in a magnetic alignment process, a north pole of the first magnetic component being aligned with a south pole of the second magnetic component, a south pole of the first magnetic component being aligned with a north pole of the second magnetic component; and forming a bond between the first wafer and the second wafer.

Other embodiments of the present invention provide a wafer bonding method comprising: applying a first magnetic field to the first wafer to magnetize a first alignment mark of the first wafer; applying a second magnetic field to the second wafer to magnetize a second alignment mark of the second wafer, the first magnetic field being antiparallel to the second magnetic field, the first magnetic field and the second magnetic field having opposite polarities; moving the first wafer along a first direction toward the second wafer until the first alignment mark and the second alignment mark apply a horizontal force and a vertical force to the first wafer and the second wafer, the vertical force along the first direction, the horizontal force along a second direction, the second direction being perpendicular to the first direction, the horizontal force being greater than the vertical force; and forming a bond between the first wafer and the second wafer.

Still further embodiments of the present invention provide an engagement device structure comprising: a first device including a first dielectric layer and a first alignment mark in the first dielectric layer, the first alignment mark including a first magnetic component; and a second device including a second dielectric layer and a second alignment mark in the second dielectric layer, the second alignment mark including a second magnetic component, a north pole of the first magnetic component aligned with a south pole of the second magnetic component, a south pole of the first magnetic component aligned with a north pole of the second magnetic component, the first dielectric layer bonded to the second dielectric layer by a dielectric-to-dielectric bond, the first alignment mark bonded to the second alignment mark by a metal-to-metal bond.

Drawings

The various aspects of the invention are best understood from the following detailed description when read in connection with the accompanying drawings. It should be noted that the various components are not drawn to scale according to standard practice in the industry. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

FIG. 1 is a cross-sectional view of a wafer according to some embodiments;

FIGS. 2A-4B are views of intermediate steps during a process for forming alignment marks for a wafer, according to some embodiments;

FIG. 5 is a schematic diagram of a wafer bonding method according to some embodiments;

fig. 6-18 are various views of intermediate steps during a wafer bonding method according to some embodiments;

FIGS. 19-20 are top views of alignment marks according to various embodiments;

fig. 21 is a view of an intermediate step during a process for forming alignment marks for a wafer, in accordance with some other embodiments.

Detailed Description

The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to limit the invention. For example, in the following description, forming a first component over or on a second component may include embodiments in which the first component and the second component are formed in direct contact, and may also include embodiments in which additional components may be formed between the first component and the second component, such that the first component and the second component may not be in direct contact. In addition, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Moreover, spatially relative terms such as "under …," "under …," "lower," "above …," "upper," and the like may be used herein for ease of description to describe one element or component's relationship to another element(s) or component(s) as illustrated. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

According to various embodiments, magnetic alignment marks are formed in the wafer and used in an alignment process during bonding of the wafer. Specifically, the two wafers may be formed with alignment marks having opposite magnetic polarities. As a result, when the wafers are bonded together, the alignment marks of the wafers magnetically attract each other. The wafers may thus be magnetically self-aligned during bonding, which may reduce misalignment between bonded wafers.

Fig. 1 is a cross-sectional view of a wafer 70 according to some embodiments. The two wafers 70 will be bonded in a subsequent process to form a bonded wafer structure. Wafer 70 includes semiconductor substrate 72, interconnect structure 74, conductive vias 76, dielectric layer 78, bond pads 82, and alignment marks 84.

Wafer 70 has a plurality of device regions 72D that each include components for a semiconductor die. The semiconductor die may be an integrated circuit die, an interposer, or the like. Each integrated circuit die may be a logic device (e.g., a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a microcontroller, etc.), a memory device (e.g., a Dynamic Random Access Memory (DRAM) die, a Static Random Access Memory (SRAM) die, etc.), a power management device (e.g., a Power Management Integrated Circuit (PMIC) die), a Radio Frequency (RF) device, a sensor device (e.g., an image sensor die), a micro-electro-mechanical system (MEMS) device, a signal processing device (e.g., a Digital Signal Processing (DSP) die), a front-end device (e.g., an analog front-end (AFE) die), etc., or a combination thereof (e.g., a system on a chip (SoC) die).

In the illustrated embodiment, the wafer 70 additionally has a plurality of alignment mark regions 72A, and one or more of the alignment marks 84 are located in each alignment mark region 72A. Alignment mark regions 72A (including alignment marks 84) may be disposed at the edge of wafer 70 such that they are located around device region 72D (including bond pads 82). In another embodiment, alignment marks 84 are located in device region 72D, and wafer 70 does not have a separate area for alignment marks 84.

The semiconductor substrate 72 may be a doped or undoped silicon substrate, or an active layer of a semiconductor-on-insulator (SOI) substrate. Semiconductor substrate 72 may include other semiconductor materials such as, for example: germanium; a compound semiconductor including silicon carbide, gallium arsenide, gallium phosphide, indium arsenide, and/or indium antimonide; alloy semiconductors including silicon germanium, gallium arsenide phosphide, aluminum indium arsenide, aluminum gallium arsenide, gallium indium phosphide, and/or gallium indium arsenide phosphide; or a combination thereof. Other substrates, such as a multi-layer substrate or a gradient substrate, may also be used. The semiconductor substrate 72 has an active surface (e.g., the surface facing upward in fig. 1), sometimes referred to as the front side, and a passive surface (e.g., the surface facing downward in fig. 1), sometimes referred to as the back side.

Devices (not separately shown) may be formed on the active surface of semiconductor substrate 72. The devices may be active devices (e.g., transistors, diodes, etc.) and/or passive devices (e.g., capacitors, resistors, etc.). Interconnect structure 74 is located over the active surface of semiconductor substrate 72. Interconnect structure 74 interconnects the devices to form an integrated circuit. The interconnect structure may be formed by, for example, a metallization pattern in the dielectric layer, and may be formed by a damascene process such as a single damascene process, a dual damascene process, or the like. The metallization pattern includes metal lines and vias formed in one or more dielectric layers. The metallization pattern of the interconnect structure 74 is electrically connected to the device.

Conductive vias 76 extend into interconnect structure 74 and/or semiconductor substrate 72. The conductive vias 76 are electrically connected to the metallization pattern of the interconnect structure 74. The conductive via 76 may be a through substrate via, such as a through silicon via. As an example to form the conductive via 76, a recess may be formed in the interconnect structure 74 and/or the semiconductor substrate 72 by, for example, etching, milling, laser techniques, combinations thereof, and the like. The thin barrier layer may be conformally deposited in the grooves, for example, by Chemical Vapor Deposition (CVD), atomic Layer Deposition (ALD), physical Vapor Deposition (PVD), thermal oxidation, combinations thereof, and the like. The barrier layer may be formed of an oxide, nitride, carbide, combinations thereof, or the like. A conductive material may be deposited over the barrier layer and in the recess. The conductive material may be formed by an electrochemical plating process, CVD, ALD, PVD, combinations thereof, and the like. Examples of conductive materials include copper, tungsten, aluminum, silver, gold, combinations thereof, and the like. Excess conductive material and barrier layer are removed from the surface of interconnect structure 74 or semiconductor substrate 72 by, for example, chemical Mechanical Polishing (CMP). The barrier layer and the remaining portion of the conductive material in the recess form a conductive via 76.

Dielectric layer 78 is located on front side 70F of wafer 70. A dielectric layer 78 is located in and/or over the interconnect structure 74. In some embodiments, dielectric layer 78 is an upper dielectric layer of interconnect structure 74. In some embodiments, dielectric layer 78 is a passivation layer located on interconnect structure 74. The dielectric layer 78 may be formed of silicon oxide, silicon nitride, polybenzoxazole (PBO), polyimide, benzocyclobutene (BCB) based polymer, or the like, or a combination thereof, which may be formed, for example, by Chemical Vapor Deposition (CVD), spin coating, lamination, or the like.

Bond pad 82 is located on front side 70F of wafer 70. The bond pads 82 may be conductive posts, pads, or the like through which external connections may be made. Bond pads 82 are located in and/or on interconnect structure 74. In some embodiments, the bond pads 82 are part of the upper metallization pattern of the interconnect structure 74. In some embodiments, the bond pad 82 includes a post passivation interconnect electrically connected to the upper metallization pattern of the interconnect structure 74. The bond pads 82 may be formed by a conductive material such as metal (e.g., copper, aluminum, etc.), which may be formed by plating, etc., for example. A dielectric layer 78 is disposed laterally around the bond pad 82.

Alignment marks 84 are located on front side 70F of wafer 70. Alignment marks 84 are located in and/or on interconnect structure 74. In some embodiments, the alignment marks 84 are part of the upper metallization pattern of the interconnect structure 74. In some embodiments, alignment marks 84 are formed in dielectric layer 78, spaced apart from bond pads 82. The dielectric layer 78 is disposed laterally around the alignment marks 84. A planarization process may be applied to the various layers such that the top surfaces of dielectric layer 78, bond pad 82, and alignment mark 84 are substantially coplanar (within process variations) and exposed at front surface 70F of wafer 70. The planarization process may be Chemical Mechanical Polishing (CMP), etch back, combinations thereof, and the like.

As will be described in greater detail later, the planarized front faces 70F of the two wafers 70 will be bonded in a face-to-face manner. The alignment marks 84 have a predetermined shape and/or pattern that can be recognized using a camera so that the wafer 70 can be optically aligned using the alignment marks 84 during wafer bonding. In addition, as will be described in more detail later, the alignment marks 84 are formed of a magnetic material such that the alignment marks 84 of the wafer 70 will magnetically attract each other during alignment, thereby improving accuracy of wafer alignment. In addition, the magnetic material of the alignment mark 84 has high transparency to the wavelength of light used during optical alignment, such as infrared light (e.g., light having a wavelength of about 1.1 μm (e.g., in the range of 0.3 μm to 3 μm)). Forming the alignment marks 84 from a material having high transparency can improve the accuracy of optical alignment.

In some embodiments, the magnetic material of alignment marks 84 is different than the conductive material of bond pads 82. The magnetic material of alignment mark 84 may have a greater resistivity than the conductive material of bond pad 82 and a greater transparency than the conductive material of bond pad 82. In such an embodiment, the alignment marks 84 have a stronger magnetization than the bond pads 82.

Alignment marks 84 may be formed at locations where additional bond pads 82 will be formed depending on the design of the semiconductor die. Thus, alignment marks 84 are located in the same device layer (e.g., dielectric layer 78) as bond pads 82. Accordingly, the patterns of the bond pads 82 and the alignment marks 84 may have increased design flexibility.

Fig. 2A-4B are views of intermediate steps during a process for forming alignment marks 84 for wafer 70, according to some embodiments. Fig. 2A, 3A, and 4A are top views. Fig. 2B, 3B, and 4B are sectional views shown along section B-B' in fig. 2A, 3A, and 4A, respectively. The alignment marks 84 (see fig. 4A) include a plurality of magnetic members 96 having a predetermined shape and arranged in a predetermined pattern. In this embodiment, the magnetic component 96 is a magnetic strip. In another embodiment (described later with respect to fig. 20), the magnetic member 96 is a magnetic cross.

In fig. 2A-2B, trenches 92 for magnetic components are patterned in dielectric layer 78. Trench 92 may be a recess extending into dielectric layer 78 or may be an opening extending through dielectric layer 78. Dielectric layer 78 may be patterned by any acceptable process, such as by exposing dielectric layer 78 to light and developing it, or by etching using, for example, anisotropic etching, where dielectric layer 78 is a photosensitive material. After trench 92 reaches the desired depth, a timed etch process may be used to stop the etching of trench 92. The depth of the grooves 92 determines the thickness of the resulting magnetic component 96 (see fig. 4B), as will be described in more detail later.

In fig. 3A-3B, a ferromagnetic component 94 is formed in the channel 92. The ferromagnetic member 94 is formed of a ferromagnetic material capable of being magnetized to form a permanent magnet. Examples of ferromagnetic materials include iron (Fe), cobalt (Co), nickel (Ni), such as cobalt-iron-nickel (Co) _x Fe _y Ni _z Wherein x, y, and z are each in the range of 0 to 100), a multilayer thereof, and the like, which may be formed by techniques such as deposition (e.g., PVD), plating (e.g., electroplating or electroless plating), and the like. The ferromagnetic material may be doped or undoped. For example, the ferromagnetic material may be cobalt-iron-nickel doped with boron, silicon, molybdenum, combinations thereof, and the like. In some embodiments, each ferromagnetic component 94 is a single continuous layer of ferromagnetic material. In some embodiments, each ferromagnetic component 94 is an electrically conductive material doped with a ferromagnetic material.

As an example to form ferromagnetic members 94, a layer of ferromagnetic material may be conformally formed in trenches 92 and on dielectric layer 78. A removal process is performed to remove the excess portion of the ferromagnetic material that is located above the top surface of the dielectric layer 78, thereby forming the ferromagnetic component 94. After the removal process, the ferromagnetic material has portions that remain in the trenches 92 (thereby forming the ferromagnetic parts 94). In some embodiments, a planarization process such as Chemical Mechanical Polishing (CMP), an etchback process, a combination thereof, or the like may be used. After the planarization process, the dielectric layer 78, the bond pads 82 (see fig. 1), and the top surfaces of the ferromagnetic parts 94 are substantially coplanar (within process variations). The substantially coplanar top surfaces of these features are at the front side 70F of the wafer, and the resulting planar surface may be a surface that is subsequently used for wafer bonding.

In fig. 4A-4B, ferromagnetic component 94 is magnetized to form magnetic component 96. The magnetic members 96 are permanent magnets each having a north pole 96N and a south pole 96S. The magnetic component 96 has a stronger magnetization than the ferromagnetic component 94. In some embodiments, the magnetic component 96 has a magnetic field of about 750emu/cm ³ (e.g. at 250 emu/cm) ³ To 2000emu/cm ³ In (c) is a range) of magnetization (M, magnetic moment per unit volume). The ferromagnetic part 94 is magnetized by exposing the ferromagnetic part 94 to a magnetic field 102 (described later) that induces a magnetization in the ferromagnetic part 94.

In this embodiment where the magnetic component 96 is a magnetic stripe, the magnetic stripe is arranged in a grid that includes rows of magnetic stripes. The magnetic stripe has a high density in each grid. In some embodiments, each alignment mark 84 includes 1 to 500 magnetic strips. The magnetic stripe has a length L along a first direction (e.g., Y-direction) ₁ Width W along a second direction (e.g. X direction) ₁ And a thickness T along a third direction (e.g., Z direction) ₁ Wherein the length L ₁ Greater than width W ₁ . In some embodiments, length L ₁ In the range of 0.2 μm to 20 μm (e.g., in the range of 0.2 μm to 10 μm), width W ₁ In the range of 0.2 μm to 20 μm (e.g. in the range of 0.2 μm to 10 μm), and a thickness T ₁ In the range of 0.1 μm to 0.6 μm. The longitudinal axes of the magnetic strips are each aligned along their longitudinal direction (e.g., Y-direction). In some embodiments, the alignment marks 84 (e.g., a grid of magnetic strips) have a total length in the range of 10 μm to 100 μm and a total width in the range of 10 μm to 100 μm.

The magnetic strips in a row are spaced apart along a first direction (e.g., Y-direction) by a distance D ₁ Spaced apart and arranged in rows along a second direction (e.g., X-direction) at a distance D ₂ Spaced apart. In some embodiments, distance D ₁ In the range of 0.1 μm to 0.4 μm, and a distance D ₂ In the range of 0.1 μm to 0.4 μm. Within the grid, alternating rows of magnetic strips are spaced apart along their longitudinal direction (e.g., Y-direction) by a distance D ₃ Offset from each other and every other row of magnetic strips along its longitudinal directionAlignment in the (e.g., Y) direction. In some embodiments, distance D ₃ In the range of 0.4 μm to 9.6 μm. The alternating row offset of the magnetic stripes may improve the accuracy of the alignment process using the alignment marks 84.

Although not shown separately in fig. 2A-4B, it should be appreciated that a plurality of alignment marks 84 may be formed simultaneously. For example, groups of trenches 92 may be patterned in dielectric layer 78, trenches 92 may be filled with respective ferromagnetic components 94, and ferromagnetic components 94 may be magnetized to form magnetic components 96. Alignment marks 84 (including magnetic component 96 of each alignment mark 84) may be spaced apart by a distance of about 5 μm (e.g., in the range of 1 μm to 20 μm). The distance between adjacent alignment marks 84 is greater than the distance between adjacent magnetic members 96 of the alignment marks 84.

The magnetic field 102 used to magnetize the magnetic component 96 has a direction that is parallel to the front surface 70F of the wafer (see fig. 4B) and along the longitudinal direction (e.g., Y-direction) of the magnetic component 96. Thus, the direction of the magnetization induced in the magnetic member 96 is parallel to the longitudinal direction (e.g., Y-direction) of the magnetic member 96. The magnetic field 102 may be generated by an electromagnet. In some embodiments, the magnetic field 102 has a magnetic field strength of about 1 tesla (e.g., in the range of 0.01 tesla to 2 tesla) and is applied for a duration of about 5 seconds (e.g., in the range of 0.01 seconds to 60 seconds).

Fig. 5 is a schematic diagram of a wafer bonding method 500 according to some embodiments. The wafer bonding method 500 will be described in conjunction with fig. 6-18, with fig. 6-18 being various views of intermediate steps during the wafer bonding method 500 according to some embodiments. In the wafer bonding method 500, two wafers 70 (including a first wafer 70A and a second wafer 70B, see fig. 6) are bonded in a face-to-face manner. In the present embodiment, the wafers 70 are bonded in a face-to-face manner by hybrid bonding such that the front side of the first wafer 70A is bonded to the front side of the second wafer 70B by dielectric-to-dielectric bonding and metal-to-metal bonding. Hybrid bonding allows the wafers 70A, 70B to be bonded without the use of any adhesive material (e.g., die attach film) or eutectic material (e.g., solder).

In step 502, a first wafer 70A and a second wafer 70B are received (or formed) that include a first alignment mark 84A and a second alignment mark 84B, respectively (described later with respect to fig. 7). When the wafers 70 are bonded to each other, one of the wafers 70 will be flipped. Thus, the wafers 70A, 70B are formed with alignment marks 84A, 84B, the alignment marks 84A, 84B comprising magnetic members 96A, 96B having opposite magnetic polarities. More specifically, the first magnetic component 96A and the second magnetic component 96B have opposite magnetic polarities. Thus, when the wafers 70A, 70B are placed face-to-face, the wafers 70A, 70B will magnetically attract each other.

Referring to fig. 6 (simplified top view of wafer 70A, wafer 70B) and fig. 7 (top view of alignment marks 84A, 84B), wafer 70A, wafer 70B are shown in a similar step of the process as described with respect to fig. 4A-4B, wherein magnetic components 96A, 96B are magnetized. When the magnetic members 96A, 96B are magnetized, different magnetic fields 102A, 102B are applied to the wafers 70A, 70B. Specifically, a first magnetic field 102A is applied to the first wafer 70A to magnetize the first magnetic component 96A of the first wafer 70A, and a second magnetic field 102B is applied to the second wafer 70B to magnetize the second magnetic component 96B of the second wafer 70B. The first magnetic field 102A and the second magnetic field 102B may (or may not) have the same strength, and the first magnetic field 102A is antiparallel to the second magnetic field 102B such that the first magnetic field 102A and the second magnetic field 102B have opposite polarities (e.g., opposite directions). As a result, the magnetization of the first magnetic component 96A may (or may not) have the same strength as the magnetization of the second magnetic component 96B, but the magnetization of the first magnetic component 96A and the magnetization of the second magnetic component 96B have opposite polarities. Thus, when the wafers 70A, 70B are placed face-to-face, the first magnetic component 96A will attract to the second magnetic component 96B. The direction of the magnetic fields 102A, 102B is related to the respective wafers 70A, 70B. In some embodiments, the direction of the magnetic fields 102A, 102B is related to the notch 88 in the wafer 70A, 70B.

In step 504, wafers 70A, 70B are advanced in a first alignment processThe rows are roughly aligned. Referring to fig. 8-10, wafers 70A, 70B are shown during steps of the first alignment process. One of each alignment mark 84A, 84B is schematically illustrated, but as previously described, each wafer 70A, 70B may include a plurality of alignment marks. The first alignment process is an optical alignment process using cameras 106A, 106B such as infrared cameras. The first wafer 70A is placed on the lower chuck 104A and the second wafer 70B is placed on the upper chuck 104B. The chucks 104A, 104B are operable to move the wafers 70A, 70B horizontally (e.g., along the X/Y plane) and to move the wafers 70A, 70B vertically (e.g., along the Z direction). During the first alignment process, the chucks 104A, 104B are positioned far enough that the magnetic attraction between the alignment marks 84A, 84B is insufficient to move the wafers 70A, 70B. In some embodiments, the chucks 104A, 104B are positioned such that the gap G between the wafers 70A, 70B (e.g., between the alignment marks 84A, 84B) ₁ (see FIG. 10) is about 3mm (e.g., in the range of 0.1mm to 10 mm).

The first alignment process includes searching for a first alignment mark 84A of the first wafer 70A using the upper camera 106B, as shown in fig. 8. The upper camera 106B is set in a fixed position and the lower chuck 104A is moved horizontally along the X/Y plane until the upper camera 106B detects that the first alignment mark 84A is in a desired position indicating proper wafer alignment. The position of lower chuck 104A (which is the aligned position of lower chuck 104A) is then measured using positioning sensor 108. The alignment position of the lower chuck 104A is recorded. Lower chuck 104A may then be retracted so that it is out of line of sight of cameras 106A, 106B.

The first alignment process also includes searching for a second alignment mark 84B of the second wafer 70B using the lower camera 106A, as shown in fig. 9. The lower camera 106A is set in a fixed position and the upper chuck 104B is moved horizontally along the X/Y plane until the lower camera 106A detects that the second alignment mark 84B is in a desired position indicating proper wafer alignment. The position of upper chuck 104B (which is the aligned position of upper chuck 104B) is then measured using positioning sensor 108. The alignment position of the upper chuck 104B is recorded.

The first alignment process also includes moving the chucks 104A, 104B horizontally along the X/Y plane to their aligned positions as determined by the registration sensor 108. When the chucks 104A, 104B are in their aligned positions, the first wafer 70A is roughly aligned with the second wafer 70B. After the wafers 70A, 70B are roughly aligned, the amount of misalignment between them may be significant. In some embodiments, wafers 70A, 70B have a misalignment greater than about 0.2 μm (e.g., a misalignment in the range of 0.2 μm to 0.4 μm).

In step 506, the wafers 70A, 70B are precisely aligned in a second alignment process. Referring to fig. 11, wafers 70A, 70B are shown during the second alignment process. The second alignment process is a magnetic alignment process using the alignment marks 84A, 84B. The second alignment process is a self-alignment process. In the second alignment process, the chucks 104A, 104B are positioned close enough together such that the magnetic attraction between the alignment marks 84A, 84B is sufficient to move the wafers 70A, 70B. In some embodiments, the chucks 104A, 104B are positioned such that the gap G between the wafers 70A, 70B (e.g., between the alignment marks 84A, 84B) is between the wafers 70A, 70B ₂ About 0.6 μm (e.g., in the range of 0.4 μm to 0.8 μm). The chucks 104A, 104B are closer during the second alignment process than during the first alignment process.

Referring to FIG. 12, some magnetic components 96A, 96B of two alignment marks 84A, 84B are shown. Since the magnetic members 96A, 96B are magnetically attracted, the alignment marks 84A, 84B exert two forces on the wafers 70A, 70B (see fig. 11): horizontal force F _H (e.g. along the X/Y plane) and vertical force F _V (e.g., along the Z-direction). Vertical force F _V Wafer 70A, wafer 70B are pulled toward each other. Horizontal force F _H The north poles 96N of the magnetic members 96A, 96B are pulled toward the south poles 96S of the magnetic members 96A, 96B. Horizontal force F _H Greater than the vertical force F _V This improves the accuracy of the second alignment process. In particular, verticallyForce F _V Is not strong enough to move the wafers 70A, 70B in the Z direction, but is a horizontal force F _H Is strong enough to move the wafers 70A, 70B along the X/Y plane. In some embodiments, the vertical force F _V In the range of 0.001 micro-newton to 10 micro-newton, horizontal force F _H In the range of 0.001 micro-newtons to 10 micro-newtons. As described above, alignment marks 84A, magnetic members 96A, 96B of alignment marks 84B have opposite magnetic polarities. Thus, as the wafer 70A, 70B moves along the X/Y plane, the north pole 96N of the first magnetic component 96A aligns with the south pole 96S of the second magnetic component 96B, and the south pole 96S of the first magnetic component 96A aligns with the north pole 96N of the second magnetic component 96B.

Horizontal force F _H And vertical force F _V Is defined by the relative strength of the magnetic member 96A and the thickness T of the magnetic member 96B ₁ (previously described), and also by the gap G between the magnetic component 96A of the first wafer 70A and the magnetic component 96B of the second wafer 70B during the second alignment process ₂ (previously described). The force coefficient is the horizontal force F generated by the alignment marks 84A, 84B _H And the vertical force F generated by the alignment marks 84A and 84B _V Is a ratio of (2). In some embodiments, the force coefficient is in the range of 1 to 2. The greater force coefficient indicates the relative vertical force F during the second alignment process _V Generates a greater horizontal force F _H . Horizontal force F generated during the second alignment process _H The resulting misalignment between alignment marks 84A, 84B (and thus wafer 70A, 70B) may be reduced by the increase. In practice, gap G ₂ In the range of 0.6 μm to 0.8 μm, thickness T ₁ In the range of 0.1 μm to 0.6 μm, whereby the force coefficient obtained is in the range of 1.18 to 1.63.

The second alignment process includes vertically moving chucks 104A, 104B (see fig. 11) toward each other in the Z direction until alignment marks 84A, 84B generate a desired horizontal force F _H And vertical force F _V . Thus, the alignment marks 84A and 84B are moved to the alignment positions. As previously described, horizontal force F _H Is sufficient toThe wafers 70A and 70B are moved along the X/Y plane and the vertical force F _V It is insufficient to move the wafers 70A, 70B in the Z direction. Movement of the chucks 104A, 104B then stops and a wait is implemented, wherein the chucks 104A, 104B remain in the desired position until the wafer 70A, 70B has completed moving to its aligned position (e.g., until the north pole 96N is aligned with the south pole 96S). In some embodiments, the second alignment process includes waiting while the chucks 104A, 104B remain in the desired position for a duration of about 500 μs (e.g., in the range of 10 μs to 5000 μs). When north pole 96N is aligned with south pole 96S, first wafer 70A is precisely aligned with second wafer 70B. After the wafers 70A, 70B are precisely aligned, the amount of misalignment between them is small. In some embodiments, wafers 70A, 70B have a misalignment of less than about 0.1 μm (e.g., a misalignment in the range of 0.01 μm to 0.5 μm). Implementing a second alignment process (e.g., magnetic self-alignment) in addition to the first alignment process (e.g., optical alignment) may allow for misalignment between wafers 70A, 70B to be less than if the first alignment process alone was used.

In step 508, a pre-bonding process is performed by bringing the front surfaces of the wafers 70A, 70B into contact with each other. Referring to fig. 13, wafers 70A, 70B are shown after wafers 70A, 70B are contacted. During pre-bonding, a small pressure is applied by moving the chucks 104A, 104B vertically toward each other to press the first wafer 70A against the second wafer 70B. Fig. 14 is a cross-sectional view of wafers 70A, 70B during bonding. When the wafers 70A, 70B are pressed together, the dielectric layers 78A, 78B are brought into contact. The pre-bonding is performed at a low temperature such as about room temperature (e.g., in the range of 15 ℃ to 30 ℃), and after the pre-bonding, the dielectric layers 78A, 78B are bonded to each other.

In step 510, an annealing process is performed to increase the bonding strength between the wafers 70A, 70B. During the annealing process, dielectric layers 78A, 78B; bond pad 82A, bond pad 82B; and the alignment marks 84A, 84B are annealed at a high temperature such as a temperature in the range of 100 ℃ to 450 ℃. After annealing, a bond, such as a fusion bond, is formed, bonding dielectric layer 78A, dielectric layer 78B. For example, the bond may be a covalent bond between the material of dielectric layer 78A and the material of dielectric layer 78B. The bonding pads 82A, 82B are connected to each other in a one-to-one correspondence. The bond pads 82A, 82B may be in physical contact after pre-bonding, or the bond pads 82A, 82B may be expanded to enable physical contact during annealing. In addition, during annealing, the materials (e.g., copper) of bond pads 82A, 82B mix, thereby also forming a metal-to-metal bond. The alignment marks 84A, 84B are also connected to each other in a one-to-one correspondence, and metal-to-metal bonds may be formed between the alignment marks 84A, 84B in a similar manner as the bond pads 82A, 82B. Thus, the bond obtained between wafers 70A, 70B is a hybrid bond, including both dielectric-to-dielectric and metal-to-metal bonds.

Vertical force F _V Although not large enough to move the wafers 70A, 70B in the Z direction during wafer bonding, large enough to bend the wafers 70A, 70B when the wafers 70A, 70B are in contact. Thus, the use of magnetic alignment marks 84A, 84B may help reduce warpage of the wafers 70A, 70B in addition to helping alignment during wafer bonding. In some embodiments, as shown in fig. 15, the first wafer 70A and the second wafer 70B have convex warpage before bonding, while bonding the wafers 70A, 70B with the magnetic alignment marks may reduce warpage thereof. In some embodiments, as shown in fig. 16, prior to bonding, the first wafer 70A has a convex warp and the second wafer 70B has a concave warp, and bonding the wafers 70A, 70B with the magnetic alignment marks may reduce the warp thereof. In some embodiments, as shown in fig. 17, prior to bonding, the first wafer 70A has no warpage, while the second wafer 70B has convex warpage, and bonding the wafers 70A, 70B with the magnetic alignment marks may reduce warpage. In some embodiments, as shown in fig. 18, prior to bonding, the first wafer 70A has no warpage, while the second wafer 70B has concave warpage, bonding the wafers using magnetic alignment marks 70A, and wafer 70B, warpage can be reduced. The warpage of the wafer 70A and the wafer 70B is reduced, and the accuracy of alignment can be further improved.

Additional processing may be performed after wafer 70A, wafer 70B are bonded. For example, referring again to fig. 14, the bonded wafer structure may be singulated by sawing along scribe line regions (e.g., between device regions 72D). Sawing may singulate the bonded devices in each device region 72D to form bonded device structures. In embodiments where alignment marks 84 are formed in device region 72D, the bonded device structure may include alignment marks 84. In embodiments where alignment marks 84 are formed in separate alignment mark regions 72A, the bonded device structures may not include alignment marks 84.

The embodiment can realize beneficial effects. Forming the magnetic alignment marks 84 in the wafer 70 may improve the accuracy of the alignment process during bonding of the wafer 70. Specifically, the wafers 70A, 70B are formed with alignment marks 84A, 84B having opposite magnetic polarities. As a result, when the wafers 70A, 70B are bonded together, the first alignment mark 84A is magnetically attracted to the second alignment mark 84B. The magnetic attraction between the alignment marks 84A, 84B creates a horizontal force along the horizontal plane (i.e., parallel to the wafer 70A, the front side 70F of the wafer 70B) that is large enough to move the wafer along the horizontal plane such that the first alignment mark 84A is aligned with the second alignment mark 84B. Magnetic self-alignment between the wafers 70A, 70B may be achieved and, using magnetic self-alignment during bonding, misalignment between the bonded wafers 70A, 70B may be reduced.

Fig. 19 is a top view of an alignment mark 84 according to some other embodiments. Similar to the previous embodiment, each alignment mark 84 includes a plurality of magnetic members 96, which are magnetic strips. In the present embodiment, the alignment marks 84 include a horizontal alignment mark 84H and a vertical alignment mark 84V on the same wafer. The horizontal alignment marks 84H include a plurality of horizontal magnetic strips 96H. The vertical alignment mark 84V includes a plurality of vertical magnetic strips 96V. The longitudinal direction of the horizontal magnetic stripe 96H is perpendicular to the longitudinal direction of the vertical magnetic stripe 96V. In addition, the magnetization direction of the horizontal magnetic stripe 96H is perpendicular to the magnetization direction of the vertical magnetic stripe 96V. Forming both the horizontal magnetic stripe 96H and the vertical magnetic stripe 96V on the same wafer may reduce misalignment during the second alignment process (described previously with respect to fig. 11-12). Specifically, forming the alignment marks 84H, 84V having longitudinal axes along a plurality of directions can improve alignment accuracy along both directions during bonding.

Fig. 20 is a top view of alignment marks 84 according to some other embodiments. Similar to the previous embodiment, the alignment marks 84 include a plurality of magnetic members 96 having a predetermined shape and arranged in a predetermined pattern. In the present embodiment, the magnetic member 96 is a magnetic cross. Each magnetic cross comprises two magnetic strips perpendicular to each other. The use of a magnetic cross instead of a magnetic stripe may allow the magnetic component 96 to have equally strong magnetic forces in both the X-direction and the Y-direction.

In this embodiment, where the magnetic members 96 are magnetic crosses, each magnetic cross includes four arm portions 98 protruding from a central portion. The first pair of adjacent arm portions 98 forms a north pole 96N of a magnetic cross. The second pair of adjacent arm portions 98 forms a south pole 96S of the magnetic cross. In some embodiments, the length L of each arm 98 ₁ In the range of 0.1 μm to 10 μm, and the width W of each arm 98 ₁ In the range of 0.01 μm to 5 μm.

The magnetic crosses are arranged in a grid comprising rows of magnetic crosses. The magnetic cross has a high density in each grid. In some embodiments, each alignment mark 84 includes 1 to 500 magnetic crosses. In some embodiments, the alignment marks 84 (e.g., magnetic members 96) have a total length along a first direction (e.g., Y-direction) of about 50 μm (e.g., in the range of 10 μm to 100 μm) and a total width along a second direction (e.g., X-direction) of about 50 μm (e.g., in the range of 10 μm to 100 μm).

The magnetic crosses in a row are at a distance D along a first direction (e.g., Y-direction) ₁ Spaced apart. In some embodiments, distance D ₁ In the range of 0.1 μm to 10 μm. The arms 98 of adjacent rows of magnetic crosses may overlap each other along the longitudinal axis of those arms 98. Within the grid, alternating rows of magnetic crosses are aligned along their longitudinal direction (e.g., Y-direction) Distance D ₃ Offset from each other and aligned along its longitudinal direction (e.g., Y-direction) for every other row of magnetic crosses. In some embodiments, distance D ₃ In the range of 0.1 μm to 10 μm. The alternating rows of magnetic crosses are offset to improve the accuracy of the alignment process using alignment marks 84.

Fig. 21 is a view of an intermediate step during a process for forming alignment marks for a wafer, in accordance with some other embodiments. As previously described, different wafers may be formed with alignment marks that include magnetic components having opposite magnetic polarities. Fig. 21 shows the alignment marks 84 of fig. 20 during a magnetization process for the alignment marks 84 (previously described with respect to fig. 4A-4B). The first magnetic field 102A is used to magnetize the first magnetic component 96A for the first alignment mark 84A of the first wafer. The second magnetic field 102B is used to magnetize the second magnetic component 96B for the second alignment mark 84B of the second wafer. The first magnetic field 102A and the second magnetic field 102B have opposite magnetic polarities. When the magnetic members 96A, 96B are magnetic crosses, the first magnetic field 102A forms a first non-zero angle with each arm of the first magnetic member 96A and the second magnetic field 102B forms a second non-zero angle with each arm of the second magnetic member 96B. The non-zero angle is between 0 and 90 degrees. In some embodiments, the non-zero angle is a 45 degree angle.

In one embodiment, a method includes: receiving a first wafer and a second wafer, the first wafer comprising a first alignment mark, the first alignment mark comprising a first grid of first magnetic components, the second wafer comprising a second alignment mark, the second alignment mark comprising a second grid of second magnetic components; aligning the first alignment mark with the second alignment mark in an optical alignment process; after the optical alignment process, aligning the first alignment mark with the second alignment mark in a magnetic alignment process, a north pole of the first magnetic component being aligned with a south pole of the second magnetic component, a south pole of the first magnetic component being aligned with a north pole of the second magnetic component; and forming a bond between the first wafer and the second wafer. In some embodiments of the method, each of the first magnetic component and the second magnetic component is a magnetic stripe. In some embodiments of the method, each of the first magnetic component and the second magnetic component is a magnetic cross. In some embodiments of the method, alternating rows of first magnetic elements within the first grid are offset. In some embodiments of the method, the first magnetic members of every other row are aligned. In some embodiments of the method, the first wafer further comprises a first dielectric layer, the first alignment mark is formed in the first dielectric layer, the second wafer further comprises a second dielectric layer, the second alignment mark is formed in the second dielectric layer, and forming the bond between the first wafer and the second wafer comprises: forming a dielectric-to-dielectric bond between the first dielectric layer and the second dielectric layer; and forming a metal-to-metal bond between the first alignment mark and the second alignment mark.

In one embodiment, a method includes: applying a first magnetic field to the first wafer to magnetize a first alignment mark of the first wafer; applying a second magnetic field to the second wafer to magnetize a second alignment mark of the second wafer, the first magnetic field being antiparallel to the second magnetic field, the first magnetic field and the second magnetic field having opposite polarities; moving the first wafer along a first direction toward the second wafer until the first alignment mark and the second alignment mark apply a horizontal force and a vertical force to the first wafer and the second wafer, the vertical force along the first direction, the horizontal force along a second direction, the second direction being perpendicular to the first direction, the horizontal force being greater than the vertical force; and forming a bond between the first wafer and the second wafer. In some embodiments of the method, the first alignment marks each comprise a first magnetic stripe and the second alignment marks each comprise a second magnetic stripe. In some embodiments of the method, the first magnetic field is parallel to a first longitudinal axis of the first magnetic stripe and the second magnetic field is parallel to a second longitudinal axis of the second magnetic stripe. In some embodiments of the method, the first alignment marks each comprise a first magnetic cross and the second alignment marks each comprise a second magnetic cross. In some embodiments of the method, the first magnetic field forms a non-zero angle with a first arm of the first magnetic cross and the second magnetic field forms a non-zero angle with a second arm of the second magnetic cross. In some embodiments of the method, the ratio of horizontal force to vertical force is in the range of 1 to 2. In some embodiments of the method, the vertical force reduces warpage of the first wafer and the second wafer. In some embodiments of the method, moving the first wafer toward the second wafer begins moving the first alignment mark and the second alignment mark to the aligned position, the method further comprising: after moving the first wafer toward the second wafer, waiting is performed until the first alignment mark and the second alignment mark are completely moved to the alignment position. In some embodiments of the method, waiting until the first alignment mark and the second alignment mark finish moving to the aligned position includes waiting for a duration in a range of 10 μs to 5000 μs. In some embodiments of the method, forming the bond between the first wafer and the second wafer includes: contacting the first dielectric layer of the first wafer with the second dielectric layer of the second wafer; contacting the first alignment mark of the first wafer with the second alignment mark of the second wafer; and annealing the first wafer and the second wafer.

In one embodiment, a structure comprises: a first device including a first dielectric layer and a first alignment mark in the first dielectric layer, the first alignment mark including a first magnetic component; a second device comprising a second dielectric layer and a second alignment mark in the second dielectric layer, the second alignment mark comprising a second magnetic component, a north pole of the first magnetic component aligned with a south pole of the second magnetic component, a south pole of the first magnetic component aligned with a north pole of the second magnetic component, the first dielectric layer bonded to the second dielectric layer by a dielectric-to-dielectric bond, the first alignment mark bonded to the second alignment mark by a metal-to-metal bond. In some embodiments of the structure, each of the first magnetic component and the second magnetic component is a magnetic stripe. In some embodiments of the structure, each of the first magnetic component and the second magnetic component is a magnetic cross. In some embodiments of the structure, alternating rows of first magnetic elements are offset and alternating rows of second magnetic elements are offset.

The foregoing outlines features of several embodiments so that those skilled in the art may better understand the various aspects of the disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same or similar purposes and/or achieving the same or similar advantages of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the disclosure, and that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the disclosure.

Claims (10)

1. A wafer bonding method, comprising:

receiving a first wafer and a second wafer, the first wafer comprising a first alignment mark, the first alignment mark comprising a first grid of first magnetic components, the second wafer comprising a second alignment mark, the second alignment mark comprising a second grid of second magnetic components;

aligning the first alignment mark with the second alignment mark in an optical alignment process;

aligning the first alignment mark with the second alignment mark in a magnetic alignment process after the optical alignment process, a north pole of the first magnetic component being aligned with a south pole of the second magnetic component, a south pole of the first magnetic component being aligned with a north pole of the second magnetic component; and

a bond between the first wafer and the second wafer is formed.

2. The method of claim 1, wherein each of the first magnetic component and the second magnetic component is a magnetic stripe.

3. The method of claim 1, wherein each of the first and second magnetic components is a magnetic cross.

4. The method of claim 1, wherein alternating rows of the first magnetic components within the first grid are offset.

5. The method of claim 4, wherein the first magnetic components of every other row are aligned.

6. The method of claim 1, wherein the first wafer further comprises a first dielectric layer, the first alignment mark is formed in the first dielectric layer, the second wafer further comprises a second dielectric layer, the second alignment mark is formed in the second dielectric layer, and forming the bond between the first wafer and the second wafer comprises:

forming a dielectric-to-dielectric bond between the first dielectric layer and the second dielectric layer; and

a metal-to-metal bond is formed between the first alignment mark and the second alignment mark.

7. A wafer bonding method, comprising:

applying a first magnetic field to a first wafer to magnetize a first alignment mark of the first wafer;

applying a second magnetic field to a second wafer to magnetize a second alignment mark of the second wafer, the first magnetic field being antiparallel to the second magnetic field, the first magnetic field and the second magnetic field having opposite polarities;

moving the first wafer in a first direction toward the second wafer until the first and second alignment marks apply a horizontal force and a vertical force to the first and second wafers, the vertical force being in the first direction, the horizontal force being in a second direction, the second direction being perpendicular to the first direction, the horizontal force being greater than the vertical force; and

A bond between the first wafer and the second wafer is formed.

8. The method of claim 7, wherein the first alignment marks each comprise a first magnetic stripe and the second alignment marks each comprise a second magnetic stripe.

9. The method of claim 8, wherein the first magnetic field is parallel to a first longitudinal axis of the first magnetic stripe and the second magnetic field is parallel to a second longitudinal axis of the second magnetic stripe.

10. A bonded device structure, comprising:

a first device comprising a first dielectric layer and a first alignment mark in the first dielectric layer, the first alignment mark comprising a first magnetic component; and

a second device comprising a second dielectric layer and a second alignment mark in the second dielectric layer, the second alignment mark comprising a second magnetic component, a north pole of the first magnetic component aligned with a south pole of the second magnetic component, a south pole of the first magnetic component aligned with a north pole of the second magnetic component, the first dielectric layer bonded to the second dielectric layer by a dielectric-to-dielectric bond, the first alignment mark bonded to the second alignment mark by a metal-to-metal bond.