CN116739975A - Method and system for evaluating defect area of semiconductor substrate - Google Patents
Method and system for evaluating defect area of semiconductor substrate Download PDFInfo
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Abstract
The invention belongs to the technical field of evaluation of defect areas of semiconductor substrates, and discloses a method and a system for evaluating the defect areas of the semiconductor substrates, wherein the system for evaluating the defect areas of the semiconductor substrates comprises the following steps: the device comprises a substrate image acquisition module, a main control module, a substrate image enhancement module, an image segmentation module, a defect positioning module, a defect evaluation module and a display module. The invention obtains a first-stage node semiconductor substrate image through a substrate image enhancement module, and sequentially carries out semiconductor substrate image enhancement on the node semiconductor substrate image obtained by the previous-stage sub-network through the subsequent-stage sub-network, obtains a final-stage node semiconductor substrate image from the output of the final-stage sub-network, and takes the final-stage node semiconductor substrate image as an enhanced semiconductor substrate image corresponding to the original semiconductor substrate image; meanwhile, the defect location module can accurately locate the defect point of the semiconductor substrate.
Description
Technical Field
The invention belongs to the technical field of evaluation of defect areas of semiconductor substrates, and particularly relates to an evaluation method and an evaluation system of defect areas of a semiconductor substrate.
Background
Semiconductors refer to materials that have electrical conductivity properties at normal temperatures that are intermediate between conductors and insulators. Semiconductors are used in integrated circuits, consumer electronics, communication systems, photovoltaic power generation, lighting, high power conversion, etc., and diodes are devices fabricated using semiconductors. The importance of semiconductors is very great. Most electronic products, such as computers, mobile phones or digital recorders, have a core unit that is very closely related to semiconductors. Common semiconductor materials include silicon, germanium, gallium arsenide, etc., silicon being one of the most influential applications of various semiconductor materials; however, the image of the semiconductor substrate acquired by the conventional evaluation system of the defect area of the semiconductor substrate is not clear, which affects the evaluation of the defect; meanwhile, the defective position of the semiconductor substrate cannot be accurately located.
Through the above analysis, the problems and defects existing in the prior art are as follows:
(1) The image of the semiconductor substrate acquired by the conventional evaluation system of the defect area of the semiconductor substrate is not clear, and the evaluation of the defect is affected.
(2) The defect position of the semiconductor substrate cannot be accurately positioned.
Disclosure of Invention
Aiming at the problems existing in the prior art, the invention provides a method and a system for evaluating a defect area of a semiconductor substrate.
The present invention is achieved by an evaluation system for a defective region of a semiconductor substrate, comprising:
the device comprises a substrate image acquisition module, a main control module, a substrate image enhancement module, an image segmentation module, a defect positioning module, a defect evaluation module and a display module;
the substrate image acquisition module is connected with the main control module and is used for acquiring the image of the semiconductor substrate;
the substrate image acquisition module acquisition method comprises the following steps:
acquiring the current focal length of the camera; determining an overlapped focal length interval to which the current focal length belongs;
judging whether the current focal length is smaller than a preset switching focal length in the overlapped focal length interval or not;
if the zoom range is smaller than the preset zoom range, determining that the short-focus zoom lens is a main lens and the long-focus zoom lens is a slave lens from two lenses corresponding to the two zoom ranges with overlapped focal length ranges;
acquiring a semiconductor substrate image acquired by a main lens;
the main lens is a lens which performs zooming according to zooming parameters received by the camera and acquires images of the semiconductor substrate, and the auxiliary lens is a lens which performs zooming along with the main lens;
zooming from the lens to follow the master lens includes: determining a current zoom value of the slave lens by utilizing a preset zoom tracking curve based on the current zoom value of the zoom motor of the master lens and the current zoom value of the focus motor, and controlling the movement of the zoom motor of the slave lens according to the current zoom value of the slave lens;
The main control module is connected with the substrate image acquisition module, the substrate image enhancement module, the image segmentation module, the defect positioning module, the defect evaluation module and the display module and used for controlling the normal work of each module;
the control method of the main control module comprises the following steps:
acquiring an acquired semiconductor substrate image through a central processing unit, and sending the acquired semiconductor substrate image to a substrate image enhancement module for enhancement processing; feeding back the processed data to the central processing unit;
the central processing unit sends the enhanced image to the image segmentation module to segment the image characteristics, and the segmented image is fed back to the central processing unit;
finally, the central processing unit respectively sends the acquired characteristic images to the defect positioning module and the defect evaluating module for processing;
the CPU temperature control method comprises the following steps:
detecting the real-time temperature of the central processing unit body through a temperature sensor;
when the real-time temperature is greater than or equal to a first preset temperature value, controlling the direct-current power supply to output voltage to the first thermoelectric refrigerator;
when the real-time temperature is smaller than or equal to a second preset temperature value, controlling the direct-current power supply to stop outputting voltage to the first thermoelectric refrigerator, wherein the second preset temperature value is smaller than the first preset temperature value;
When the direct-current power supply outputs voltage to the first thermoelectric refrigerator, if the detected real-time temperature gradually increases, controlling the direct-current power supply to increase the voltage value output to the first thermoelectric refrigerator;
the substrate image enhancement module is connected with the main control module and is used for enhancing the semiconductor substrate image;
the image segmentation module is connected with the main control module and is used for carrying out segmentation processing on the image of the semiconductor substrate;
the image segmentation module segmentation method comprises the following steps:
extracting semiconductor substrate image features of individual semiconductor substrate image tiles in an input semiconductor substrate image, each semiconductor substrate image tile including one or more pixels;
evaluating a confidence that two or more adjacent semiconductor substrate image tiles that are spatially adjacent are clustered into the same cluster based on semiconductor substrate image features of each semiconductor substrate image tile;
and performing sample-based clustering on the semiconductor substrate image blocks, wherein the result of the evaluation is considered in a clustering process;
each cluster of the semiconductor substrate image blocks forms a segmented region of the input semiconductor substrate image;
Wherein evaluating the confidence that two or more adjacent semiconductor substrate image tiles that are spatially adjacent are clustered into the same cluster based on the semiconductor substrate image features of each semiconductor substrate image tile comprises: performing edge extraction on the input semiconductor substrate image to obtain an edge map;
calculating edge loss between adjacent edge blocks corresponding to the adjacent semiconductor substrate image blocks in the edge map;
and evaluating a confidence that the adjacent semiconductor substrate image tiles are clustered into the same cluster based on the edge loss;
the defect positioning module is connected with the main control module and used for positioning defects of the semiconductor substrate;
the defect evaluation module is connected with the main control module and used for evaluating defects of the semiconductor substrate;
the display module is connected with the main control module and used for displaying the image, the positioning information and the defect evaluation result of the semiconductor substrate.
The method for evaluating a defective region of a semiconductor substrate includes the steps of:
step one, collecting a semiconductor substrate image through a substrate image collecting module;
step two, the main control module carries out enhancement treatment on the semiconductor substrate image through the substrate image enhancement module;
Step three, dividing the semiconductor substrate image through an image dividing module; positioning the defect of the semiconductor substrate through a defect positioning module;
step four, evaluating the defects of the semiconductor substrate through a defect evaluation module; and displaying the semiconductor substrate image, the positioning information and the defect evaluation result through a display module.
Further, the substrate image enhancement module enhancement method comprises the following steps:
(1) Acquiring an original semiconductor substrate image; denoising the original semiconductor substrate image; inputting the original semiconductor substrate image into a pre-obtained semiconductor substrate image enhancement network, and enhancing the original semiconductor substrate image step by step to obtain an enhanced semiconductor substrate image corresponding to the original semiconductor substrate image;
the semiconductor substrate image enhancement network comprises at least two stages of sub-networks, the original semiconductor substrate image is used as the input of a first stage sub-network of the semiconductor substrate image enhancement network, the first stage sub-network outputs a first stage node semiconductor substrate image, the node semiconductor substrate image output by each stage of sub-network is used as the input of a next stage of sub-network, the last stage sub-network of the semiconductor substrate image enhancement network outputs a last stage node semiconductor substrate image, and the last stage node semiconductor substrate image is used as the enhanced semiconductor substrate image;
The semiconductor substrate image enhancement network is obtained in advance through the following steps:
acquiring an original semiconductor substrate image sample and a corresponding enhanced semiconductor substrate image sample;
generating a multi-level node semiconductor substrate image sample according to the original semiconductor substrate image sample and the enhanced semiconductor substrate image sample; wherein the number of stages of the multi-stage node semiconductor substrate image sample is one less than the number of stages of the sub-network;
training the semiconductor substrate image enhancement network by taking the original semiconductor substrate image sample, the enhanced semiconductor substrate image sample and the multi-level node semiconductor substrate image sample as training samples to obtain the trained semiconductor substrate image enhancement network; the original semiconductor substrate image sample is used as the training input of a first-stage sub-network, the enhanced sample semiconductor substrate image is used as the training output of a last-stage sub-network, the node semiconductor substrate image sample of each stage is used as the training input of the next-stage sub-network, and the node semiconductor substrate image sample of each stage is used as the training output of the corresponding-stage sub-network.
Further, the semiconductor substrate image enhancement network is a full convolution network, and in a multi-level sub-network, sub-networks of different levels have non-identical network parameters.
Further, the original semiconductor substrate image sample and the enhanced semiconductor substrate image sample generate a multi-level node semiconductor substrate image sample, specifically including:
acquiring a semiconductor substrate image matrix of the original semiconductor substrate image sample and a semiconductor substrate image matrix of the enhanced semiconductor substrate image sample;
inserting a multi-level node semiconductor substrate image matrix between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample; wherein the number of stages of the multi-stage node semiconductor substrate image matrix is one less than the number of stages of the sub-network;
and acquiring corresponding multi-level node semiconductor substrate image samples according to the multi-level node semiconductor substrate image matrix.
Further, a multi-level node semiconductor substrate image matrix is inserted between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample, specifically:
And inserting a multi-level node semiconductor substrate image matrix according to a preset gradient change between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample.
Further, the step of obtaining the semiconductor substrate image enhancement network in advance further includes:
generating a node characteristic diagram corresponding to each stage of node semiconductor substrate image sample;
inputting the original semiconductor substrate image sample into the semiconductor substrate image enhancement network after training to obtain a tested enhanced semiconductor substrate image sample;
constructing a target loss function of the semiconductor substrate image enhancement network by taking the node characteristic diagram and the tested enhanced semiconductor substrate image sample as function parameters;
and optimizing the training-completed semiconductor substrate image enhancement network according to the target loss function to obtain the optimized semiconductor substrate image enhancement network.
Further, the defect positioning module positioning method comprises the following steps:
1) Configuring parameters of a defect positioning instrument, and electrically connecting a probe in the defect positioning instrument with a failure sample device of the semiconductor substrate; applying excitation to the failure sample device of the semiconductor substrate to enable defect points to appear;
2) Marking out an identification point at a position close to the defect point by using a probe in the defect positioning instrument; determining the position relation between the identification point and the defect point; and positioning the defect point according to the position of the identification point and the position relation.
Further, in the step of applying excitation to the device of the semiconductor substrate to make a defect point appear, when a defect point appears, the step of using a probe in a defect locator to scribe an identification point at a position close to the defect point specifically includes:
moving a probe in a defect locator to a position close to the defect point;
marking out a mark point at the position by using the probe;
marking an identification point at the position by using the probe, which specifically comprises the following steps:
marking an identification point at the position by using the probe;
marking an identification point at the position by using the probe, which specifically comprises the following steps:
marking at least two identification points at the position by using the probe;
the determining the position relationship between the identification point and the defect point specifically comprises the following steps:
selecting an identification point closest to the defect point as a target identification point;
determining the position relationship between the target identification point and the defect point;
The determining the position relationship between the identification point and the defect point specifically comprises the following steps:
and respectively determining the position relation between the defect point and all the corresponding identification points.
Further, before determining the position relationship between the identification point and the defect point, the method further includes:
moving the probe to return to an initial position;
applying excitation to the device of the semiconductor substrate again to make the defect points appear again;
in the step of applying excitation to the device of the semiconductor substrate to enable the defect points to be displayed, when at least two defect points are displayed, the step of using the probe in the defect locator to mark the mark points at the positions close to the defect points specifically comprises the following steps:
moving a probe in the defect locator to a position close to one of the defect points;
marking out a mark point at the position by using the probe;
moving the probe to return to an initial position;
applying excitation to the device of the semiconductor substrate again to make the defect points appear again;
repeating the steps until corresponding identification points are carved for all the defect points.
In combination with the above technical solution and the technical problems to be solved, please analyze the following aspects to provide the following advantages and positive effects:
First, aiming at the technical problems in the prior art and the difficulty in solving the problems, the technical problems solved by the technical proposal of the invention are analyzed in detail and deeply by tightly combining the technical proposal to be protected, the results and data in the research and development process, and the like, and some technical effects brought after the problems are solved have creative technical effects. The specific description is as follows:
the invention strengthens the original semiconductor substrate image step by step through the semiconductor substrate image strengthening network obtained in advance of the substrate image strengthening module, the first-stage sub-network of the semiconductor substrate image strengthening network strengthens the original semiconductor substrate image to obtain a first-stage node semiconductor substrate image, the subsequent sub-networks sequentially strengthen the semiconductor substrate image of the node semiconductor substrate image obtained by the previous sub-network, the output of the final sub-network obtains a final-stage node semiconductor substrate image, and the final-stage node semiconductor substrate image is used as the corresponding strengthening semiconductor substrate image of the original semiconductor substrate image; meanwhile, the defect location module can accurately locate the defect point of the semiconductor substrate.
Secondly, the technical scheme is regarded as a whole or from the perspective of products, and the technical scheme to be protected has the following technical effects and advantages:
the invention strengthens the original semiconductor substrate image step by step through the semiconductor substrate image strengthening network obtained in advance of the substrate image strengthening module, the first-stage sub-network of the semiconductor substrate image strengthening network strengthens the original semiconductor substrate image to obtain a first-stage node semiconductor substrate image, the subsequent sub-networks sequentially strengthen the semiconductor substrate image of the node semiconductor substrate image obtained by the previous sub-network, the output of the final sub-network obtains a final-stage node semiconductor substrate image, and the final-stage node semiconductor substrate image is used as the corresponding strengthening semiconductor substrate image of the original semiconductor substrate image; meanwhile, the defect location module can accurately locate the defect point of the semiconductor substrate.
Drawings
Fig. 1 is a flowchart of a method for evaluating a defective area of a semiconductor substrate according to an embodiment of the present invention.
Fig. 2 is a block diagram of an evaluation system for defective areas of a semiconductor substrate according to an embodiment of the present invention.
Fig. 3 is a flowchart of a substrate image enhancement module enhancement method according to an embodiment of the present invention.
Fig. 4 is a flowchart of a defect positioning module positioning method according to an embodiment of the present invention.
In fig. 2: 1. a substrate image acquisition module; 2. a main control module; 3. a substrate image enhancement module; 4. an image segmentation module; 5. a defect positioning module; 6. a defect evaluation module; 7. and a display module.
Detailed Description
The present invention will be described in further detail with reference to the following examples in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
1. The embodiments are explained. In order to fully understand how the invention may be embodied by those skilled in the art, this section is an illustrative embodiment in which the claims are presented for purposes of illustration.
As shown in fig. 1, the method for evaluating a defective area of a semiconductor substrate provided by the present invention includes the steps of:
s101, acquiring a semiconductor substrate image through a substrate image acquisition module;
s102, a main control module performs enhancement processing on a semiconductor substrate image through a substrate image enhancement module;
S103, dividing the semiconductor substrate image through an image dividing module; positioning the defect of the semiconductor substrate through a defect positioning module;
s104, evaluating the defects of the semiconductor substrate through a defect evaluation module; and displaying the semiconductor substrate image, the positioning information and the defect evaluation result through a display module.
As shown in fig. 2, an evaluation system for a defective area of a semiconductor substrate according to an embodiment of the present invention includes: the device comprises a substrate image acquisition module 1, a main control module 2, a substrate image enhancement module 3, an image segmentation module 4, a defect positioning module 5, a defect evaluation module 6 and a display module 7.
The substrate image acquisition module 1 is connected with the main control module 2 and is used for acquiring the image of the semiconductor substrate;
the substrate image acquisition module acquisition method comprises the following steps:
acquiring the current focal length of the camera; determining an overlapped focal length interval to which the current focal length belongs;
judging whether the current focal length is smaller than a preset switching focal length in the overlapped focal length interval or not;
if the zoom range is smaller than the preset zoom range, determining that the short-focus zoom lens is a main lens and the long-focus zoom lens is a slave lens from two lenses corresponding to the two zoom ranges with overlapped focal length ranges;
acquiring a semiconductor substrate image acquired by a main lens;
The main lens is a lens which performs zooming according to zooming parameters received by the camera and acquires images of the semiconductor substrate, and the auxiliary lens is a lens which performs zooming along with the main lens;
zooming from the lens to follow the master lens includes: determining a current zoom value of the slave lens by utilizing a preset zoom tracking curve based on the current zoom value of the zoom motor of the master lens and the current zoom value of the focus motor, and controlling the movement of the zoom motor of the slave lens according to the current zoom value of the slave lens;
the main control module 2 is connected with the substrate image acquisition module 1, the substrate image enhancement module 3, the image segmentation module 4, the defect positioning module 5, the defect evaluation module 6 and the display module 7 and is used for controlling the normal operation of each module;
the control method of the main control module comprises the following steps:
acquiring an acquired semiconductor substrate image through a central processing unit, and sending the acquired semiconductor substrate image to a substrate image enhancement module for enhancement processing; feeding back the processed data to the central processing unit;
the central processing unit sends the enhanced image to the image segmentation module to segment the image characteristics, and the segmented image is fed back to the central processing unit;
finally, the central processing unit respectively sends the acquired characteristic images to the defect positioning module and the defect evaluating module for processing;
The CPU temperature control method comprises the following steps:
detecting the real-time temperature of the central processing unit body through a temperature sensor;
when the real-time temperature is greater than or equal to a first preset temperature value, controlling the direct-current power supply to output voltage to the first thermoelectric refrigerator;
when the real-time temperature is smaller than or equal to a second preset temperature value, controlling the direct-current power supply to stop outputting voltage to the first thermoelectric refrigerator, wherein the second preset temperature value is smaller than the first preset temperature value;
when the direct-current power supply outputs voltage to the first thermoelectric refrigerator, if the detected real-time temperature gradually increases, controlling the direct-current power supply to increase the voltage value output to the first thermoelectric refrigerator;
the substrate image enhancement module 3 is connected with the main control module 2 and is used for enhancing the semiconductor substrate image;
the image segmentation module 4 is connected with the main control module 2 and is used for carrying out segmentation processing on the semiconductor substrate image;
the image segmentation module segmentation method comprises the following steps:
extracting semiconductor substrate image features of individual semiconductor substrate image tiles in an input semiconductor substrate image, each semiconductor substrate image tile including one or more pixels;
Evaluating a confidence that two or more adjacent semiconductor substrate image tiles that are spatially adjacent are clustered into the same cluster based on semiconductor substrate image features of each semiconductor substrate image tile;
and performing sample-based clustering on the semiconductor substrate image blocks, wherein the result of the evaluation is considered in a clustering process;
each cluster of the semiconductor substrate image blocks forms a segmented region of the input semiconductor substrate image;
wherein evaluating the confidence that two or more adjacent semiconductor substrate image tiles that are spatially adjacent are clustered into the same cluster based on the semiconductor substrate image features of each semiconductor substrate image tile comprises: performing edge extraction on the input semiconductor substrate image to obtain an edge map;
calculating edge loss between adjacent edge blocks corresponding to the adjacent semiconductor substrate image blocks in the edge map;
and evaluating a confidence that the adjacent semiconductor substrate image tiles are clustered into the same cluster based on the edge loss;
the defect positioning module 5 is connected with the main control module 2 and is used for positioning defects of the semiconductor substrate;
the defect evaluation module 6 is connected with the main control module 2 and is used for evaluating defects of the semiconductor substrate;
And the display module 7 is connected with the main control module 2 and is used for displaying the semiconductor substrate image, the positioning information and the defect evaluation result.
As shown in fig. 3, the method for enhancing the substrate image enhancement module provided by the invention is as follows:
s201, acquiring an original semiconductor substrate image; denoising the original semiconductor substrate image; inputting the original semiconductor substrate image into a pre-obtained semiconductor substrate image enhancement network, and enhancing the original semiconductor substrate image step by step to obtain an enhanced semiconductor substrate image corresponding to the original semiconductor substrate image;
the semiconductor substrate image enhancement network comprises at least two stages of sub-networks, the original semiconductor substrate image is used as the input of a first stage sub-network of the semiconductor substrate image enhancement network, the first stage sub-network outputs a first stage node semiconductor substrate image, the node semiconductor substrate image output by each stage of sub-network is used as the input of a next stage of sub-network, the last stage sub-network of the semiconductor substrate image enhancement network outputs a last stage node semiconductor substrate image, and the last stage node semiconductor substrate image is used as the enhanced semiconductor substrate image;
The semiconductor substrate image enhancement network is obtained in advance through the following steps:
acquiring an original semiconductor substrate image sample and a corresponding enhanced semiconductor substrate image sample;
generating a multi-level node semiconductor substrate image sample according to the original semiconductor substrate image sample and the enhanced semiconductor substrate image sample; wherein the number of stages of the multi-stage node semiconductor substrate image sample is one less than the number of stages of the sub-network;
training the semiconductor substrate image enhancement network by taking the original semiconductor substrate image sample, the enhanced semiconductor substrate image sample and the multi-level node semiconductor substrate image sample as training samples to obtain the trained semiconductor substrate image enhancement network; the original semiconductor substrate image sample is used as the training input of a first-stage sub-network, the enhanced sample semiconductor substrate image is used as the training output of a last-stage sub-network, the node semiconductor substrate image sample of each stage is used as the training input of the next-stage sub-network, and the node semiconductor substrate image sample of each stage is used as the training output of the corresponding-stage sub-network.
The semiconductor substrate image enhancement network provided by the invention is a full convolution network, and in a multi-level sub-network, sub-networks of different levels have network parameters which are not identical.
The invention provides an original semiconductor substrate image sample and the enhanced semiconductor substrate image sample, which are used for generating a multi-level node semiconductor substrate image sample, and specifically comprises the following steps:
acquiring a semiconductor substrate image matrix of the original semiconductor substrate image sample and a semiconductor substrate image matrix of the enhanced semiconductor substrate image sample;
inserting a multi-level node semiconductor substrate image matrix between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample; wherein the number of stages of the multi-stage node semiconductor substrate image matrix is one less than the number of stages of the sub-network;
and acquiring corresponding multi-level node semiconductor substrate image samples according to the multi-level node semiconductor substrate image matrix.
The invention provides a multi-level node semiconductor substrate image matrix inserted between a semiconductor substrate image matrix of an original semiconductor substrate image sample and a semiconductor substrate image matrix of an enhanced semiconductor substrate image sample, which specifically comprises the following steps:
And inserting a multi-level node semiconductor substrate image matrix according to a preset gradient change between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample.
The step of obtaining the semiconductor substrate image enhancement network in advance provided by the invention further comprises the following steps:
generating a node characteristic diagram corresponding to each stage of node semiconductor substrate image sample;
inputting the original semiconductor substrate image sample into the semiconductor substrate image enhancement network after training to obtain a tested enhanced semiconductor substrate image sample;
constructing a target loss function of the semiconductor substrate image enhancement network by taking the node characteristic diagram and the tested enhanced semiconductor substrate image sample as function parameters;
and optimizing the training-completed semiconductor substrate image enhancement network according to the target loss function to obtain the optimized semiconductor substrate image enhancement network.
As shown in fig. 4, the defect positioning module positioning method provided by the invention is as follows:
s301, configuring parameters of a defect positioning instrument, and electrically connecting a probe in the defect positioning instrument with a failure sample device of a semiconductor substrate; applying excitation to the failure sample device of the semiconductor substrate to enable defect points to appear;
S302, marking out an identification point at a position close to the defect point by using a probe in the defect positioning instrument; determining the position relation between the identification point and the defect point; and positioning the defect point according to the position of the identification point and the position relation.
In the step of applying excitation to the device of the semiconductor substrate to enable the defect point to appear, when a defect point appears, the step of using the probe in the defect positioning instrument to mark the mark point at the position close to the defect point specifically comprises the following steps:
moving a probe in a defect locator to a position close to the defect point;
marking out a mark point at the position by using the probe;
marking an identification point at the position by using the probe, which specifically comprises the following steps:
marking an identification point at the position by using the probe;
marking an identification point at the position by using the probe, which specifically comprises the following steps:
marking at least two identification points at the position by using the probe;
the determining the position relationship between the identification point and the defect point specifically comprises the following steps:
selecting an identification point closest to the defect point as a target identification point;
determining the position relationship between the target identification point and the defect point;
The determining the position relationship between the identification point and the defect point specifically comprises the following steps:
respectively determining the position relation between the defect point and all the corresponding identification points;
before determining the position relationship between the identification point and the defect point, the method further comprises the following steps:
moving the probe to return to an initial position;
applying excitation to the device of the semiconductor substrate again to make the defect points appear again;
in the step of applying excitation to the device of the semiconductor substrate to enable the defect points to be displayed, when at least two defect points are displayed, the step of using the probe in the defect locator to mark the mark points at the positions close to the defect points specifically comprises the following steps:
moving a probe in the defect locator to a position close to one of the defect points;
marking out a mark point at the position by using the probe;
moving the probe to return to an initial position;
applying excitation to the device of the semiconductor substrate again to make the defect points appear again;
repeating the steps until corresponding identification points are carved for all the defect points.
2. Application example. In order to prove the inventive and technical value of the technical solution of the present invention, this section is an application example on specific products or related technologies of the claim technical solution.
The invention strengthens the original semiconductor substrate image step by step through the semiconductor substrate image strengthening network obtained in advance of the substrate image strengthening module, the first-stage sub-network of the semiconductor substrate image strengthening network strengthens the original semiconductor substrate image to obtain a first-stage node semiconductor substrate image, the subsequent sub-networks sequentially strengthen the semiconductor substrate image of the node semiconductor substrate image obtained by the previous sub-network, the output of the final sub-network obtains a final-stage node semiconductor substrate image, and the final-stage node semiconductor substrate image is used as the corresponding strengthening semiconductor substrate image of the original semiconductor substrate image; meanwhile, the defect location module can accurately locate the defect point of the semiconductor substrate.
It should be noted that the embodiments of the present invention can be realized in hardware, software, or a combination of software and hardware. The hardware portion may be implemented using dedicated logic; the software portions may be stored in a memory and executed by a suitable instruction execution system, such as a microprocessor or special purpose design hardware. Those of ordinary skill in the art will appreciate that the apparatus and methods described above may be implemented using computer executable instructions and/or embodied in processor control code, such as provided on a carrier medium such as a magnetic disk, CD or DVD-ROM, a programmable memory such as read only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The device of the present invention and its modules may be implemented by hardware circuitry, such as very large scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, etc., or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., as well as software executed by various types of processors, or by a combination of the above hardware circuitry and software, such as firmware.
3. Evidence of the effect of the examples. The embodiment of the invention has a great advantage in the research and development or use process, and has the following description in combination with data, charts and the like of the test process.
The invention strengthens the original semiconductor substrate image step by step through the semiconductor substrate image strengthening network obtained in advance of the substrate image strengthening module, the first-stage sub-network of the semiconductor substrate image strengthening network strengthens the original semiconductor substrate image to obtain a first-stage node semiconductor substrate image, the subsequent sub-networks sequentially strengthen the semiconductor substrate image of the node semiconductor substrate image obtained by the previous sub-network, the output of the final sub-network obtains a final-stage node semiconductor substrate image, and the final-stage node semiconductor substrate image is used as the corresponding strengthening semiconductor substrate image of the original semiconductor substrate image; meanwhile, the defect location module can accurately locate the defect point of the semiconductor substrate.
The foregoing is merely illustrative of specific embodiments of the present invention, and the scope of the invention is not limited thereto, but any modifications, equivalents, improvements and alternatives falling within the spirit and principles of the present invention will be apparent to those skilled in the art within the scope of the present invention.
Claims (10)
1. An evaluation system for a defective region of a semiconductor substrate, the evaluation system comprising:
the device comprises a substrate image acquisition module, a main control module, a substrate image enhancement module, an image segmentation module, a defect positioning module, a defect evaluation module and a display module;
the substrate image acquisition module is connected with the main control module and is used for acquiring the image of the semiconductor substrate;
the substrate image acquisition module acquisition method comprises the following steps:
acquiring the current focal length of the camera; determining an overlapped focal length interval to which the current focal length belongs;
judging whether the current focal length is smaller than a preset switching focal length in the overlapped focal length interval or not;
if the zoom range is smaller than the preset zoom range, determining that the short-focus zoom lens is a main lens and the long-focus zoom lens is a slave lens from two lenses corresponding to the two zoom ranges with overlapped focal length ranges;
acquiring a semiconductor substrate image acquired by a main lens;
the main lens is a lens which performs zooming according to zooming parameters received by the camera and acquires images of the semiconductor substrate, and the auxiliary lens is a lens which performs zooming along with the main lens;
zooming from the lens to follow the master lens includes: determining a current zoom value of the slave lens by utilizing a preset zoom tracking curve based on the current zoom value of the zoom motor of the master lens and the current zoom value of the focus motor, and controlling the movement of the zoom motor of the slave lens according to the current zoom value of the slave lens;
The main control module is connected with the substrate image acquisition module, the substrate image enhancement module, the image segmentation module, the defect positioning module, the defect evaluation module and the display module and used for controlling the normal work of each module;
the control method of the main control module comprises the following steps:
acquiring an acquired semiconductor substrate image through a central processing unit, and sending the acquired semiconductor substrate image to a substrate image enhancement module for enhancement processing; feeding back the processed data to the central processing unit;
the central processing unit sends the enhanced image to the image segmentation module to segment the image characteristics, and the segmented image is fed back to the central processing unit;
finally, the central processing unit respectively sends the acquired characteristic images to the defect positioning module and the defect evaluating module for processing;
the CPU temperature control method comprises the following steps:
detecting the real-time temperature of the central processing unit body through a temperature sensor;
when the real-time temperature is greater than or equal to a first preset temperature value, controlling the direct-current power supply to output voltage to the first thermoelectric refrigerator;
when the real-time temperature is smaller than or equal to a second preset temperature value, controlling the direct-current power supply to stop outputting voltage to the first thermoelectric refrigerator, wherein the second preset temperature value is smaller than the first preset temperature value;
When the direct-current power supply outputs voltage to the first thermoelectric refrigerator, if the detected real-time temperature gradually increases, controlling the direct-current power supply to increase the voltage value output to the first thermoelectric refrigerator;
the substrate image enhancement module is connected with the main control module and is used for enhancing the semiconductor substrate image;
the image segmentation module is connected with the main control module and is used for carrying out segmentation processing on the image of the semiconductor substrate;
the image segmentation module segmentation method comprises the following steps:
extracting semiconductor substrate image features of individual semiconductor substrate image tiles in an input semiconductor substrate image, each semiconductor substrate image tile including one or more pixels;
evaluating a confidence that two or more adjacent semiconductor substrate image tiles that are spatially adjacent are clustered into the same cluster based on semiconductor substrate image features of each semiconductor substrate image tile;
and performing sample-based clustering on the semiconductor substrate image blocks, wherein the result of the evaluation is considered in a clustering process;
each cluster of the semiconductor substrate image blocks forms a segmented region of the input semiconductor substrate image;
Wherein evaluating the confidence that two or more adjacent semiconductor substrate image tiles that are spatially adjacent are clustered into the same cluster based on the semiconductor substrate image features of each semiconductor substrate image tile comprises: performing edge extraction on the input semiconductor substrate image to obtain an edge map;
calculating edge loss between adjacent edge blocks corresponding to the adjacent semiconductor substrate image blocks in the edge map;
and evaluating a confidence that the adjacent semiconductor substrate image tiles are clustered into the same cluster based on the edge loss;
the defect positioning module is connected with the main control module and used for positioning defects of the semiconductor substrate;
the defect evaluation module is connected with the main control module and used for evaluating defects of the semiconductor substrate;
the display module is connected with the main control module and used for displaying the image, the positioning information and the defect evaluation result of the semiconductor substrate.
2. The method for evaluating a defective region of a semiconductor substrate according to claim 1, wherein the method for evaluating a defective region of a semiconductor substrate comprises the steps of:
step one, collecting a semiconductor substrate image through a substrate image collecting module;
Step two, the main control module carries out enhancement treatment on the semiconductor substrate image through the substrate image enhancement module;
step three, dividing the semiconductor substrate image through an image dividing module; positioning the defect of the semiconductor substrate through a defect positioning module;
step four, evaluating the defects of the semiconductor substrate through a defect evaluation module; and displaying the semiconductor substrate image, the positioning information and the defect evaluation result through a display module.
3. The system for evaluating a defective area of a semiconductor substrate according to claim 1, wherein the substrate image enhancement module enhancement method is as follows:
(1) Acquiring an original semiconductor substrate image; denoising the original semiconductor substrate image; inputting the original semiconductor substrate image into a pre-obtained semiconductor substrate image enhancement network, and enhancing the original semiconductor substrate image step by step to obtain an enhanced semiconductor substrate image corresponding to the original semiconductor substrate image;
the semiconductor substrate image enhancement network comprises at least two stages of sub-networks, the original semiconductor substrate image is used as the input of a first stage sub-network of the semiconductor substrate image enhancement network, the first stage sub-network outputs a first stage node semiconductor substrate image, the node semiconductor substrate image output by each stage of sub-network is used as the input of a next stage of sub-network, the last stage sub-network of the semiconductor substrate image enhancement network outputs a last stage node semiconductor substrate image, and the last stage node semiconductor substrate image is used as the enhanced semiconductor substrate image;
The semiconductor substrate image enhancement network is obtained in advance through the following steps:
acquiring an original semiconductor substrate image sample and a corresponding enhanced semiconductor substrate image sample;
generating a multi-level node semiconductor substrate image sample according to the original semiconductor substrate image sample and the enhanced semiconductor substrate image sample; wherein the number of stages of the multi-stage node semiconductor substrate image sample is one less than the number of stages of the sub-network;
training the semiconductor substrate image enhancement network by taking the original semiconductor substrate image sample, the enhanced semiconductor substrate image sample and the multi-level node semiconductor substrate image sample as training samples to obtain the trained semiconductor substrate image enhancement network; the original semiconductor substrate image sample is used as the training input of a first-stage sub-network, the enhanced sample semiconductor substrate image is used as the training output of a last-stage sub-network, the node semiconductor substrate image sample of each stage is used as the training input of the next-stage sub-network, and the node semiconductor substrate image sample of each stage is used as the training output of the corresponding-stage sub-network.
4. The system for evaluating a defective area of a semiconductor substrate according to claim 3, wherein the semiconductor substrate image enhancement network is a full convolution network, and in the multi-stage sub-network, sub-networks of different stages have non-identical network parameters.
5. The system for evaluating a defective area of a semiconductor substrate according to claim 3, wherein the original semiconductor substrate image sample and the enhanced semiconductor substrate image sample generate a multi-level node semiconductor substrate image sample, specifically comprising:
acquiring a semiconductor substrate image matrix of the original semiconductor substrate image sample and a semiconductor substrate image matrix of the enhanced semiconductor substrate image sample;
inserting a multi-level node semiconductor substrate image matrix between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample; wherein the number of stages of the multi-stage node semiconductor substrate image matrix is one less than the number of stages of the sub-network;
and acquiring corresponding multi-level node semiconductor substrate image samples according to the multi-level node semiconductor substrate image matrix.
6. The system for evaluating a defective area of a semiconductor substrate according to claim 3, wherein a multi-level node semiconductor substrate image matrix is interposed between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample, specifically:
and inserting a multi-level node semiconductor substrate image matrix according to a preset gradient change between the semiconductor substrate image matrix of the original semiconductor substrate image sample and the semiconductor substrate image matrix of the enhanced semiconductor substrate image sample.
7. The system for evaluating a defective area of a semiconductor substrate according to claim 3, wherein the step of obtaining the semiconductor substrate image enhancement network in advance further comprises:
generating a node characteristic diagram corresponding to each stage of node semiconductor substrate image sample;
inputting the original semiconductor substrate image sample into the semiconductor substrate image enhancement network after training to obtain a tested enhanced semiconductor substrate image sample;
constructing a target loss function of the semiconductor substrate image enhancement network by taking the node characteristic diagram and the tested enhanced semiconductor substrate image sample as function parameters;
And optimizing the training-completed semiconductor substrate image enhancement network according to the target loss function to obtain the optimized semiconductor substrate image enhancement network.
8. The system for evaluating a defective area of a semiconductor substrate according to claim 1, wherein the defect positioning module positioning method is as follows:
1) Configuring parameters of a defect positioning instrument, and electrically connecting a probe in the defect positioning instrument with a failure sample device of the semiconductor substrate; applying excitation to the failure sample device of the semiconductor substrate to enable defect points to appear;
2) Marking out an identification point at a position close to the defect point by using a probe in the defect positioning instrument; determining the position relation between the identification point and the defect point; and positioning the defect point according to the position of the identification point and the position relation.
9. The system for evaluating a defective area of a semiconductor substrate according to claim 8, wherein in the step of applying excitation to the device of the semiconductor substrate to visualize defective points, when one defective point is visualized, the step of using a probe in a defect locator to scribe an identification point at a position close to the defective point, specifically comprises:
Moving a probe in a defect locator to a position close to the defect point;
marking out a mark point at the position by using the probe;
marking an identification point at the position by using the probe, which specifically comprises the following steps:
marking an identification point at the position by using the probe;
marking an identification point at the position by using the probe, which specifically comprises the following steps:
marking at least two identification points at the position by using the probe;
the determining the position relationship between the identification point and the defect point specifically comprises the following steps:
selecting an identification point closest to the defect point as a target identification point;
determining the position relationship between the target identification point and the defect point;
the determining the position relationship between the identification point and the defect point specifically comprises the following steps:
and respectively determining the position relation between the defect point and all the corresponding identification points.
10. The system for evaluating a defective area of a semiconductor substrate according to claim 8, wherein before determining the positional relationship between the identification point and the defective point, further comprising:
moving the probe to return to an initial position;
applying excitation to the device of the semiconductor substrate again to make the defect points appear again;
in the step of applying excitation to the device of the semiconductor substrate to enable the defect points to be displayed, when at least two defect points are displayed, the step of using the probe in the defect locator to mark the mark points at the positions close to the defect points specifically comprises the following steps:
Moving a probe in the defect locator to a position close to one of the defect points;
marking out a mark point at the position by using the probe;
moving the probe to return to an initial position;
applying excitation to the device of the semiconductor substrate again to make the defect points appear again;
repeating the steps until corresponding identification points are carved for all the defect points.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310392900.4A CN116739975A (en) | 2023-04-13 | 2023-04-13 | Method and system for evaluating defect area of semiconductor substrate |
| PCT/CN2023/092877 WO2024119711A1 (en) | 2023-04-13 | 2023-05-09 | Evaluation method and system for defect region of semiconductor substrate |
| LU507699A LU507699B1 (en) | 2023-04-13 | 2023-05-09 | Method and system for evaluating defective area of semiconductor substrate |
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| CN202310392900.4A CN116739975A (en) | 2023-04-13 | 2023-04-13 | Method and system for evaluating defect area of semiconductor substrate |
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| CN (1) | CN116739975A (en) |
| LU (1) | LU507699B1 (en) |
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| CN109102468B (en) * | 2018-06-27 | 2021-06-01 | 广州视源电子科技股份有限公司 | Image enhancement method, device, terminal device and storage medium |
| US10957031B1 (en) * | 2019-09-06 | 2021-03-23 | Accenture Global Solutions Limited | Intelligent defect detection from image data |
| US11151710B1 (en) * | 2020-05-04 | 2021-10-19 | Applied Materials Israel Ltd. | Automatic selection of algorithmic modules for examination of a specimen |
| CN111862067B (en) * | 2020-07-28 | 2021-10-26 | 中山佳维电子有限公司 | Welding defect detection method and device, electronic equipment and storage medium |
| CN115731228B (en) * | 2022-11-30 | 2023-08-18 | 杭州数途信息科技有限公司 | Gold-plated chip defect detection system and method |
| CN115830594A (en) * | 2022-12-02 | 2023-03-21 | 内蒙古农业大学 | Milk somatic cell image recognition method based on machine learning algorithm |
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