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CN116737515B - Flash memory parameter visualization method, system and storage medium - Google Patents

Flash memory parameter visualization method, system and storage medium Download PDF

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Publication number
CN116737515B
CN116737515B CN202310525840.9A CN202310525840A CN116737515B CN 116737515 B CN116737515 B CN 116737515B CN 202310525840 A CN202310525840 A CN 202310525840A CN 116737515 B CN116737515 B CN 116737515B
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data
flash memory
abnormal
displaying
interface
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CN116737515A (en
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苏界伟
曾裕
赖鼐
龚晖
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Zhuhai Miaocun Technology Co ltd
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Zhuhai Miaocun Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/32Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/323Visualisation of programs or trace data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3037Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/048Interaction techniques based on graphical user interfaces [GUI]
    • G06F3/0484Interaction techniques based on graphical user interfaces [GUI] for the control of specific functions or operations, e.g. selecting or manipulating an object, an image or a displayed text element, setting a parameter value or selecting a range
    • G06F3/04842Selection of displayed objects or displayed text elements
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Physics (AREA)
  • Human Computer Interaction (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The embodiment of the application provides a flash memory parameter visualization method, a flash memory parameter visualization system and a storage medium, and belongs to the technical field of flash memories. The method comprises the following steps: displaying a monitoring analysis interface of the flash memory, and displaying flash memory data according to a selected display mode in a left area of the monitoring analysis interface, wherein the flash memory data comprises equipment information and abnormal information; responding to the clicking operation of the equipment information, and displaying basic information of the flash memory data and a real-time running condition diagram in a right area of a monitoring analysis interface; responding to the clicking operation of the abnormal information, and displaying abnormal data of the flash memory data in the right area of the monitoring analysis interface; and responding to the analysis completion operation, and displaying a target analysis result in the right area of the monitoring analysis interface, wherein the target analysis result is used for evaluating the operation condition of the flash memory. The method and the device can provide a convenient and visual interface for real-time operation and abnormality of the flash memory for the developer, obtain a target analysis result for representing the internal operation state of the flash memory, and improve the development efficiency of the developer.

Description

Flash memory parameter visualization method, system and storage medium
Technical Field
The present disclosure relates to the field of flash memory technologies, and in particular, to a flash memory parameter visualization method, system, and storage medium.
Background
A flash translation layer (Flash Translation Layer, FTL) is a layer of connectivity between a storage medium and a device master. In the whole storage system, the FTL plays a role of a "bridge", and converts a logical address sent by a Host (computer, mobile phone, etc.) to a device master (eMMC, SSD) into a physical address written into a storage medium, which is also called address mapping management. When address mapping is carried out, the FTL gives consideration to bad block management, wear balance, address mapping, garbage collection, performance optimization, safety management and the like of the flash memory, so that the operation efficiency of the flash memory is directly influenced by the design of the FTL.
Because the flash memory is a passive device, in the related art, after the design of the FTL is completed in the flash memory, the running state inside the flash memory cannot be intuitively observed, and the abnormality inside the flash memory cannot be timely found, so that the design of the FTL cannot be evaluated according to the flash memory parameters.
Disclosure of Invention
The main purpose of the embodiment of the application is to provide a flash memory parameter visualization method, a flash memory parameter visualization system and a storage medium, which can provide a convenient and visual flash memory real-time operation and abnormal visualization interface for a developer, obtain a target analysis result for representing the internal operation state of the flash memory, and improve the development efficiency of the developer.
To achieve the above object, a first aspect of an embodiment of the present application provides a method for visualizing flash parameters, where the method includes: displaying a monitoring analysis interface of the flash memory, and displaying flash memory data in a left area of the monitoring analysis interface according to a selected display mode, wherein the flash memory data comprises equipment information and abnormal information; responding to the clicking operation of the equipment information, and displaying the basic information of the flash memory data and a real-time running condition diagram in the right side area of the monitoring analysis interface; responding to the abnormal information clicking operation, and displaying abnormal data of the flash memory data in the right area of the monitoring analysis interface; and responding to the analysis completion operation, and displaying a target analysis result in the right side area of the monitoring analysis interface, wherein the target analysis result is used for evaluating the running condition of the flash memory.
In some embodiments, the left area of the monitoring analysis interface comprises a first subarea and a second subarea, the first subarea is displayed above the second subarea, and the flash memory data is preset with a grade label; and displaying the flash memory data in the left area of the monitoring analysis interface according to the selected display mode, wherein the method comprises the following steps: if the display mode is a level display mode, displaying first flash data in the first subarea, and displaying second flash data in the second subarea, wherein the level label of the first flash data is an important label, the level label of the second flash data is a general label, the important label is used for representing that the first flash data is important data, and the general label is used for representing that the second flash data is general data; and if the display mode is an abnormal display mode, displaying third flash memory data in the first subarea, and displaying fourth flash memory data in the second subarea, wherein the abnormal information of the third flash memory data comprises an abnormal identifier, the abnormal information of the fourth flash memory data does not comprise the abnormal identifier, and the abnormal identifier is used for representing the abnormality of the flash memory data.
In some embodiments, the displaying, in response to the device information clicking operation, the basic information of the flash memory data and the real-time running condition diagram in the right area of the monitoring analysis interface includes: responding to equipment information clicking operation, and displaying a current operation interface in a right area of the monitoring analysis interface, wherein the current operation interface is used for displaying current operation information representing the current operation condition of the flash memory; displaying basic information of the flash memory corresponding to the selected equipment information in the current operation interface, wherein the basic information comprises at least one of a flash memory version number, a production date, a historical temperature, a total writing quantity, a total reading quantity and a total starting frequency; displaying a real-time running condition chart for representing the effective data quantity of each flash memory block in the flash memory in the current running interface, wherein the real-time running condition chart prompts the number of the flash memory block which is being written in through a first guide mark, and distinguishes cold data blocks with the erasing times not exceeding an erasing threshold and hot data blocks with the erasing times exceeding the erasing threshold through different color marks; and displaying reserved block information in the current operation interface, wherein the reserved block information comprises reserved block residual quantity of the flash memory, and displaying reserved block alarm information in the current operation interface if the reserved block residual quantity is lower than a preset reserved block threshold value.
In some embodiments, the displaying the abnormal information of the flash memory data in the right area of the monitoring analysis interface in response to the abnormal information clicking operation includes: responding to an abnormal information clicking operation, and displaying a current abnormal data interface in a right area of the monitoring analysis interface, wherein the current abnormal interface is used for displaying current abnormal data representing the current abnormal condition of the flash memory; displaying an abnormal information list in the current abnormal data interface, wherein the abnormal information list comprises current newly added abnormal event data, and the abnormal event data comprises an abnormal number, an abnormal description and an abnormal log; displaying an abnormal bad block list in the current abnormal data interface, wherein the abnormal bad block list comprises flash bad block data which are newly added at present, and the flash bad block data comprise bad block numbers and bad block detail information.
In some embodiments, the displaying the abnormal information of the flash memory data in the right area of the monitoring analysis interface in response to the abnormal information clicking operation further includes: responding to an abnormal information clicking operation, and displaying a historical abnormal data interface in a right area of the monitoring analysis interface, wherein the historical abnormal interface is used for displaying historical abnormal data representing the historical abnormal condition of the flash memory; displaying a downtime information list in the history abnormal data interface, wherein the downtime information list comprises history downtime data, and the history downtime data comprises downtime temperature, downtime instruction address, downtime log and call stack information; displaying a read-write failure information list in the history abnormal data interface, wherein the read-write failure information list comprises history read-write failure data, and the history read-write failure data comprises a read failure page number, a read failure block number, a write failure page number and a write failure block number; displaying an erasure failure information list in the historical abnormal data interface, wherein the erasure failure information list comprises total abnormal power-down times and historical erasure failure data, and the historical erasure failure data comprises erasure failure block numbers; displaying a wear frequency chart in the historical abnormal data interface, prompting a flash memory block number of the maximum wear frequency through a second guide mark, prompting a flash memory block number of the minimum wear frequency through a third guide mark, and displaying wear alarm information in a right side area of the monitoring analysis interface if the difference value between the maximum wear frequency and the minimum wear frequency exceeds a preset wear frequency threshold value.
In some embodiments, the displaying the target analysis result in the right area of the monitoring analysis interface in response to the analysis completion operation includes: responding to the current operation analysis completion operation, and displaying a first score in a right area of the monitoring analysis interface, wherein the first score is used for representing the influence degree of the current operation information on the flash memory; responding to the current abnormality analysis completion operation, and displaying a second score in the right side area of the monitoring analysis interface, wherein the second score is used for representing the influence degree of the current abnormality data on the flash memory; responding to the historical abnormality analysis completion operation, and displaying a third score in the right area of the monitoring analysis interface, wherein the third score is used for representing the influence degree of the historical abnormality data on the flash memory; and responding to the analysis completion operation, and displaying a fourth score in the right area of the monitoring analysis interface, wherein the fourth score is used for representing the comprehensive influence degree of the first score, the second score and the third score on the flash memory.
In some embodiments, the monitoring analysis interface right area further includes a refresh indicator; the responding to the analysis completing operation, after displaying the target analysis result in the right area of the monitoring analysis interface, further comprises: responding to a refreshing confirmation operation, and displaying the real-time running condition diagram obtained in a timing way in the current running interface; and in response to a refresh confirmation operation, displaying the current abnormal data and the historical abnormal data which are obtained at fixed time in the current abnormal interface.
In some embodiments, the monitoring analysis interface left area further includes a data export identifier, the method further comprising: in response to a data export identity selection operation, popping up a first data export interface for pre-displaying the basic information, the real-time running condition map and the abnormal data of the selected flash memory data; and in response to a data export confirmation operation, popping up a second data export interface, and displaying the basic information, the real-time running condition diagram and the abnormal data of the flash memory data confirmed to be exported in the second data export interface.
To achieve the above object, a second aspect of the embodiments of the present application proposes a flash memory parameter visualization system, the system including: the display module is used for displaying a monitoring analysis interface of the flash memory, and displaying flash memory data in a left area of the monitoring analysis interface according to a selected display mode, wherein the flash memory data comprises equipment information and abnormal information; the real-time information module is used for responding to the clicking operation of the equipment information and displaying the basic information and the real-time running condition diagram of the flash memory data in the right side area of the monitoring analysis interface; the abnormal information module is used for responding to the clicking operation of the abnormal information and displaying abnormal data of the flash memory data in the right side area of the monitoring analysis interface; and the result module is used for responding to the analysis completion operation, displaying a target analysis result in the right side area of the monitoring analysis interface, and the target analysis result is used for evaluating the current running condition and the abnormal condition of the flash memory.
To achieve the above object, a third aspect of the embodiments of the present application proposes an electronic device, which includes a memory and a processor, where the memory stores a computer program, and the processor implements the method according to the embodiment of the first aspect when executing the computer program.
To achieve the above object, a fourth aspect of the embodiments of the present application proposes a storage medium, which is a computer-readable storage medium, storing a computer program, which when executed by a processor implements the method according to the embodiment of the first aspect.
The flash memory parameter visualization method, the flash memory parameter visualization system and the storage medium provided by the application, wherein the flash memory parameter visualization method can be applied to the flash memory parameter visualization system. In the flash memory parameter visualization method, firstly, a monitoring analysis interface of a flash memory is displayed, and flash memory data including equipment information and abnormal information is displayed in a left area of the monitoring analysis interface according to a selected display mode; then, responding to the clicking operation of the equipment information, and displaying basic information of the flash memory data and a real-time running condition diagram in a right side area of a monitoring analysis interface, wherein the real-time running condition diagram can enable a developer to clearly know the real-time running condition of the flash memory; then, the developer can click on the abnormal information, at the moment, the abnormal data of the flash memory data are displayed in the right side area of the monitoring analysis interface, so that the developer can clearly know the specific abnormal condition of the corresponding flash memory; and finally, displaying a target analysis result in the right area of the monitoring analysis interface, wherein the target analysis result is used for evaluating the operation condition of the flash memory, and a developer can obtain the operation condition of the flash memory according to the target analysis result. The method and the device can provide a convenient and visual interface for real-time operation and abnormality of the flash memory for the developer, obtain a target analysis result for representing the internal operation state of the flash memory, and improve the development efficiency of the developer.
Drawings
FIG. 1 is a block diagram of a flash parameter based visualization system provided in an embodiment of the present application;
FIG. 2 is an alternative flow chart of a method for visualizing parameters of a flash memory provided in an embodiment of the present application;
FIG. 3 is a flow chart of one implementation of step S101 in FIG. 2;
FIG. 4 is a flow chart of one implementation of step S102 in FIG. 2;
FIG. 5 is a flow chart of one implementation of step S103 in FIG. 2;
FIG. 6 is another implementation flowchart of step S103 in FIG. 2;
FIG. 7 is a schematic diagram of a wear count point provided by an embodiment of the present application;
FIG. 8 is a flow chart of one implementation of step S104 in FIG. 2;
FIG. 9 is a flow chart of one implementation after step S104 in FIG. 2;
FIG. 10 is another alternative flow chart of a method for visualizing parameters of a flash memory provided in an embodiment of the present application;
FIG. 11 is a functional block diagram of a method for visualizing parameters of a flash memory according to an embodiment of the present disclosure;
fig. 12 is a schematic hardware structure of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
It should be noted that although functional block division is performed in a device diagram and a logic sequence is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart. The terms first, second, third and fourth and the like in the description and in the claims and in the above drawings are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the present application.
First, several nouns referred to in this application are parsed:
flash memory, also known as a flash memory chip, is a non-volatile memory chip used to store and transfer data between a personal computer and a digital device, with the ability to electronically reprogram and erase, commonly found in USB flash drives, digital cameras, and solid state drives.
The flash translation layer (Flash Translation Layer, FTL), a component in flash master, maps logical block addresses (Logical Block Address, LBA) from the host to physical block addresses (Physical block address, PBA) on the hard disk. Among various technical algorithms of flash memory, FTL, a flash translation layer, is certainly the most central.
Therefore, verifying the correctness of the FTL technology becomes a key of the FTL technology, because the flash memory is a passive device, in the related art, after the FTL design is completed in the flash memory, the running state inside the flash memory cannot be intuitively observed, and the abnormality inside the flash memory cannot be timely found, so that the FTL design cannot be evaluated according to the flash memory parameters.
Based on the above, the embodiment of the application provides a flash memory parameter visualization method, a flash memory parameter visualization system and a storage medium, which can provide a convenient and visual flash memory real-time operation and abnormal visual interface for a developer, obtain a target analysis result for representing the internal operation state of the flash memory, and improve the development efficiency of the developer.
The embodiment of the invention provides a flash memory parameter visualization method, a system and a storage medium, and specifically, the following embodiment is used for explaining, first, a system frame of the flash memory parameter visualization system in the embodiment of the invention.
As shown in fig. 1, fig. 1 is a frame diagram of a flash parameter-based visualization system according to an embodiment of the present application, where the flash parameter-based visualization system includes a terminal 12 and a device 11. The flash memory chip in the embodiment of the present application may be connected to the terminal 12 by being placed on a device board of the device end 11, where the device board shown in fig. 1 may be a PCB board, and finally, parameters in the flash memory chip are visually displayed through the terminal 12.
The flash memory parameter visualization method in the embodiment of the application can be illustrated by the following embodiment.
In the embodiments of the present application, when related processing is required to be performed according to data related to a user identity or a characteristic, such as user information, user behavior data, user history data, user location information, and the like, permission or consent of the user is obtained first, for example, when data stored by the user and a request for accessing cached data of the user are obtained first. Moreover, the collection, use, processing, etc. of such data would comply with relevant laws and regulations. In addition, when the embodiment of the application needs to acquire the sensitive personal information of the user, the independent permission or independent consent of the user is acquired through a popup window or a jump to a confirmation page or the like, and after the independent permission or independent consent of the user is explicitly acquired, necessary user related data for enabling the embodiment of the application to normally operate is acquired.
As shown in fig. 2, fig. 2 is an optional flowchart of a method for visualizing parameters of a flash memory according to an embodiment of the present application, where the method in fig. 2 may include, but is not limited to, steps S101 to S104.
Step S101, displaying a monitoring analysis interface of the flash memory, and displaying flash memory data in a left area of the monitoring analysis interface according to a selected display mode, wherein the flash memory data comprises equipment information and abnormal information;
in some embodiments, after the FTL design of the flash memory is completed, the flash memory may be connected to the terminal, and parameter details of the flash memory are displayed on the terminal, and illustratively, a monitoring analysis interface of the flash memory is displayed on the terminal, where the monitoring analysis interface is divided into a left display area and a right display area, flash memory data is displayed on a left area of the monitoring analysis interface, and the flash memory data includes device information and exception information, where the device information is unique and is used to indicate a number or a model of the flash memory corresponding to the flash memory data, and meanwhile, the flash memory data is also attached with exception information.
In some embodiments, there may be multiple flash data, and the flash data can be displayed differently in the left area of the monitoring analysis interface. Specifically, according to different selected display modes, the flash memory data can be arranged according to expected display, so that a developer can concentrate on the flash memory data which is more concerned, and on the basis that the flash memory data can be visually displayed, the convenience degree of display is further provided for the developer, so that the method can better assist the developer in developing the flash memory, and the working efficiency of the developer is improved.
Step S102, basic information of flash memory data and a real-time running condition diagram are displayed in a right area of a monitoring analysis interface in response to equipment information clicking operation;
in some embodiments, when clicking on the device information of the flash memory data, the basic information of the clicked flash memory data is displayed in the right area of the monitoring analysis interface, where the basic information is used to characterize the basic data of the corresponding flash memory.
In some embodiments, when clicking on the device information of the flash data, a real-time operation condition map of the clicked flash data can be displayed in the right area of the monitoring and analyzing interface, where the real-time operation condition map characterizes the current operation condition of the corresponding flash memory.
In some embodiments, the real-time running status chart may be a line chart showing the running data amount of each flash memory page in the flash memory, for example, the abscissa of the line chart is the running data amount of each flash memory page, the ordinate is the running data amount of each flash memory page, and a developer can intuitively see the running data amount and trend of each flash memory page in the flash memory from the line chart, and specifically, the lowest section of the line in the line chart indicates that the corresponding flash memory page has a problem. The developer can easily know the running condition of each flash memory page in the flash memory according to the real-time running condition diagram, so that the developer can visualize the design result of the flash memory, and the development efficiency of the developer is improved according to the obtained visualized running result.
Step S103, in response to the clicking operation of the abnormal information, displaying the abnormal information of the flash memory data in the right area of the monitoring analysis interface;
in some embodiments, when the abnormality information of the flash memory data displays the abnormality identifier, it indicates that an abnormality problem occurs in the flash memory during operation, and at this time, the abnormality data of the corresponding flash memory may be displayed in a right area of the monitoring analysis interface by clicking the abnormality information, where the abnormality data includes current abnormality data and historical abnormality data. When the abnormal information of the flash memory data does not display the abnormal mark, the flash memory is indicated that no abnormal condition exists at present, and when the abnormal information is clicked, the abnormal information of the corresponding flash memory can be displayed in the right area of the monitoring analysis interface, but only the historical abnormal data is displayed, and the current abnormal data is displayed as empty. By respectively displaying the current abnormal data and the historical abnormal data, a developer can clearly know the abnormal problems before the flash memory and the current abnormal problems, but not pay attention to the current abnormal problems, and meanwhile, consider the historical abnormal problems, so that the flash memory parameters are comprehensively visualized and displayed.
And step S104, in response to the analysis completion operation, displaying a target analysis result in the right area of the monitoring analysis interface, wherein the target analysis result is used for evaluating the operation condition of the flash memory.
In some embodiments, a target analysis result may be displayed in the right area of the monitoring analysis interface, where the target analysis result refers to an analysis result obtained according to the real-time running condition and the abnormality information of the flash memory, and aims to comprehensively analyze the current condition, the historical abnormality and the current abnormality of the flash memory, and obtain an evaluation of the running condition of the flash memory according to the obtained target analysis result.
As shown in fig. 3, fig. 3 is a flowchart of one implementation of step S101 in fig. 2, and in some embodiments, step S101 may include steps S201 to S202:
step S201, if the display mode is a level display mode, displaying first flash memory data in a first subarea and displaying second flash memory data in a second subarea, wherein the level label of the first flash memory data is an important label, the level label of the second flash memory data is a general label, the important label is used for representing that the first flash memory data is important data, and the general label is used for representing that the second flash memory data is general data;
In some embodiments, the left area of the monitoring analysis interface includes a first sub-area and a second sub-area, the first sub-area is displayed above the second sub-area, and the purpose of displaying the monitoring analysis interface in two areas is to enable flash memory data to be displayed in different areas according to needs of a developer, so that flash memory data which is more focused by the developer can be displayed at the front end of the monitoring analysis interface.
In some embodiments, the flash memory data is preset with a level tag, where the level tag is used to indicate a desired level of the corresponding flash memory, and in practical application, different flash memories have different importance levels. For example, the flash memories bearing core data are often more important, so that important tags can be marked on the flash memories for representing that the flash memories have important positions in all the flash memories, and correspondingly, general tags are marked on other flash memories bearing non-core data for representing that the flash memories have lower importance than the flash memories with important tags. And grading the flash memory through the grade label so as to facilitate the subsequent display of the flash memory data through the grade label.
For example, if the display mode of the flash data is a hierarchical display mode, the flash data with the important tag may be displayed in a first sub-area of the left area of the monitoring analysis interface, and the flash data with the general tag may be displayed in a second sub-area of the left area of the monitoring analysis interface.
Further, on the basis that the display mode is the level display mode, the flash memory data with the abnormality is displayed before the flash memory data without the abnormality. That is, if there is an abnormality in the flash memory data with the important tag displayed in the first sub-area, that is, if the abnormality information of the flash memory data displays the abnormality flag, the display order of the flash memory data will precede the flash memory data in which the abnormality information does not display the abnormality flag.
Step S202, if the display mode is an abnormal display mode, displaying third flash memory data in the first subarea and fourth flash memory data in the second subarea, wherein the abnormal information of the third flash memory data comprises an abnormal identifier, the abnormal information of the fourth flash memory data does not comprise an abnormal identifier, and the abnormal identifier is used for representing the abnormality of the flash memory data.
In some embodiments, each flash memory data has abnormality information, and when the flash memory data has abnormality, the abnormality information displays an abnormality identifier for prompting a developer that the corresponding flash memory has an abnormality problem.
In some embodiments, the abnormal identifier may be in a form of highlighting and often displaying, or the abnormal identifier may be in a strobe prompting manner, so as to prompt a developer that the FTL in the flash memory chip corresponding to the flash memory data may have a defect in design and needs to be processed in time. Compared with the traditional FTL design, a developer can observe the problem only by running the flash memory chip after the design is completed, the invisible flash memory parameters enable the development design to be unable to intuitively verify the reliability, and the problem is often unable to timely and comprehensively know the abnormal problem when the problem occurs.
For example, if the display mode of the flash memory data is an abnormal display mode, the flash memory data including the abnormal identifier may be displayed in the first sub-area of the left area of the monitoring analysis interface, and the flash memory data not including the abnormal identifier may be displayed in the second sub-area of the left area of the monitoring analysis interface.
Further, on the basis that the display mode is the abnormal display mode, the flash memory data with the important tag is displayed before the flash memory data with the general tag. That is, if the abnormal flash data displayed in the first sub-area has an important tag, the flash data will be displayed in the sequence preceding the flash data with a general tag.
In some embodiments, the flash memory data may be further divided into common flash memory data and non-common flash memory data according to the number of clicks of the developer, where the common flash memory data is displayed in the first sub-region, the non-common flash memory data is displayed in the second sub-region, and the more the number of clicks of the history is in the common flash memory data displayed in the first sub-region, the more the display order is.
It should be noted that the flash memory data may be displayed in various manners, and the embodiment of the present application is only described by way of a preferred embodiment, and is not limited in any way.
As shown in fig. 4, fig. 4 is a flowchart of one implementation of step S102 in fig. 2, and in some embodiments, step S102 may include steps S301 to S304:
step S301, responding to a clicking operation of equipment information, and displaying a current operation interface in a right area of a monitoring analysis interface, wherein the current operation interface is used for displaying current operation information representing the current operation condition of a flash memory;
in some embodiments, when the device information of one piece of flash memory data is selected in the left area of the monitoring analysis interface, the current operation interface of the flash memory data can be displayed in the right area of the monitoring analysis interface, and the current operation data corresponding to the flash memory can be displayed in the current operation interface, so that a developer can know the current operation condition of the flash memory in time.
Step S302, displaying basic information of a flash memory corresponding to the selected device information in a current operation interface, wherein the basic information comprises at least one of a flash memory version number, a production date, a historical temperature, a total writing quantity, a total reading quantity and a total starting frequency;
in some embodiments, the basic information of the corresponding flash memory is first displayed in the current running interface, where the basic information characterizes some basic profiles of the corresponding flash memory, including information such as a name, a version number, and a production date of the flash memory, so that a developer can conveniently know the basic condition of the flash memory. For example, displaying the production date of the flash memory in the basic information enables a developer to know the service life of the flash memory so far, and can make a corresponding judgment on the flash memory according to the service life, for example, design problems often occur in the flash memory with the batch of models within a certain production date range can be used as the adjustment basis of development design.
It should be noted that, the basic information of the flash memory displayed in the current running interface may further include parameters such as factory capacity, average reading rate, average tolerance temperature, etc. of the flash memory, and may be specifically set according to the use needs of the developer.
Step S303, displaying a real-time running condition chart for representing the effective data quantity of each flash memory block in the flash memory in a current running interface, wherein the real-time running condition chart prompts the number of the flash memory block being written in through a first guide mark, and distinguishes the cold data block with the erasing frequency not exceeding the erasing threshold and the hot data block with the erasing frequency exceeding the erasing threshold through different color marks;
in some embodiments, the flash memory chip includes flash memory blocks, each of which includes a plurality of flash memory pages, and when a flash memory page is a bad page, the flash memory page is not available, and the remaining operable flash memory pages are referred to as valid data amounts.
In some embodiments, under the condition that the basic information of the flash memory data is displayed in the current operation interface, a real-time operation condition diagram of the flash memory can be displayed in a lower area where the basic information is displayed, wherein the real-time operation condition diagram specifically displays the effective data quantity of each flash memory block, which characterizes the real-time data operation condition of the flash memory, so that a developer can conveniently and intuitively understand the real-time condition of each flash memory block in the flash memory.
In some embodiments, the real-time running condition diagram may be a histogram, and the histogram is used to show that the real-time running condition of the flash memory can be convenient for a developer to understand a large amount of data and the relationship between the data, and on the other hand, the operator can obtain the real-time information of the flash memory data more quickly and intuitively through the visualized symbol.
In some embodiments, the first guide identifier may be a highlight identifier, by which a flash memory block that is being subjected to data operations (including operations such as data reading and data writing) may be identified, and a corresponding flash memory block number is displayed in a highlight display area, so that a developer can conveniently know a logical position of the flash memory block that is being operated, and when an abnormal problem occurs in the flash memory, abnormal information can be located in time according to the flash memory block number, so that the occurring abnormal situation can be solved in time, and development efficiency of the developer is improved.
In some embodiments, a threshold for erasing is preset in the flash memory, and when the number of times of erasing of a flash memory block in the flash memory exceeds the threshold for erasing, the flash memory block is called a hot data block, and the use frequency of the hot data block representing the corresponding flash memory block is higher; when the erasing times of the flash memory blocks in the flash memory do not exceed the erasing threshold value, the flash memory blocks are called cold data blocks, and the use frequency of the cold data blocks representing the corresponding flash memory blocks is low. In the real-time running condition diagram, the hot data block and the cold data block can be distinguished through different color identifiers, so that a developer can conveniently further know the real-time running information of the flash memory.
It should be noted that, the indication manner of the first guiding identifier and the cold and hot data block may also be other manners, and the embodiment of the present application is only described with reference to the preferred embodiment, and is not limited in particular.
Step S304, displaying reserved block information in the current operation interface, wherein the reserved block information comprises reserved block residual quantity of the flash memory, and displaying reserved block alarm information in the current operation interface if the reserved block residual quantity is lower than a preset reserved block threshold value.
In some embodiments, each flash memory includes a reserved block, which is a part of the space reserved in advance for the flash memory, and when all valid flash memory blocks are used, the use of the reserved block is started, and the use of the reserved block indicates that the storage of the flash memory is about to be exhausted, and an abnormal problem is most likely to occur, so that monitoring of the reserved block in the flash memory is necessary.
In some embodiments, the information of the reserved block can be displayed in the current operation interface, the display form of the reserved block information can be in a pie chart form capable of being imaged, meanwhile, a flash memory block threshold value is preset, and when the reserved block allowance in the flash memory is lower than the preset reserved block threshold value, alarm information can be displayed, so that a developer can conveniently know the reserved block condition in the flash memory in time.
It should be noted that, the display form of the reserved block information may be an intuitive digital form or other display forms convenient for the developer to observe, and the embodiment of the present application is only described in a preferred embodiment, and is not particularly limited.
It should be noted that, the reserved block information may be displayed below the real-time running condition chart and checked by using a page scrolling manner, or the reserved block information may be displayed on the left side or the right side of the real-time running condition chart, so that a developer can conveniently check the real-time running condition chart and the reserved block information at the same time. The embodiments of the present application are merely illustrative of preferred embodiments, and are not particularly limited.
As shown in fig. 5, fig. 5 is a flowchart of one implementation of step S103 in fig. 2, and in some embodiments, step S103 may include steps S401 to S403:
step S401, responding to an abnormal information clicking operation, displaying a current abnormal data interface in a right area of a monitoring analysis interface, wherein the current abnormal interface is used for displaying current abnormal data representing the current abnormal condition of the flash memory;
in some embodiments, when clicking on the abnormal information of the flash memory data, a current abnormal data interface may be displayed in a right area of the monitoring analysis interface, where the current abnormal data interface is used to display real-time abnormal problems occurring in the flash memory that are detected in real time. Compared with the situation that the correctness and the abnormality of the flash memory design cannot be verified in the prior art, the abnormal problem of the flash memory can be displayed in real time, so that a developer can intuitively know the abnormal condition of the flash memory through the display of the imaged abnormal problem.
Step S402, displaying an abnormal information list in the current abnormal data interface, wherein the abnormal information list comprises current newly added abnormal event data, and the abnormal event data comprises an abnormal number, abnormal description and an abnormal log;
in some embodiments, if there is an abnormality problem in the flash memory, the newly added abnormal event data is displayed in an abnormal information list in the current abnormal data interface, where the abnormal event data includes a number of an abnormal event, a simple description related to the abnormal event, and an abnormal log related to the abnormal event, where the simple description includes information such as a read abnormality, a write abnormality, and a read-write inconsistency.
Step S403, displaying an abnormal bad block list in the current abnormal data interface, wherein the abnormal bad block list comprises flash bad block data which are newly added at present, and the flash bad block data comprise bad block numbers and bad block detail information.
In some embodiments, an abnormal bad block list may also be displayed in the current abnormal data interface, and when an abnormal bad block exists in the flash memory, specific information of the bad block may be displayed in the abnormal bad block list, where the specific information includes a bad block number and detailed information of the bad block. The abnormal bad block list displays real-time bad block information existing in the currently running flash memory for a developer, so that the developer can know and position the bad blocks of the flash memory in time.
As shown in fig. 6, fig. 6 is another implementation flowchart of step S103 in fig. 2, and in some embodiments, step S103 may further include steps S501 to S505:
step S501, in response to an abnormal information clicking operation, displaying a history abnormal data interface in a right area of a monitoring analysis interface, wherein the history abnormal interface is used for displaying history abnormal data representing history abnormal conditions of a flash memory;
in some embodiments, when clicking on the abnormal information of the flash memory data, a historical abnormal data interface may be displayed in the right area of the monitoring analysis interface, where the historical abnormal data interface is used to display the historical abnormal problems that have occurred in the corresponding flash memory. Under the condition that the monitoring analysis interface can display the current abnormal data, the historical abnormal problem of the flash memory can also be displayed, so that a developer can conveniently analyze the current abnormal data and the historical abnormal data, and a comprehensive analysis judgment basis can be provided for the flash memory.
Step S502, displaying a downtime information list in a history abnormal data interface, wherein the downtime information list comprises history downtime data, and the history downtime data comprises downtime temperature, downtime instruction address, downtime log and call stack information;
In some embodiments, a downtime information list may be displayed on the historical abnormal data interface, and if the downtime behavior exists in the flash memory, relevant downtime information may be displayed in the downtime information list.
Step S503, a read-write failure information list is displayed in a history abnormal data interface, wherein the read-write failure information list comprises history read-write failure data, and the history read-write failure data comprises a read failure page number, a read failure block number, a write failure page number and a write failure block number;
in some embodiments, a read-write failure information list may be displayed on the history abnormal data interface, and if the flash memory has the read-write failure behavior, the related information of the read-write failure may be displayed in the read-write failure information list.
Step S504, displaying an erasure failure information list in the history abnormal data interface, wherein the erasure failure information list comprises total abnormal power failure times and history erasure failure data, and the history erasure failure data comprises erasure failure block numbers;
in some embodiments, a erasure failure information list may be displayed on the historical abnormal data interface, if the erasure failure behavior exists in the flash memory, related erasure failure information, such as abnormal power failure times and historical erasure failure data, may be displayed in the erasure failure information list, where the historical erasure failure data records the minimum erasure failure unit, i.e. the erasure failure block number, so that a developer can conveniently and quickly know and locate the historical erasure abnormal data according to the erasure failure information list.
Step S505, displaying a wear frequency chart in the historical abnormal data interface, prompting a flash memory block number of the maximum wear frequency through a second guide mark, prompting a flash memory block number of the minimum wear frequency through a third guide mark, and displaying wear alarm information in a right area of the monitoring analysis interface if the difference value between the maximum wear frequency and the minimum wear frequency exceeds a preset wear frequency threshold.
In some embodiments, a wear count map may be displayed on the historical abnormal data interface, the wear count of each flash block in the flash memory may be displayed on the wear count map, the flash block number of the maximum wear count may be prompted by the second index identifier, the flash block number of the minimum wear count may be prompted by the third index identifier, where the second index identifier and the third index identifier may be in a highlight form, and the purpose of the second index identifier and the third index identifier is to enable a developer to intuitively observe a peak value of the wear count of the flash memory. And the wear threshold is preset, and when the difference value between the maximum wear frequency and the minimum wear frequency exceeds the wear threshold, the wear alarm information can be displayed for intuitively providing the wear degree condition of the flash memory for the developer.
In some embodiments, as shown in fig. 7, fig. 7 is a dot-like schematic diagram of the wear count provided in the embodiments of the present application, where each dot represents the wear count of each flash memory block, and the maximum wear count and the minimum wear count are highlighted, the dot-like diagram can well observe the wear count value of the flash memory block that is suddenly changed, and when the wear alarm information is displayed, a developer can know that the flash memory has wear unbalance condition at the first time.
As shown in fig. 8, fig. 8 is a flowchart of one implementation of step S104 in fig. 2, and in some embodiments, step S104 may further include steps S601 to S604:
step S601, responding to the current operation analysis completion operation, and displaying a first score in a right area of a monitoring analysis interface, wherein the first score is used for representing the influence degree of current operation information on a flash memory;
in some embodiments, a first score may be displayed in a right region of the monitoring analysis interface, where the first score is obtained from current operating information of the flash memory, and the first score may be indicative of a current operating condition of the flash memory.
For example, since the current running information of the flash memory includes the effective data amount information and the reserved block information, the flash memory may be scored according to the two aspects, for example, a gradient threshold value of the effective data amount is preset, if the current effective data amount of the flash memory is within a first data amount gradient threshold value range, a first effective data sub-score is obtained, and similarly, if the current effective data amount of the flash memory is within a second data amount gradient threshold value range, a second effective data sub-score is obtained; similarly, a gradient threshold of the reserved block may be preset, and if the current reserved block amount of the flash memory is within the gradient threshold range of the first reserved block amount, a quantum score of the first reserved block is obtained.
For example, if a flash memory obtains the second valid data sub-score and the first reserved block quantum score, the second valid data sub-score and the first reserved block quantum score are added to obtain the first score.
In some embodiments, the current running condition of the flash memory may be determined according to the score condition of the first score, for example, a current running condition score rule may be set, where a higher score indicates that the current running condition of the flash memory is better, so that a developer can intuitively obtain the current running condition of the flash memory according to the score.
It should be noted that, the first score may further include other multi-aspect flash related data, and the first score may further assign different weight proportions to the sub-scores of each item, and perform weighted calculation to obtain a final first score. That is, the first score may be calculated in various ways, and the application embodiments are merely illustrative of the preferred embodiments, and are not limited thereto.
Step S602, responding to the current abnormality analysis completion operation, and displaying a second score in the right area of the monitoring analysis interface, wherein the second score is used for representing the influence degree of the current abnormality data on the flash memory;
in some embodiments, a second score can be displayed in a right region of the monitoring analysis interface, wherein the second score is derived from current abnormal data of the flash memory, and the second score can characterize current abnormal conditions of the flash memory.
Illustratively, since the current running information of the flash memory includes the newly added abnormal information and the abnormal bad block information, the flash memory may be scored according to the two aspects, for example, an initial score of the newly added abnormal information is preset, and each time one piece of abnormal information is newly added, a corresponding score is deducted, and a first newly added abnormal sub-score is obtained; similarly, an initial score of the abnormal bad block information may be set in advance, and each time an abnormal bad block information is newly added, a corresponding score is subtracted, and a first abnormal bad block sub-score is obtained.
In some embodiments, if the new abnormal information is an abnormal fault that has occurred in the history of the flash memory, that is, the new abnormal information corresponds to a certain piece of the history abnormal data, an additional deduction sub-score is obtained, and the additional deduction sub-score is used for characterizing that the history abnormal problem of the flash memory is not solved, where the additional deduction sub-score can be displayed separately, so that a developer can know the correctness of the flash memory design conveniently.
In an exemplary embodiment, if the sub-scores obtained by a certain flash memory are a first new abnormal sub-score, a first abnormal bad block sub-score and an additional deducted sub-score, the first new abnormal sub-score and the first abnormal bad block sub-score are added to obtain a second score.
In some embodiments, the current abnormal condition of the flash memory may be determined according to the score condition of the second score, for example, a current abnormal condition score rule may be set, where a higher score indicates that the current abnormal condition of the flash memory is smaller, so that a developer can intuitively obtain the current abnormal condition of the flash memory according to the score.
It should be noted that the second score may further include other multi-aspect flash related data, and the second score may further assign different weight proportions to each sub-score, and perform a weighted calculation to obtain a final second score. That is, the second score may be calculated in various ways, and the application embodiments are merely illustrative of the preferred embodiments, and are not limited thereto.
Step S603, responding to the completion operation of the historical abnormality analysis, and displaying a third score in the right area of the monitoring analysis interface, wherein the third score is used for representing the influence degree of the historical abnormality data on the flash memory;
in some embodiments, a third score can be displayed in the right region of the monitoring analysis interface, wherein the third score is derived from the flash history exception data, and the third score can characterize the flash history exception condition.
For example, since the current operation information of the flash memory includes downtime information, read-write failure information, erasure failure information and wear information, the flash memory may be scored according to these four aspects, for example, an initial score of historical abnormal data is set in advance, a corresponding score is deducted according to the number of the historical abnormal data existing in the flash memory, and a first historical abnormal sub-score is obtained; and scoring the read-write failure information, the erasing failure information and the abrasion information in the same way to obtain a second historical abnormal sub-score, a third historical abnormal sub-score and a fourth historical abnormal sub-score.
Illustratively, the flash memory performs addition calculation on the obtained first historical abnormal sub-score, second historical abnormal sub-score, third historical abnormal sub-score and fourth historical abnormal sub-score to obtain a third score.
In some embodiments, the historical abnormal condition of the flash memory may be determined according to the score condition of the third score, for example, a historical abnormal condition score rule may be set, where a higher specified score indicates that the historical abnormal condition of the flash memory is smaller, so that a developer can intuitively obtain the historical abnormal condition of the flash memory according to the score.
It should be noted that the third score may further include other multi-aspect flash related data, and the third score may further assign different weight proportions to the sub-scores of each item, and perform a weighted calculation to obtain a final third score. That is, the third score may be calculated in various ways, and the application embodiments are merely illustrative of the preferred embodiments, and are not limited thereto.
In step S604, in response to the analysis completion operation, a fourth score is displayed in the right area of the monitoring analysis interface, where the fourth score is used to characterize the comprehensive influence degree of the first score, the second score and the third score on the flash memory.
In some embodiments, different weights may be given to different scores according to the obtained first score, second score and third score, for example, because the current abnormal data of the flash memory has a heavier influence degree, the second score is given a higher weight, and the first score, the second score and the third score are weighted to obtain a fourth score, and the fourth score comprehensively evaluates each operation condition of the flash memory, so that a developer can integrally grasp the comprehensive condition of the flash memory.
As shown in fig. 9, fig. 9 is a flowchart of one implementation after step S104 in fig. 2, and the method in fig. 9 may include, but is not limited to including, step S701 to step S702.
Step S701, responding to refresh confirmation operation, and displaying a real-time operation condition diagram obtained at fixed time in a current operation interface;
in some embodiments, the left area of the monitoring and analyzing interface further includes a data export identifier, and because a set of private protocol is established between the main control and the flash memory, and the main control can acquire internal information from the flash memory at regular time, if the flash memory operation condition at the next moment is to be acquired, a refresh operation must be performed, so that a developer can acquire the internal parameter condition of the flash memory in real time.
In some embodiments, after the refresh is confirmed, a real-time operation condition map after the timing acquisition can be displayed in the current operation interface of the right area of the monitoring analysis interface.
In step S702, current abnormal data and historical abnormal data obtained at regular time are displayed in the current abnormal interface in response to the refresh confirming operation.
In some embodiments, after the refresh is confirmed, the current abnormal data and the historical abnormal data obtained at the time can be displayed in the current abnormal interface of the right area of the monitoring analysis interface.
It can be understood that the method, the system and the storage medium for visualizing the flash memory parameters provided by the embodiment of the application can provide a convenient and visual flash memory real-time operation and abnormality visual interface for a developer, and obtain a target analysis result for representing the internal operation state of the flash memory, and meanwhile, the current operation information representing the current operation state, the current abnormality state and the historical abnormality state, the current abnormality data and the historical abnormality data in the visual interface have various different characters and chart display modes, so that the developer can intuitively and rapidly obtain the operation state of the flash memory through the interface, and further the development efficiency of the developer is improved.
As shown in fig. 10, fig. 10 is another optional flowchart of a method for visualizing parameters of a flash memory according to an embodiment of the present application, where the method in fig. 10 may include, but is not limited to, steps S801 to S802.
Step S801, in response to a data export identifier selection operation, popping up a first data export interface, where the first data export interface is used to pre-display basic information, a real-time running condition diagram and abnormal data of the selected flash memory data;
in some embodiments, the right area of the monitoring analysis interface further includes a data export identifier corresponding to each flash memory, and when the data export identifier is clicked, the first data export interface can be popped up, where the first data export interface can pre-display data content to be exported, so as to avoid misexporting irrelevant data.
Step S802, in response to the data export confirmation operation, popping up a second data export interface, and displaying the basic information, the real-time running condition graph and the abnormal data of the flash memory data confirmed to be exported in the second data export interface.
In some embodiments, after validating the pre-displayed data content, a second data export interface is popped up, wherein the second data export interface is configured to display the data content that was ultimately validated for export, which can facilitate further observation and analysis of the specific flash data by the developer.
As shown in fig. 11, fig. 11 is a schematic diagram of a functional module of a flash memory parameter visualization method provided in an embodiment of the present application, and the embodiment of the present application further provides a flash memory parameter visualization system, which may implement the flash memory parameter visualization method, where the flash memory parameter visualization system includes:
the display module 901 is used for displaying a monitoring analysis interface of the flash memory, displaying flash memory data in a left area of the monitoring analysis interface according to a selected display mode, wherein the flash memory data comprises equipment information and abnormal information, and the abnormal information displays the abnormal information when the flash memory data is abnormal;
the real-time information module 902 is configured to display basic information of the flash memory data and a real-time running condition diagram in a right area of the monitoring analysis interface in response to a device information clicking operation;
the abnormal information module 903 is configured to display abnormal information of the flash memory data in a right area of the monitoring analysis interface in response to the clicking operation of the abnormal information;
and a result module 904, configured to display a target analysis result in a right area of the monitoring analysis interface in response to the analysis completion operation, where the target analysis result is used to evaluate a current operation condition and an abnormal condition of the flash memory.
The specific implementation of the flash memory parameter visualization system is basically the same as the specific embodiment of the above-mentioned flash memory parameter visualization method, and will not be described herein again. On the premise of meeting the requirements of the embodiment of the application, the flash memory parameter visualization system can also be provided with other functional modules so as to realize the flash memory parameter visualization method in the embodiment.
The embodiment of the application also provides electronic equipment, which comprises a memory and a processor, wherein the memory stores a computer program, and the processor realizes the flash memory parameter visualization method when executing the computer program. The electronic equipment can be any intelligent terminal including a tablet personal computer, a vehicle-mounted computer and the like.
As shown in fig. 12, fig. 12 is a schematic hardware structure of an electronic device provided in an embodiment of the present application, where the electronic device includes:
the processor 1001 may be implemented by using a general-purpose CPU (central processing unit), a microprocessor, an application-specific integrated circuit (ApplicationSpecificIntegratedCircuit, ASIC), or one or more integrated circuits, etc. to execute related programs to implement the technical solutions provided by the embodiments of the present application;
the memory 1002 may be implemented in the form of read-only memory (ReadOnlyMemory, ROM), static storage, dynamic storage, or random access memory (RandomAccessMemory, RAM). The memory 1002 may store an operating system and other application programs, and when the technical solutions provided in the embodiments of the present application are implemented by software or firmware, relevant program codes are stored in the memory 1002, and the processor 1001 invokes a flash parameter visualization method to execute the embodiments of the present application;
An input/output interface 1003 for implementing information input and output;
the communication interface 1004 is configured to implement communication interaction between the present device and other devices, and may implement communication in a wired manner (e.g. USB, network cable, etc.), or may implement communication in a wireless manner (e.g. mobile network, WIFI, bluetooth, etc.);
a bus 1005 for transferring information between the various components of the device (e.g., the processor 1001, memory 1002, input/output interface 1003, and communication interface 1004);
wherein the processor 1001, the memory 1002, the input/output interface 1003, and the communication interface 1004 realize communication connection between each other inside the device through the bus 1005.
The embodiment of the application also provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program realizes the flash memory parameter visualization method when being executed by a processor.
The memory, as a non-transitory computer readable storage medium, may be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory remotely located relative to the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The embodiments described in the embodiments of the present application are for more clearly describing the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application, and as those skilled in the art can know that, with the evolution of technology and the appearance of new application scenarios, the technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.
It will be appreciated by those skilled in the art that the technical solutions shown in the figures do not constitute limitations of the embodiments of the present application, and may include more or fewer steps than shown, or may combine certain steps, or different steps.
The above described apparatus embodiments are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Those of ordinary skill in the art will appreciate that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof.
The terms "first," "second," "third," "fourth," and the like in the description of the present application and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that in this application, "at least one (item)" and "a number" mean one or more, and "a plurality" means two or more. "and/or" for describing the association relationship of the association object, the representation may have three relationships, for example, "a and/or B" may represent: only a, only B and both a and B are present, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b or c may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.
In the several embodiments provided in this application, it should be understood that the disclosed systems and methods may be implemented in other ways. For example, the system embodiments described above are merely illustrative, e.g., the division of the above elements is merely a logical functional division, and there may be additional divisions in actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including multiple instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of the various embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing a program.
Preferred embodiments of the present application are described above with reference to the accompanying drawings, and thus do not limit the scope of the claims of the embodiments of the present application. Any modifications, equivalent substitutions and improvements made by those skilled in the art without departing from the scope and spirit of the embodiments of the present application shall fall within the scope of the claims of the embodiments of the present application.

Claims (9)

1. A method for visualizing parameters of a flash memory, the method comprising:
displaying a monitoring analysis interface of the flash memory, and displaying flash memory data in a left area of the monitoring analysis interface according to a selected display mode, wherein the flash memory data comprises equipment information and abnormal information;
responding to the clicking operation of the equipment information, and displaying the basic information of the flash memory data and a real-time running condition diagram in the right side area of the monitoring analysis interface;
responding to the abnormal information clicking operation, and displaying abnormal data of the flash memory data in the right area of the monitoring analysis interface;
responding to the analysis completion operation, and displaying a target analysis result in the right side area of the monitoring analysis interface, wherein the target analysis result is used for evaluating the running condition of the flash memory;
and responding to the abnormal information clicking operation, displaying abnormal data of the flash memory data in a right side area of the monitoring analysis interface, and further comprising:
responding to an abnormal information clicking operation, and displaying a historical abnormal data interface in a right area of the monitoring analysis interface, wherein the historical abnormal data interface is used for displaying historical abnormal data representing the historical abnormal condition of the flash memory;
Displaying a downtime information list in the history abnormal data interface, wherein the downtime information list comprises history downtime data, and the history downtime data comprises downtime temperature, downtime instruction address, downtime log and call stack information;
displaying a read-write failure information list in the history abnormal data interface, wherein the read-write failure information list comprises history read-write failure data, and the history read-write failure data comprises a read failure page number, a read failure block number, a write failure page number and a write failure block number;
displaying an erasure failure information list in the historical abnormal data interface, wherein the erasure failure information list comprises total abnormal power-down times and historical erasure failure data, and the historical erasure failure data comprises erasure failure block numbers;
displaying a wear frequency chart in the historical abnormal data interface, prompting a flash memory block number of the maximum wear frequency through a second guide mark, prompting a flash memory block number of the minimum wear frequency through a third guide mark, and displaying wear alarm information in a right side area of the monitoring analysis interface if the difference value between the maximum wear frequency and the minimum wear frequency exceeds a preset wear frequency threshold value.
2. The method for visualizing parameters of a flash memory according to claim 1, wherein the left area of the monitoring and analyzing interface comprises a first sub-area and a second sub-area, the first sub-area is displayed above the second sub-area, and the flash memory data is preset with a grade label;
and displaying the flash memory data in the left area of the monitoring analysis interface according to the selected display mode, wherein the method comprises the following steps:
if the display mode is a level display mode, displaying first flash data in the first subarea, and displaying second flash data in the second subarea, wherein the level label of the first flash data is an important label, the level label of the second flash data is a general label, the important label is used for representing that the first flash data is important data, and the general label is used for representing that the second flash data is general data;
and if the display mode is an abnormal display mode, displaying third flash memory data in the first subarea, and displaying fourth flash memory data in the second subarea, wherein the abnormal information of the third flash memory data comprises an abnormal identifier, the abnormal information of the fourth flash memory data does not comprise the abnormal identifier, and the abnormal identifier is used for representing the abnormality of the flash memory data.
3. The method for visualizing parameters of a flash memory according to claim 1, wherein said displaying basic information of said flash memory data and a real-time running status map in a right area of said monitoring and analyzing interface in response to a device information clicking operation comprises:
responding to equipment information clicking operation, and displaying a current operation interface in a right area of the monitoring analysis interface, wherein the current operation interface is used for displaying current operation information representing the current operation condition of the flash memory;
displaying basic information of the flash memory corresponding to the selected equipment information in the current operation interface, wherein the basic information comprises at least one of a flash memory version number, a production date, a historical temperature, a total writing quantity, a total reading quantity and a total starting frequency;
displaying a real-time running condition chart for representing the effective data quantity of each flash memory block in the flash memory in the current running interface, wherein the real-time running condition chart prompts the number of the flash memory block which is being written in through a first guide mark, and distinguishes cold data blocks with the erasing times not exceeding an erasing threshold and hot data blocks with the erasing times exceeding the erasing threshold through different color marks;
and displaying reserved block information in the current operation interface, wherein the reserved block information comprises reserved block residual quantity of the flash memory, and displaying reserved block alarm information in the current operation interface if the reserved block residual quantity is lower than a preset reserved block threshold value.
4. The flash parameter visualization method of claim 3, wherein the displaying the abnormal data of the flash data in the right area of the monitoring analysis interface in response to the abnormal information clicking operation comprises:
responding to an abnormal information clicking operation, and displaying a current abnormal data interface in a right area of the monitoring analysis interface, wherein the current abnormal data interface is used for displaying current abnormal data representing the current abnormal condition of the flash memory;
displaying an abnormal information list in the current abnormal data interface, wherein the abnormal information list comprises current newly added abnormal event data, and the abnormal event data comprises an abnormal number, an abnormal description and an abnormal log;
displaying an abnormal bad block list in the current abnormal data interface, wherein the abnormal bad block list comprises flash bad block data which are newly added at present, and the flash bad block data comprise bad block numbers and bad block detail information.
5. The method of claim 4, wherein displaying the target analysis result in the right area of the monitoring analysis interface in response to the analysis completion operation comprises:
responding to the current operation analysis completion operation, and displaying a first score in a right area of the monitoring analysis interface, wherein the first score is used for representing the influence degree of the current operation information on the flash memory;
Responding to the current abnormality analysis completion operation, and displaying a second score in the right side area of the monitoring analysis interface, wherein the second score is used for representing the influence degree of the current abnormality data on the flash memory;
responding to the historical abnormality analysis completion operation, and displaying a third score in the right area of the monitoring analysis interface, wherein the third score is used for representing the influence degree of the historical abnormality data on the flash memory;
and responding to the analysis completion operation, and displaying a fourth score in the right area of the monitoring analysis interface, wherein the fourth score is used for representing the comprehensive influence degree of the first score, the second score and the third score on the flash memory.
6. The method for visualizing the parameters of the flash memory according to claim 4, wherein the right area of the monitoring and analyzing interface further comprises a refresh identifier;
the responding to the analysis completing operation, after displaying the target analysis result in the right area of the monitoring analysis interface, further comprises:
responding to a refreshing confirmation operation, and displaying the real-time running condition diagram obtained in a timing way in the current running interface;
and responding to a refresh confirmation operation, and displaying the current abnormal data and the historical abnormal data which are obtained at fixed time in the current abnormal data interface.
7. The method of claim 1, wherein the left region of the monitoring analysis interface further comprises a data export identifier, the method further comprising:
in response to a data export identity selection operation, popping up a first data export interface for pre-displaying the basic information, the real-time running condition map and the abnormal data of the selected flash memory data;
and in response to a data export confirmation operation, popping up a second data export interface, and displaying the basic information, the real-time running condition diagram and the abnormal data of the flash memory data confirmed to be exported in the second data export interface.
8. A flash memory parameter visualization system, the system comprising:
the display module is used for displaying a monitoring analysis interface of the flash memory, and displaying flash memory data in a left area of the monitoring analysis interface according to a selected display mode, wherein the flash memory data comprises equipment information and abnormal information;
the real-time information module is used for responding to the clicking operation of the equipment information and displaying the basic information and the real-time running condition diagram of the flash memory data in the right side area of the monitoring analysis interface;
The abnormal information module is used for responding to the clicking operation of the abnormal information and displaying abnormal data of the flash memory data in the right side area of the monitoring analysis interface;
the result module is used for responding to the analysis completion operation, displaying a target analysis result in the right side area of the monitoring analysis interface, wherein the target analysis result is used for evaluating the current running condition and abnormal condition of the flash memory;
and responding to the abnormal information clicking operation, displaying abnormal data of the flash memory data in a right side area of the monitoring analysis interface, and further comprising:
responding to an abnormal information clicking operation, and displaying a historical abnormal data interface in a right area of the monitoring analysis interface, wherein the historical abnormal data interface is used for displaying historical abnormal data representing the historical abnormal condition of the flash memory;
displaying a downtime information list in the history abnormal data interface, wherein the downtime information list comprises history downtime data, and the history downtime data comprises downtime temperature, downtime instruction address, downtime log and call stack information;
displaying a read-write failure information list in the history abnormal data interface, wherein the read-write failure information list comprises history read-write failure data, and the history read-write failure data comprises a read failure page number, a read failure block number, a write failure page number and a write failure block number;
Displaying an erasure failure information list in the historical abnormal data interface, wherein the erasure failure information list comprises total abnormal power-down times and historical erasure failure data, and the historical erasure failure data comprises erasure failure block numbers;
displaying a wear frequency chart in the historical abnormal data interface, prompting a flash memory block number of the maximum wear frequency through a second guide mark, prompting a flash memory block number of the minimum wear frequency through a third guide mark, and displaying wear alarm information in a right side area of the monitoring analysis interface if the difference value between the maximum wear frequency and the minimum wear frequency exceeds a preset wear frequency threshold value.
9. A computer readable storage medium storing a computer program, characterized in that the computer program, when executed by a processor, implements the flash memory parameter visualization method of any one of claims 1 to 7.
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