CN116705605A - Silicon-based gallium nitride HEMT device and preparation method thereof - Google Patents

Abstract

The disclosure relates to a silicon-based gallium nitride HEMT device and a preparation method thereof, wherein the method comprises the following steps: ion implantation is carried out on the N-type conductive silicon carbide substrate; performing insulation treatment on the surface of the N-type conductive silicon carbide substrate subjected to ion implantation to obtain an N-type conductive silicon carbide substrate subjected to insulation treatment; obtaining a silicon substrate; bonding the silicon substrate and the N-type conductive silicon carbide substrate subjected to insulation treatment, and stripping the bonded composite substrate to obtain a composite silicon-based substrate; performing insulation treatment on the surface of the composite silicon-based substrate to obtain the composite silicon-based substrate after insulation treatment; a gallium nitride film is epitaxially grown on the surface of the composite silicon-based substrate after the insulation treatment; and preparing an HEMT device layer on the surface of the gallium nitride film to obtain the silicon-based gallium nitride HEMT device. The preparation method of the silicon-based gallium nitride HEMT device can reduce the preparation cost and enlarge the size of the silicon-based gallium nitride HEMT device.

Description

A silicon-based gallium nitride HEMT device and its preparation method

technical field

The present disclosure relates to the technical field of semiconductors, in particular to a silicon-based gallium nitride HEMT device and a preparation method thereof.

Background technique

Due to the wide bandgap characteristics of GaN itself, GaN power devices have lower energy loss and smaller volume under the same operating voltage and power conditions compared with the current market-leading silicon-based semiconductor power devices. As well as higher operating voltage and higher power and operating frequency. The relatively mature and feasible GaN thin-film preparation technology in the current industry is the Metal Organic Chemical Vapor Deposition (MOCVD) epitaxy technology. The substrates commonly used in the industry are silicon carbide, sapphire and single crystal silicon.

The current technology for GaN RF devices is achieved by heteroepitaxy of high-quality GaN device layers on semi-insulating silicon carbide with <0001> orientation. However, the cost of semi-insulating silicon carbide is not only too high to be applied on a large scale, but also the growth, cutting, grinding and polishing of semi-insulating silicon carbide are difficult, and it is difficult to expand the diameter to 8 or 12 inches, which has greatly reduced the cost of GaN RF devices. Big hindrance.

Contents of the invention

The present disclosure provides a silicon-based gallium nitride HEMT device and a preparation method thereof, and the technical solution of the present disclosure is as follows:

According to a first aspect of an embodiment of the present disclosure, there is provided a method for fabricating a GaN-on-Si HEMT device, including:

Obtain an N-type conductive silicon carbide substrate;

Perform ion implantation on the N-type conductive silicon carbide substrate to obtain the N-type conductive silicon carbide substrate after ion implantation; the N-type conductive silicon carbide substrate after ion implantation includes the silicon carbide film, the defect layer formed by ion implantation and the remaining SiC substrate;

The surface of the N-type conductive silicon carbide substrate after ion implantation is subjected to insulation treatment to obtain the N-type conductive silicon carbide substrate after the insulation treatment; the N-type conductive silicon carbide substrate after the insulation treatment sequentially includes a first insulating layer, a carbonized Silicon film, defect layer and remaining silicon carbide substrate;

Obtain a silicon substrate; the silicon substrate is a high-resistance silicon substrate or an intrinsic silicon substrate;

Bond the silicon substrate with the N-type conductive carbon-silicon substrate after insulation treatment and the silicon substrate with insulation treatment, and peel off the bonded composite substrate to obtain a composite silicon-based substrate; the composite silicon-based substrate The bottom sequentially includes a silicon substrate, a first insulating layer and a silicon carbide film;

performing insulation treatment on the surface of the composite silicon-based substrate to obtain the composite silicon-based substrate after the insulation treatment;

Epitaxial gallium nitride film on the surface of the composite silicon-based substrate after insulation treatment;

A HEMT device layer is prepared on the surface of the gallium nitride film to obtain a silicon-based gallium nitride HEMT device.

In some possible embodiments, performing ion implantation on an N-type conductive silicon carbide substrate includes:

At least one implanting element among hydrogen and helium is used to perform ion implantation on the N-type conductive silicon carbide substrate, the implantation dose is 1E16/cm2-1E18/cm2, and the implantation energy is 20keV-500keV.

In some possible embodiments, the insulating treatment is performed on the surface of the N-type conductive silicon carbide substrate after ion implantation, including:

At least one implanting element among boron and aluminum is used to perform reverse doping on the surface of the N-type conductive silicon carbide substrate after ion implantation, the implantation dose is 1E16-1E19/cm2, and the implantation energy is 5keV-30keV.

In some possible embodiments, the silicon substrate is bonded to the N-type conductive silicon carbide substrate after insulation treatment, and the bonded composite substrate is peeled off to obtain the composite silicon-based substrate. Before the surface of the silicon-based substrate is subjected to insulation treatment, it also includes:

Annealing is performed on the composite silicon-based substrate to activate the first insulating layer. The annealing temperature is 1300-1370° C., and the annealing time is 3-6 hours; wherein, the annealing time is inversely proportional to the annealing temperature.

In some possible embodiments, before annealing the composite silicon-based substrate to activate the first insulating layer, the method further includes:

Protect the composite silicon-based substrate with a carbon film; the thickness of the carbon film is 100-1000nm, and the carbon film thickness is inversely proportional to the annealing temperature and annealing pressure.

In some possible embodiments, after annealing the composite silicon-based substrate to activate the first insulating layer, further comprising:

The residual carbon film on the surface of the annealed composite silicon-based substrate is removed by dry etching.

In some possible embodiments, after obtaining the silicon substrate, before bonding the silicon substrate to the insulatingly treated N-type conductive silicon carbide substrate, further includes:

At least one implanting element among boron and aluminum is used to perform ion implantation on the surface of the silicon substrate, the implantation dose is 1E16-1E19/cm2, and the implantation energy is 5keV-30keV.

In some possible embodiments, after the bonded composite substrate is peeled off to obtain the composite silicon-based substrate, the surface of the composite silicon-based substrate is subjected to insulation treatment to obtain the composite silicon-based substrate after the insulation treatment Previously, also included:

The surface of the composite silicon-based substrate is polished, and the silicon carbide film with a thickness of 100-300 nm on the surface is removed to obtain a polished composite silicon-based substrate.

In some possible embodiments, insulation treatment is performed on the surface of the composite silicon-based substrate to obtain a composite silicon-based substrate after insulation treatment, including:

Perform H ion implantation on the surface of the composite silicon-based substrate to form a second insulating layer on the surface of the silicon carbide film to obtain a composite silicon-based substrate after insulation treatment; the composite silicon-based substrate after insulation treatment includes the silicon substrate in turn , a first insulating layer, a silicon carbide film and a second insulating layer.

According to the second aspect of the embodiments of the present disclosure, a GaN-on-Si HEMT device is provided, which is manufactured by the above-mentioned method for manufacturing a GaN-on-Si HEMT device.

The technical solutions provided by the embodiments of the present disclosure bring at least the following beneficial effects:

A method for preparing a silicon-based gallium nitride HEMT device according to an embodiment of the present disclosure. On the one hand, the method of transferring a high-quality N-type conductive silicon carbide film to a low-cost silicon substrate can reduce the cost of preparing a gallium nitride HEMT device. The cost of the substrate, and the high-quality N-type conductive silicon carbide substrate can be recycled and reused, which can improve the utilization rate of materials; on the other hand, due to the large wafer size of the N-type conductive silicon carbide substrate, Therefore, by performing the first insulation treatment on the N-type conductive silicon carbide film, and then performing the second insulation treatment on the surface of the growing gallium nitride, the growth diameter of gallium nitride can be expanded to 8 inches, which helps to improve silicon The fabrication yield of GaN-based HEMT devices.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure.

Description of drawings

The accompanying drawings here are incorporated into the specification and constitute a part of the specification, show embodiments consistent with the disclosure, and are used together with the description to explain the principle of the disclosure, and do not constitute an improper limitation of the disclosure.

FIG. 1 is a flow chart of a method for manufacturing a gallium nitride-on-silicon HEMT device according to an exemplary embodiment;

2A-2H are schematic diagrams showing a fabrication process of a GaN-on-Si HEMT device according to an exemplary embodiment.

Detailed ways

In order to enable ordinary persons in the art to better understand the technical solutions of the present disclosure, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings.

It should be noted that the terms "first" and "second" in the specification and claims of the present disclosure and the above drawings are used to distinguish similar first objects, and not necessarily used to describe a specific order or sequence order. It is to be understood that the data so used are interchangeable under appropriate circumstances such that the embodiments of the disclosure described herein can be practiced in sequences other than those illustrated or described herein. The implementations described in the following exemplary examples do not represent all implementations consistent with the present disclosure. Rather, they are merely examples consistent with aspects of the disclosure as recited in the appended claims.

The embodiment of the present disclosure provides a method for manufacturing a GaN HEMT device on silicon, which can realize low-cost preparation of a GaN HEMT device, and can also expand the size to 8 inches, thereby improving the yield rate of the device.

Please refer to FIG. 1 and FIG. 2A to FIG. 2I. FIG. 1 is a schematic flow chart of a silicon-based GaN HEMT device manufacturing method provided by an embodiment of the present disclosure, and FIG. 2A to FIG. 2I are a silicon Schematic diagram of the fabrication method of GaN-based HEMT devices;

As shown in FIG. 1 , a method for fabricating a GaN-on-Si HEMT device provided by an embodiment of the present disclosure may include the following steps:

S101: Obtain an N-type conductive silicon carbide substrate.

Specifically, as shown in FIG. 2A , first obtain a SiC silicon carbide substrate 201; the SiC substrate 201 adopts a high-quality single-crystal silicon carbide substrate with N-type conductivity. Compared with a semi-insulating silicon carbide substrate, an N-type conductivity The silicon carbide substrate has a larger wafer size, which helps to achieve GaN growth expansion to 8 inches.

S103: Perform ion implantation on the N-type conductive silicon carbide substrate to obtain an N-type conductive silicon carbide substrate after ion implantation.

Wherein, the N-type conductive silicon carbide substrate after ion implantation sequentially includes a silicon carbide film, a defect layer formed by ion implantation and the remaining silicon carbide substrate.

Optionally, at least one implanting element among hydrogen and helium is used to perform ion implantation on the N-type conductive silicon carbide substrate, the implantation dose is 1E16/cm2-1E18/cm2, and the implantation energy is 20keV-500keV.

Specifically, as shown in FIG. 2B , H ion implantation is performed on SiC substrate 201 to obtain SiC substrate 201a after H ion implantation; SiC substrate 201a after ion implantation includes SiC thin film 2011, defect layer, 2012 and remaining SiC substrate 2013.

S105: performing insulation treatment on the surface of the ion-implanted N-type conductive silicon carbide substrate to obtain an N-type conductive silicon carbide substrate after the insulation treatment.

Wherein, the N-type conductive silicon carbide substrate after insulation treatment sequentially includes a first insulating layer, a silicon carbide film, a defect layer and a remaining silicon carbide substrate.

Optionally, S105 may specifically include: performing inverse doping on the surface of the N-type conductive silicon carbide substrate after ion implantation by using at least one implanting element among boron and aluminum, with an implant dose of 1E16-1E19/cm2, implanting The energy is 5keV～30keV.

Specifically, as shown in FIG. 2C , the surface of the SiC substrate 201a is inversely doped with Al ions, and a first insulating layer 2014 is formed on the surface to obtain an inversely doped SiC substrate 201b. Here, the purpose of inverse doping is to insulate the surface of the conductive SiC film 2011 to achieve an insulating state on the bonding surface, which can improve the impedance of the SiC film 2014 and prevent the power of the upper HEMT device layer from leaking downward.

S107: Obtain a silicon substrate.

Specifically, as shown in FIG. 2D , a Si substrate 202 is obtained; the Si substrate 202 may be a high-resistance silicon substrate or an intrinsic silicon substrate.

Optionally, after step S107 and before step S109, the method in this embodiment of the disclosure may further include the following steps:

S108: Using at least one implanting element selected from boron and aluminum, perform ion implantation on the surface of the silicon substrate, the implantation dose is 1E16-1E19/cm2, and the implantation energy is 5keV-30keV.

In step S108, the purpose of performing ion implantation on the surface of the silicon substrate is also to realize the insulating state of the bonding surface; specifically, when performing ion implantation on the surface of the silicon substrate, the above-mentioned inversion method for the SiC substrate can be used. Doping with the same implanted elements for optimum insulation.

S109: Bond the silicon substrate to the N-type conductive silicon carbide substrate after the insulation treatment, and perform a peeling treatment on the bonded composite substrate to obtain a composite silicon-based substrate.

Wherein, the composite silicon-based substrate sequentially includes a silicon substrate, a first insulating layer and a silicon carbide film.

Specifically, in this step, as shown in FIG. 2E , the Si substrate 202 and the SiC substrate 201b after inversion doping are directly bonded in a vacuum environment to obtain a composite substrate 300; and then the composite substrate 300 Perform a lift-off process, specifically remove the defect layer 2012 so that the remaining SiC substrate is detached from the composite substrate 300 to obtain a composite silicon-based substrate 400, the composite silicon-based substrate 400 sequentially includes a Si substrate 202, a first insulating layer 2014 and SiC film 2011.

Here, for the remaining SiC substrate 2013 after peeling, it can also be recycled through the following recycling steps so as to be subsequently used for the preparation of other devices. Specifically, the recovery step may include: performing thermal oxidation on the remaining silicon carbide substrate after peeling, and wet oxidation in a pure oxygen environment at 1300°C for 2 to 5 hours; then using HF to remove the oxide layer, and then using fine polishing to remove the carbonized The silicon carbide film with a thickness not exceeding 500nm is removed from the surface of the silicon substrate.

Optionally, after step S109 and before step S111, the method in this embodiment of the present disclosure may further include:

S100: Perform annealing treatment on the composite silicon-based substrate to activate the first insulating layer, the annealing temperature is 1300-1370° C., and the annealing time is 3-6 hours; wherein, the annealing time is inversely proportional to the annealing temperature.

Further, before the annealing treatment, the composite silicon-based substrate can be protected by a carbon film; the thickness of the carbon film is 100-1000 nm, and the carbon film thickness is inversely proportional to the annealing temperature and annealing pressure. Correspondingly, after annealing the composite silicon-based substrate, dry etching is used to remove the residual carbon film on the surface of the composite silicon-based substrate.

Optionally, before the next step S111, the surface of the composite silicon-based substrate may also be polished to obtain a polished composite silicon-based substrate. Here, considering that the peeling may cause damage to the SiC film 2011 on the surface, a certain thickness of the SiC film 2011 on the surface is removed by polishing, and the thickness may be in the range of 100-300 nm.

S111: Perform insulation treatment on the surface of the composite silicon-based substrate to obtain a composite silicon-based substrate after insulation treatment.

Specifically, as shown in FIG. 2F, H ion implantation is performed on the surface of the composite silicon-based substrate 400, and a second insulating layer 203 is formed on the surface of the SiC film 2011 to obtain a composite silicon-based substrate 400a after insulation treatment; insulation treatment The final composite silicon-based substrate 400 a includes a Si substrate 202 , a first insulating layer 2014 , a SiC thin film 2011 and a second insulating layer 203 in sequence.

Here, H ion implantation is used to insulate the surface of the composite silicon-based substrate without implanting inversion-doped elements, which can avoid element contamination caused by inversion-doped elements to the GaN epitaxy process.

S113: epitaxial gallium nitride thin film on the surface of the composite silicon-based substrate after insulation treatment.

Specifically, as shown in FIG. 2G , a GaN thin film 204 is epitaxially grown on the surface of the processed composite silicon-based substrate 400 a. Wherein, the GaN thin film 204 has a thickness of 10-20 μm.

S115: preparing a HEMT device layer on the surface of the gallium nitride film to obtain a silicon-based gallium nitride HEMT device.

Specifically, as shown in FIG. 2H , when preparing the HEMT device layer 205, a GaN channel layer 2051, an _AlxGaxN barrier layer 2052 and a dielectric layer 2053 are sequentially deposited on the surface of the GaN film 204, and then the _dielectric layer A source electrode, a gate electrode and a drain electrode are formed on 2053, thus completing the preparation of the HEMT device layer 205, and finally obtaining a GaN-on-Si HEMT device.

The embodiment of the present disclosure provides a method for preparing a silicon-based gallium nitride HEMT device. On the one hand, by transferring a high-quality N-type conductive silicon carbide film to a low-cost silicon substrate, the cost of preparing a gallium nitride HEMT device can be reduced. The cost of the substrate is required, and the high-quality N-type conductive silicon carbide substrate can be recycled and reused, which can improve the utilization rate of materials; on the other hand, due to the large wafer size of the N-type conductive silicon carbide substrate , so that by performing the first insulation treatment on the N-type conductive silicon carbide film, and then performing the second insulation treatment on the surface of the growing gallium nitride, the growth diameter of gallium nitride can be expanded to 8 inches, which helps to improve Fabrication yield of GaN-on-Si HEMT devices.

In addition, an embodiment of the present disclosure also provides a GaN-on-Si HEMT device, which is prepared by the method for manufacturing a GaN-on-Si HEMT device in the above embodiment.

It should be noted that the gallium nitride-on-silicon HEMT device and the fabrication method of the gallium nitride-on-silicon HEMT device in the embodiment of the present disclosure are based on the same application idea.

Other embodiments of the present disclosure will be readily apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any modification, use or adaptation of the present disclosure, and these modifications, uses or adaptations follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field not disclosed in the present disclosure . The specification and examples are to be considered exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It should be understood that the present disclosure is not limited to the precise constructions which have been described above and shown in the drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims (10)

1. A silicon-based gallium nitride HEMT device preparation method, characterized in that, comprising: Obtain an N-type conductive silicon carbide substrate; Perform ion implantation on the N-type conductive silicon carbide substrate to obtain an N-type conductive silicon carbide substrate after ion implantation; the N-type conductive silicon carbide substrate after the ion implantation sequentially includes a silicon carbide film, an ion-implanted defect layer and remaining silicon carbide substrate; Insulating the surface of the N-type conductive silicon carbide substrate after the ion implantation to obtain the N-type conductive silicon carbide substrate after the insulation treatment; the N-type conductive silicon carbide substrate after the insulation treatment includes the first an insulating layer, the silicon carbide thin film, the defect layer, and the remaining silicon carbide substrate; Obtain a silicon substrate; the silicon substrate is a high-resistance silicon substrate or an intrinsic silicon substrate; bonding the silicon substrate to the N-type conductive silicon carbide substrate after the insulation treatment, and performing peeling treatment on the bonded composite substrate to obtain a composite silicon-based substrate; the composite silicon-based substrate sequentially comprising the silicon substrate, the first insulating layer and the silicon carbide film; performing insulation treatment on the surface of the composite silicon-based substrate to obtain a composite silicon-based substrate after insulation treatment; epitaxial gallium nitride film on the surface of the composite silicon-based substrate after the insulation treatment; A HEMT device layer is prepared on the surface of the gallium nitride film to obtain a silicon-based gallium nitride HEMT device. 2. The method for preparing a GaN-on-Si HEMT device according to claim 1, wherein the ion implantation of the N-type conductive silicon carbide substrate comprises: Using at least one implanting element among hydrogen and helium to perform ion implantation on the N-type conductive silicon carbide substrate, the implantation dose is 1E16/cm2-1E18/cm2, and the implantation energy is 20keV-500keV. 3. The method for preparing a GaN-on-Si HEMT device according to claim 1, wherein the insulating treatment is performed on the surface of the N-type conductive silicon carbide substrate after the ion implantation, comprising: At least one implanting element among boron and aluminum is used to perform reverse doping on the surface of the N-type conductive silicon carbide substrate after the ion implantation, the implantation dose is 1E16-1E19/cm2, and the implantation energy is 5keV-30keV. 4. The GaN-on-Silicon HEMT device preparation method according to claim 1 or 3, wherein the silicon substrate is bonded to the N-type conductive silicon carbide substrate after the insulation treatment , carrying out peeling treatment to the bonded composite substrate, after obtaining the composite silicon-based substrate, before the insulating treatment is carried out on the surface of the composite silicon-based substrate, it also includes: Annealing is performed on the composite silicon-based substrate to activate the first insulating layer. The annealing temperature is 1300-1370° C., and the annealing time is 3-6 hours; wherein, the annealing time is inversely proportional to the annealing temperature. 5. The method for preparing GaN-on-Si HEMT device according to claim 4, characterized in that, before annealing the composite silicon-based substrate to activate the first insulating layer, further comprising: The composite silicon-based substrate is protected by a carbon film; the thickness of the carbon film is 100-1000 nm, and the thickness of the carbon film is inversely proportional to the annealing temperature and annealing pressure. 6. The method for preparing GaN-on-Si HEMT device according to claim 5, characterized in that, after annealing the composite silicon-based substrate to activate the first insulating layer, further comprising: The residual carbon film on the surface of the annealed composite silicon-based substrate is removed by dry etching. 7. The method for preparing GaN-on-Silicon HEMT device according to claim 1, characterized in that, after said obtaining the silicon substrate, said silicon substrate and said insulating treated N-type conductive carbonized Before the silicon substrate is bonded, it also includes: At least one implanting element among boron and aluminum is used to perform ion implantation on the surface of the silicon substrate, the implantation dose is 1E16-1E19/cm2, and the implantation energy is 5keV-30keV. 8. The method for preparing GaN-on-Si HEMT device according to claim 1, characterized in that, after the bonded composite substrate is peeled off, after the composite silicon-based substrate is obtained, the composite substrate is obtained. Insulation treatment is carried out on the surface of the composite silicon-based substrate, and before obtaining the composite silicon-based substrate after the insulation treatment, it also includes: The surface of the composite silicon-based substrate is polished, and the silicon carbide film with a thickness of 100-300 nm on the surface is removed to obtain a polished composite silicon-based substrate. 9. The method for preparing GaN-on-Si HEMT device according to claim 8, characterized in that, the surface of the composite silicon-based substrate is subjected to insulation treatment to obtain the composite silicon-based substrate after the insulation treatment, include: Implanting H ions on the surface of the composite silicon-based substrate to form a second insulating layer on the surface of the silicon carbide film to obtain the composite silicon-based substrate after the insulation treatment; the composite silicon substrate after the insulation treatment The base substrate sequentially includes a silicon substrate, the first insulating layer, the silicon carbide film and the second insulating layer. 10. A gallium nitride-on-silicon HEMT device, characterized in that it is prepared by the method for preparing a gallium nitride-on-silicon HEMT device according to any one of claims 1-9.