CN116111569A

CN116111569A - Circuit system applied to hardware circuit board

Info

Publication number: CN116111569A
Application number: CN202211400774.4A
Authority: CN
Inventors: 王毅; 文健; 朱明焕
Original assignee: Guangzhou Boguan Information Technology Co Ltd
Current assignee: Guangzhou Boguan Information Technology Co Ltd
Priority date: 2022-11-09
Filing date: 2022-11-09
Publication date: 2023-05-12

Abstract

The application discloses a circuit system applied to a hardware circuit board. The circuitry includes: the first signal connection circuit and the power supply protection circuit. In the first signal connection circuit, designing a plurality of functional PINs of the hardware circuit board connected with the 2X 20PIN row bus to extend the PINs of the hardware circuit board; in the power protection circuit, the design field effect transistor detects the access power of the hardware circuit board, prevents the reverse power connection of the hardware circuit board, and designs the indicator lamp, and indicates whether the power connection is normal or not through different display of the indicator lamp, so that the use efficiency of the pin resource of the hardware circuit board is improved.

Description

Circuit system applied to hardware circuit board

Technical Field

The application relates to the technical field of hardware circuit board circuits, in particular to a circuit system applied to a hardware circuit board.

Background

The raspberry pie is a microcomputer main board based on ARM, an SD/MicroSD card is used as a memory hard disk, 1/2/4 USB interfaces and a 10/100 Ethernet interface (A type does not have a network port) are arranged around the card main board, a keyboard, a mouse and a network cable can be connected, a television output interface with video analog signals and an HDMI high-definition video output interface are simultaneously arranged, all the above components are integrated on a main board which is only slightly larger than a credit card, and the main board has the basic functions of all PCs (personal computer, personal computers). The raspberry pie has particularly rich pin resources, can be connected with a certain amount of external equipment, and meets the use requirements of most developers, so that the raspberry pie development board is more and more widely used in the developers.

In the related art, when a developer calls a raspberry group pin resource, the attribute of each pin of the raspberry group needs to be mastered, then, a circuit design is performed for each device to be controlled, the process is complex, and a great amount of time is required for the developer.

Disclosure of Invention

The embodiment of the application provides a circuit system applied to a hardware circuit board, which can improve the use efficiency of pin resources of the hardware circuit board.

The embodiment of the application provides a circuit system applied to a hardware circuit board, the circuit system comprises a first signal connection circuit, the first signal connection circuit comprises the hardware circuit board and a first connector, the hardware circuit board comprises a plurality of first function pins, the first connector comprises a plurality of second function pins, and the plurality of first function pins are correspondingly connected with the plurality of second function pins; the circuit system comprises a power protection circuit, wherein the power protection circuit comprises a second connector and a first field effect transistor, the second connector is connected with a power pin of the second function pins, and the second connector is connected with a grounding pin of the second function pins through the first field effect transistor.

In some embodiments, the second connector includes a first pin and a second pin, the first field effect transistor includes a third pin, a fourth pin, and a fifth pin;

the first pin is connected with the third pin through a wire, the fifth pin is connected with the grounding pin through a wire, and the second pin is connected with the power supply pin through a wire.

In some embodiments, a warning light is connected between the power pin and the ground pin;

when the first pin is connected with a negative voltage, the second pin is connected with a positive voltage, the output of the first pin is grounded, the fourth pin is in a high level, the third pin is communicated with the fifth pin, the output of the fifth pin is grounded, the prompting lamp is communicated, and the prompting lamp is controlled to display a first state so as to prompt normal connection of a power supply;

when the first pin is connected with a positive voltage, the second pin is connected with a negative voltage, the first pin outputs a voltage, the fourth pin is in a low level, the third pin is cut off from the fifth pin, the output of the fifth pin is grounded, the output of the second pin is grounded, the indicator lamp is conducted, and the indicator lamp is controlled to display a second state so as to indicate that the power supply is not normally connected.

In some embodiments, the circuitry includes a signal input circuit including a first phototransistor including a first input pin connected to an external device and a first output pin connected to an input pin of the second functional pins.

In some embodiments, a first light emitting diode is connected between the first input pin and the external device;

when an input signal input to the first input pin by the external equipment is in a high level, the first light emitting diode is turned off and extinguished, the first input pin and the first output pin are turned off, the input signal is disconnected from a grounding end, and the input signal is not output;

when the input signal is in a low level, the first light emitting diode is conducted and lightened, the first input pin is conducted with the first output pin, the input signal is connected with the grounding end, and the input signal outputs a low level.

In some embodiments, the circuitry includes a signal output circuit including a second phototransistor including a second input pin and a second output pin and a second field effect transistor including a third input pin and a third output pin;

The second input pin is connected with an output pin of the plurality of second function pins, the second output pin is connected with the third input pin, and the third input pin is connected with an external device.

In some embodiments, a second light emitting diode is connected between the second output pin and the third input pin;

when a first output signal output by an output pin of the plurality of second function pins is in a low level, the second input pin and the second output pin are cut off, the second light emitting diode is connected with a grounding end, the second light emitting diode is extinguished, a third input pin is in a low level state, the third output pin is cut off, and the processed first output signal is not output;

when the first output signal is in a high level, the second input pin is conducted with the second output pin, the second light emitting diode is connected with a power end, the second light emitting diode is lightened, the third input pin is in a high level state, the third output pin is conducted, and the processed first output signal outputs a low level.

In some embodiments, the circuitry includes status display circuitry including an input connected to an output pin of the plurality of second function pins and an output connected to an external device.

In some embodiments, the status display circuit includes a third phototransistor including a fourth input pin connected to an output pin of the plurality of second function pins and a fourth output pin connected to the external device, and the third transistor is configured to process a second output signal output from the output pin of the plurality of second function pins and output the processed second output signal to the external device.

In some embodiments, the status display circuit includes a third light emitting diode;

when the second output signals output by the output pins in the plurality of second function pins are in a low level, the fourth input pin is cut off, the third phototransistor signal is not triggered, the fourth output pin is cut off, the processed second output signals are not output, and the fourth luminescence transistor indicator lamp is controlled to be turned off;

when the second output signal is in a high level, the fourth input pin is conducted, the third phototransistor signal is triggered, the fourth output pin is conducted, the processed second output signal is output, and the fourth phototransistor indicator is controlled to be lighted.

In some embodiments, the circuitry includes a key reset circuit including a switch key having one end connected to a designated functional pin of the first plurality of functional pins and another end connected to a ground pin of the first plurality of functional pins, the switch key being configured to control a state of the designated functional pin.

In some embodiments, the plurality of first function pins include a first designated function pin and a first ground pin, the plurality of second function pins include a second designated function pin and a second ground pin, the first designated function pin is connected to the second designated function pin, the second designated function pin is connected to one end of the switch key, the first ground pin is connected to the second ground pin, and the second ground pin is connected to the other end of the switch key;

when the switch key is not pressed, the first appointed function pin is not output;

and when the switch key is pressed, outputting the first specified function pin.

In some embodiments, the circuitry includes a second signal connection circuit including a third connector connected by wires to an input pin, an output pin, a power pin, and a ground pin of the plurality of first function pins, respectively, the third connector being used for signal transmission between the hardware circuit board and an external device.

The embodiment of the application provides a circuit system applied to a hardware circuit board. The circuitry includes: the first signal connection circuit and the power supply protection circuit. In the first signal connection circuit, designing a plurality of functional PINs of the hardware circuit board connected with the 2X 20PIN row bus to extend the PINs of the hardware circuit board; in the power protection circuit, the design field effect transistor detects the access power of the hardware circuit board, prevents the reverse power connection of the hardware circuit board, and designs the indicator lamp, and indicates whether the power connection is normal or not through different display of the indicator lamp, so that the use efficiency of the pin resource of the hardware circuit board is improved.

Drawings

Technical solutions and other advantageous effects of the present application will be made apparent from the following detailed description of specific embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic diagram of a circuit system applied to a hardware circuit board according to an embodiment of the present application.

Fig. 2 is a circuit diagram of signal isolation of a hardware circuit board according to an embodiment of the present application.

Fig. 3 is a circuit diagram of a first signal connection according to an embodiment of the present application.

Fig. 4 is a schematic diagram of pin connection of a hardware circuit board according to an embodiment of the present application.

Fig. 5 is a signal input circuit diagram provided in an embodiment of the present application.

Fig. 6 is a circuit diagram of a signal output according to an embodiment of the present application.

Fig. 7 is a schematic diagram of a power protection circuit according to an embodiment of the present application.

Fig. 8 is a schematic diagram of a second signal connection circuit according to an embodiment of the present application.

Fig. 9 is a state display connection circuit provided in an embodiment of the present application.

Fig. 10 is a key reset circuit provided in an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

In the description of the present application, it should be understood that the terms "center," "longitudinal," "transverse," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," etc. indicate or are based on the orientation or positional relationship shown in the drawings, merely for convenience of description and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

In this application, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, and may also include the first and second features not being in direct contact but being in contact with each other by way of additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.

The following disclosure provides many different embodiments or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. Furthermore, the present application may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not in themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present application provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize the application of other processes and/or the use of other materials.

The embodiment of the application provides a circuit system applied to a hardware circuit board, which comprises a first signal connection circuit, a power supply protection circuit, a signal input circuit, a signal output circuit, a state display circuit and a key reset circuit. For example, the hardware circuit board may be a development board for raspberry pie or the like.

Specifically, referring to fig. 1, fig. 1 is a schematic diagram of a circuit system applied to a hardware circuit board according to an embodiment of the present application, where the circuit system may include: the device comprises a first signal connection circuit, a power supply protection circuit, a signal input circuit, a signal output circuit, a state display circuit and a key reset circuit. The first signal connection circuit is used for extending pins of the hardware circuit board; the power supply protection circuit is used for prompting whether the power supply is connected correctly or not; the second signal connection circuit is used for transmitting/receiving signals to external equipment by the hardware circuit board; the signal input circuit is used for isolating input signals input into the hardware circuit board; the signal output circuit is used for carrying out isolation processing on output signals output by the hardware circuit board; the state display circuit is used for displaying different states of the hardware circuit board; the key reset circuit is used for realizing the key reset function of the hardware circuit board.

The first signal connection circuit, the signal input circuit and the signal output circuit in the circuit system of the hardware circuit board form a hardware circuit board signal isolation circuit.

In some embodiments, referring to fig. 2, fig. 2 is a circuit diagram of signal isolation of a hardware circuit board according to an embodiment of the present application. The left side of fig. 2 is a signal input circuit, the middle is a first signal connection circuit, and the right side is a signal output circuit. The input end of the signal input circuit is connected with external equipment, the output end of the signal input circuit is connected with the input end of the first signal connection circuit, the output end of the first signal connection circuit is connected with the input end of the signal output circuit, and the output end of the signal output circuit is connected with the external equipment.

Specifically, referring to fig. 3, fig. 3 is a circuit diagram of a first signal connection according to an embodiment of the present application. The first signal connection circuit may include a hardware circuit board and a first connector, the hardware circuit board may include a plurality of first function pins, the first connector may include a plurality of second function pins, and the plurality of first function pins are correspondingly connected with the plurality of second function pins.

In some embodiments, the plurality of first function pins may include: a first input pin, a first output pin, a first power pin, and a first ground pin; the plurality of second function pins may include: the second input pin, the second output pin, the second power pin and the second ground pin; the first input pin is connected with the second input pin, the first output pin is connected with the second output pin, the first power pin is connected with the second power pin, and the first grounding pin is connected with the second grounding pin.

In this embodiment, the first connector may be a 2×20PIN header, i.e., a PIN header, and the PIN header is configured as a male-female type. The pin header connector is widely applied to PCB circuit boards in electronics and electric appliances, and has the function of playing a bridge between blocked or isolated circuits in the circuits, and carrying the tasks of current or signal transmission.

The hardware circuit board may include 40 pins, which may be divided into: 18 GPIO (General-purpose input/output) port pins, 10 UART (Universal Asynchronous Receiver/Transmitter, asynchronous transceiver) serial port pins, 2 5V power pins and 8 GND (ground wire) pins. Correspondingly, the 2×20PIN busbar also can comprise 40 PINs, which can be respectively a GPIO port PIN, a UART serial port PIN, a 5V power supply PIN and a GND PIN. And then, each PIN of the hardware circuit board is correspondingly connected with each PIN of the 2X 20PIN row bus, and the assembly of the first signal connection circuit can be completed by directly inserting the 40 PINs of the hardware circuit board into the 2X 20PIN row bus on the invention, so that the assembly is simple and efficient, and the circuit is stable.

For example, in fig. 3, PIN 2 and PIN 4 of the 2×20PIN busbar are connected to the 5V power PIN of the hardware circuit board, PIN 9, PIN 25, PIN 39, PIN 6, PIN 14, PIN 20, PIN 30 and PIN 34 of the 2×20PIN busbar are connected to the GND PIN of the hardware circuit board, and the other PINs of the 2×20PIN busbar can be connected to the GPIO port PIN and UART serial port PIN of the hardware circuit board, respectively.

For example, referring to fig. 4, fig. 4 is a schematic diagram of pin connection of a hardware circuit board according to an embodiment of the present application. The hardware circuit board shown in fig. 4 includes a plurality of functional pins, and the expansion board may be used to extend the plurality of functional pins of the hardware circuit board, thereby implementing the use of the plurality of functional pins on the expansion board. The expansion board comprises a row of female connectors, and the connection between the hardware circuit board and the first connector can be realized by connecting the row of female connectors with functional pins, so that the assembly of the first signal connection circuit is completed.

The signal input circuit may include a first input end and a first output end, where the first output end is connected to an input pin, that is, a GPIO port pin, of the plurality of second function pins, and the first input end may be connected to an external device, and the external device may be a device that performs signal transmission with a hardware circuit board.

In some embodiments, referring to fig. 5, fig. 5 is a signal input circuit diagram according to an embodiment of the present application. The signal input circuit comprises a first phototransistor, wherein the first phototransistor comprises a first input pin and a first output pin, the first input pin is connected with an external device, the first output pin is connected with an input pin in a second functional pin, and the first phototransistor is used for processing an input signal input by the external device and inputting the processed input signal to the input pins in a plurality of second functional pins. The first phototransistor may be an LTV-247 phototransistor.

For example, in the circuit of fig. 5, the

pins

2, 4, 6, and 8 of the first phototransistor may be first input pins through which an input signal input from an external device is input to the phototransistor; the

pins

10, 12, 14 and 16 of the phototransistor may be first output pins, through which the processed input signal is output.

Wherein, the signal input circuit may further include a fourth connector, and the fourth connector may be: XY2500V-F-3.5-3P connector. The fourth connector is used for connecting an external device with the first input pin, namely, in the signal input circuit, the external device is connected with the fourth connector, the fourth connector is connected with the first phototransistor, an input signal of the external device is input into the first phototransistor through the fourth connector, and the input signal is processed through the first phototransistor so as to realize isolation of the input signal input into the hardware circuit board.

In some embodiments, a first light emitting diode, i.e., an LED lamp, is connected between the first input pin and the external device. When an input signal input to the first input pin by the external equipment is at a high level, the first light emitting diode is turned off, the first input pin and the first output pin are turned off, the input signal is disconnected from the grounding end, and the input signal is not output; when the input signal is at a low level, the first light emitting diode is turned on and lightened, the first input pin is turned on with the first output pin, the input signal is connected with the grounding end, and the input signal outputs a low level.

The first phototransistor may be an LTV-247 phototransistor, and IN the embodiment of the present application, the sig_in_x signal outside the hardware circuit board is isolated from the in_x signal inside the hardware circuit board by the LTV-247 phototransistor.

The sig_in_x signal is a high voltage signal input to the hardware circuit board by an external device, and the sig_in_x signal can be converted into a low voltage signal, i.e., in_x signal after being processed by the LTV-247 phototransistor, and then the phototransistor inputs the low voltage in_x signal to the hardware circuit board, so that the hardware circuit board is not damaged.

For example, IN FIG. 5, when the external input SIG_IN_4 is high, the left side circuit of LTV-247 is IN a high state, the LED lamp D4 is turned off, the LED lamp is turned off, pins 1, 2 of LTV-247 are turned off, the LTV-247 signal is not triggered, LTV-24716, 15 is turned off, the signal IN_1 is disconnected from GND, and the signal IN_1 is not output; when the external input SIG_IN_4 is placed at a low level, a circuit on the left side of the LTV-247 forms a loop, the LED lamp D4 is turned on, the LED lamp is turned on,

pins

1 and 2 of the LTV-247 are turned on, the LTV-247 signals are triggered, the LTV-24716 and 15 are turned on, the signal IN_1 is connected with GND, and the signal IN_1 outputs a low level.

According to the embodiment of the application, the SIG_IN_x signal and the IN_x signal are isolated through the LTV-247 phototransistor, so that an internal circuit is protected, the state of an input signal is displayed through the LED lamp, and a developer can quickly grasp the state of the input signal of the circuit.

The signal output circuit may include a second input end and a second output end, where the second input end is connected to an output pin, i.e., a GPIO port, of the plurality of second function pins, and the second output end may be connected to an external device.

In some embodiments, referring to fig. 6, fig. 6 is a signal output circuit diagram according to an embodiment of the present application. The signal output circuit comprises a second photoelectric transistor and a second field effect transistor, the second photoelectric transistor comprises a second input pin and a second output pin, and the second field effect transistor comprises a third input pin and a third output pin; the second input pin is connected with an output pin of the plurality of second function pins, the second output pin is connected with a third input pin, the third input pin is connected with external equipment, the second phototransistor is used for processing output signals output by the output pins of the plurality of second function pins and outputting the processed output signals to the second field effect transistor, and the second field effect transistor can be used for outputting the processed output signals to the external equipment.

For example, in the circuit shown in fig. 6, the pin 2, the pin 4, the pin 6, and the pin 8 of the second phototransistor may be second input pins, through which the output signal output by the hardware circuit board is input to the phototransistor; the

pins

10, 12, 14 and 16 of the second phototransistor may be second output pins, through which the processed output signal is output; and, pin 4 of the second field effect transistor is the third input pin, and pins 5 and 6 of the second field effect transistor are the third output pins. The second output pin may input the processed input signal to the second field effect transistor through the third input pin, and output the processed output signal to the external device through the second field effect transistor.

The signal output circuit may further include a fifth connector, which may be an XY2500V-F-3.5-2P connector, for connecting the third output pin and an external device, that is, in the signal output circuit, the second phototransistor is connected with the second field effect transistor, the second field effect transistor is connected with the fifth connector, the fifth connector is connected with the external device, the output signal is isolated by the second phototransistor, and the high power supply is driven to output by the second field effect transistor.

In some embodiments, a second light emitting diode, i.e., an LED lamp, may be connected between the second output pin and the third input pin. When the output signals output by the output pins in the plurality of second function pins are in a low level, the second input pins and the second output pins are cut off, the second light emitting diode is connected with the grounding end, the second light emitting diode is turned off, the third input pin is in a low level state, the third output pin is cut off, and the processed output signals are not output; when the output signal is in a high level, the second input pin is conducted with the second output pin, the second light emitting diode is connected with the power end, the second light emitting diode is lightened, the third input pin is in a high level state, the third output pin is conducted, and the processed output signal outputs a low level.

The second field effect transistor may be a UTM6016G field effect transistor, and in the embodiment of the present application, the output signals out_x and OUTx are isolated by the LTV-247 phototransistor, and the output of the high-power supply is driven by the UTM6016G field effect transistor. Wherein, OUT_x is the output signal outputted by the hardware circuit board, and OUTx is the final output signal after being processed by the second phototransistor and the second field effect transistor.

With continued reference to fig. 6, when the internal signal out_4 is at a low level, the LTV-247

pins

1 and 2 are turned off, the LTV-247 signal is not triggered, the LTV-247

pins

16 and 15 are turned off, the OUT4_led is connected to GND, the LED lamp is turned off, the UTM6016G fet pin 4 is at a low level, the UTM6016G fet pins 3 and 5 are turned off, and OUT4 is not output; when the internal signal OUT_4 is at a high level, the LTV-247

pins

1 and 2 are conducted, the LTV-247 signals trigger, the LTV-247

pins

16 and 15 are conducted, the OUT 4-LED is connected with a 5V power supply, the LED lamp is lighted, the UTM6016G FET pin 4 is in a high level state, the UTM6016G FET pins 3 and 5 are conducted, and the OUT4 outputs a low level.

According to the embodiment of the application, the output signals OUT_x and OUTx are isolated through the LTV-247 phototransistor, the internal circuit is protected, the UTM6016G field effect transistor is used for driving the high-power supply to output, the state of the output signals is displayed through the LED lamp, and a developer is facilitated to quickly master the state of the output signals of the circuit.

In the embodiment of the application, the circuit system may further include a power supply protection circuit, that is, a power supply input reverse connection protection circuit. The power supply protection circuit can be used for detecting whether the connection between the hardware circuit board and the power supply is normal or not, and prompting through the display state of the indicator lamp, so that the abnormal connection between the hardware circuit board and the power supply can be placed.

For example, referring to fig. 7, fig. 7 is a power protection circuit according to an embodiment of the present application. The power protection circuit comprises a second connector and a first field effect transistor, wherein the second connector is connected with a power pin in a plurality of second function pins, and the second connector is connected with a grounding pin in the plurality of second function pins through the first field effect transistor.

The second connector may include a first pin and a second pin, and the first field effect transistor may include a third pin, a fourth pin, and a fifth pin. The first pin can be connected with the third pin through the wire, and the fifth pin is connected with the ground pin through the wire, and the second pin can be connected with the power pin through the wire.

In some embodiments, a prompting light can be connected between the power pin and the grounding pin; when the first pin is connected with the negative voltage, the second pin is connected with the positive voltage, the output of the first pin is grounded, the fourth pin is in high level, the third pin is communicated with the fifth pin, the output of the fifth pin is grounded, the prompting lamp is communicated, and the prompting lamp is controlled to display the first state so as to prompt the normal connection of the power supply.

Or when the first pin is connected with the positive voltage, the second pin is connected with the negative voltage, the first pin outputs the voltage, the fourth pin is in a low level, the third pin is cut off from the fifth pin, the output of the fifth pin is grounded, the output of the second pin is grounded, the prompting lamp is conducted, and the prompting lamp is controlled to display the second state so as to prompt that the power supply is not normally connected.

With continued reference to fig. 7, the first fet may be an N-channel fet of AOD4184A and the second connector may be an HC-DC-007B-2.5 plug. The N-channel field effect transistor of the AOD4184A comprises an AOD4184A pin 1, an AOD4184A pin 2 and an AOD4184A pin 3; the HC-DC-007B-2.5 plug includes HC-DC-007B-2.5 pin 1 and HC-DC-007B-2.5 pin 2.

In the power protection circuit shown in FIG. 7, an external 12V power supply is connected through a HC-DC-007B-2.5 plug, a HC-DC-007B-2.5 pin 1 is connected with an AOD4184A pin 1 through a wire, and an AOD4184A pin 3 is connected with a circuit GND interface through a wire; HC-DC-007B-2.5 pin 2 is wired to the circuit 12V interface and also connected to AOD4184A pin 2.

For example, when the input power is being connected, i.e., HC-DC-007B-2.5 pin 1 is connected to a 12V negative voltage, HC-DC-007B-2.5 pin 2 is connected to a 12V positive voltage, HC-DC-007B-2.5 pin 1 outputs GND, AOD4184A pin 2 is high, AOD4184A pin 1 is conducted with AOD4184A pin 3, AOD4184A pin 3 outputs GND, GND is provided for the whole circuit, HC-DC-007B-2.5 pin 2 provides 12V for the whole circuit, and at the same time, indicator light D6 is conducted, green light is turned on, the power is prompted to be properly connected, and the circuit is powered normally.

For example, when the input power is reversely connected, i.e. the HC-DC-007B-2.5 pin 1 is connected with a 12V positive voltage, the HC-DC-007B-2.5 pin 2 is connected with a 12V negative voltage, the HC-DC-007B-2.5 pin 1 outputs 12V, the AOD4184A pin 2 is in a low level, the AOD4184A pin 1 and the AOD4184A pin 3 are cut off, the AOD4184A pin 3 outputs GND, the pin 2 also outputs GND, and at the moment, no voltage is output to the whole circuit by the protection circuit, and the circuit and the hardware circuit board can be effectively protected. Meanwhile, the prompting lamp D1 is turned on, and the red lamp is turned on to prompt that the power supply is not connected correctly.

In an embodiment of the present application, the circuitry may further include a second signal connection circuit. The second signal connection circuit comprises a third connector, the third connector is respectively connected with an input pin, an output pin, a power pin and a grounding pin in the plurality of first functional pins through wires, and the third connector can be used for signal transmission between the hardware circuit board and external equipment.

For example, referring to fig. 8, fig. 8 is a schematic diagram of a second signal connection circuit according to an embodiment of the present application. The second signal connection circuit can be used for UART communication between the hardware circuit board and external equipment. The second signal connection circuit may include a third connector, which may be a B4B-XH-a (LF) (SN) plug, which may include a plurality of pins, and the B4B-XH-a (LF) (SN) plug may be connected with a plurality of first functional pins of the hardware circuit board through the plurality of pins.

Specifically, the B4B-XH-A (LF) (SN) plug may include B4B-XH-A (LF) (SN) pin 1, B4B-XH-A (LF) (SN) pin 2, B4B-XH-A (LF) (SN) pin 3, and B4B-XH-A (LF) (SN) pin 4. The plurality of first function pins of the hardware circuit board may include: GND pin, uart1_txd pin, uart1_rxd pin, and 5V pin.

Wherein, pin 1 of B4B-XH-A (LF) (SN) is connected with GND pin, pin 2 of B4B-XH-A (LF) (SN) is connected with UART1_TXD pin, pin 3 of B4B-XH-A (LF) (SN) is connected with UART1_RXD pin, and pin 4 of B4B-XH-A (LF) (SN) is connected with 5V pin. The 5V, GND interface is used for supplying 5V power to the external UART device, the UART1_TXD is used for sending signals to the external device, and the UART1_RXD is used for receiving signals to the external device.

In the embodiment of the application, the circuit system may further include a status display circuit, where the status display circuit refers to a status display circuit of the hardware circuit board, and may be used to display a status of the hardware circuit board. The state display circuit comprises an input end and an output end, wherein the input end is connected with an output pin in the plurality of second function pins, and the output end is connected with external equipment.

For example, referring to fig. 9, fig. 9 is a state display connection circuit according to an embodiment of the present application. The status display circuit may include a third phototransistor, which may be an LTV-247 phototransistor. The third phototransistor comprises a fourth input pin and a fourth output pin, the fourth input pin is connected with the output pins of the plurality of second function pins, the fourth output pin is connected with the external device, and the third transistor is used for processing the second output signals output by the output pins of the plurality of second function pins and outputting the processed second output signals to the external device.

In some embodiments, the status display circuit may further include a third light emitting diode, i.e., an LED light.

When the second output signals output by the output pins in the plurality of second function pins are in a low level, the fourth input pin is cut off, the third phototransistor signals are not triggered, the fourth output pin is cut off, the processed second output signals are not output, and the fourth luminescence transistor indicator lamp is controlled to be turned off; or when the second output signal is at a high level, the fourth input pin is conducted, the third phototransistor signal is triggered, the fourth output pin is conducted, the processed second output signal is output, and the fourth phototransistor indicator lamp is controlled to be lighted.

With continued reference to FIG. 9, pin 1 of the LTV-247 phototransistor is the fourth input pin and pin 15 of the LTV-247 phototransistor is the fourth output pin. The output signal output by the hardware circuit board is input into the LTV-247 photoelectric transistor through the pin 1 of the LTV-247 photoelectric transistor, the processed output signal is processed by the LTV-247 photoelectric transistor, and the processed second output signal is output to external equipment through the pin 15 of the LTV-247 photoelectric transistor.

In some embodiments, the second output signal may be signal MODE, with the output signal MODE and MODE_LED isolated by LTV-247 phototransistors. Specifically, when internal signal MODE is at a low level, LTV-247

pins

1, 2 are turned off, LTV-247 signals are not triggered, LTV-247

pins

16, 15 are turned off, MODE_LED is not output, and the LED lamp is turned off. Alternatively, when the internal signal MODE is at a high level, LTV-247

pins

1, 2 are turned on, LTV-247 signals trigger, LTV-247

pins

16, 15 are turned on, MODE_LED is connected to a 5V power supply, and the LED lamp is turned on.

In this embodiment of the present application, the MODE pin may be connected to the GPIO21 of the hardware circuit board, and the on/off of the MODE lamp may be controlled by controlling the high/low level of the GPIO21 of the hardware circuit board, so as to generate effects such as normal on, double flash or strobe, so as to display different states of the hardware circuit board.

In the embodiment of the application, the circuit system may further include a key reset circuit, and the case reset circuit may control the output state of the function pins of the hardware circuit board through a switch case.

For example, referring to fig. 10, fig. 10 is a key reset circuit provided in an embodiment of the present application. The key reset circuit comprises a switch key, one end of the switch key can be connected with a designated function pin in the plurality of first function pins, the other end of the switch key can be connected with a grounding pin in the plurality of first function pins, and the switch key can be used for controlling the state of the designated function pin.

In some embodiments, the first function pins of the hardware circuit board may include a first designated function pin and a first ground pin, the second function pins may include a second designated function pin and a second ground pin, the first designated function pin is connected to the second designated function pin, the second designated function pin is connected to one end of the switch key, the first ground pin is connected to the second ground pin, and the second ground pin is connected to the other end of the switch key.

Specifically, when the switch key is not pressed, the first specified function pin is not output; when the switch key is pressed, the first specified function pin is output.

For example, the switch keys may be 1TS005A-2700-5001 switch keys, i.e., SW1 keys. The first designated function pin may be a GPIO25 pin of a hardware circuit board. The output state of the GPIO25 is controlled by the key SW 1. When the key is not pressed, the GPIO25 does not output; when the key is pressed, the GPIO25 outputs a low level. The user can realize the reset function of the key through setting the hardware circuit board, namely, the key is pressed for a long time, the GPIO continuously outputs low level, and the hardware circuit board is restarted automatically to enter a reset state after the set required time is reached.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

The foregoing describes in detail a circuit system applied to a hardware circuit board provided in the embodiments of the present application, and specific examples are applied to illustrate the principles and implementations of the present application, where the foregoing description of the embodiments is only used to help understand the technical solution and core ideas of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A circuit system applied to a hardware circuit board, wherein the circuit system comprises a first signal connection circuit, the first signal connection circuit comprises the hardware circuit board and a first connector, the hardware circuit board comprises a plurality of first function pins, the first connector comprises a plurality of second function pins, and the plurality of first function pins are correspondingly connected with the plurality of second function pins;

The circuit system comprises a power protection circuit, wherein the power protection circuit comprises a second connector and a first field effect transistor, the second connector is connected with a power pin of the second function pins, and the second connector is connected with a grounding pin of the second function pins through the first field effect transistor.

2. The circuitry of claim 1, wherein the second connector comprises a first pin and a second pin, the first field effect transistor comprising a third pin, a fourth pin, and a fifth pin;

3. The circuit system of claim 2, wherein a warning light is connected between the power pin and the ground pin;

4. The circuitry of claim 1, wherein the circuitry comprises a signal input circuit comprising a first phototransistor including a first input pin and a first output pin, the first input pin being connected to an external device and the first output pin being connected to an input pin of the second functional pin.

5. The circuitry of claim 4, wherein a first light emitting diode is connected between the first input pin and the external device;

6. The circuitry of claim 1, wherein the circuitry comprises a signal output circuit comprising a second phototransistor comprising a second input pin and a second output pin and a second field effect transistor comprising a third input pin and a third output pin;

7. The circuit system of claim 6, wherein a second light emitting diode is connected between the second output pin and the third input pin;

8. The circuitry of claim 1, wherein the circuitry comprises a status display circuit comprising an input connected to an output pin of the plurality of second function pins and an output connected to an external device.

9. The circuitry of claim 8, wherein the status display circuit comprises a third phototransistor including a fourth input pin and a fourth output pin, the fourth input pin coupled to an output pin of the plurality of second function pins, the fourth output pin coupled to the external device, the third transistor to process a second output signal output by the output pin of the plurality of second function pins and to output the processed second output signal to the external device.

10. The circuitry of claim 9, wherein the status display circuit comprises a third light emitting diode;

11. The circuitry of claim 1, wherein the circuitry comprises a key reset circuit comprising a switch key having one end connected to a designated functional pin of the first plurality of functional pins and another end connected to a ground pin of the first plurality of functional pins, the switch key being configured to control a state of the designated functional pin.

12. The circuitry of claim 11, wherein the first plurality of function pins includes a first designated function pin and a first ground pin, wherein the second plurality of function pins includes a second designated function pin and a second ground pin, wherein the first designated function pin is connected to the second designated function pin, wherein the second designated function pin is connected to one end of the switch key, wherein the first ground pin is connected to the second ground pin, and wherein the second ground pin is connected to the other end of the switch key;

13. The circuitry of claim 1, wherein the circuitry comprises a second signal connection circuit comprising a third connector connected by wires to an input pin, an output pin, a power pin, and a ground pin of the plurality of first functional pins, respectively, the third connector being used for signal transmission between the hardware circuit board and an external device.