CN116094292A - D-type gallium nitride switch driving circuit and switching power supply circuit - Google Patents
D-type gallium nitride switch driving circuit and switching power supply circuit Download PDFInfo
- Publication number
- CN116094292A CN116094292A CN202310160546.2A CN202310160546A CN116094292A CN 116094292 A CN116094292 A CN 116094292A CN 202310160546 A CN202310160546 A CN 202310160546A CN 116094292 A CN116094292 A CN 116094292A
- Authority
- CN
- China
- Prior art keywords
- switch
- coupled
- control module
- terminal
- turn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/04106—Modifications for accelerating switching without feedback from the output circuit to the control circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0081—Power supply means, e.g. to the switch driver
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
Abstract
Description
技术领域technical field
本发明涉及电源领域,特别是涉及一种D型氮化镓开关驱动电路以及开关电源电路。The invention relates to the field of power supplies, in particular to a D-type gallium nitride switch drive circuit and a switch power supply circuit.
背景技术Background technique
近些年来,氮化镓开关管在开关电源拓扑领域,尤其是在大功率电源领域、AC/DC开关电源等领域中被广泛应用。In recent years, gallium nitride switching tubes have been widely used in the field of switching power supply topology, especially in the field of high-power power supply, AC/DC switching power supply and other fields.
目前常用的开关电源拓扑电路,包括:Buck电路、Boost电路、Buck-Boost电路、正激电路、反激电路、半桥式功率电路等等,被广泛地用于需要对电压进行变换的设备和系统中。Currently commonly used switching power supply topology circuits, including: Buck circuit, Boost circuit, Buck-Boost circuit, forward circuit, flyback circuit, half-bridge power circuit, etc., are widely used in equipment and devices that need to convert voltage system.
现有的开关电源拓扑电路的初级氮化镓功率管一般采用E型的氮化镓开关管,其驱动电路成熟,开关速度可调,但在高频条件下更适用于软开关条件;当受限于拓扑或控制策略而只能实现硬开关时,采用D型的氮化镓开关管在通态损耗方面更具优势,但D型的氮化镓开关管为常开器件,需要串联一个常闭开关,通过控制常闭开关的通断进而控制D型的氮化镓开关管的通断,且D型的氮化镓开关管开通速度较快且难以控制,将导致后续电路的电压应力过高。在该情况下,可以通过调节常闭开关的开关速度或调节连接在D型的氮化镓开关管栅极以及源极间的电容的电容值,来调节D型的氮化镓开关管的开关速度,但这种做法对D型的氮化镓开关管的开通速度影响有限,却对其关断速度影响较大,对效率有较大影响。The primary GaN power tube of the existing switching power supply topology circuit generally adopts the E-type GaN switch tube. The driving circuit is mature and the switching speed is adjustable, but it is more suitable for soft switching conditions under high frequency conditions; When limited to topology or control strategy and can only achieve hard switching, the D-type GaN switch has more advantages in terms of on-state loss, but the D-type GaN switch is a normally-on device and needs to be connected in series. Close the switch, and then control the on-off of the D-type GaN switch by controlling the on-off of the normally-closed switch, and the turn-on speed of the D-type GaN switch is fast and difficult to control, which will lead to excessive voltage stress in the subsequent circuit high. In this case, the switch of the D-type GaN switch can be adjusted by adjusting the switching speed of the normally closed switch or adjusting the capacitance value of the capacitor connected between the gate and the source of the D-type GaN switch. Speed, but this approach has a limited impact on the turn-on speed of the D-type GaN switch tube, but has a greater impact on its turn-off speed, which has a greater impact on efficiency.
因而,如何在不影响D型的氮化镓开关管的关断速度的情况下,兼顾控制其开通速度,以降低后续电路的电压应力,改善EMI特性,已成为业界目前亟需解决的技术问题。Therefore, how to control the turn-on speed of the D-type GaN switch without affecting the turn-off speed, so as to reduce the voltage stress of the subsequent circuit and improve the EMI characteristics, has become an urgent technical problem in the industry. .
发明内容Contents of the invention
本发明提供一种D型氮化镓开关驱动电路以及开关电源电路,以解决在不影响D型的氮化镓开关管的关断速度的情况下,兼顾控制其开通速度,以降低后续电路的电压应力,改善EMI特性的技术问题。The present invention provides a D-type GaN switch driving circuit and a switching power supply circuit to solve the problem of controlling the turn-on speed of the D-type GaN switch tube without affecting the turn-off speed of the D-type GaN switch tube, so as to reduce the cost of subsequent circuits. Voltage stress, technical issues for improving EMI characteristics.
根据本发明的第一方面,提供了一种D型氮化镓开关驱动电路,包括:D型氮化镓开关、第一控制模块、第二控制模块、第一电容以及开关模块;其中:According to the first aspect of the present invention, a D-type GaN switch driving circuit is provided, including: a D-type GaN switch, a first control module, a second control module, a first capacitor, and a switch module; wherein:
所述D型氮化镓开关的漏极接第一电压,所述D型氮化镓开关的源极分别耦接至所述开关模块的第一端以及所述第一电容的第一端,其栅极耦接至所述第一控制模块的第一端,所述第一控制模块的第二端耦接至所述第一电容的第二端,所述第二控制模块耦接至所述开关模块的控制端,所述第一电容的第二端以及所述开关模块的第三端接地;The drain of the D-type GaN switch is connected to a first voltage, and the source of the D-type GaN switch is respectively coupled to the first end of the switch module and the first end of the first capacitor, Its gate is coupled to the first terminal of the first control module, the second terminal of the first control module is coupled to the second terminal of the first capacitor, and the second control module is coupled to the The control end of the switch module, the second end of the first capacitor and the third end of the switch module are grounded;
所述第二控制模块用于输出控制信号,控制所述开关模块的导通与关断,以控制所述D型氮化镓开关的导通与关断;The second control module is used to output a control signal to control the turn-on and turn-off of the switch module, so as to control the turn-on and turn-off of the D-type gallium nitride switch;
所述第一控制模块用于调节所述D型氮化镓开关的开通速度。The first control module is used to adjust the turn-on speed of the D-type GaN switch.
可选的,所述第一控制模块还用于调节所述D型氮化镓开关的关断速度。Optionally, the first control module is further configured to adjust the turn-off speed of the D-type GaN switch.
可选的,所述第一控制模块包括并联连接的开通速度控制模块以及关断速度控制模块,其中:Optionally, the first control module includes a turn-on speed control module and a turn-off speed control module connected in parallel, wherein:
所述开通速度控制模块用于调节所述D型氮化镓开关的开通速度;The turn-on speed control module is used to adjust the turn-on speed of the D-type GaN switch;
所述关断速度控制模块用于调节所述D型氮化镓开关的关断速度。The turn-off speed control module is used to adjust the turn-off speed of the D-type GaN switch.
可选的,所述开通速度控制模块包括第一电阻;其中:Optionally, the turn-on speed control module includes a first resistor; wherein:
所述D型氮化镓开关的栅极耦接至所述第一电阻的第一端,所述第一电阻的第二端还耦接至所述第一电容的第二端;The gate of the D-type gallium nitride switch is coupled to the first terminal of the first resistor, and the second terminal of the first resistor is also coupled to the second terminal of the first capacitor;
所述第一电阻用于调节所述D型氮化镓开关的开通速度。The first resistor is used to adjust the turn-on speed of the D-type GaN switch.
可选的,所述关断速度控制模块包括第一二极管以及第二电阻;Optionally, the turn-off speed control module includes a first diode and a second resistor;
所述第二电阻的第一端耦接至所述D型氮化镓开关的栅极,其第二端耦接至所述第一二极管的阳极;所述第一二极管的阴极耦接至所述第一电阻的第二端;The first end of the second resistor is coupled to the gate of the D-type gallium nitride switch, and the second end is coupled to the anode of the first diode; the cathode of the first diode coupled to the second end of the first resistor;
所述第二电阻用于调节所述D型氮化镓开关的关断速度。The second resistor is used to adjust the turn-off speed of the D-type GaN switch.
可选的,还包括钳位稳压二极管;Optionally, a clamping Zener diode is also included;
所述钳位稳压二极管的阳极耦接至所述第一电阻的第一端,所述钳位稳压二极管的阴极耦接至所述D型氮化镓开关的源极。The anode of the clamping Zener diode is coupled to the first end of the first resistor, and the cathode of the clamping Zener diode is coupled to the source of the D-type GaN switch.
可选的,所述开关模块为第一NMOS开关管;Optionally, the switch module is a first NMOS switch tube;
所述第一NMOS开关管的漏极耦接至所述D型氮化镓开关的源极,其栅极耦接至所述第二控制模块,其源极接地。The drain of the first NMOS switch transistor is coupled to the source of the D-type GaN switch, its gate is coupled to the second control module, and its source is grounded.
可选的,还包括采样模块,所述采样模块包括电流检测电阻以及第二NMOS开关管;Optionally, a sampling module is also included, and the sampling module includes a current detection resistor and a second NMOS switch tube;
所述第二控制模块的第一端分别耦接至所述第二NMOS开关管的栅极以及所述第一NMOS开关管的栅极,其第二端耦接至所述第二NMOS开关管的漏极,其第三端耦接至所述电流检测电阻的第一端,其第四端耦接至所述第一NMOS开关管的漏极,其第五端接地;所述电流检测电阻的第二端以及所述第二NMOS开关管的源极分别接地;The first end of the second control module is respectively coupled to the gate of the second NMOS switch and the gate of the first NMOS switch, and its second end is coupled to the second NMOS switch. The drain, its third end is coupled to the first end of the current detection resistor, its fourth end is coupled to the drain of the first NMOS switch tube, and its fifth end is grounded; the current detection resistor The second end of the second end and the source of the second NMOS switch tube are respectively grounded;
所述第二控制模块的第一端用于输出所述控制信号,控制所述第一NMOS开关管以及所述第二NMOS开关管的导通与关断,其第二端以及第四端用于输出相同的电压,以使得所述第二NMOS开关管与所述第一NMOS开关管构成电流镜;且所述第二控制模块还用于将流过所述第二NMOS开关管的电流镜像至所述电流检测电阻,使得所述电流检测电阻上留过的电流与所述第二NMOS开关管流过的电流相等。The first end of the second control module is used to output the control signal, and control the turn-on and turn-off of the first NMOS switch and the second NMOS switch, and the second end and the fourth end are used for to output the same voltage, so that the second NMOS switch tube and the first NMOS switch tube form a current mirror; and the second control module is also used to mirror the current flowing through the second NMOS switch tube to the current detection resistor, so that the current flowing through the current detection resistor is equal to the current flowing through the second NMOS switch tube.
可选的,所述第一NMOS开关管的宽长比大于所述第二NMOS开关管的宽长比。Optionally, the width-to-length ratio of the first NMOS switch transistor is greater than the width-to-length ratio of the second NMOS switch transistor.
可选的,所述第二控制模块的输入端接收输入信号;所述第二控制模块依据所述输入信号,输出相应的控制信号,其中:Optionally, the input terminal of the second control module receives an input signal; the second control module outputs a corresponding control signal according to the input signal, wherein:
若所述输入信号为高电平,所述控制信号为适配的高电平信号;If the input signal is high level, the control signal is an adapted high level signal;
若所述输入信号为低电平,所述控制信号为适配的低电平信号。If the input signal is low level, the control signal is an adapted low level signal.
可选的,还包括输出电容;Optionally, the output capacitor is also included;
所述输出电容的第一端耦接至所述第二控制模块的第六端,所述输出电容的第二端接地。The first terminal of the output capacitor is coupled to the sixth terminal of the second control module, and the second terminal of the output capacitor is grounded.
可选的,还包括高压启动模块;所述高压启动模块包括第二二极管、恒流源、LDO模块以及输入电容;Optionally, a high-voltage startup module is also included; the high-voltage startup module includes a second diode, a constant current source, an LDO module, and an input capacitor;
所述D型氮化镓开关的源极耦接至所述第二二极管的阳极,所述第二二极管的阴极耦接至所述恒流源的第一端,所述恒流源的第二端耦接至所述LDO模块的第一端,其第三端耦接至所述第二控制模块的第七端,所述LDO模块的第二端分别耦接至所述第二控制模块的第八端以及所述输入电容的第一端,所述输入电容的第二端接地;其中,The source of the D-type GaN switch is coupled to the anode of the second diode, the cathode of the second diode is coupled to the first end of the constant current source, and the constant current The second terminal of the source is coupled to the first terminal of the LDO module, the third terminal thereof is coupled to the seventh terminal of the second control module, and the second terminals of the LDO module are respectively coupled to the first The eighth end of the second control module and the first end of the input capacitor, the second end of the input capacitor is grounded; wherein,
所述第二控制模块的第七端用于控制所述恒流源的开启以及关闭;The seventh terminal of the second control module is used to control the opening and closing of the constant current source;
所述输入电容用于为所述第二控制模块供电。The input capacitor is used for powering the second control module.
根据本发明的第二方面,提供了一种开关电源电路,包括本发明第一方面任一项提供的D型氮化镓开关驱动电路、RCD吸收电路以及初级绕组;According to the second aspect of the present invention, there is provided a switching power supply circuit, including the D-type gallium nitride switch driving circuit, RCD absorbing circuit and primary winding provided by any one of the first aspect of the present invention;
所述初级绕组的第一端耦接至所述RCD吸收电路的第一端,其第二端分别耦接至所述RCD吸收电路的第二端以及所述D型氮化镓开关的漏极。The first end of the primary winding is coupled to the first end of the RCD snubber circuit, and the second end thereof is respectively coupled to the second end of the RCD snubber circuit and the drain of the D-type GaN switch .
可选的,所述RCD吸收电路包括第二电容、第三电阻、以及第三二极管;Optionally, the RCD snubber circuit includes a second capacitor, a third resistor, and a third diode;
所述初级绕组的第一端分别耦接至所述第二电容的第一端以及所述第三电阻的第一端,所述第二电容的第二端耦接至所述第三电阻的第二端,所述第三电阻的第二端耦接至所述第三二极管的阴极,所述第三二极管的阳极耦接至所述初级绕组的第二端。The first end of the primary winding is respectively coupled to the first end of the second capacitor and the first end of the third resistor, and the second end of the second capacitor is coupled to the third resistor The second terminal, the second terminal of the third resistor is coupled to the cathode of the third diode, and the anode of the third diode is coupled to the second terminal of the primary winding.
可选的,还包括电源侧电容;所述初级绕组的第一端耦接至所述电源侧电容的第一端,所述电源侧电容的第二端接地。Optionally, a power supply side capacitor is also included; the first terminal of the primary winding is coupled to the first terminal of the power supply side capacitor, and the second terminal of the power supply side capacitor is grounded.
可选的,还包括次级绕组。Optionally, secondary windings are also included.
本发明提供的D型氮化镓开关驱动电路以及开关电源电路中,通过D型氮化镓开关的漏极接第一电压,其源极分别耦接至开关模块的第一端以及第一电容的第一端,其栅极耦接至第一控制模块的第一端,第一控制模块的第二端耦接至第一电容的第二端,第二控制模块耦接至开关模块的控制端,第一电容的第二端以及开关模块的第三端接地的方式,使得第二控制模块输出控制信号控制开关模块的导通与关断,进而控制D型氮化镓开关的关断与导通,且不影响其关断速度,确保了效率,同时通过第一控制模块调节D型氮化镓开关的开通速度,以降低后续电路的电压应力,改善EMI特性。In the D-type GaN switch driving circuit and the switching power supply circuit provided by the present invention, the drain of the D-type GaN switch is connected to the first voltage, and its source is respectively coupled to the first terminal of the switch module and the first capacitor The first terminal of the first control module, the gate of which is coupled to the first terminal of the first control module, the second terminal of the first control module is coupled to the second terminal of the first capacitor, and the second control module is coupled to the control of the switch module end, the second end of the first capacitor and the third end of the switch module are grounded, so that the second control module outputs a control signal to control the turn-on and turn-off of the switch module, thereby controlling the turn-off and turn-off of the D-type GaN switch. It is turned on without affecting its turn-off speed, which ensures the efficiency. At the same time, the turn-on speed of the D-type GaN switch is adjusted through the first control module to reduce the voltage stress of the subsequent circuit and improve the EMI characteristics.
附图说明Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单的介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. Those skilled in the art can also obtain other drawings based on these drawings without creative work.
图1是本发明实施例中的D型氮化镓开关驱动电路构造示意图一;FIG. 1 is a first schematic diagram of the structure of a D-type gallium nitride switch driving circuit in an embodiment of the present invention;
图2是本发明实施例中的D型氮化镓开关驱动电路构造示意图二;FIG. 2 is a second structural schematic diagram of a D-type gallium nitride switch driving circuit in an embodiment of the present invention;
图3是本发明一实施例中的D型氮化镓开关驱动电路构造示意图;3 is a schematic structural diagram of a D-type gallium nitride switch drive circuit in an embodiment of the present invention;
图4是本发明另一实施例中的开关电源电路构造示意图;Fig. 4 is a schematic structural diagram of a switching power supply circuit in another embodiment of the present invention;
图5是图4所示的开关电源电路的波形示意图;Fig. 5 is a schematic waveform diagram of the switching power supply circuit shown in Fig. 4;
图6是现有技术中的开关电源电路构造示意图;Fig. 6 is a schematic structural diagram of a switching power supply circuit in the prior art;
图7是图6所示的开关电源电路的波形示意图;Fig. 7 is a schematic waveform diagram of the switching power supply circuit shown in Fig. 6;
附图标记说明:Explanation of reference signs:
10-第一控制模块;10 - the first control module;
20-第二控制模块;20 - the second control module;
101-开通速度控制模块;101 - activate the speed control module;
102-关断速度控制模块;102 - turn off the speed control module;
Vd-第一电压;Vd-the first voltage;
N-GAN-D型氮化镓开关;N-GAN-D GaN switch;
Cgs-第二寄生电容;Cgs - the second parasitic capacitance;
Main Fet-开关模块;Main Fet-switch module;
Sense Fet-第二NMOS开关管;Sense Fet-the second NMOS switch tube;
D1-第一二极管;D1 - the first diode;
D2-第二二极管;D2 - the second diode;
D3-第三二极管;D3 - the third diode;
D4第四二极管;D4 fourth diode;
R1-第一电阻;R1-the first resistor;
R2-第二电阻;R2-the second resistor;
R3-第三电阻;R3-the third resistor;
C1-第一电容;C1-the first capacitor;
C2-第二电容;C2-the second capacitor;
DZ1-钳位稳压二极管;DZ1-clamp Zener diode;
Cvcco-输出电容;Cvcco - output capacitance;
Cvcci-输入电容;Cvcci - input capacitance;
Istart-恒流源。Istart - constant current source.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整的描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里描述的本发明的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。The terms "first", "second", "third", "fourth", etc. (if any) in the description and claims of the present invention and the above drawings are used to distinguish similar objects, and not necessarily Used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a sequence of steps or elements is not necessarily limited to the expressly listed instead, may include other steps or elements not explicitly listed or inherent to the process, method, product or apparatus.
下面以具体的实施例对本发明的技术方案进行详细说明。下面这几个具体的实施例可以相互结合,对于相同或相似的概念或过程可能在某些实施例不再赘述。The technical solution of the present invention will be described in detail below with specific examples. The following specific embodiments may be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.
有鉴于现有技术中,很难在确保效率的情况下,兼顾控制D型的氮化镓开关管的开通速度的问题。本发明提供了一种D型氮化镓开关驱动电路以及开关电源电路,通过D型氮化镓开关的漏极接第一电压,其源极分别耦接至开关模块的第一端以及第一电容的第一端,其栅极耦接至第一控制模块的第一端,第一控制模块的第二端耦接至第一电容的第二端,第二控制模块耦接至开关模块的控制端,第一电容的第二端以及开关模块的第三端接地的方式,使得第二控制模块输出控制信号控制开关模块的导通与关断,进而控制D型氮化镓开关的导通与关断,同时通过第一控制模块独立调节D型氮化镓开关的开通速度,较低的开通速度可以降低后续电路的电压应力,改善EMI特性。In view of the prior art, it is difficult to control the turn-on speed of the D-type GaN switch tube while ensuring the efficiency. The present invention provides a D-type gallium nitride switch driving circuit and a switching power supply circuit. The drain of the D-type gallium nitride switch is connected to the first voltage, and its source is respectively coupled to the first end of the switch module and the first The first terminal of the capacitor, the gate of which is coupled to the first terminal of the first control module, the second terminal of the first control module is coupled to the second terminal of the first capacitor, and the second control module is coupled to the switch module The control terminal, the second terminal of the first capacitor and the third terminal of the switch module are grounded, so that the second control module outputs a control signal to control the on and off of the switch module, thereby controlling the conduction of the D-type GaN switch At the same time, the turn-on speed of the D-type GaN switch is independently adjusted by the first control module. The lower turn-on speed can reduce the voltage stress of the subsequent circuit and improve the EMI characteristics.
请参考图1,本发明实施例提供了一种D型氮化镓开关驱动电路,包括:D型氮化镓开关D-GAN、第一控制模块10、第二控制模块20、第一电容C1以及开关模块SW;其中:Please refer to FIG. 1 , an embodiment of the present invention provides a D-type gallium nitride switch drive circuit, including: a D-type gallium nitride switch D-GAN, a
所述D型氮化镓开关D-GAN的漏极接第一电压Vd,所述D型氮化镓开关D-GAN的源极分别耦接至所述开关模块SW的第一端以及所述第一电容C1的第一端,其栅极耦接至所述第一控制模块10的第一端,所述第一控制模块10的第二端耦接至所述第一电容C1的第二端,所述第二控制模块20耦接至所述开关模块SW的控制端,所述第一电容C1的第二端以及所述开关模块SW的第三端接地;The drain of the D-type gallium nitride switch D-GAN is connected to the first voltage Vd, and the source of the D-type gallium nitride switch D-GAN is respectively coupled to the first terminal of the switch module SW and the The first terminal of the first capacitor C1, the gate of which is coupled to the first terminal of the
所述第二控制模块20用于输出控制信号,控制所述开关模块SW的导通与关断,以控制所述D型氮化镓开关D-GAN的导通与关断,这是因为,D型氮化镓开关D-GAN为常通器件,但具体在实际电源应用中时,终端设备通常要求器件处于常关断模式,这样在对开关的控制失效时,能保证器件仍然处于关断状态,以保证系统安全性;而从图1所示的电路结构可知,当所述D型氮化镓开关D-GAN栅压为0且栅源电压小于其夹断阈值时,其工作在正向阻断模态;当所述开关模块SW导通时,所述D型氮化镓开关D-GAN的栅源电压为零,其漏源极之间已存在2DEG通道,所述D型氮化镓开关D-GAN将导通,因此控制所述开关模块SW的通断即可控制所述D型氮化镓开关D-GAN的通断。The
所述第一控制模块10用于调节所述D型氮化镓开关D-GAN的开通速度。若所述D型氮化镓开关D-GAN的开通速度过快,流过所述开关模块SW的电流将在一极短时间过冲,容易损坏所述开关模块SW,也会导致EMI超标甚至破坏性振荡的问题。而本发明通过第一控制模块10可实现对D型氮化镓开关D-GAN的开通速度的调节,从而可有效保护开关模块SW,并且解决EMI的问题。The
其中,所述D型氮化镓开关D-GAN漏源极之间存在第一寄生电容Cds,第一电容C1用于与所述第一寄生电容Cds(图中未示出)形成分压,以降低D型氮化镓开关D-GAN关断时开关模块SW第一端的电压。Wherein, there is a first parasitic capacitance Cds between the drain and source of the D-type gallium nitride switch D-GAN, and the first capacitance C1 is used to form a voltage divider with the first parasitic capacitance Cds (not shown in the figure), In order to reduce the voltage of the first end of the switch module SW when the D-GaN switch D-GAN is turned off.
作为一种优选实施方式,请参考图1,所述D型氮化镓开关D-GAN驱动电路还包括钳位稳压二极管DZ1;As a preferred implementation manner, please refer to FIG. 1 , the D-GaN switch D-GAN drive circuit also includes a clamping Zener diode DZ1;
所述钳位稳压二极管DZ1的阳极耦接至所述第一电阻的第一端,所述钳位稳压二极管DZ1的阴极耦接至所述D型氮化镓开关D-GAN的源极。The anode of the clamping Zener diode DZ1 is coupled to the first end of the first resistor, and the cathode of the clamping Zener diode DZ1 is coupled to the source of the D-type GaN switch D-GAN .
对于氮化镓功率管,较快的关断速度可以提高电路效率,一种实施方式中,为平衡EMI特性和电路效率,所述第一控制模块10还用于调节所述D型氮化镓开关D-GAN的关断速度,请参考图2,所述第一控制模块10包括并联连接的开通速度控制模块101以及关断速度控制模块102,其中:For gallium nitride power transistors, a faster turn-off speed can improve circuit efficiency. In one embodiment, in order to balance EMI characteristics and circuit efficiency, the
所述开通速度控制模块101用于调节所述D型氮化镓开关D-GAN的开通速度;The turn-on
所述关断速度控制模块102用于调节所述D型氮化镓开关D-GAN的关断速度。The turn-off
一种举例中,如图2所示,所述开通速度控制模块101包括第一电阻R1;其中:In one example, as shown in FIG. 2, the turn-on
所述D型氮化镓开关D-GAN的栅极耦接至所述第一电阻R1的第一端,所述第一电阻R1的第二端还耦接至所述第一电容C1的第二端;The gate of the D-type gallium nitride switch D-GAN is coupled to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 is also coupled to the first terminal of the first capacitor C1. Two ends;
所述第一电阻R1用于调节所述D型氮化镓开关D-GAN的开通速度,具体地,请参考图2,因为所述D型氮化镓开关D-GAN栅源极之间存在第二寄生电容Cgs,所述第二寄生电容Cgs上的电压(即所述D型氮化镓开关D-GAN的栅源电压Vgs)通过所述第一控制模块10放电,在图2所示的示例中,所述第二寄生电容Cgs与所述第一电阻R1组成所述D型氮化镓开关D-GAN开通时的放电电路,增大所述第一电阻R1的阻值即可降低所述D型氮化镓开关D-GAN的开通速度,而较低的开通速度可降低后续电路的电压应力,改善EMI,提高系统可靠性。The first resistor R1 is used to adjust the turn-on speed of the D-type gallium nitride switch D-GAN, specifically, please refer to FIG. 2, because there is an The second parasitic capacitance Cgs, the voltage on the second parasitic capacitance Cgs (that is, the gate-source voltage Vgs of the D-type gallium nitride switch D-GAN) is discharged through the
在该情况下,一种举例中,请参考图2,所述关断速度控制模块102包括第一二极管D1以及第二电阻R2;In this case, in an example, please refer to FIG. 2 , the turn-off
所述第二电阻R2的第一端耦接至所述D型氮化镓开关D-GAN的栅极,其第二端耦接至所述第一二极管D1的阳极;所述第一二极管D1的阴极耦接至所述第一电阻R1的第二端;The first end of the second resistor R2 is coupled to the gate of the D-type GaN switch D-GAN, and the second end is coupled to the anode of the first diode D1; the first The cathode of the diode D1 is coupled to the second end of the first resistor R1;
所述第二电阻R2用于调节所述D型氮化镓开关D-GAN的关断速度,具体地,当所述开关模块SW关断时,所述D型氮化镓开关D-GAN的源极电压开始上升,所述第二寄生电容Cgs上的电压通过所述第一控制模块10开始充电,当所述D型氮化镓开关D-GAN的栅源电压低于夹断电压的阈值后,所述D型氮化镓开关D-GAN开始关断,在图2所示的示例中,所述第二寄生电容Cgs、所述第二电阻R2以及所述第一二极管D1组成关断时的充电电路,降低所述第二电阻R2的阻值即可加快所述D型氮化镓开关D-GAN的关断速度,提高系统效率。其中,所述第二电阻R2的阻值远小于R1的阻值。The second resistor R2 is used to adjust the turn-off speed of the D-type GaN switch D-GAN, specifically, when the switch module SW is turned off, the D-type GaN switch D-GAN The source voltage starts to rise, and the voltage on the second parasitic capacitor Cgs starts to be charged through the
作为一种优选实施方式,设置所述第二电阻R2的阻值为0,使得所述D型氮化镓开关D-GAN的关断速度最快。As a preferred implementation manner, the resistance value of the second resistor R2 is set to 0, so that the turn-off speed of the D-type gallium nitride switch D-GAN is the fastest.
作为举例,所述开关模块SW可以为MOS开关管,所述第二控制模块20连接所述MOS管的栅极并发送控制信号控制所述MOS管的通断。当然,本发明并不以此为限,在其他举例中,所述开关模块SW也可以选择三极管或其他常闭开关器件。As an example, the switch module SW may be a MOS switch tube, and the
一种实施方式中,请参考图3,所述开关模块SW为第一NMOS开关管Main Fet;In one embodiment, please refer to FIG. 3, the switch module SW is the first NMOS switch Main Fet;
所述第一NMOS开关管Main Fet的漏极耦接至所述D型氮化镓开关D-GAN的源极,其栅极耦接至所述第二控制模块20,其源极接地。The drain of the first NMOS switch Main Fet is coupled to the source of the D-type gallium nitride switch D-GAN, its gate is coupled to the
为采样流过所述D型氮化镓开关D-GAN的电流,一种实施方式中,请参考图3,所述D型氮化镓开关D-GAN驱动电路还包括采样模块30,所述采样模块30包括电流检测电阻Rsense以及第二NMOS开关管Sense Fet;In order to sample the current flowing through the D-type gallium nitride switch D-GAN, in an implementation manner, please refer to FIG. 3, the D-type gallium nitride switch D-GAN drive circuit also includes a
所述第二控制模块20的第一端分别耦接至所述第二NMOS开关管Sense Fet的栅极以及所述第一NMOS开关管Main Fet的栅极,其第二端耦接至所述第二NMOS开关管SenseFet的漏极,其第三端耦接至所述电流检测电阻Rsense的第一端,其第四端耦接至所述第一NMOS开关管Main Fet的漏极,其第五端接地;所述电流检测电阻Rsense的第二端以及所述第二NMOS开关管Sense Fet的源极分别接地;The first end of the
所述第二控制模块20的第一端用于输出所述控制信号,控制所述第一NMOS开关管Main Fet以及所述第二NMOS开关管Sense Fet的导通与关断,其第二端以及第四端用于输出相同的电压,以使得所述第二NMOS开关管Sense Fet与所述第一NMOS开关管Main Fet构成电流镜;且所述第二控制模块20还用于将流过所述第二NMOS开关管Sense Fet的电流镜像至所述电流检测电阻Rsense,使得所述电流检测电阻Rsense上留过的电流与所述第二NMOS开关管Sense Fet流过的电流相等。The first end of the
作为一种优选实施方式,所述第一NMOS开关管Main Fet的宽长比大于所述第二NMOS开关管Sense Fet的宽长比。As a preferred implementation manner, the width-to-length ratio of the first NMOS switch transistor Main Fet is greater than the width-to-length ratio of the second NMOS switch transistor Sense Fet.
由于流过所述第一NMOS开关管Main Fet的电流与流过所述D型氮化镓开关D-GAN的电流几乎相等,故采样所述第一NMOS开关管Main Fet的电流即可得到流过所述D型氮化镓开关D-GAN的电流。由于所述第一NMOS开关管Main Fet的Vgs电压以及Vds电压分别与所述第二NMOS开关管Sense Fet的Vgs电压以及Vds电压相等,所以所述第一NMOS开关管MainFet以及所述第二NMOS开关管Sense Fet的Ids电流比将与其宽长比成正比例关系,这样只要采样所述第二NMOS开关管Sense Fet中流过的电流即可知道第一NMOS开关管Main Fet中流过的电流,从而得到所述D型氮化镓开关D-GAN的电流,又由于第二控制模块20将流过所述第二NMOS开关管Sense Fet的电流镜像至所述电流检测电阻Rsense,使得所述电流检测电阻Rsense上留过的电流与所述第二NMOS开关管Sense Fet流过的电流相等;且电路设计固定后,所述电流检测电阻Rsense的电阻值已知,故测量所述电流检测电阻Rsense两端的电压即可得到所述第二NMOS开关管Sense Fet中流过的电流,进而得到第一NMOS开关管Main Fet的电流。Since the current flowing through the first NMOS switch Main Fet is almost equal to the current flowing through the D-type gallium nitride switch D-GAN, the current flowing through the first NMOS switch Main Fet can be obtained by sampling the current of the first NMOS switch Main Fet. current through the D-GaN switch D-GAN. Since the Vgs voltage and the Vds voltage of the first NMOS switch tube Main Fet are respectively equal to the Vgs voltage and the Vds voltage of the second NMOS switch tube Sense Fet, the first NMOS switch tube Main Fet and the second NMOS switch tube The Ids current ratio of the switch tube Sense Fet will be proportional to its width-to-length ratio, so as long as the current flowing through the second NMOS switch tube Sense Fet is sampled, the current flowing through the first NMOS switch tube Main Fet can be known, thereby obtaining The current of the D-type gallium nitride switch D-GAN, and because the
给定流过所述第一NMOS开关管Main Fet的电流I1,流过所述第二NMOS开关管Sense Fet的电流I2,所述电流检测电阻Rsense的阻值,所述电流检测电阻Rsense的两端电压Vcs有如下关系:Given the current I 1 flowing through the first NMOS switch Main Fet, the current I 2 flowing through the second NMOS switch Sense Fet, the resistance value of the current sensing resistor Rsense, the current sensing resistor Rsense The voltage Vcs at both ends has the following relationship:
Vcs=I2·Rsense=K·I1·RsenseVcs=I 2 ·Rsense=K·I 1 ·Rsense
其中,K为第二NMOS开关管Sense Fet与第一NMOS开关管Main Fet的宽长比,通常K为几千分之一,故所述电流检测电阻Rsense上的损耗较低。Wherein, K is the width-to-length ratio of the second NMOS switch Sense Fet to the first NMOS switch Main Fet, usually K is one thousandth, so the loss on the current detection resistor Rsense is relatively low.
作为进一步优选实施方式,所述第一NMOS开关管Main Fet以及所述第二NMOS开关管Sense Fet为集成在同一衬底上,且MOS开关管的工艺相同。在该情况下,为方便测量所述电流检测电阻Rsense的电压,所述电流检测电阻Rsense为片外电阻。As a further preferred implementation manner, the first NMOS switch tube Main Fet and the second NMOS switch tube Sense Fet are integrated on the same substrate, and the processes of the MOS switch tubes are the same. In this case, for the convenience of measuring the voltage of the current detection resistor Rsense, the current detection resistor Rsense is an off-chip resistor.
作为一种优选实施方式,所述第二控制模块20依据外部的信号,进行相应信号的电平处理,使得所述第二控制模块20输出的控制信号的电平适配于后续电路可以接收的电平,请参考图3,所述第二控制模块20的输入端接收输入信号PWM;所述第二控制模块20依据所述输入信号PWM,输出相应的控制信号,其中:As a preferred embodiment, the
若所述输入信号PWM为高电平,所述控制信号为适配的高电平信号;If the input signal PWM is at a high level, the control signal is an adapted high level signal;
若所述输入信号PWM为低电平,所述控制信号为适配的低电平信号。If the input signal PWM is low level, the control signal is an adapted low level signal.
在该情况下,一种实施方式中,所述D型氮化镓开关D-GAN驱动电路还包括输出电容Cvcco;In this case, in an implementation manner, the D-type gallium nitride switch D-GAN drive circuit further includes an output capacitor Cvcco;
所述输出电容Cvcco的第一端耦接至所述第二控制模块20的第六端,所述输出电容Cvcco的第二端接地。The first terminal of the output capacitor Cvcco is coupled to the sixth terminal of the
作为一种优选实施方式,所述D型氮化镓开关D-GAN驱动电路还包括高压启动模块;所述高压启动模块包括第二二极管D2、恒流源Istart、LDO模块以及输入电容Cvcci;As a preferred embodiment, the D-type gallium nitride switch D-GAN drive circuit also includes a high-voltage start module; the high-voltage start module includes a second diode D2, a constant current source Istart, an LDO module, and an input capacitor Cvcci ;
所述D型氮化镓开关D-GAN的源极耦接至所述第二二极管D2的阳极,所述第二二极管D2的阴极耦接至所述恒流源Istart的第一端,所述恒流源Istart的第二端耦接至所述LDO模块的第一端,其第三端耦接至所述第二控制模块20的第七端,所述LDO模块的第二端分别耦接至所述第二控制模块20的第八端以及所述输入电容Cvcci的第一端,所述输入电容Cvcci的第二端接地;其中,The source of the D-type gallium nitride switch D-GAN is coupled to the anode of the second diode D2, and the cathode of the second diode D2 is coupled to the first electrode of the constant current source Istart. end, the second end of the constant current source Istart is coupled to the first end of the LDO module, the third end is coupled to the seventh end of the
所述第二控制模块20的第七端用于控制所述恒流源Istart的开启以及关闭;The seventh end of the
所述输入电容Cvcci用于为所述第二控制模块20供电。The input capacitor Cvcci is used for powering the
电路启动时,所述第一NMOS开关管Main Fet为关断状态,所述D型氮化镓开关D-GAN的栅极电压为零,所述D型氮化镓开关D-GAN的源极电压逐步上升,当所述D型氮化镓开关D-GAN的Vgs电压为其夹断电压Vth时,所述D型氮化镓开关D-GAN关断,此时所述D型氮化镓开关D-GAN的栅极电压为0,其源极电压为Vth,此时所述恒流源Istart从D-GAN的源极取电,通过所述LDO模块对所述输入电容Cvcci充电,当所述输入电容Cvcci的电压为所述第二控制模块20的启动电压时,所述第二控制模块20进入工作状态,所述第二控制模块20输出相应的关闭控制信号关闭恒流源Istart,完成自取电启动。所述输入电容Cvcci上的电压亦可为作为其他外围电路的电压源。When the circuit starts, the Main Fet of the first NMOS switch is in the off state, the gate voltage of the D-type gallium nitride switch D-GAN is zero, and the source of the D-type gallium nitride switch D-GAN The voltage gradually rises, and when the Vgs voltage of the D-type GaN switch D-GAN is its pinch-off voltage Vth, the D-type GaN switch D-GAN is turned off, and at this time the D-type GaN The gate voltage of the switch D-GAN is 0, and its source voltage is Vth. At this time, the constant current source Istart takes power from the source of the D-GAN, and charges the input capacitor Cvcci through the LDO module. When When the voltage of the input capacitor Cvcci is the starting voltage of the
此外,本发明实施例还提供了一种开关电源电路,请参考图4,包括上述的D型氮化镓开关驱动电路,RCD吸收电路40以及初级绕组Np;In addition, an embodiment of the present invention also provides a switching power supply circuit, please refer to FIG. 4 , which includes the above-mentioned D-type gallium nitride switch driving circuit,
所述初级绕组Np的第一端耦接至所述RCD吸收电路40的第一端,其第二端分别耦接至所述RCD吸收电路40的第二端以及所述D型氮化镓开关D-GAN的漏极。The first end of the primary winding Np is coupled to the first end of the
一种举例中,请参考图4,所述RCD吸收电路40包括第二电容C2、第三电阻R3、以及第三二极管D3;In one example, please refer to FIG. 4 , the
所述初级绕组Np的第一端分别耦接至所述第二电容C2的第一端以及所述第三电阻R3的第一端,所述第二电容C2的第二端耦接至所述第三电阻R3的第二端,所述第三电阻R3的第二端耦接至所述第三二极管D3的阴极,所述第三二极管D3的阳极耦接至所述初级绕组Np的第二端。The first end of the primary winding Np is respectively coupled to the first end of the second capacitor C2 and the first end of the third resistor R3, and the second end of the second capacitor C2 is coupled to the The second end of the third resistor R3, the second end of the third resistor R3 is coupled to the cathode of the third diode D3, and the anode of the third diode D3 is coupled to the primary winding The second end of Np.
作为一种实施方式,请参考图4,所述开关电源电路还包括次级绕组Ns。As an implementation manner, please refer to FIG. 4 , the switching power supply circuit further includes a secondary winding Ns.
作为一种优选实施方式,请参考图4,所述开关电源电路还包括电源侧电容Cin;所述初级绕组Np的第一端耦接至所述电源侧电容Cin的第一端,所述电源侧电容Cin的第二端接地。As a preferred implementation manner, please refer to FIG. 4, the switching power supply circuit further includes a power supply side capacitor Cin; the first end of the primary winding Np is coupled to the first end of the power supply side capacitor Cin, the power supply The second terminal of the side capacitor Cin is grounded.
请参考图4,该开关电源电路的次级绕组Ns例如还包括整流二极管D4、第三电容C3以及第四电阻R4。Please refer to FIG. 4 , the secondary winding Ns of the switching power supply circuit further includes, for example, a rectifier diode D4 , a third capacitor C3 and a fourth resistor R4 .
其中,初级绕组Np侧以及次级绕组Ns侧的电路构成与现有的常规电路相同,在此不再赘述。Wherein, the circuit configurations on the side of the primary winding Np and the side of the secondary winding Ns are the same as the existing conventional circuits, and will not be repeated here.
现结合图5以及图7所示的波形图对本发明的D型氮化镓开关驱动电路以及现有的D型氮化镓开关驱动电路在开关电源电路中的工作效果进行对比,其中,图5所示的波形图为图4所述开关电源电路中的工作效果,图7所示的波形图为图6所示的现有的D型氮化镓开关驱动电路在开关电源电路中的工作效果,具体介绍如下:Now compare the D-type GaN switch drive circuit of the present invention with the working effect of the existing D-GaN switch drive circuit in the switching power supply circuit in conjunction with the waveform diagrams shown in Figure 5 and Figure 7, wherein Figure 5 The waveform diagram shown in Figure 4 is the working effect in the switching power supply circuit, and the waveform diagram shown in Figure 7 is the working effect of the existing D-type GaN switching drive circuit shown in Figure 6 in the switching power supply circuit , the details are as follows:
PWM,可以理解为所述第二控制模块20的输出的控制信号;PWM, can be understood as the control signal output by the
Vd-gan,可以理解为所述D型氮化镓开关D-GAN的漏极电压;Vd-gan can be understood as the drain voltage of the D-type gallium nitride switch D-GAN;
Vd-mos,可以理解为所述第一NMOS开关管Main Fet的漏极电压;Vd-mos can be understood as the drain voltage of the first NMOS switching tube Main Fet;
Ids,可以理解为流过所述第一NMOS开关管Main Fet的电流;Ids can be understood as the current flowing through the first NMOS switch Main Fet;
Vcs,可以理解为所述电流检测电阻Rsense的第一端的电压;Vcs can be understood as the voltage at the first end of the current detection resistor Rsense;
Vd2,可以理解为所述次级绕组Ns侧整流二极管D4的电压;Vd2 can be understood as the voltage of the rectifier diode D4 on the side of the secondary winding Ns;
其中,流过所述第一NMOS开关管Main Fet的电流与所述电流检测电阻Rsense的第一端的电压的波形类似,在图5以及图7中以同一波形示意。Wherein, the waveform of the current flowing through the first NMOS switch Main Fet is similar to the voltage of the first terminal of the current detection resistor Rsense, and is shown as the same waveform in FIG. 5 and FIG. 7 .
请参考图6,现有的D型氮化镓开关驱动电路在可以通过调节电阻Rg的阻值和/或调节连接在D型的氮化镓开关管栅极以及源极间的电容C1的电容值,进而调节D型的氮化镓开关管的开关速度,但这种做法对D型的氮化镓开关管的开通速度影响有限,而对其关断速度影响较大,对效率有较大影响。请参考图7中所述第一NMOS开关管Main Fet的漏极电压波形、流过所述第一NMOS开关管Main Fet的电流波形、所述电流检测电阻Rsense的电压波形以及次级绕组Ns侧整流二极管D4的电压波形,在所述D型氮化镓开关D-GAN开通瞬间,其漏极电压以及所述第一NMOS开关管Main Fet的漏极电压的电压降低,但所述第一NMOS开关管Main Fet受到的电流应力、所述电流检测电阻Rsense受到的电压应力以及次级绕组Ns侧整流二极管D4的受到的电压应力较高,在次级绕组Ns侧整流二极管D4还可检测到较高的电压尖峰,其电压应力较高,且电流以及电压的过冲都会导致EMI超标,影响系统安全性和可靠性;Please refer to FIG. 6, the existing D-type GaN switch driving circuit can adjust the resistance value of the resistor Rg and/or adjust the capacitance of the capacitor C1 connected between the gate and the source of the D-type GaN switch. value, and then adjust the switching speed of the D-type GaN switch, but this approach has a limited impact on the turn-on speed of the D-type GaN switch, but has a greater impact on its turn-off speed, which has a greater impact on the efficiency. Influence. Please refer to the drain voltage waveform of the first NMOS switch Main Fet in FIG. 7, the current waveform flowing through the first NMOS switch Main Fet, the voltage waveform of the current detection resistor Rsense, and the side of the secondary winding Ns The voltage waveform of the rectifier diode D4, when the D-type gallium nitride switch D-GAN is turned on, its drain voltage and the drain voltage of the first NMOS switch tube Main Fet decrease, but the first NMOS The current stress of the switching tube Main Fet, the voltage stress of the current detection resistor Rsense, and the voltage stress of the rectifier diode D4 on the side of the secondary winding Ns are relatively high, and the rectifier diode D4 on the side of the secondary winding Ns can also detect relatively high High voltage spikes have high voltage stress, and the overshoot of current and voltage will cause EMI to exceed the standard, affecting system safety and reliability;
而本发明提供的D型氮化镓开关驱动电路中,所述第一电阻R1可降低所述D型氮化镓开关D-GAN的开通速度,同时不影响其关断速度,保证了效率。请参考图5中所述第一NMOS开关管Main Fet的漏极电压波形、流过所述第一NMOS开关管Main Fet的电流波形、所述电流检测电阻Rsense的电压波形以及次级绕组Ns侧整流二极管D4的电压波形,在所述D型氮化镓开关D-GAN开通瞬间,其漏极电压以及所述第一NMOS开关管Main Fet的漏极电压的电压降低,所述第一NMOS开关管Main Fet受到的电流应力、所述电流检测电阻Rsense受到的电压应力以及次级绕组Ns侧整流二极管D4受到的电压应力较低,在次级绕组Ns侧整流二极管D4可检测到较低的电压尖峰,其电压应力较低,有效的防止了电流以及电压的过冲,改善了EMI特性,提高了系统的安全性和可靠性。In the D-GaN switch drive circuit provided by the present invention, the first resistor R1 can reduce the turn-on speed of the D-GaN switch D-GAN without affecting its turn-off speed, thereby ensuring efficiency. Please refer to the drain voltage waveform of the first NMOS switch Main Fet in FIG. 5, the current waveform flowing through the first NMOS switch Main Fet, the voltage waveform of the current detection resistor Rsense, and the side of the secondary winding Ns The voltage waveform of the rectifier diode D4, when the D-type gallium nitride switch D-GAN is turned on, its drain voltage and the voltage of the drain voltage of the first NMOS switch Main Fet decrease, and the first NMOS switch The current stress on the Main Fet, the voltage stress on the current sensing resistor Rsense, and the voltage stress on the rectifier diode D4 on the Ns side of the secondary winding are lower, and a lower voltage can be detected by the rectifier diode D4 on the Ns side of the secondary winding Spike, its voltage stress is low, which effectively prevents the overshoot of current and voltage, improves EMI characteristics, and improves the safety and reliability of the system.
综上所述,本发明提供的D型氮化镓开关驱动电路以及开关电源电路中,通过D型氮化镓开关的漏极接第一电压,其源极分别耦接至开关模块的第一端以及第一电容的第一端,其栅极耦接至第一控制模块的第一端,第一控制模块的第二端耦接至第一电容的第二端,第二控制模块耦接至开关模块的控制端,第一电容的第二端以及开关模块的第三端接地的方式,使得第二控制模块输出控制信号控制开关模块的导通与关断,进而控制D型氮化镓开关的导通与关断,同时通过第一控制模块独立调节D型氮化镓开关的开通速度,较低的开通速度可以降低后续电路的电压应力,改善EMI特性。To sum up, in the D-type GaN switch driving circuit and the switching power supply circuit provided by the present invention, the drain of the D-type GaN switch is connected to the first voltage, and the source is respectively coupled to the first voltage of the switch module. terminal and the first terminal of the first capacitor, the gate of which is coupled to the first terminal of the first control module, the second terminal of the first control module is coupled to the second terminal of the first capacitor, and the second control module is coupled to To the control terminal of the switch module, the second terminal of the first capacitor and the third terminal of the switch module are grounded, so that the second control module outputs a control signal to control the on and off of the switch module, thereby controlling the D-type gallium nitride The switch is turned on and off, and at the same time, the turn-on speed of the D-type GaN switch is independently adjusted through the first control module. The lower turn-on speed can reduce the voltage stress of the subsequent circuit and improve the EMI characteristics.
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the various embodiments of the present invention. scope.
Claims (16)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310160546.2A CN116094292A (en) | 2023-02-24 | 2023-02-24 | D-type gallium nitride switch driving circuit and switching power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310160546.2A CN116094292A (en) | 2023-02-24 | 2023-02-24 | D-type gallium nitride switch driving circuit and switching power supply circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116094292A true CN116094292A (en) | 2023-05-09 |
Family
ID=86188031
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310160546.2A Pending CN116094292A (en) | 2023-02-24 | 2023-02-24 | D-type gallium nitride switch driving circuit and switching power supply circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116094292A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119906399A (en) * | 2025-01-10 | 2025-04-29 | 苏州纳芯微电子股份有限公司 | Gallium nitride switch circuit and driving circuit for the gallium nitride switch circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201159746Y (en) * | 2008-02-03 | 2008-12-03 | 深圳艾科创新微电子有限公司 | Current detection circuit |
| CN104253599A (en) * | 2013-06-25 | 2014-12-31 | 株式会社东芝 | Semiconductor device |
| CN107765067A (en) * | 2017-10-17 | 2018-03-06 | 深圳南云微电子有限公司 | Current detection circuit and electric current detecting method |
| CN110048699A (en) * | 2019-05-21 | 2019-07-23 | 哈尔滨工业大学 | A kind of gate driving circuit inhibiting the bridge arm crosstalk of GaN half-bridge module |
| CN114244095A (en) * | 2021-12-24 | 2022-03-25 | 江苏能华微电子科技发展有限公司 | Power conversion circuit with energy recovery function and power supply with the same |
-
2023
- 2023-02-24 CN CN202310160546.2A patent/CN116094292A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201159746Y (en) * | 2008-02-03 | 2008-12-03 | 深圳艾科创新微电子有限公司 | Current detection circuit |
| CN104253599A (en) * | 2013-06-25 | 2014-12-31 | 株式会社东芝 | Semiconductor device |
| CN107765067A (en) * | 2017-10-17 | 2018-03-06 | 深圳南云微电子有限公司 | Current detection circuit and electric current detecting method |
| CN110048699A (en) * | 2019-05-21 | 2019-07-23 | 哈尔滨工业大学 | A kind of gate driving circuit inhibiting the bridge arm crosstalk of GaN half-bridge module |
| CN114244095A (en) * | 2021-12-24 | 2022-03-25 | 江苏能华微电子科技发展有限公司 | Power conversion circuit with energy recovery function and power supply with the same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119906399A (en) * | 2025-01-10 | 2025-04-29 | 苏州纳芯微电子股份有限公司 | Gallium nitride switch circuit and driving circuit for the gallium nitride switch circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20230327661A1 (en) | Cascode switches including normally-off and normally-on devices and circuits comprising the switches | |
| US8686761B2 (en) | Gate driver and switching power source apparatus | |
| US9793260B2 (en) | System and method for a switch having a normally-on transistor and a normally-off transistor | |
| CN110572020B (en) | Control circuit and flyback switching power supply system | |
| US11245324B2 (en) | Switching converter and a method thereof | |
| US8928363B2 (en) | Semiconductor drive circuit and power conversion apparatus using same | |
| WO2020029540A1 (en) | Driving circuit of power switch tube and device thereof | |
| CN108768367A (en) | SiC MOSFET driving circuits based on gate boost | |
| CN110661438A (en) | Power conversion device with low power consumption and low cost | |
| EP3787164A1 (en) | Gate drive circuit and gate drive method | |
| CN114629358A (en) | Synchronous Rectification Gate Driver with Active Clamp | |
| CN108336896A (en) | Negative pressure driving circuit | |
| US10763737B2 (en) | Waveform shaping circuit, semiconductor device, and switching power supply device | |
| US11791716B2 (en) | Power supply control device and switching power supply including start-up circuit | |
| CN114362488B (en) | Power tube driving control circuit and driving control method | |
| CN110365324B (en) | Grid driving circuit of power tube | |
| US10418910B2 (en) | Isolated switch-mode power supply and control circuit and control method for isolated switch-mode power supply | |
| CN112534668B (en) | Boost converter short circuit protection | |
| CN111865055B (en) | Synchronous rectification drive circuit for pulling down grid voltage of synchronous rectification tube in advance | |
| CN116094292A (en) | D-type gallium nitride switch driving circuit and switching power supply circuit | |
| JP7189721B2 (en) | Drive devices, isolated DC/DC converters, AC/DC converters, power adapters and electrical equipment | |
| CN108696268B (en) | A direct drive circuit for normally-on GaN FETs | |
| CN114915148A (en) | A drive circuit and bridge circuit | |
| US20230421151A1 (en) | Gate driving circuit | |
| US12267001B2 (en) | High-voltage power supply device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |