CN115603747A - Quantization method and analog-to-digital converter, electronic device, computer-readable storage medium - Google Patents

Abstract

The present disclosure provides a quantization method, an analog-to-digital converter, an electronic device, and a computer-readable storage medium, the method including obtaining a signal to be quantized and a reference signal, wherein the reference signal includes a threshold decision section reference signal and a quantization section reference signal; carrying out threshold judgment on the signal to be quantized by utilizing the reference signal of the threshold judgment section, and determining a plurality of sections of effective signals to be quantized; and quantizing any effective signal to be quantized in the multiple effective quantized signals by using the quantized segment reference signals to obtain a quantization result of the signal to be quantized. The quantization speed can be improved according to the embodiments of the present disclosure.

Description

Quantization method and analog-to-digital converter, electronic device, computer-readable storage medium

technical field

The present disclosure relates to the field of electronic technology, and in particular to a quantization method, an analog-to-digital converter, electronic equipment, and a computer-readable storage medium.

Background technique

The single-slope ADC (Analog-to-Digital Converter, analog-to-digital converter) compares the input analog voltage signal with the single-slope signal, converts the input voltage information into time information, and then converts the time information into digital codes, thereby realizing Conversion of analog signals to digital signals. Single-slope ADCs have the advantages of simple structure, high scalability, and high precision, and can be used in sensors, instrumentation, image recognition, and other fields.

Contents of the invention

The disclosure provides a quantization method, an analog-to-digital converter, electronic equipment, and a computer-readable storage medium.

In a first aspect, the present disclosure provides a quantization method, which includes: acquiring a signal to be quantized and a reference signal, wherein the reference signal includes a threshold judgment segment reference signal and a quantization segment reference signal;

Perform threshold judgment on the signal to be quantized by using the reference signal of the threshold judgment section to determine multiple valid signals to be quantized;

Quantizing any segment of the effective signal to be quantized in the plurality of segments of effective quantized signals by using the quantization segment reference signal to obtain a quantization result of the signal to be quantized.

In a second aspect, the present disclosure provides an analog-to-digital converter, including:

An acquisition module, configured to acquire a signal to be quantized and a reference signal, wherein the reference signal includes a threshold judgment segment reference signal and a quantization segment reference signal;

A judging module, configured to use the threshold judging section reference signal to perform threshold judging on the signal to be quantized, and determine a multi-segment valid signal to be quantized;

A quantization module, configured to quantize any effective signal to be quantized in the plurality of effective quantized signals by using the quantized segment reference signal, and obtain a quantization result of the signal to be quantized.

In a third aspect, the present disclosure provides an electronic device, which includes: at least one processor; and a memory communicated with the at least one processor; wherein, the memory stores information that can be processed by the at least one processor. One or more computer programs executed by the at least one processor, and one or more computer programs are executed by the at least one processor, so that the at least one processor can execute the above quantification method.

In a fourth aspect, the present disclosure provides a computer-readable storage medium on which a computer program is stored, wherein the computer program implements the above-mentioned quantization method when executed by a processor/processing core.

In the quantization method provided by the embodiments of the present disclosure, the reference signal includes a threshold judgment section reference signal and a quantization section reference signal, and the threshold judgment section reference signal is used to perform threshold judgment on the signal to be quantized, and the quantization signal that is easily affected by noise in the to-be-quantized signal is determined as For the invalid segment quantization signal, when quantizing the signal to be quantized, it is not necessary to quantize all the valid signals to be quantized, but only to quantify any effective signal to be quantized in the multi-segment valid signal to be quantized to obtain the quantization of the signal to be quantized As a result, the efficiency of quantization is thereby improved.

It should be understood that what is described in this section is not intended to identify key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will be readily understood through the following description.

Description of drawings

The accompanying drawings are used to provide a further understanding of the present disclosure, and constitute a part of the specification, and are used together with the embodiments of the present disclosure to explain the present disclosure, and do not constitute a limitation to the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing detailed example embodiments with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram of an analog-to-digital converter provided by an embodiment of the present disclosure;

FIG. 2 is a waveform diagram of a reference signal in an embodiment of the present disclosure;

FIG. 3 is a flowchart of a quantification method provided by an embodiment of the present disclosure;

FIG. 4 is a waveform diagram of another reference signal provided by an embodiment of the present disclosure;

FIG. 5 is a waveform diagram of another reference signal provided by an embodiment of the present disclosure;

FIG. 6 is a working sequence diagram of an analog-to-digital converter provided by an embodiment of the present disclosure;

FIG. 7 is a waveform diagram of a reference signal and a signal to be quantized provided by an embodiment of the present disclosure;

FIG. 8 is a waveform diagram of another reference signal and a signal to be quantized provided by an embodiment of the present disclosure;

FIG. 9 is a graph of code values output by an analog-to-digital converter provided by an embodiment of the present disclosure;

Fig. 10 is a code value curve diagram output by a current analog-to-digital converter;

Fig. 11 is a block diagram of an electronic device provided by an embodiment of the present disclosure.

detailed description

In order for those skilled in the art to better understand the technical solution of the present disclosure, the exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present disclosure to facilitate understanding, and they should be considered exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

In the case of no conflict, various embodiments of the present disclosure and various features in the embodiments can be combined with each other.

As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

The terminology used herein is for describing particular embodiments only and is not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that when the terms "comprising" and/or "consisting of" are used in this specification, the stated features, integers, steps, operations, elements and/or components are specified to be present but not excluded to be present or Add one or more other features, integers, steps, operations, elements, components and/or groups thereof. Words such as "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant art and the present disclosure, and will not be interpreted as having idealized or excessive formal meanings, Unless expressly so limited herein.

The single-slope ADC can quantize the signal to be quantized by using the reference signal that slopes linearly down. into the latch to obtain the quantization result of the signal to be quantized.

The related technology needs to quantize all the signals to be quantized. If the frequency of the reference signal is n bits, it takes 2 ⁿ clock cycles to complete the quantization, and the quantization efficiency is low.

Studies have shown that there are low-signal segments that are easily affected by noise in the signal to be quantized, and the low-signal segment is an invalid signal to be quantized. Quantizing the invalid signal to be quantized also reduces the quantization efficiency.

Based on this, an embodiment of the present disclosure provides a quantization method, which can improve quantization efficiency.

FIG. 1 is a schematic diagram of an analog-to-digital converter provided by an embodiment of the present disclosure. As shown in FIG. 1 , the analog-to-digital converter includes an acquisition module 10 configured to acquire an input signal of the analog-to-digital converter, such as acquiring a signal to be quantized and a reference signal.

In some embodiments, the reference signal can be generated by the reference signal generation submodule 11, for example, the DAC signal can be used as the reference signal generated by the reference signal generation submodule; the signal to be quantized is generated by the corresponding signal to be quantized generation submodule 12 , The acquired signal that needs to be converted from analog to digital. This embodiment does not limit the specific structures of the reference signal generating sub-module 11 and the signal-to-be-quantized generating sub-module 12 . The output ends of the reference signal generation sub-module 11 and the signal-to-be-quantized generation sub-module 12 are electrically connected to the input end of the judgment module 20 .

In some embodiments, as shown in FIG. 2 , the reference signal includes a threshold judgment section reference signal and a quantization section reference signal, wherein the threshold judgment section reference signal is used to perform threshold judgment on the signal to be quantized, so as to determine the effective waiting period in the signal to be quantized. Quantized signal and invalid signal to be quantized. The quantization segment reference signal is used to perform quantization processing on the signal to be quantized.

In some embodiments, the reference signal also includes a sample segment reference signal.

As shown in Figure 2, the reference signal includes the reference signal of the sampling section, the reference signal of the threshold judgment section and the reference signal of the quantization section, that is, the reference signal is divided into three sections, and the voltage value of the reference signal of the sampling section is a constant value, such as V0, and the threshold judgment The voltage value of the segment reference signal may include multiple voltage values, such as V1 and V2, and the voltage value of the quantized segment reference signal is a continuously changing value.

The judging module 20 is configured to make a threshold judgment on the signal to be quantized by using the reference signal of the threshold judgment section to determine a valid signal to be quantized.

Wherein, the threshold judgment can compare the voltage value of the reference signal and the voltage value of the signal to be quantized in the threshold judgment section, and determine the valid signal to be quantized and the invalid signal to be quantized based on the voltage comparison result.

In some embodiments, the judging module 20 includes a comparator submodule 21 and a counter submodule 22, wherein,

The comparator sub-module 21 is configured to compare the voltage value of the reference signal of the threshold judgment section with the voltage value of the signal to be quantized to obtain a first comparison result. The first input terminal INN of the comparator sub-module 21 is electrically connected to the output terminal of the signal-to-be-quantized acquisition sub-module 12 , and the second input terminal of the comparator sub-module 21 is electrically connected to the second output terminal of the reference signal generation sub-module 11 .

The counter sub-module 22 is configured to determine the threshold judgment result based on the first comparison result; the input terminal of the counter sub-module 22 is connected to the output terminal of the comparator sub-module 21 .

The quantization module 30 includes a comparator submodule 21 and a counter submodule 22, wherein the comparator submodule 21 is also used to compare the voltage value of the signal to be quantized with the voltage value of the quantization segment reference signal to obtain a second comparison result. The counter sub-module 22 is also used to record the inversion of the comparator sub-module 21 based on the second comparison result.

In some embodiments, as shown in FIG. 2 , the threshold judgment segment reference signal includes a sampling segment reference signal V0 , a first threshold judgment segment reference signal V1 and a second threshold judgment segment reference signal V2 .

In some embodiments, the first comparison result obtained by the comparator sub-module 21 includes that the voltage value Vx of the signal to be quantized is less than the voltage value V1 of the reference signal in the first threshold judgment section, and the voltage value Vx of the signal to be quantized is equal to the first threshold judgment The voltage value V1 of the segment reference signal, the voltage value Vx of the signal to be quantized is greater than the voltage value V1 of the reference signal of the first threshold judgment segment, and the voltage value Vx of the signal to be quantized is smaller than the voltage value V2 of the reference signal of the second threshold judgment segment, to be The voltage value Vx of the quantized signal is equal to the voltage value V2 of the reference signal in the second threshold judgment section, and the voltage value Vx of the signal to be quantized is greater than the voltage value V2 of the reference signal in the second threshold judgment section.

If the voltage value V1 of the reference signal in the first threshold judgment section is greater than the voltage value V2 of the reference signal in the second threshold judgment section, the threshold judgment result determined by the counter submodule 22 includes: the voltage value Vx of the signal to be quantized is greater than the reference signal in the first threshold judgment section. The voltage value V1 of the signal; the voltage value Vx of the signal to be quantized is less than or equal to the voltage value V1 of the reference signal in the first threshold judgment section, and at the same time, the voltage value Vx of the signal to be quantized is greater than or equal to the voltage value of the reference signal in the second threshold judgment section V2; the voltage value Vx of the signal to be quantized is smaller than the voltage value V2 of the reference signal of the second threshold judgment section, that is, the signal to be quantized is divided into three interval sections by the first threshold judgment section reference signal and the second threshold judgment section reference signal.

In the embodiment of the present disclosure, the signal to be quantized is a differential signal, such as the differential signal (VIN-VIP) of the first input signal VIN and the second input signal VIP, and a signal to be quantized close to 0 is determined as an invalid signal to be quantized, That is, signals to be quantized with V1≦Vx≦V2 are determined as invalid signals to be quantized, where Vx is a voltage value of the signal to be quantized. The signals to be quantized with Vx<V1 and Vx>V2 are determined as valid signals to be quantized.

By adjusting the voltage value V1 of the reference signal in the first threshold judgment section and the voltage value V2 of the reference signal in the second threshold judgment section, the size of the interval between valid signals to be quantized and invalid signals to be quantized can be controlled. In some embodiments, by adjusting the voltage value V1 of the reference signal in the first threshold judgment section and the voltage value V2 of the reference signal in the second threshold judgment section, the range of invalid signals to be quantized can be controlled within a range of 10%, for example, when When the voltage value of the signal to be quantized is [-1V, 1V], the invalid signal to be quantized can be controlled within the interval [-0.1V, 0.1V], [-1V, -0.1V] and [0.1V, 1V] are Valid signal to be quantized.

The quantization module 30 is configured to use the quantization segment reference signal to quantize any effective signal to be quantized in the multi-segment effective quantization signal, and obtain a quantization result of the signal to be quantized.

In some embodiments, the quantization module 30 includes a comparator submodule 21 and a counter submodule 22 , that is, the quantization module 30 and the judgment module 20 share the comparator submodule 21 and the counter submodule 22 . In some embodiments, the quantization module 30 and the judging module 20 use different comparator sub-modules 21 and 22 . However, the quantization module 30 and the judging module 20 share the comparator submodule 21 and the counter submodule 22, which can reduce the cost and volume of the analog-to-digital converter.

In the threshold judgment stage, utilize the comparator submodule 21 to compare the reference signal of the threshold judgment section with the signal to be quantized to obtain the first comparison result, and use the counter submodule 22 to count the first comparison result obtained by the comparator submodule 21, To determine the effective signal to be quantified. In the quantization phase, use the comparator sub-module 21 to compare the quantized section reference signal and the signal to be quantized to obtain the second comparison result, and use the counter sub-module 22 to perform statistics on the second comparison result obtained by the comparator sub-module 21 to obtain the to-be-quantized signal. The quantization result of the quantized signal.

The comparator sub-module 21 is used to compare the voltage value of the reference signal of the quantization segment with the voltage value of any effective segment of the signal to be quantized to obtain a second comparison result. The counter sub-module 22 is used for obtaining the quantization result of the signal to be quantized based on the second comparison result.

In some embodiments, the comparator sub-module 21 compares the reference signal of the quantization segment and the effective signal to be quantized, and when the comparator sub-module 21 flips, the counter sub-module 22 stops counting.

In some embodiments, as shown in FIG. 2, the analog-to-digital converter further includes a common-mode voltage module 40 and a reference voltage module 50, wherein,

The common-mode voltage module 40 is configured to generate the common-mode voltage VCM of the comparator sub-module 21 , and the output terminal of the common-mode voltage module 40 is electrically connected to the second input terminal of the comparator sub-module 21 .

When the common-mode voltage module 40 is electrically connected to the second input terminal of the comparator sub-module 21 , when the common-mode voltage VCM is input to the comparator sub-module 21 , the reference signal of the signal to be quantized is sampled.

The reference voltage module 50 is configured to generate the reference voltage VREF of the comparator sub-module 21 , the output terminal of the reference voltage module is electrically connected to the second input terminal of the comparator sub-module 21 .

After the threshold judgment is completed, if the highest count value of the counter submodule 22 is "1", then the reference voltage module 50 is electrically connected to the second input terminal of the comparator submodule 21, otherwise, the reference voltage module 50 and the second input terminal of the comparator submodule 21 are disconnected. The second input end of the comparator sub-module 21 is electrically connected.

In the analog-to-digital converter provided by the embodiments of the present disclosure, the reference signal acquired by the acquisition module includes a threshold judgment section reference signal and a quantization section reference signal, and the judgment module uses the threshold judgment section reference signal to perform threshold judgment on the signal to be quantized, and easily The invalid band quantization signal affected by the noise is removed, and the multi-segment effective signal to be quantized is determined. When the quantization module quantizes the signal to be quantized, it does not need to quantify all the effective signals to be quantized, but only needs to be valid for any segment of the multi-segment effective signal to be quantized. By performing quantization on the signal to be quantized, the quantization result of the signal to be quantized can be obtained, thereby improving the efficiency of quantization.

Embodiments of the present disclosure also provide a quantization method, which can improve quantization efficiency. Fig. 3 is a flowchart of a quantization method provided by an embodiment of the present disclosure. As shown in Figure 3, quantification methods include:

Step S301, acquiring a signal to be quantized and a reference signal, wherein the reference signal includes a reference signal of a threshold judgment section and a reference signal of a quantization section, and both the signal to be quantized and the reference signal are analog signals.

Step S302, using the threshold judgment section reference signal to perform threshold judgment on the signal to be quantized, and determine multiple effective sections of the signal to be quantized.

Step S303, using the quantization segment reference signal to quantize any segment of the effective signal to be quantized among the multiple segments of the effective quantization signal, and obtain a quantization result of the signal to be quantized.

In the quantization method provided by the embodiments of the present disclosure, the reference signal includes a threshold judgment section reference signal and a quantization section reference signal, and the threshold judgment section reference signal is used to perform threshold judgment on the signal to be quantized, and the invalid band quantization signal that is easily affected by noise in the to-be-quantized signal To determine the multi-segment effective signals to be quantized. When quantizing the signals to be quantized, it is not necessary to quantize all the effective signals to be quantized. The quantization result of the quantized signal is used to improve the efficiency of quantization.

In some embodiments, the reference signal includes one or more threshold judgment section reference signals, and each threshold judgment section reference signal has a different voltage value.

As shown in FIG. 2 , the reference signal includes two threshold judgment section reference signals, wherein the voltage value of the first threshold judgment section reference signal is V1, and the second threshold judgment section reference signal has a voltage value of V2, V1≠V2.

In some embodiments, the reference signal includes a threshold judgment segment reference signal, which can be used to judge the positive direction of the signal to be quantized or the negative direction of the signal to be quantized. For example, the positive direction of the signal to be quantized is judged by using a threshold judgment section reference signal, if the voltage value of the signal to be quantized is less than or equal to the voltage value of the reference signal of the threshold judgment section, the signal to be quantized is an invalid signal to be quantized, otherwise , is an effective signal to be quantized. For another example, the negative direction of the signal to be quantized is judged by using a threshold judgment section reference signal, if the voltage value of the signal to be quantized is greater than or equal to the voltage value of the threshold judgment section reference signal, then the signal to be quantized is an invalid signal to be quantized, Otherwise, it is a valid signal to be quantized.

In some embodiments, the reference signal includes a multi-segment threshold judgment segment reference signal. As shown in Figure 4, the reference signal includes four threshold judgment section reference signals, wherein the voltage value of the first threshold judgment section reference signal is V1, the voltage value of the second threshold judgment section reference signal is V2, and the third threshold judgment section reference signal is V2. The voltage value of the reference signal is V3, the voltage value of the reference signal in the fourth threshold judgment section is V4, and V1≠V2≠V3≠V4.

Using the voltage value V2 of the reference signal in the second threshold judgment section and the voltage value V4 of the reference signal in the fourth threshold judgment section, threshold judgment is performed on the positive and negative directions of the signal to be quantized, respectively. When the voltage value of the signal to be quantized is greater than the voltage value V2 of the reference signal in the second threshold judgment section, the signal to be quantized is an effective signal to be quantized. When the voltage value of the signal to be quantized is less than or equal to the voltage value V2 of the reference signal in the second threshold judgment section and greater than or equal to the voltage value V4 of the reference signal in the fourth threshold judgment section, the signal to be quantized is an invalid signal to be quantized. When the voltage value of the signal to be quantized is less than the voltage value V4 of the reference signal in the fourth threshold judgment section, the signal to be quantized is an effective signal to be quantized.

When it is determined that the voltage value of the signal to be quantized is greater than the voltage value V2 of the second threshold judgment section reference signal, the voltage value V1 of the first threshold judgment section reference signal can be referred to to increase the voltage value of the quantization section reference signal, so that the quantization section reference signal Can be interleaved with the signal to be quantized. In this embodiment, the voltage value of the quantization segment reference signal is determined more accurately by using multiple threshold judgment methods, and it is not necessary to adjust the voltage value of the quantization segment reference signal multiple times to determine the voltage value of the quantization segment reference signal at an appropriate range, so that the quantization efficiency of the effective signal to be quantized can be realized more efficiently.

It should be noted that, the embodiment of the present disclosure only lists two types of reference signals, but the present disclosure is not limited thereto. The reference signal may only include a section of threshold judgment section reference signal, or may be more sections of threshold judgment section reference signal . When the reference signal includes multiple reference signals for threshold judgment segments, the voltage values of the reference signals for each threshold judgment segment are different.

In some embodiments, as shown in FIG. 2 , the reference signal further includes a reference signal of a sampling segment. In the reference signal of the sampling segment, an analog-to-digital converter is used to acquire the signal to be quantized, and threshold judgment and quantization steps are not performed.

The threshold judgment section reference signal includes a first threshold judgment section reference signal and a second threshold judgment section reference signal, the first voltage difference between the voltage value V1 of the first threshold judgment section reference signal and the voltage value V0 of the sampling section reference signal It is equal to the second voltage difference between the voltage value V2 of the reference signal of the second threshold judgment section and the voltage value V0 of the reference signal of the sampling section. In other words, in the embodiment of the present disclosure, the voltage value V1 of the reference signal of the first threshold determination segment and the voltage value V2 of the reference signal of the second threshold determination segment are symmetrical with respect to the voltage value V0 of the reference signal of the sampling segment. In the embodiment of the present disclosure, the voltage value V1 of the reference signal of the first threshold judgment section and the voltage value V2 of the reference signal of the second threshold judgment section may also be asymmetrical, but the voltage value V1 of the reference signal of the first threshold judgment section and the second threshold The voltage value V2 of the reference signal of the judging segment is respectively located on both sides of the voltage value V0 of the reference signal of the sampling segment. For example, the voltage value V1 of the reference signal in the first threshold judgment section is consistent with the voltage value V0 of the reference signal in the sampling section; or, the voltage value V2 of the reference signal in the second threshold judgment section is consistent with the voltage value V0 of the reference signal in the sampling section; or, The voltage value V1 of the reference signal of the first threshold judgment section and the voltage value V2 of the reference signal of the second threshold judgment section may also be different values.

In some embodiments, step S302, using the threshold judgment segment reference signal to perform threshold judgment on the signal to be quantized to determine multiple effective segments of the signal to be quantized, including:

When the reference signal jumps from the reference signal of the sampling section to the reference signal of the first threshold judgment section, the reference signal of the first threshold judgment section is used to perform threshold judgment on the signal to be quantized to obtain the first threshold judgment result; the reference voltage is referenced from the first threshold judgment section When the signal jumps to the reference signal of the second threshold judgment section, the second threshold judgment section reference signal is used to perform threshold judgment on the signal to be quantized, and a second threshold judgment result is obtained; based on the first threshold judgment result and the second threshold judgment result, the quantized signal is Segmentation is performed to determine multiple effective segments of the signal to be quantized.

In the embodiment of the present disclosure, the threshold judgment result includes a first threshold judgment result and a second threshold judgment result, and the first threshold judgment result is a comparison result between the voltage value of the reference signal in the first threshold judgment section and the voltage value of the signal to be quantized, The second threshold judgment result is a comparison result between the voltage value of the reference signal and the voltage value of the signal to be quantized in the second threshold judgment section. Based on the first threshold judgment result and the second threshold judgment result, the signal to be quantized can be divided into multiple segments of valid signals to be quantized.

In some embodiments, if the voltage value of the reference signal in the first threshold judgment section is greater than or equal to the voltage value of the reference signal in the second threshold judgment section; then based on the first threshold judgment result and the second threshold judgment result, the to-be-quantified The signal is segmented to determine multiple valid signals to be quantized, including:

If the voltage value of the signal to be quantized is greater than the voltage value of the reference signal in the first threshold judgment section, the signal to be quantized is an effective signal to be quantized; if the voltage value of the signal to be quantized is less than or equal to the voltage value of the reference signal in the first threshold judgment section , and the voltage value of the signal to be quantized is greater than or equal to the voltage value of the reference signal in the second threshold judgment section, then the signal to be quantized is an invalid signal to be quantized; if the voltage value of the signal to be quantized is less than the voltage of the reference signal in the second threshold judgment section value, the signal to be quantized is an effective signal to be quantized.

For example, the voltage value Vx of the signal to be quantized is greater than the voltage value V1 of the reference signal in the first threshold judgment section; the voltage value Vx of the signal to be quantized is less than or equal to the voltage value V1 of the reference signal in the first threshold judgment section, and at the same time, the signal to be quantized The voltage value Vx of the second threshold judgment section is greater than or equal to the voltage value V2 of the reference signal of the second threshold judgment section; The two-threshold judgment segment reference signal divides the signal to be quantized into three interval segments.

When the signal to be quantized is a differential signal, the signal to be quantized close to 0 is determined as an invalid signal to be quantized, that is, the signal to be quantized with V1≤Vx≤V2 is determined to be an invalid signal to be quantized. The signals to be quantized with Vx<V1 and Vx>V2 are determined as valid signals to be quantized.

In some embodiments, in step S203, the quantization segment reference signal is used to quantize any segment of the effective signal to be quantized in the multi-segment effective quantization signal, and obtain the quantization result of the signal to be quantized, including:

Comparing the reference signal of the quantization segment with any effective signal to be quantized to obtain a plurality of second comparison results; and obtaining quantization results of the signal to be quantized based on the plurality of second comparison results.

In the embodiment of the present disclosure, when the reference signal of the quantization segment is compared with any effective signal to be quantized, the second comparison result is obtained. Since a comparison is performed every clock cycle, and multiple comparisons are performed for each quantization, therefore, A plurality of second comparison results may be obtained for each quantization. By counting these second comparison results, a quantitative result can be obtained.

The embodiment of the present disclosure only needs to quantize any effective signal to be quantized, and does not need to quantize all the signals to be quantized, which reduces the number of comparisons, and the quantization time only needs 2 ^n-1 clocks, compared to the current 2 ⁿ Clock, improved quantization speed.

In order to better understand the analog-to-digital converter and the quantization method provided by the embodiments of the present disclosure, the reference signal includes two threshold judgment segment reference signals as an example for description below.

In the embodiment of the present disclosure, as shown in FIG. 5 , the voltage value of the reference signal in the sampling section is VA+VTH, the voltage value of the reference signal in the first threshold judgment section is VA+2*VTH, and the voltage value of the reference signal in the second threshold judgment section is The voltage value is VA. Among them, VA=127*LSB, VTH=k*LSB, LSB represents the quantization precision, and the value of k can be set by the register.

The signal to be quantized is a differential signal (VIN-VIP) of the first input signal VIN and the second input signal VIP, and the embodiment of the present disclosure quantizes the difference between the input differential signals, and the quantization precision is 8 bits. It should be noted that the quantization precision can be set arbitrarily as required.

In the embodiment of the present disclosure, as shown in FIG. 1 , the first input terminal INN of the comparator submodule 21 is connected to the signal to be quantized, and the second input terminal INP of the comparator submodule 21 is connected to the reference signal. common mode voltage signal or reference voltage signal. When the output of the comparator sub-module 21 is high level, the counter sub-module 22 counts; when the output of the comparator sub-module 21 is low level, the counter sub-module 22 does not count.

As shown in Figure 6, the working timing diagram of the analog-to-digital converter. In Fig. 6, DAC_CODE is the input code value of the control reference signal (both are corresponding decimal values): sampling stage DAC_CODE=(127+k); threshold judgment stage DAC_CODE changes from (127+2k) to 127; fine quantization stage DAC_CODE decreases linearly from 127 to 0.

CNT_RSTN is the counter reset signal, which is reset and cleared during the sampling phase of the comparator sub-module.

CNT_CLK0 is the clock signal in the threshold judgment stage. In each quantization period, there are only 2 high pulses, and the rising edge is the trigger edge. The first rising edge corresponds to the jump from (127+2k) to 127 when DAC_CODE At this time, determine which interval segment the signal to be quantized is in.

CNT_CLK1 is the clock signal after the fine quantization starts, and there are 127 high pulses in each quantization period;

The LATCH signal is the signal to store the code value Q<7:0> in the counter into the latch, and obtain the code value DOUT<7:0> of the latch.

As shown in Figure 1, Figure 5 and Figure 6, the quantization process of the analog-to-digital converter includes:

Step S61 , in the sampling segment reference signal stage, the first input signal VIN and the sampling segment reference signal are respectively input to the first input terminal INN and the second input terminal INP of the comparator sub-module.

In step S62, the second input signal VIP is input to the first input terminal of the comparator sub-module. At this time, the voltage variation of the first input terminal of the comparator sub-module is the absolute value of (VIN-VIP).

Step S63, when the reference voltage jumps from the voltage value (VA+VTH) of the reference signal of the sampling segment to the voltage value (VA+2*VTH) of the reference signal of the first threshold judgment segment, the first threshold judgment is performed, that is, the comparison The difference between the signal to be quantized (VIN-VIP) and the magnitude of -VTH. If (VIN-VIP)<-VTH, the output of the comparator sub-module is turned from high potential to low potential, the first rising edge of the CNT_CLK0 signal does not count, and the counter sub-module outputs the first count value Q<7>=0, The second counting digital value Q_TMP<7>=0; if (VIN-VIP)>-VTH, the output of the comparator sub-module is high level, the first rising edge of the CNT_CLK0 signal counts a number, and the comparator sub-module outputs the first The first count digital value Q<7>=0, the second count digital value Q_TMP<7>=1. Among them, Q<7> is the maximum value among Q<7:0>.

Step S64, when the output voltage of the reference signal jumps from the voltage value (VA+2*VTH) of the reference signal in the first threshold judgment section to the voltage value VA of the reference signal in the second threshold judgment section, a second threshold judgment is performed, That is, compare the difference between (VIN-VIP) and VTH; if (VIN-VIP)<VTH, the output of the comparator sub-module is turned from high potential to low potential, the second rising edge of the CNT_CLK0 signal does not count, and the counter sub-module The output of the module remains unchanged, that is, the first counting digital value Q<7>=0, the second counting digital value Q_TMP<7>=1; if (VIN-VIP)>VTH, the comparator sub-module output is still high potential, CNT_CLK0 The second rising edge of the signal continues to count a number, the counter submodule outputs the first counting value Q<7>=1, and the second counting value Q_TMP<7>=0.

Step S65, segmenting the signal to be quantized based on the threshold judgment result above:

When VIN-VIP<-VTH, the first counting value Q<7>=0, the second counting value Q_TMP<7>=0, the signal to be quantized is an effective signal to be quantized;

When -VTH=<VIN-VIP=<VTH, the first counting value Q<7>=0, the second counting value Q_TMP<7>=1, the signal to be quantized is an invalid signal to be quantized;

When VIN-VIP>=VTH, the first count value Q<7>=1, the second count value Q_TMP<7>=0, the signal to be quantized is a valid signal to be quantized.

When the first counting digital value Q<7>=0, the reference voltage module is electrically connected to the second input terminal INP of the comparator sub-module. At this time, the value of the second input terminal INP is VREF, namely VREF=VCM+VTH +VA. When the first count value Q<7>=1, the reference voltage module is disconnected from the second input terminal INP of the comparator sub-module, and the value of the second input terminal INP remains the same.

It is not difficult to understand that the signal to be quantized is divided into three sections according to the threshold judgment result, and the middle section is an invalid signal to be quantized close to 0.

Step S66, based on the threshold judgment result, quantize one segment of the effective signal to be quantized.

In step S66, when the threshold judgment result is the first counting code value Q<7>=0, the input differential signal (VIN-VIP)>0, the voltage of the quantization segment reference signal linearly drops from VA to 0, and according to Fig. 7 The waveform shown is quantized, the waveforms of the first input terminal INN and the first input terminal INP of the comparator sub-module, the first input terminal INP of the comparator sub-module drops from VCM+VTH+VA to VCM+VTH; if the threshold judges The result is that the first counting digital value Q<7>=1, (VIN-VIP)>0, the voltage of the reference signal of the quantization segment drops linearly from VA to 0, and quantization is performed according to the waveform shown in Figure 8, the comparator sub-module The first input terminal INP drops from VCM-VTH to VCM-VTH-VA; each fine quantization only needs to execute 2 ⁷ -1=127 clock cycles, so it is shorter than the quantization time of traditional 8bit single-slope ADC (traditional quantization The time is 2 ⁸ -1 clock cycles). In the reference signal of the quantization section of the reference signal shown in FIG. 7, compared with the voltage value of the second threshold judgment reference signal, there is a signal value rising process at the beginning of quantization, that is, in the reference signal of FIG. At the junction of the 'threshold judgment' and 'quantization' stages, the reference signal is raised from VCM-VTH to VCM+VTH+VA, so that the slope signal of the reference signal in the quantization section crosses the signal to be quantized. It can be understood that, the lift value of the reference signal of the quantization segment may be determined based on empirical values, or in combination with the voltage value of the reference signal of the first threshold judgment segment.

Step S67, all counter code values Q<7:0> in the counter sub-module are stored in the latch (not shown in the figure) when the LATCH signal is high pulsed, and the quantized code value DOUT<7:0> is obtained .

FIG. 9 is a graph of code values output by an analog-to-digital converter provided by an embodiment of the present disclosure. Wherein, the horizontal axis is the signal to be quantized, that is, the difference between (VIN-VIP), and the vertical axis is the 8-bit code value of the quantized output. It can be seen from the figure that in the invalid signal segment to be quantized (VIN-VIP)=[-VTH, VTH], the output code value is 8'h7f, that is, no quantization is performed; when (VIN-VIP)>VTH, the output code value Within (8'h7f, 8'hff]; when (VIN-VIP)<-VTH, the output code value is within [0, 8'h7f).

FIG. 10 is a graph of code values output by a current analog-to-digital converter. It can be seen from FIG. 10 that the invalid signal segment [-VTH, VTH] to be quantized is also quantized. Quantizing invalid signal segments to be quantized reduces the efficiency of quantization. However, the embodiment of the present disclosure only quantizes valid signals to be quantized, which can improve quantization efficiency, and can only select a section of valid signals to be quantized among the valid signals to be quantized for quantization, thereby further improving quantization efficiency.

The quantization method and the analog-to-digital converter provided by the embodiments of the present disclosure can be applied to various fields, such as various sensors, instruments, image speech recognition, etc., can improve the quantization speed, and combine the high precision and area of the ADC. small advantage.

It can be understood that the above-mentioned method embodiments and analog-to-digital converters mentioned in this disclosure can be combined with each other to form a combined embodiment without violating the principle and logic. Due to space limitations, this disclosure will not repeat them. Those skilled in the art can understand that, in the above method in the specific implementation manner, the specific execution order of each step should be determined according to its function and possible internal logic.

Fig. 11 is a block diagram of an electronic device provided by an embodiment of the present disclosure.

Referring to FIG. 11 , an embodiment of the present disclosure provides an electronic device, which includes: at least one processor 1101; at least one memory 1102, and one or more I/O interfaces 1103 connected between the processor 1101 and the memory 502 Among them; wherein, the memory 1102 stores one or more computer programs that can be executed by at least one processor 1101, and one or more computer programs are executed by at least one processor 1101, so that at least one processor 1101 can perform the above-mentioned quantification method.

An embodiment of the present disclosure also provides a computer-readable storage medium on which a computer program is stored, wherein the computer program implements the above-mentioned quantization method when executed by a processor/processing core. Computer readable storage media may be volatile or nonvolatile computer readable storage media.

An embodiment of the present disclosure also provides a computer program product, including computer-readable codes, or a non-volatile computer-readable storage medium carrying computer-readable codes, when the computer-readable codes are run in a processor of an electronic device , the processor in the electronic device executes the above quantization method.

Those of ordinary skill in the art can understand that all or some of the steps in the methods disclosed above, the functional modules/units in the system, and the device can be implemented as software, firmware, hardware, and an appropriate combination thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be composed of several physical components. Components cooperate to execute. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit . Such software may be distributed on computer readable storage media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).

As known to those of ordinary skill in the art, the term computer storage media includes both volatile and nonvolatile media implemented in any method or technology for storage of information, such as computer readable program instructions, data structures, program modules, or other data. volatile, removable and non-removable media. Computer storage media include, but are not limited to, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM), static random access memory (SRAM), flash memory or other memory technologies, portable Compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disk storage, magnetic cartridge, magnetic tape, magnetic disk storage or other magnetic storage device, or any other device that can be used to store desired information and can be accessed by a computer any other medium. In addition, as is well known to those of ordinary skill in the art, communication media typically embodies computer-readable program instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery medium.

Computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or downloaded to an external computer or external storage device over a network, such as the Internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and/or edge servers. A network adapter card or a network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in each computing/processing device .

Computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or Source or object code written in any combination, including object-oriented programming languages—such as Smalltalk, C++, etc., and conventional procedural programming languages—such as the “C” language or similar programming languages. Computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server implement. In cases involving a remote computer, the remote computer can be connected to the user computer through any kind of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (such as via the Internet using an Internet service provider). connect). In some embodiments, an electronic circuit, such as a programmable logic circuit, field programmable gate array (FPGA), or programmable logic array (PLA), can be customized by utilizing state information of computer-readable program instructions, which can Various aspects of the present disclosure are implemented by executing computer readable program instructions.

The computer program products described here may be specifically implemented by hardware, software or a combination thereof. In an optional embodiment, the computer program product is embodied as a computer storage medium. In another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK), etc. .

Aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It should be understood that each block of the flowcharts and/or block diagrams, and combinations of blocks in the flowcharts and/or block diagrams, can be implemented by computer-readable program instructions.

These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine such that when executed by the processor of the computer or other programmable data processing apparatus , producing an apparatus for realizing the functions/actions specified in one or more blocks in the flowchart and/or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause computers, programmable data processing devices and/or other devices to work in a specific way, so that the computer-readable medium storing instructions includes An article of manufacture comprising instructions for implementing various aspects of the functions/acts specified in one or more blocks in flowcharts and/or block diagrams.

It is also possible to load computer-readable program instructions into a computer, other programmable data processing device, or other equipment, so that a series of operational steps are performed on the computer, other programmable data processing device, or other equipment to produce a computer-implemented process , so that instructions executed on computers, other programmable data processing devices, or other devices implement the functions/actions specified in one or more blocks in the flowcharts and/or block diagrams.

The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, a portion of a program segment, or an instruction that includes one or more Executable instructions. In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks in succession may, in fact, be executed substantially concurrently, or they may sometimes be executed in the reverse order, depending upon the functionality involved. It should also be noted that each block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by a dedicated hardware-based system that performs the specified function or action , or may be implemented by a combination of dedicated hardware and computer instructions.

Example embodiments have been disclosed herein, and while specific terms have been employed, they are used and should be construed in a generic descriptive sense only and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that features, characteristics and/or elements described in connection with a particular embodiment may be used alone, or may be described in combination with other embodiments, unless explicitly stated otherwise. Combinations of features and/or elements. Accordingly, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims (12)

1. A method of quantization, comprising:

acquiring a signal to be quantized and a reference signal, wherein the reference signal comprises a threshold judgment section reference signal and a quantization section reference signal;

carrying out threshold judgment on the signal to be quantized by utilizing the reference signal of the threshold judgment section, and determining a plurality of sections of effective signals to be quantized;

and quantizing any effective signal to be quantized in the multiple effective quantized signals by utilizing the quantized segment reference signals to obtain a quantization result of the signal to be quantized.

2. The method of claim 1, wherein the reference signal comprises one or more segments of the threshold decision segment reference signal, and a voltage value of each segment of the threshold decision segment reference signal is different.

3. The method of claim 2, wherein the reference signal further comprises a sampled segment reference signal;

the threshold judgment section reference signal comprises a first threshold judgment section reference signal and a second threshold judgment section reference signal, and a first voltage difference value between the voltage value of the first threshold judgment section reference signal and the voltage value of the sampling section reference signal is equal to a second voltage difference value between the voltage value of the second threshold judgment section reference signal and the voltage value of the sampling section reference signal.

4. The method of claim 3, wherein the thresholding the to-be-quantized signal using the thresholding segment reference signal to determine multiple segments of valid to-be-quantized signals comprises:

when the reference signal jumps from the sampling section reference signal to the first threshold judgment section reference signal, performing threshold judgment on the signal to be quantized by using the first threshold judgment section reference signal to obtain a first threshold judgment result;

when the reference voltage jumps from the first threshold judgment section reference signal to the second threshold judgment section reference signal, performing threshold judgment on the signal to be quantized by using the second threshold judgment section reference signal to obtain a second threshold judgment result;

and segmenting the signal to be quantized based on the first threshold judgment result and the second threshold judgment result, and determining the multiple sections of effective signals to be quantized.

5. The method of claim 4, wherein the voltage value of the first threshold decision segment reference signal is greater than or equal to the voltage value of the second threshold decision segment reference signal;

the segmenting the signal to be quantized based on the first threshold judgment result and the second threshold judgment result, and determining the multiple effective signals to be quantized includes:

if the voltage value of the signal to be quantized is larger than the voltage value of the reference signal of the first threshold judgment section, the signal to be quantized is the effective signal to be quantized;

if the voltage value of the signal to be quantized is less than or equal to the voltage value of the first threshold judgment section reference signal and the voltage value of the signal to be quantized is greater than or equal to the voltage value of the second threshold judgment section reference signal, the signal to be quantized is an invalid signal to be quantized;

and if the voltage value of the signal to be quantized is smaller than the voltage value of the reference signal of the second threshold judgment section, the signal to be quantized is the effective signal to be quantized.

6. The method according to claim 4, wherein the quantizing any segment of the effective signals to be quantized in the plurality of segments of effective quantized signals by using the quantized segment reference signals to obtain the quantization result of the signals to be quantized comprises:

comparing the quantization segment reference signal with any segment of the effective signal to be quantized to obtain a plurality of second comparison results;

obtaining a quantization result of the signal to be quantized based on the plurality of second comparison results.

7. An analog-to-digital converter, comprising:

an obtaining module, configured to obtain a signal to be quantized and a reference signal, where the reference signal includes a threshold decision segment reference signal and a quantization segment reference signal;

the judging module is used for utilizing the threshold judging section reference signal to carry out threshold judgment on the signal to be quantized and determining a plurality of sections of effective signals to be quantized;

and the quantization module is used for quantizing any effective signal to be quantized in the multiple effective quantized signals by utilizing the quantized segment reference signals to obtain a quantization result of the signal to be quantized.

8. The analog-to-digital converter according to claim 7, wherein the determining module comprises:

the comparator submodule is used for comparing the voltage value of the threshold judgment section reference signal with the voltage value of the signal to be quantized to obtain a first comparison result; a first input end of the comparator submodule is electrically connected with a first output end of the acquisition module, and a second input end of the comparator submodule is electrically connected with a second output end of the acquisition module;

a counter submodule for determining a threshold determination result based on the first comparison result; and the input end of the counter submodule is connected with the output end of the comparator submodule.

9. The analog-to-digital converter according to claim 8, wherein the comparator sub-module is further configured to compare the voltage value of the quantized segment reference signal with the voltage value of any segment of the valid signal to be quantized to obtain a second comparison result;

and the counter submodule is also used for obtaining a quantization result of the signal to be quantized based on the second comparison result.

10. The analog-to-digital converter of claim 8, further comprising:

the common-mode voltage module is used for generating an initial common-mode voltage of the comparator sub-module, and the output end of the common-mode voltage module is electrically connected with the second input end of the comparator sub-module;

and the reference voltage module is used for generating a reference voltage of the comparator submodule, and the output end of the reference voltage module is electrically connected with the second input end of the comparator submodule.

11. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,

the memory stores one or more computer programs executable by the at least one processor to enable the at least one processor to perform the quantization method of any one of claims 1-6.

12. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the quantization method according to any one of claims 1-6.

Images