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CN103996706A - Nitride-based transistor and preparation method thereof - Google Patents

Nitride-based transistor and preparation method thereof Download PDF

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Publication number
CN103996706A
CN103996706A CN201410153247.7A CN201410153247A CN103996706A CN 103996706 A CN103996706 A CN 103996706A CN 201410153247 A CN201410153247 A CN 201410153247A CN 103996706 A CN103996706 A CN 103996706A
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gallium nitride
layer
based transistor
aluminum
gan
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Inventor
谢海忠
纪攀峰
杨华
伊晓燕
王军喜
李晋闽
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Institute of Semiconductors of CAS
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment

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Abstract

本发明提供了一种氮化镓基晶体管及其制备方法。该氮化镓基晶体管包括：衬底；依次沉积于衬底上的低温成核层、氮化镓高阻层、高迁移率氮化镓层、氮化铝掺入层、铝镓氮势垒层和氮化镓帽层，其中，氮化镓帽层的两侧经刻蚀分别形成至铝镓氮势垒层的台阶；分别形成于氮化镓帽层两侧台阶的漏极和源级；形成于氮化镓帽层上方的栅极，构成氮化镓基晶体管主体；以及形成于氮化镓基晶体管主体的背面以及侧面，并露出漏极、栅极和源级的绝缘封装层。本发明氮化镓基晶体管及其制备方法在器件工艺的制作过程中由原来的三十步工艺，缩减到现在的二十二步工艺左右，同时使得器件体积减少到原来的五分之一。

The invention provides a GaN-based transistor and a preparation method thereof. The gallium nitride-based transistor includes: a substrate; a low-temperature nucleation layer, a gallium nitride high-resistance layer, a high-mobility gallium nitride layer, an aluminum nitride doping layer, and an aluminum gallium nitride barrier deposited sequentially on the substrate. Layer and gallium nitride cap layer, wherein, the two sides of the gallium nitride cap layer are respectively etched to form steps to the AlGaN barrier layer; the drain and source of the steps on both sides of the gallium nitride cap layer are respectively formed the gate formed above the gallium nitride cap layer to form the main body of the gallium nitride-based transistor; and the insulating packaging layer formed on the back and side of the main body of the gallium nitride-based transistor and exposing the drain, gate and source. The GaN-based transistor and its preparation method of the present invention reduce the original 30-step process to the current 22-step process in the device process, and at the same time reduce the volume of the device to one-fifth of the original one.

Description

Gallium nitride based transistor and preparation method thereof
Technical field
The present invention relates to semiconductor material growing technical field, relate in particular to a kind of gallium nitride based transistor and preparation method thereof.
Background technology
The main devices type of microwave transistor has homojunction bipolar transistor (BJT), heterojunction bipolar transistor (HBT), metal-semiconductor field effect transistor (MESFET), mos field effect transistor (MOSFET) and High Electron Mobility Transistor (HEMT) etc.
The energy gap large (Eg=3.4eV) of GaN material, (3.3MV/cm) is larger for critical breakdown strength, makes electronic device and has feature high temperature resistant, high pressure; Its electronics saturation drift velocity reaches 2.5 × 10 7cm/s, is suitable for making high-frequency electron device; Can forming surface density in the heterostructure that it and AlGaN material form up to 1013cm -2above two-dimensional electron gas (2DEG), and interface electron mobility approaches 2000cm2/Vs, meets the power device requirement of working under current state completely; And its thermal conductivity >1.3W/cmK, the more for the benefit of heat radiation of power device.GaN material is to prepare high frequency, the transistorized preferred material of HIGH-POWERED MICROWAVES.
Because GaN lacks homo-substrate, GaN material mainly adopts heteroepitaxy method to grow.The most frequently used substrate of growing GaN base device material is sapphire, Si and SiC at present.Sapphire Substrate is the substrate that is widely used in most at present extension gallium nitride-based material, between the crystal mass of material and production cost, is optimum result.The thermal conductivity (0.5W/cmK) that sapphire is extremely low has limited the heat radiation of device, thereby has restricted the power output of device and the Stability and dependability of device work.Although SiC has good thermal conductivity (4.49W/cmK), its cost is very expensive, and substrate dimension is also not fully up to expectations.
Realizing in process of the present invention, applicant finds that prior art gallium nitride based transistor preparation method's concrete technology flow process is as follows:
(1) on substrate with MOCVD successively grown buffer layer;
(2) growing gallium nitride resistive formation;
(3) growth high mobility gallium nitride layer;
(4) growing aluminum nitride mixes layer;
(5) growth aluminum gallium nitride barrier layer;
(6) growing gallium nitride cap layer;
(7) the photoetching first edition, mark metal and ohmic contact;
(8) magnetron sputtering deposition Ti/Al/Ti/Au multi-layer metal structure, peels off;
(9) Ohmic electrode annealing;
(10) the alignment second edition, injects isolation;
(11) the alignment third edition, Schottky contacts;
(12) magnetron sputtering deposition Ni/Au, peels off;
(13) PECVD growth SiN dielectric layer;
(14) alignment the 4th edition, medium is carved hole;
(15) ICP etching SiN;
(16) alignment the 5th edition, wiring metal, rear baking;
(17) magnetron sputtering Ni/Au, then peels off;
(18) backing material thinning back side;
(19) laser scribing splits substrate, is individual unit by element manufacturing;
(20) the individual unit device that test completes;
(21) device that sorting has been tested, to be packaged;
(22) design processing package support;
(23) die sinking machining support;
(24) injection mo(u)lding support;
(25) backbone metal electrode processing:
(26) corner cut support;
(27) with silver slurry or adhesive gel, the device of making is fixed on support;
(28) curing oven
(29) with metal crimp welding machine interface unit and support;
(30) air locking, completes whole encapsulation.
In prior art, about about 26 steps of whole technological process, also do not comprise the concrete technology of device package support, the technique such as making, corner cut that device package support needs die sinking, injection moulding, metal to connect.About thirties step process of all technique, technological process complexity, cost of manufacture is high.
Summary of the invention
(1) technical problem that will solve
In view of above-mentioned technical problem, the invention provides a kind of gallium nitride based transistor and preparation method thereof.
(2) technical scheme
According to an aspect of the present invention, provide a kind of gallium nitride based transistor.This gallium nitride based transistor comprises: substrate 1; Be deposited on successively low temperature nucleating layer 2, gallium nitride resistive formation 3, high mobility gallium nitride layer 4, nitrogenize aluminum doped layers 5, aluminum gallium nitride barrier layer 6 and gallium nitride cap layer 7 on substrate 1, wherein, the both sides of gallium nitride cap layer 7 are formed to respectively the step of aluminum gallium nitride barrier layer 6 through etching; Be formed at respectively drain electrode 8 and the source class 10 of gallium nitride cap layer 7 both sides step; Be formed at the grid 9 of gallium nitride cap layer 7 top, form gallium nitride based transistor main body; And be formed at the back side and the side of gallium nitride based transistor main body, and expose the insulating sealed layer 11 of drain electrode 8, grid 9 and source class 10.
A kind of preparation method of gallium nitride based transistor is also provided according to another aspect of the present invention.This preparation method comprises: steps A: growing low temperature nucleating layer 2, gallium nitride resistive formation 3, high mobility gallium nitride layer 4, nitrogenize aluminum doped layers 5, aluminum gallium nitride barrier layer 6, gallium nitride cap layer 7 successively on substrate 1; Step B: make the first passivation layer on gallium nitride cap layer; Step C: make mask on the first passivation layer, carry out source electrode and drain electrode photoetching, until aluminum gallium nitride barrier layer 6, the two ends depositing metal of the first passivation layer after photoetching, makes respectively source electrode 10 and drain electrode 8; Step D: at source electrode 10 and the top of drain electrode 8 and region deposit second passivation layer on gallium nitride cap layer 7 top; Step e: on the second passivation layer, make mask, etching grid groove, and in grid groove depositing metal, make grid 9; Step F: by more than source electrode 10, drain electrode 8 and grid 9 electroplating surfaces thickenings metals to 100 micron, form gallium nitride based transistor main body; And step G: apply insulating sealed layer 11, make gallium nitride based transistor main body and air insulated, only expose source electrode 10, drain electrode 8 and grid 9, complete encapsulation, form gallium nitride based transistor.
(3) beneficial effect
Can find out from technique scheme, gallium nitride based transistor of the present invention and preparation method thereof in the manufacturing process of device technology by 30 original step process, taper to present 22 step process left and right, make device volume reduce to original 1/5th simultaneously.Reduce technique and not only do not make device performance decline, make on the contrary cost of manufacture and volume decline, reliability is improved.
Brief description of the drawings
Fig. 1 is according to the generalized section of embodiment of the present invention gallium nitride based transistor;
Fig. 2 is according to the preparation method's of embodiment of the present invention gallium nitride based transistor flow chart.
[main element]
1-substrate; 2-low temperature nucleating layer;
3-gallium nitride resistive formation; 4-high mobility gallium nitride layer;
5-nitrogenize aluminum doped layers; 6-aluminum gallium nitride barrier layer;
7-gallium nitride cap layer; 8-drain electrode;
9-grid; 10-source class;
11-insulating sealed layer.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.It should be noted that, in accompanying drawing or specification description, similar or identical part is all used identical figure number.The implementation that does not illustrate in accompanying drawing or describe is form known to a person of ordinary skill in the art in affiliated technical field.In addition, although the demonstration of the parameter that comprises particular value can be provided herein, should be appreciated that, parameter is without definitely equaling corresponding value, but can in acceptable error margin or design constraint, be similar to corresponding value.The direction term of mentioning in embodiment, for example " on ", D score, 'fornt', 'back', " left side ", " right side " etc., be only the direction with reference to accompanying drawing.Therefore, the direction term of use is to be not used for limiting the scope of the invention for explanation.
The present invention, on the constant basis of original device performance, reduces the volume of packaging greatly.The preparation cost of whole GaN base transistor with high electronic transfer rate is declined, and reliability is improved, so this invention is the effective ways of preparation high-performance GaN base transistor with high electronic transfer rate.
In one exemplary embodiment of the present invention, provide a kind of gallium nitride based transistor.Fig. 1 is according to the generalized section of embodiment of the present invention gallium nitride based transistor.Please refer to Fig. 1, the present embodiment gallium nitride based transistor comprises: substrate 1; Be deposited on successively low temperature nucleating layer 2, gallium nitride resistive formation 3, high mobility gallium nitride layer 4, nitrogenize aluminum doped layers 5, aluminum gallium nitride barrier layer 6 and gallium nitride cap layer 7 on substrate 1, wherein, the both sides of gallium nitride cap layer 7 are formed to respectively the step of aluminum gallium nitride barrier layer 6 through etching; Be formed at respectively drain electrode 8 and the source class 10 of gallium nitride cap layer 7 both sides step; Be formed at the grid 9 of gallium nitride cap layer 7 top; Be packaged in the outside of described substrate 1, low temperature nucleating layer 2, gallium nitride resistive formation 3, high mobility gallium nitride layer 4, nitrogenize aluminum doped layers 5, aluminum gallium nitride barrier layer 6, gallium nitride cap layer 7, drain electrode 8 and source class 10, and expose the insulating sealed layer 11 of drain electrode 8, grid 9 and source class 10.
Below each part of the present embodiment gallium nitride based transistor is elaborated.
Substrate 1 is sapphire, carborundum or silicon.
Wherein, low temperature nucleating layer 2 is gallium nitride, aluminium nitride or aluminum gallium nitride, and thickness is 20-100nm.Wherein, the depositing temperature of this low temperature nucleating layer 2 is less than 500 DEG C.
Wherein, the thickness of gallium nitride resistive formation 3 is between 500nm～5000nm, and these gallium nitride resistive formation 3 materials are: u-GaN.
Wherein, the thickness of high mobility gallium nitride layer 4 is between 10nm-300nm, and optimal value is 50nm～200nm.Wherein, the material of this high mobility gallium nitride layer 4 is: n-GaN, its electron mobility is greater than 5 × 10 18cm 3.
Wherein, the thickness of nitrogenize aluminum doped layers 5 is 0-5nm, and optimal value is 0.5-2nm.
Wherein, the thickness of aluminum gallium nitride barrier layer 6 is 15-30nm.
Wherein, the thickness of gallium nitride cap layer 7 is between 1nm～10nm.
Wherein, the thickness of insulating sealed layer 11 between 20 μ m～1000 μ m, its thermal conductivity values 10 to 1000W/ (mK), the material of this insulating sealed layer 11 is AlN or Al 2o 3.
In one exemplary embodiment of the present invention, provide a kind of preparation method of gallium nitride based transistor.Fig. 2 is according to the preparation method's of embodiment of the present invention gallium nitride based transistor flow chart.Please refer to Fig. 1 and Fig. 2, the present embodiment is preparation method comprise:
Steps A: growing low temperature nucleating layer 2, gallium nitride resistive formation 3, high mobility gallium nitride layer 4, nitrogenize aluminum doped layers 5, aluminum gallium nitride barrier layer 6, gallium nitride cap layer 7 successively on substrate 1;
Step B: make silicon nitride passivation on gallium nitride cap layer;
Step C: make for the first time mask on silicon nitride passivation, carry out source electrode and drain electrode photoetching, until described aluminum gallium nitride barrier layer 6, the two ends depositing metal of silicon nitride passivation after photoetching, makes respectively source electrode 10 and drain electrode 8;
Step D: be the silicon nitride passivation of 0.05 μ m～0.5 μ m with the top of drain electrode 8 and the region deposition thickness on gallium nitride cap layer 7 top at source electrode 10;
Step e: on silicon nitride passivation, make mask, etching grid groove, and in grid groove depositing metal, make grid 9;
Step F: more than source electrode 10, drain electrode 8 and grid 9 electroplating surfaces thickenings metals to 100 micron;
Step G: above substrate another side and substrate sidewall apply insulating sealed layer 11, make whole device and air insulated, only expose source electrode 10, drain electrode 8 and grid 9, complete encapsulation.
So far, by reference to the accompanying drawings the present invention two embodiment be have been described in detail.Describe according to above, those skilled in the art should have clearly understanding to gallium nitride based transistor of the present invention and preparation method thereof.
In addition, the above-mentioned definition to each element and method is not limited in various concrete structures, shape or the mode in embodiment, mentioned, those of ordinary skill in the art can change simply or replace it, for example: passivation layer can also substitute with the composite bed of silica, silica and silicon nitride, polyimides.
In sum, the invention provides a kind of method that technological process is few, reliability is high and prepare gallium nitride based transistor.Gallium nitride transistor performance parameter after completing does not change, but size is 1/5th of original packaging body.Due to the shortening of technological process, yield of devices significantly promotes, and whole process costs has had remarkable decline, is applicable to the Technique Popularizing of extensive industrialization.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (10)

1.一种氮化镓基晶体管，其特征在于，包括：1. A gallium nitride-based transistor, characterized in that, comprising: 衬底(1)；Substrate(1); 依次沉积于所述衬底(1)上的低温成核层(2)、氮化镓高阻层(3)、高迁移率氮化镓层(4)、氮化铝掺入层(5)、铝镓氮势垒层(6)和氮化镓帽层(7)，其中，所述氮化镓帽层(7)的两侧经刻蚀分别形成至所述铝镓氮势垒层(6)的台阶；A low-temperature nucleation layer (2), a gallium nitride high-resistance layer (3), a high-mobility gallium nitride layer (4), and an aluminum nitride doping layer (5) deposited sequentially on the substrate (1) , an aluminum gallium nitride barrier layer (6) and a gallium nitride cap layer (7), wherein the two sides of the gallium nitride cap layer (7) are respectively etched to form the aluminum gallium nitride barrier layer ( 6) steps; 分别形成于所述氮化镓帽层(7)两侧台阶的漏极(8)和源级(10)；The drain (8) and the source (10) are respectively formed on the steps on both sides of the gallium nitride cap layer (7); 形成于所述氮化镓帽层7上方的栅极(9)，构成氮化镓基晶体管主体；以及a gate (9) formed above the gallium nitride cap layer 7, constituting the main body of the gallium nitride-based transistor; and 形成于所述氮化镓基晶体管主体的背面以及侧面，并露出所述漏极(8)、栅极(9)和源级(10)的绝缘封装层(11)。The insulating encapsulation layer (11) is formed on the back and side surfaces of the main body of the GaN-based transistor and exposes the drain (8), gate (9) and source (10). 2.根据权利要求1所述的氮化镓基晶体管，其特征在于，所述高迁移率氮化镓层(4)的材料为n-GaN，其电子迁移率大于5×1018cm3；其厚度介于10nm～300nm之间。2. The gallium nitride-based transistor according to claim 1, characterized in that, the material of the high-mobility gallium nitride layer (4) is n-GaN, and its electron mobility is greater than 5×10 18 cm 3 ; Its thickness is between 10nm and 300nm. 3.根据权利要求2所述的氮化镓基晶体管，其特征在于，所述高迁移率氮化镓层(4)的厚度介于50nm～200nm。3. The gallium nitride-based transistor according to claim 2, characterized in that the thickness of the high-mobility gallium nitride layer (4) is between 50nm and 200nm. 4.根据权利要求1所述的氮化镓基晶体管，其特征在于，所述氮化铝掺入层(5)的厚度介于0.2nm～5nm之间，所述铝镓氮势垒层(6)的厚度介于15nm～30nm之间，所述氮化镓帽层(7)的厚度介于1nm-10nm之间。4. The gallium nitride-based transistor according to claim 1, characterized in that, the thickness of the aluminum nitride doped layer (5) is between 0.2nm and 5nm, and the aluminum gallium nitride barrier layer ( 6) has a thickness between 15nm and 30nm, and the gallium nitride cap layer (7) has a thickness between 1nm and 10nm. 5.根据权利要求1所述的氮化镓基晶体管，其特征在于，所述氮化镓高阻层(3)的厚度介于500nm～5000nm之间，其材料为u-GaN。5 . The gallium nitride-based transistor according to claim 1 , characterized in that, the thickness of the gallium nitride high-resistance layer ( 3 ) is between 500 nm and 5000 nm, and its material is u-GaN. 6.根据权利要求1所述的氮化镓基晶体管，其特征在于，所述绝缘封装层(11)的厚度介于20μm～1000μm之间，其材料为AlN或Al2O3。6. The GaN-based transistor according to claim 1, characterized in that the thickness of the insulating packaging layer (11) is between 20 μm and 1000 μm, and its material is AlN or Al 2 O 3 . 7.根据权利要求1至6中任一项所述的氮化镓基晶体管，其特征在于，所述低温成核层(2)的厚度介于20nm～100n之间，其材料为氮化镓、氮化铝或铝镓氮，其沉积温度小于500℃。7. The gallium nitride-based transistor according to any one of claims 1 to 6, characterized in that the thickness of the low-temperature nucleation layer (2) is between 20nm and 100nm, and its material is gallium nitride , aluminum nitride or aluminum gallium nitride, the deposition temperature of which is less than 500°C. 8.根据权利要求1至6中任一项所述的氮化镓基晶体管，其特征在于，所述衬底(1)为蓝宝石、碳化硅或者硅。8. The GaN-based transistor according to any one of claims 1 to 6, characterized in that the substrate (1) is sapphire, silicon carbide or silicon. 9.一种权利要求1至8中任一项所述氮化镓基晶体管的制备方法，其特征在于，包括：9. A method for preparing a gallium nitride-based transistor according to any one of claims 1 to 8, characterized in that it comprises: 步骤A：在衬底(1)上依次生长低温成核层(2)、氮化镓高阻层(3)、高迁移率氮化镓层(4)、氮化铝掺入层(5)、铝镓氮势垒层(6)、氮化镓帽层(7)；Step A: growing a low-temperature nucleation layer (2), a gallium nitride high-resistance layer (3), a high-mobility gallium nitride layer (4), and an aluminum nitride doped layer (5) sequentially on a substrate (1) , AlGaN barrier layer (6), GaN cap layer (7); 步骤B：在所述氮化镓帽层上制作第一钝化层；Step B: forming a first passivation layer on the gallium nitride cap layer; 步骤C：在所述第一钝化层上制作掩膜，进行源极和漏极光刻，直至所述铝镓氮势垒层(6)，在光刻后第一钝化层的两端淀积金属，分别制作源极(10)和漏极(8)；Step C: making a mask on the first passivation layer, and performing source and drain photolithography until the aluminum gallium nitride barrier layer (6), depositing on both ends of the first passivation layer after photolithography Deposit metal, make source electrode (10) and drain electrode (8) respectively; 步骤D：在所述源极(10)和漏极(8)的上部以及所述氮化镓帽层(7)上部的区域淀积第二钝化层；Step D: Depositing a second passivation layer on the upper part of the source (10) and drain (8) and the upper part of the gallium nitride cap layer (7); 步骤E：在所述第二钝化层上制作掩膜，刻蚀栅槽，并在栅槽中淀积金属，制作栅极(9)；Step E: making a mask on the second passivation layer, etching a gate groove, and depositing metal in the gate groove to form a gate (9); 步骤F：将所述源极(10)、漏极(8)和栅极(9)表面电镀加厚金属到100微米以上，形成氮化镓基晶体管主体；以及Step F: electroplating the surface of the source (10), drain (8) and gate (9) with thickened metal to more than 100 microns to form a gallium nitride-based transistor body; and 步骤G：涂覆绝缘封装层(11)，使氮化镓基晶体管主体与空气隔离，只露出所述源极(10)、漏极(8)和栅极(9)，完成封装，形成氮化镓基晶体管。Step G: Coating an insulating encapsulation layer (11) to isolate the main body of the GaN-based transistor from the air, exposing only the source (10), drain (8) and gate (9), completing the encapsulation and forming nitrogen GaN-based transistors. 10.根据权利要求9所述的制备方法，其特征在于，所述第一钝化层和第二钝化层均为氮化硅钝化层，其厚度均介于0.05μm～0.5μm之间。10. The preparation method according to claim 9, wherein the first passivation layer and the second passivation layer are both silicon nitride passivation layers, both of which have a thickness between 0.05 μm and 0.5 μm .
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Cited By (3)

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CN104485357A (en) * 2014-12-17 2015-04-01 中国科学院半导体研究所 HEMT with gallium nitride high-resistivity layer and preparation method
CN104538303A (en) * 2014-12-24 2015-04-22 中国科学院半导体研究所 Method for manufacturing gallium-nitride-based high-electronic-mobility transistor of transferring substrate
CN105424234A (en) * 2015-12-01 2016-03-23 成都嘉石科技有限公司 Integrated device of pressure transducer and manufacturing method thereof

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