CN103943666A - Grooved semiconductor device and manufacturing method thereof - Google Patents

Abstract

The invention discloses a trench semiconductor device. When the semiconductor device is connected to a certain reverse bias voltage, the depletion layers generated by the semiconductor junctions on the inner wall of the trench overlap each other, shielding the conductive channel from the anode to the cathode, so that the present invention The semiconductor device has a reverse blocking function; by setting a material with a charge compensation function at the bottom of the semiconductor device trench, the reverse blocking capability of the semiconductor device is improved; when the semiconductor device is connected to a certain forward bias voltage, due to the In the absence of semiconductor junctions, the semiconductor device of the present invention has an extremely low forward turn-on voltage drop. The invention also provides a preparation method of the trench semiconductor device.

Description

A trench semiconductor device and its manufacturing method

technical field

The invention relates to a trench semiconductor device, and the invention also relates to a preparation method of the trench semiconductor device. The semiconductor device of the present invention is a basic structure for manufacturing power rectifying devices.

Background technique

Power semiconductor devices are widely used in power management and power applications. The most basic structure in power semiconductor devices is semiconductor junctions. Semiconductor junctions include PN junctions and Schottky barrier junctions; reduce the on-resistance and turn-on voltage of semiconductor junctions Power drop is an important trend in the development of power semiconductor devices.

For traditional semiconductor devices, the on-resistance and turn-on voltage drop increase rapidly with the increase of the reverse blocking voltage of the device, which makes the device have a higher forward conduction voltage drop.

Contents of the invention

The present invention addresses the above problems and provides a trench semiconductor device and a manufacturing method thereof.

A trench semiconductor device, characterized in that it includes: a substrate layer made of a semiconductor material; a drift layer made of a first conductive semiconductor material and located on the substrate layer; a plurality of trenches located in the drift layer; The semiconductor junction is a PN junction or Schottky barrier junction and is located on the inner wall of the trench; the ohmic contact area is located on the upper surface of the semiconductor material between the trenches or on the upper surface of the sidewall of the trench; the surface metal layer is located on the upper surface of the device and will The ohmic base region is connected to the surface electrode of the semiconductor junction. The bottom of the trench of the semiconductor device can be provided with strips of second conductive semiconductor material with charge compensation function or insulating material with charge compensation function.

A method for preparing a trench semiconductor device, characterized in that it includes the following steps: forming a first conductive semiconductor material layer on the surface of a substrate layer, and then forming an insulating layer on the surface; performing a photolithographic etching process to remove a part of the insulating medium on the surface, and performing the second Diffusion of a conductive impurity; etching the thin insulating layer on the surface, and then etching the exposed semiconductor material to form a trench; depositing metal for sintering to form a Schottky barrier junction, or setting a second conductive semiconductor material layer on the inner wall of the trench to form a PN junction.

When the semiconductor device is connected to a certain forward bias voltage (assuming that the first conductive semiconductor material is an N-type semiconductor material, the surface is the anode and the back is the cathode), because there is no semiconductor junction from the anode to the cathode, the semiconductor device of the present invention has a polarity Low forward turn-on voltage drop.

When the semiconductor device is connected to a certain reverse bias voltage, the depletion layers generated by the semiconductor junction on the inner wall of the trench overlap each other, thereby shielding the conductive channel from the anode to the cathode, so that the semiconductor device of the present invention has a reverse blocking function; The reverse blocking capability of the semiconductor device can be improved by arranging strip-shaped second conductive semiconductor material with charge compensation function or insulating material with charge compensation function at the bottom of the trench of the semiconductor device.

In addition, the invention also provides a preparation method of the trench semiconductor device.

Description of drawings

1 is a schematic cross-sectional view of a trench semiconductor device of the present invention;

2 is a schematic cross-sectional view of a trench semiconductor device of the present invention;

3 is a schematic cross-sectional view of a trench semiconductor device of the present invention;

4 is a schematic cross-sectional view of a trench semiconductor device of the present invention;

5 is a schematic cross-sectional view of a trench semiconductor device of the present invention;

FIG. 6 is a schematic cross-sectional view of a trench semiconductor device of the present invention.

in,

1. Substrate layer;

2. Silicon dioxide;

3. The first conductive semiconductor material;

4. The second conductive semiconductor material;

5. Schottky barrier junction;

6. Ohmic contact area;

7. Silicon oxide (SiO);

10. Metal layer on the upper surface;

11. Lower surface metal layer.

Detailed ways

Example 1

FIG. 1 is a cross-sectional view of a trench semiconductor device of the present invention. The semiconductor device of the present invention will be described in detail below with reference to FIG. 1 .

A trench semiconductor device, comprising: a substrate layer 1, which is a semiconductor silicon material of N conductivity type, and the doping concentration of phosphorus atoms is 1E19/CM ³ , on the lower surface of the substrate layer 1, electrodes are drawn out through the lower surface metal layer 11; A conductive semiconductor material 3, located on the substrate layer 1, is a semiconductor silicon material of N conductivity type, the doping concentration of phosphorus atoms is 1E16/CM ³ , and there is a region doped with high concentration of impurities near its upper surface; Schottky The barrier junction 5 is located on the inner wall of the trench, and is a silicide formed by semiconductor silicon material and barrier metal, wherein the distance between the trenches is 0.5um; the ohmic contact region 6 is located on the surface of the first conductive semiconductor material and the upper part of the side wall of the trench; An upper surface metal layer 10 is attached to the upper surface of the device, leading out another electrode for the device.

Its manufacturing process includes the following steps:

In the first step, a first conductive semiconductor material layer is formed on the surface of the substrate layer 1, and a silicon nitride layer is formed by deposition;

The second step is to perform a photolithographic etching process, remove part of the silicon nitride from the surface of the semiconductor material, and implant phosphorus impurities for annealing;

The third step is to etch and implant the window oxide layer, and then etch and remove part of the exposed semiconductor silicon material to form a trench, and etch and remove the silicon nitride layer;

The fourth step is to deposit a barrier metal on the surface of the semiconductor material, perform sintering to form a Schottky barrier junction 5, and then deposit metal on the surface to form an upper surface metal layer 10;

The fifth step is to perform a backside metallization process to form a lower surface metal layer 11 on the backside, as shown in FIG. 1 .

FIG. 2 is a schematic cross-sectional view of a trench semiconductor device according to the present invention. On the basis of FIG. 1 , the second conductive semiconductor material 4 is arranged at the bottom of the trench.

FIG. 3 is a schematic cross-sectional view of a trench semiconductor device according to the present invention. On the basis of FIG. 1 , silicon dioxide 2 is arranged on the surface of the semiconductor material between the trenches.

FIG. 4 is a schematic cross-sectional view of a trench semiconductor device according to the present invention. On the basis of FIG. 3 , silicon oxide 7 with a charge compensation function is disposed at the bottom of the trench.

Example 2

FIG. 5 is a cross-sectional view of a trench semiconductor device of the present invention. The semiconductor device of the present invention will be described in detail below with reference to FIG. 5 .

A trench semiconductor device, comprising: a substrate layer 1, which is a semiconductor silicon material of N conductivity type, and the doping concentration of phosphorus atoms is 1E19/CM ³ , on the lower surface of the substrate layer 1, electrodes are drawn out through the lower surface metal layer 11; A conductive semiconductor material 3, located on the substrate layer 1, is an N-conductive semiconductor silicon material, and the doping concentration of phosphorus atoms is 1E16/CM ³ ; a second conductive semiconductor material 4, located in the inner wall region of the trench, is P-conductive type of semiconductor silicon material, the doping concentration of boron atoms is 1E16/CM ³ , and the trench pitch is 1um; the ohmic contact region 6 is located on the surface of the first conductive semiconductor material 3; the upper surface of the device is attached with an upper surface metal layer 10, Lead out another electrode for the device.

Its manufacturing process includes the following steps:

In the first step, a first conductive semiconductor material layer is formed on the surface of the substrate layer 1, and a silicon nitride layer is formed by deposition;

The second step is to perform a photolithographic etching process, remove part of the silicon nitride from the surface of the semiconductor material, and implant phosphorus impurities for annealing;

The third step is to etch and implant the window oxide layer, and then etch to remove part of the exposed semiconductor silicon material to form a trench;

The fourth step is to perform boron diffusion to form the second conductive semiconductor material 4, remove the silicon nitride layer by etching, and then deposit metal on the surface to form the upper surface metal layer 10;

In the fifth step, a back metallization process is performed to form a lower surface metal layer 11 on the back, as shown in FIG. 5 .

FIG. 6 is a schematic cross-sectional view of a trench semiconductor device according to the present invention. On the basis of FIG. 5 , the strip-shaped second conductive semiconductor material 4 is arranged at the bottom of the trench to form a charge compensation structure in reverse bias.

The present invention is illustrated by the above examples, and other examples can also be used to realize the present invention. The present invention is not limited to the above specific examples, so the present invention is defined by the scope of the appended claims.

Claims (11)

1. A trench semiconductor device, characterized in that: comprising: The substrate layer is made of semiconductor material; The drift layer is made of the first conductive semiconductor material and is located on the substrate layer; a plurality of a trench, the trench is located in the drift layer; A semiconductor junction, which is a PN junction or a Schottky barrier junction, is located on the inner wall of the trench; The ohmic contact area is located on the upper surface of the semiconductor material between the trenches or the upper surface of the sidewall of the trench; The surface metal layer is located on the upper surface of the device and connects the ohmic base area with the surface electrode of the semiconductor junction. 2. The semiconductor device according to claim 1, wherein the width of the first conductive semiconductor material between the trenches is less than or equal to 3um. 3. The semiconductor device according to claim 1, wherein the semiconductor junction is a PN junction formed by the first conductive semiconductor material and the second conductive semiconductor material or a Schottky potential formed by the first conductive semiconductor material and the metal. Knot. 4. The semiconductor device according to claim 1, characterized in that: the semiconductor junction on the inner wall of the trench may be completely a Schottky barrier junction or a completely PN junction. 5 . The semiconductor device according to claim 1 , wherein the semiconductor junction on the inner wall of the trench is a Schottky barrier junction on the sidewall, and a PN junction on the bottom of the trench. 6 . 6 . The semiconductor device according to claim 1 , wherein the semiconductor junction on the inner wall of the trench can be an insulating layer on the sidewall, and a PN junction on the bottom of the trench. 7 . 7 . The semiconductor device according to claim 1 , wherein the semiconductor junction on the inner wall of the trench can be a semiconductor junction on the sidewall, and an insulating layer on the bottom of the trench. 8 . 8. The semiconductor device according to claim 1, wherein the ohmic contact region is located on the upper surface of the semiconductor material between the trenches. 9. The semiconductor device according to claim 1, wherein the ohmic contact region can be located on the upper surface of the sidewall of the trench, and the upper surface of the semiconductor material between the trenches is an insulating layer. 10 . The semiconductor device according to claim 1 , characterized in that: strips of second conductive semiconductor material with charge compensation function or insulating material with charge compensation function can be provided at the bottom of the trench. 11 . 11. A method for manufacturing a trench semiconductor device as claimed in claim 1, characterized in that: comprising the steps of: 1) Forming a first conductive semiconductor material layer on the surface of the substrate layer, and then forming an insulating layer on the surface; 2) Perform a photolithographic etching process to remove part of the insulating layer on the surface, and diffuse the first conductive impurities; 3) Etch the thin insulating layer on the surface, and then etch the exposed semiconductor material to form a trench; 4) Depositing metal for sintering to form a Schottky barrier junction, or setting a second conductive semiconductor material on the inner wall of the trench to form a PN junction.