CN103681818B - Eliminate trench-type insulated gate bipolar transistor device architecture and the method for latch-up - Google Patents

Abstract

The invention discloses a device structure for enhancing the reliability of an insulated gate bipolar transistor IGBT. There is a P-type ion-implanted low base resistance region on an N-type substrate; it is formed by P-type ion implantation on the back of the N-type substrate. There is a collector of an insulated gate bipolar transistor IGBT; in the low base resistance region, a P-type epitaxial region is formed by digging and filling a P-type epitaxial region; the middle of the P-type epitaxial region is etched and polysilicon A trench gate is formed by deposition; a gate oxide layer is formed inside the trench gate to isolate the polysilicon gate and the trench; the P-type epitaxial regions on both sides of the trench gate form edge regions by N-type ion implantation , are connected through contact holes to form the emitter of the insulated gate bipolar transistor IGBT. Through new process integration, the present invention separates the process of reducing the base resistance of the device package area from the process of modulating the threshold voltage, so as to achieve the purpose of completely reducing the base resistance without affecting the modulation of the device threshold voltage, so that the insulated gate The bipolar transistor IGBT device can greatly enhance the current passing capability and improve the robustness of the device.

Description

Device structure and method of trench-type insulated gate bipolar transistor for eliminating latch-up effect

technical field

The invention relates to a semiconductor device structure and method.

Background technique

The insulated gate bipolar transistor IGBT is a high-power power electronic device, especially the insulated gate bipolar transistor IGBT greater than 1200 volts, the front conduction current is often greater than 50 amperes, especially for deep trench type The insulated gate bipolar transistor IGBT has a high current density, and the P-type body region and the N-type source region are close together. In order to prevent the latch-up effect near the N-type source region, an additional layer of photomask is required, and boron implantation is specially performed and Push the well to reduce the base resistance, but the dose injection is too large or the push well is too deep, and it is easy to cause the threshold voltage to deviate. The injection dose is too small or the push well is shallow. The following dynamic latch-up phenomenon is also prone to occur, resulting in device damage. The process window to achieve a balance between static threshold voltage and latch-up is not large enough, and the device characteristics are not stable enough.

Contents of the invention

The technical problem to be solved by the present invention is to provide a trench type insulated gate bipolar transistor device structure and method that eliminates the latch-up effect, which can achieve the purpose of completely reducing the base resistance, and does not affect the modulation of the threshold voltage of the device. The current passing capability of the insulated gate bipolar transistor IGBT device can be greatly enhanced, and the robustness of the device can be improved.

In order to solve the above technical problems, the present invention provides a device structure for enhancing the reliability of the insulated gate bipolar transistor IGBT, which is characterized in that: there is a low base resistance region of P-type ion implantation on the N-type substrate; The collector of the insulated gate bipolar transistor IGBT is formed by P-type ion implantation on the back of the substrate; in the low base resistance region, a P-type epitaxial region is formed by digging grooves and P-type epitaxial filling; A trench gate is formed by etching and polysilicon deposition in the middle of the P-type epitaxial region; a gate oxide layer is formed inside the trench gate to isolate the polysilicon gate and the trench; the P-type epitaxial gate on both sides of the trench gate In the region, an edge region is formed by N-type ion implantation, which is connected through a contact hole to form an emitter of an insulated gate bipolar transistor IGBT.

The beneficial effects of the present invention are: through the new process integration, the process of reducing the base resistance of the device package area and the process of modulating the threshold voltage are separated, so as to achieve the purpose of completely reducing the base resistance without affecting the threshold voltage of the device. Modulation, so that the current passing capability of the insulated gate bipolar transistor IGBT device can be greatly enhanced, and the robustness of the device can be improved.

The present invention also provides a method for manufacturing a reinforced insulated gate bipolar transistor IGBT structure, comprising the following steps:

Step 1. Implanting boron ions and pushing wells in the metapacket area;

Step 2. Dig trenches in the metapacket area and fill them with doped epitaxy;

Step 3: Digging trenches in the epitaxial region, growing a gate oxide layer, and filling polysilicon gates;

Step 4, respectively implanting phosphorus on both sides of the polycrystalline gate to make the source;

Step 5: Boron ions are implanted on the back and wells are pushed to form the back anode, which is drawn out with metal.

In the first step, the implantation dose of boron ions is between 1E13 and 1E15/square centimeter, the temperature of the push well is between 950 degrees and 1200 degrees, and the time is between half an hour and 10 hours.

In the second step, the depth of the groove dug in the metapacket area is between 1 micron and 5 microns, and the width is between 1 micron and 5 microns.

In the second step, the concentration of epitaxy filling in the trench is between 1E13 and 1E14/cm2.

The temperature for growing the gate oxide in the step 3 is between 950 degrees Celsius and 1150 degrees Celsius, and the thickness of the gate oxide is between 900 angstroms and 1200 angstroms.

The phosphorus concentration of the polysilicon in the step 4 is 1E14 to 5E15 per square centimeter.

The thickness of the polysilicon in the step 4 is between 5000 angstroms and 15000 angstroms.

The bulk concentration of phosphorus in the source electrode in the step 4 is 5E14 to 1E15/cm2.

In the fourth step, metal is used to lead out the gate and the source, and the thickness of the metal is greater than 2 microns.

Description of drawings

The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

Figure 1 is a schematic diagram illustrating the formation of a low base resistance region by using the active region definition plate to implant boron ions and push hydrazine in the element envelope region;

2 is a schematic diagram of etching shallow trenches using a body region definition plate;

FIG. 3 is a schematic diagram of growing P-type epitaxy in a body trench;

Fig. 4 is a schematic diagram of etching a gate trench in a P-type epitaxy;

FIG. 5 is a schematic diagram of growing gate oxide in a trench;

Fig. 6 is a schematic diagram of filling polysilicon in the trench gate;

7 is a schematic diagram of implanting N-type source electrodes on both sides of the polysilicon gate;

Figure 8 is a schematic diagram of leading out the gate and source with metal on the front;

Fig. 9 is a schematic diagram of backside implantation to form a collector after thinning;

Figure 10 is a schematic diagram of drawing out the back anode with metal;

Fig. 11 is a schematic diagram of the IGBT of the present invention.

detailed description

In the existing technology, the P well is directly used to adjust the base resistance and threshold voltage of the device. And the present invention introduces a device structure and process method of a trench-type insulated gate bipolar transistor IGBT capable of eliminating the latch-up effect. The process of modulating the threshold voltage is separated to achieve the purpose of completely reducing the base resistance without affecting the modulation of the threshold voltage of the device, so that the current passing capability of the IGBT device of the insulated gate bipolar transistor can be greatly enhanced, and the robustness of the device can be improved.

1. In the existing insulated gate bipolar transistor IGBT process, the existing active region photolithography plate is used to implant boron ions and perform high-temperature well pushing to form the base region. The base resistance only depends on boron ion implantation concentration and thermal budget experienced by boron ions.

2. Etching shallow trenches in the bulk area using a photolithography plate in the body area, and growing P-type doped epitaxy.

3. The carrier concentration of P-type epitaxial doping depends on the threshold voltage.

4. Then, etch the gate trench in the epitaxial region, and the depth of the trench gate must be greater than the depth of the body region, so as to ensure the normal working state of the normal MOS device.

5. The gate oxide is grown in the gate trench, and its thickness depends on the isolation voltage and threshold voltage of the gate oxide.

6. Continue to grow N-type polysilicon in the gate trench. The thickness and concentration of polysilicon depend on the threshold voltage and the gate drive resistance.

Through the invention of the process of adjusting the body region and the gate trench separately, an IGBT device structure that completely eliminates the latch-up effect is formed. The invention of the process can completely reduce the base resistance of the package region and The threshold voltage can be adjusted independently, and the photolithography plate defined by the active area is also used, which saves a layer of photolithography process, can completely eliminate the latch-up effect, improve the current carrying capacity of the device, and enhance the IGBT device of the insulated gate bipolar transistor Dynamic capability and avalanche endurance capability.

1. A new device structure with enhanced insulated gate bipolar transistor IGBT reliability (as shown in Figure 11), which is characterized by:

There is no influence between the body concentration of the channel body region and the base resistance, independent debugging.

2. As shown in Figure 1, in the element package area, use the active area to define the photolithography plate to implant boron ions and push wells;

3. Adjustment, the implantation dose of boron ions is between 1E13 and 1E15, the temperature of the push well is between 950 degrees and 1200 degrees, and the time is between half an hour and 10 hours;

4. As shown in Figure 2, use the photolithography plate of the P-type body region to dig trenches in the element package area and fill it with doped epitaxy (as shown in Figure 3);

5. Adjust the etching process, and the depth of the trench in the metapacket area is between 1 micron and 5 microns, and the width is between 1 micron and 5 microns;

6. The concentration of epitaxial filling in the trench is between 1E13 and 1E14/square centimeter;

7. Use the trench gate to define the photolithography plate to dig trenches in the epitaxial region, grow the gate oxide, and fill the polysilicon gate (as shown in Figure 4 and Figure 5);

8. Adjust the furnace tube process so that the temperature of the gate oxide is between 950 degrees Celsius and 1150 degrees Celsius, and the thickness of the gate oxide is between 900 angstroms and 1200 angstroms;

9. Adjust the furnace tube process so that the phosphorus concentration of polysilicon is 1E14 to 5E15 per square centimeter, and the thickness of polysilicon is between 5000 angstroms and 15000 angstroms (as shown in Figure 6);

10. Combining with the source definition plate, respectively inject phosphorus on both sides of the polycrystalline gate as the source (as shown in Figure 7);

11. Adjust the injection process, the volume concentration of phosphorus in the source is 5E14 to 1E15 per square centimeter;

12. After the device is formed, use metal to lead out the gate and source in the back-stage process, and the thickness of the metal is greater than 2 microns;

13. After the silicon wafer is thinned, boron ions are implanted on the back and the trap is pushed to form the back anode, which is drawn out with metal (as shown in Figure 11).

The invention is not limited to the embodiments discussed above. The above description of specific implementations is intended to describe and illustrate the technical solutions involved in the present invention. Obvious changes or substitutions based on the teachings of the present invention should also be deemed to fall within the protection scope of the present invention. The above specific implementation manners are used to reveal the best implementation method of the present invention, so that those skilled in the art can apply various implementation manners and various alternative modes of the present invention to achieve the purpose of the present invention.

Claims (10)

1. a device architecture for reinforced insulation grid bipolar transistor reliability, is characterized in that: have the low base resistance district of p-type ion implanting in N-type substrate；

It is formed with the colelctor electrode of insulated gate bipolar transistor by p-type ion implanting at the N-type substrate back side；

In described low base resistance district, it is formed with p-type epitaxial region by grooving by the way of the filling of p-type extension；

Described p-type epitaxial region intermediate etch is formed with groove and carries out the mode of polysilicon deposit in the trench and be formed with trench gate；

Gate oxide isolation polysilicon gate and groove it is formed with inside described trench gate；

Form source region by N-type ion implanting in the p-type epitaxial region of described trench gate both sides, connected by contact hole, constitute the emitter stage of insulated gate bipolar transistor；

Described low base resistance district and described p-type epitaxial region are together as the p-type doped region in the Yuan Bao district of insulated gate bipolar transistor, and the doping content between described low base resistance district and described p-type epitaxial region is independent mutually；Preventing latch-up by the doping content regulating described low base resistance district, the doping content in described low base resistance district is the biggest, and anti-latch-up ability is the strongest；The threshold voltage of described insulated gate bipolar transistor is regulated by the doping content regulating described p-type epitaxial region；The most independent structure of doping content between described low base resistance district and described p-type epitaxial region makes the p-type doping content increased Yuan Bao district for preventing latch-up not interfere with threshold voltage.

2. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 1, it is characterised in that comprise the following steps:

Step one, carry out the injection of boron ion in Yuan Bao district and push away trap；

Step 2, inside Yuan Bao district digging groove, fill out doped epitaxial；

Step 3, inside epitaxial region digging groove, grow gate oxide, fill out polysilicon gate；

Step 4, it is injected separately into phosphorus on the both sides of polysilicon gate, makes source electrode；

Step 5, the back side are injected boron ion and push away trap, form back anode, and draw with metal.

3. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 2, it is characterized in that, in described step one, the implantation dosage of boron ion is between 1E13 to 1E15/ square centimeter, pushing away the temperature of trap between 950 degree and 1200 degree, the time is between half an hour and 10 hours.

4. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 3, it is characterised in that inside described step 2 Zhong Yuanbao district, the degree of depth of digging groove is between 1 micron and 5 microns, and width is between 1 micron and 5 microns.

5. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 4, it is characterised in that fill out the concentration of extension in described step 2 inside groove between 1E13 to 1E14/ square centimeter.

6. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 5, it is characterised in that in described step 3, the temperature of growth grid oxygen is between 950 and 1150 degree, and the thickness of grid oxygen is between 900 angstroms to 1200 angstroms.

7. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 6, it is characterised in that in described step 4, the phosphorus concentration of polysilicon is at 1E14 to 5E15/square centimeter.

8. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 7, it is characterised in that in described step 4, the thickness of polysilicon is between 5000 angstroms to 15000 angstroms.

9. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 8, it is characterised in that in described step 4, in source electrode, the bulk concentration of phosphorus is 5E14 to 1E15/ square centimeter.

10. the method for the device architecture manufacturing reinforced insulation grid bipolar transistor reliability as claimed in claim 9, it is characterised in that with metal, grid and source electrode being drawn in described step 4, the thickness of metal is more than 2 microns.