CN103532499A - Distortion compensating device and distortion compensating method - Google Patents

Abstract

Distortion compensation device and distortion compensation method. In the distortion compensation unit, a threshold calculation unit calculates a clipping threshold to be set in the adjustment unit based on the address value generated by the address generation circuit. For example, the threshold calculation unit calculates the clipping threshold by identifying a maximum value of address values generated by the address generation circuit in each adjustment unit period and subtracting a specific value from the identified maximum value. The adjustment unit adjusts the distortion compensation coefficient based on the address value received from the address generation circuit and a magnitude relationship with the set clipping threshold.

Description

Distortion compensation device and distortion compensation method

technical field

Embodiments discussed herein relate to distortion compensation devices and distortion compensation methods.

Background technique

In recent years, with the development of digital communication, wireless communication devices such as cellular phones and smartphones efficiently perform data transmission. When a wireless communication device on the data transmission side applies a polyphase modulation method as a data transmission method, it is important to linearize the amplification characteristics of a transmission power amplifier to reduce nonlinear distortion, thereby reducing power leaked to adjacent channels.

In addition, in order to improve power efficiency using an amplifier with poor linearity, a technique of compensating nonlinear distortion caused by poor linearity is desired. Therefore, a distortion compensation unit that compensates for nonlinear distortion of a power amplifier is provided in a wireless communication device.

For example, the distortion compensation unit compares the transmission signal (converted into I and Q signals by the S/P converter) with the feedback signal (feedback of a part of the amplified I and Q signal), and calculates the difference between the transmission signal and the feedback signal Distortion compensation coefficient as small as zero. Then, the distortion compensation unit multiplies the transmission signal converted into I and Q signals by a distortion compensation coefficient, thereby compensating for distortion. The distortion compensation unit compares the transmission signal before distortion compensation with the feedback signal (part of the signal amplified after distortion compensation is fed back), and updates the distortion compensation coefficient as necessary so that the difference between these signals becomes zero.

Generally, the non-linear characteristics of power amplifiers occur in the saturation region. That is, when the power of a signal input to a power amplifier, that is, the amplitude of a transmission signal is high, distortion may occur. Therefore, it is important to optimize the distortion compensation coefficient corresponding to high power. However, high-power signals occur less frequently, so it takes time to optimize the distortion compensation coefficients. And, while the distortion compensation coefficient is being optimized, a spurious signal (spurious) is generated in a frequency band corresponding to an adjacent channel.

For example, as shown in FIG. 1 , a table is provided that associates a plurality of addresses with distortion compensation coefficients corresponding to the addresses (hereinafter, also generally referred to as “look-up table (LUT)”). In FIG. 1, the horizontal axis represents addresses, and the vertical axis represents values of distortion compensation coefficients. Here, the address corresponds to the power of the input signal. As shown in FIG. 1 , during optimization, a difference between ideal distortion compensation coefficients and actual distortion compensation coefficients is generated in high address values. Due to this difference, spurious signals are generated.

In order to solve this problem, conventionally, a technique of fixing a distortion compensation coefficient corresponding to an address higher than a certain threshold (hereinafter also generally referred to as “address clipping”) has been proposed. In this conventional address clipping, the distortion compensation coefficient corresponding to an address above a certain threshold (hereinafter, also commonly referred to as "clipping threshold" or "address clipping value") is set to be equal to or smaller than the clipping The distortion compensation coefficient corresponding to the closest address among the addresses of the threshold value (hereinafter, also generally referred to as “slicing coefficient”).

Examples of related art are described, for example, in Japanese Patent Laid-Open No. 2011-199428 and Japanese Patent Laid-Open No. 2001-284976.

However, when the clipping threshold is fixed to a too low value, address clipping is also applied to addresses above the clipping threshold, and the corresponding distortion compensation coefficients are optimized. In addition, when the clipping threshold is fixed to an excessively high value, the distortion compensation coefficient of an address that is actually not optimized is used as the clipping coefficient. As a result, spurious signals are generated.

Therefore, an object of an aspect of the embodiments of the present invention is to provide a distortion compensation device and a distortion compensation method capable of reducing the generation of spurious signals.

Contents of the invention

According to an aspect of the implementation, a distortion compensation device for compensating the distortion of an amplifier includes: a multiplication unit that multiplies an input transmission signal by an input distortion compensation coefficient; a generation unit that generates a power corresponding to the power of the transmission signal Address value; adjustment unit, when the generated address value is higher than the set threshold, the adjustment unit retrieves the distortion compensation coefficient corresponding to the set threshold from the storage unit and inputs the retrieved distortion compensation coefficient to the set The multiplication unit, when the generated address value is equal to or lower than the set threshold value, the adjustment unit retrieves the distortion compensation coefficient corresponding to the generated address value from the storage unit and converts the retrieved distortion compensation coefficient input to the multiplication unit; and a threshold calculation unit that calculates a threshold based on the generated address value and updates the set threshold with the calculated threshold.

Description of drawings

FIG. 1 is a diagram showing the difference between ideal distortion compensation coefficients and actual distortion compensation coefficients;

FIG. 2 is a diagram showing the configuration of a wireless communication device according to the first embodiment;

FIG. 3 is a diagram showing input-output characteristics of a transmission power amplifier;

FIG. 4 is a diagram for explaining nonlinear distortion caused by nonlinear characteristics;

5 is a diagram showing a configuration example of a distortion compensation unit according to the first embodiment;

6 is a diagram showing a configuration example of a coefficient calculation unit according to the first embodiment;

7 is a flowchart showing an example of processing operations of the distortion compensation unit according to the first embodiment;

8 is a diagram for explaining a processing operation of a distortion compensation unit according to the first embodiment in a plurality of adjustment unit periods;

9 is a diagram for explaining LUT update processing performed by the distortion compensation unit according to the first embodiment;

10 is a flowchart showing an example of processing operations of the distortion compensation unit according to the second embodiment;

11 is a diagram for explaining a processing operation of a distortion compensation unit according to the second embodiment;

12 is a flowchart showing an example of processing operations of the distortion compensation unit according to the third embodiment;

13 is a diagram for explaining a processing operation of a distortion compensation unit according to a third embodiment;

14 is a diagram showing a configuration example of a distortion compensation unit according to a fourth embodiment;

15 is a flowchart showing an example of processing operations of the distortion compensation unit according to the fourth embodiment;

16 is a diagram showing a configuration example of a distortion compensation unit according to a fifth embodiment;

17 is a flowchart showing an example of processing operations of a distortion compensation unit according to the fifth embodiment;

18 is a diagram showing a configuration example of a distortion compensation unit according to a sixth embodiment;

19 is a flowchart showing an example of processing operations of the distortion compensation unit according to the sixth embodiment; and

FIG. 20 is a diagram showing an example of a hardware configuration of a wireless communication device (base station).

Detailed ways

Preferred embodiments of the present invention will be described with reference to the accompanying drawings. Incidentally, the distortion compensation device and the distortion compensation method according to the present invention are not limited to these embodiments. In addition, in the embodiments, units having the same function are designated with the same reference numerals to avoid repeated description of the units.

[a] First Embodiment

Structure of wireless communication device

FIG. 2 is a diagram showing the configuration of a wireless communication device according to the first embodiment. In FIG. 2 , a wireless communication device 100 includes a transmission signal generation unit 102 , a serial/parallel (S/P) converter 104 , a distortion compensation unit 110 , and a digital/analog (D/A) converter 122 . The wireless communication device 100 also includes a quadrature modulator 124 , a frequency converter 126 , an amplifier 128 , a directional coupler 130 , an antenna 132 , and a reference carrier generation unit 134 . Wireless communication device 100 also includes A/D converter 136 , quadrature demodulator 138 and frequency converter 140 . The distortion compensation unit 110 includes a pre-distortion unit 112 , a distortion compensation coefficient storage unit 114 and a distortion compensation coefficient calculation unit 116 . The distortion compensation unit 110 is realized by, for example, a digital signal processor (DSP). The wireless communication device 100 is, for example, a base station.

The transmission signal generation unit 102 generates a serial digital data string to be transmitted from the wireless communication device 100 . The S/P converter 104 alternately converts the bits of the digital data string generated by the transmission signal generating unit 102 into two sequences of an in-phase component signal (I signal) and a quadrature component signal (Q signal). .

The D/A converter 122 converts each of the I and Q signals into an analog baseband signal. The quadrature modulator 124 shifts the phase by 90 with respect to the reference carrier by multiplying each of the I and Q signals (transmission baseband signals) output from the D/A converter 122 by the reference carrier generated by the reference carrier generating unit 134. degrees of the carrier, and the results of the multiplication are summed to perform an orthogonal transformation.

The frequency converter 126 mixes the quadrature signal output from the quadrature modulator 124 with the local oscillator signal, thereby converting the quadrature signal into a radio frequency signal. The amplifier 128 amplifies the radio frequency signal output from the frequency converter 126 and radiates the amplified radio frequency signal into the air via the directional coupler 130 and the antenna 132 .

The directional coupler 130 feeds back a part of the transmitted signal, and inputs the feedback signal to the frequency converter 140 . Frequency converter 140 performs frequency conversion of the feedback signal. The quadrature demodulator 138 performs quadrature demodulation by multiplying the feedback signal output from the frequency converter 140 by the reference carrier generated by the reference carrier generation unit 134 and a signal whose phase is shifted by 90 degrees with respect to the reference carrier to The sender reproduces the baseband I and Q signals. The A/D converter 136 converts the feedback signal output from the quadrature demodulator 138 into a digital signal, and inputs the digital signal to the distortion compensation unit 110 .

The distortion compensation coefficient storage unit 114 stores a distortion compensation coefficient h(pi) corresponding to the power pi (i=0 to 1023) of the transmission signal x(t). The predistortion unit 112 performs distortion compensation processing (predistortion) on the transmission signal using the distortion compensation coefficient h(pi) corresponding to the power level of the transmission signal. The distortion compensation coefficient calculation unit 116 compares the transmission signal x(t) with the demodulated signal (feedback signal) y(t) demodulated by the quadrature demodulator 138, and calculates the difference between the transmission signal x(t) and the demodulated The difference of the signal y(t) is reduced to a distortion compensation coefficient h(pi) of zero, and then the distortion compensation coefficient stored in the distortion compensation coefficient storage unit 114 is updated.

In this way, the distortion compensation unit 110 adaptively updates the distortion compensation coefficient so that the difference between the feedback signal (a part of the signal amplified by the amplifier 128 ) and the transmission signal before distortion compensation becomes zero.

Subsequently, the input-output characteristics of the amplifier and the nonlinear distortion caused by the nonlinear characteristics are explained. FIG. 3 is a graph showing input-output characteristics of a transmission power amplifier. FIG. 4 is a diagram for explaining nonlinear distortion caused by nonlinear characteristics.

In mobile communication such as W-CDMA, the transmission power of the wireless communication device is as high as 10 mW to several tens of W, and the input-output characteristic of the amplifier 128 (having the distortion function f(p)) is non-linear as indicated by the dotted line in FIG. 3 characteristic. Non-linear characteristics cause nonlinear distortion, and in FIG. 4 the side lobes of the spectrum around the transmission frequency f ₀ rise from the characteristic indicated by the dashed line 157 to the characteristic indicated by the solid line 158 . Thus, the transmitted signal leaks into the adjacent channel, causing adjacent channel interference. That is, due to the nonlinear distortion shown in FIG. 3 , the power of the transmission signal leaked to the adjacent frequency channel increases as shown in FIG. 4 .

The Adjacent Channel Power Ratio (ACPR), which indicates the magnitude of the leakage power, is the ratio of the power of the target channel (i.e., the spectral area between bands 152 and 154 in Figure 4) to the adjacent channel power (i.e., The ratio of the spectral areas of adjacent channels between This leakage power is noise to another channel, deteriorating the communication quality of that channel; therefore, the leakage power is strictly managed.

For example, leakage power is low in the linear region of the power amplifier (linear region α in Figure 3) and high in the nonlinear region β. Therefore, in a high-power transmission power amplifier, it is desirable that the linear region α be wide. For this purpose, however, it is advisable to provide amplifiers with higher performance than actually required, which leads to disadvantages in terms of cost and device size. Therefore, the distortion compensating section 110 that compensates for the distortion of the transmission power is included in the wireless communication device 100 as described above.

Construction of Distortion Compensation Unit

FIG. 5 is a diagram showing a configuration example of a distortion compensation unit according to the first embodiment. In FIG. 5, the distortion compensation unit 110 includes a multiplication unit 212, a distortion function calculation unit 214, an address generation circuit 216, a threshold calculation unit 218, a look-up table (LUT) 220, delay units 228, 230, and 234, a feedback unit 232, and a coefficient computing unit 236 . The LUT 220 includes an adjustment unit 222 , a table holding unit 224 and a writing unit 226 .

The multiplication unit 212 in FIG. 5 corresponds to the pre-distortion unit 112 in FIG. 2 . The multiplication unit 212 multiplies the transmission signal x(t) by the distortion compensation coefficient hn-1(p). The distortion function calculation unit 214 in FIG. 5 corresponds to the amplifier 128 in FIG. 2 .

The feedback unit 232 in FIG. 5 corresponds to the part including the directional coupler 130 , the frequency converter 140 , the quadrature demodulator 138 and the A/D converter 136 in FIG. 2 . LUT 220 in FIG. 5 corresponds to distortion compensation coefficient storage unit 114 in FIG. 2 . The coefficient calculation unit 236 in FIG. 5 corresponds to the distortion compensation coefficient calculation unit 116 in FIG. 2 .

When the transmission signal x(t) is input to the address generation circuit 216, the address generation circuit 216 calculates the power p of the transmission signal x(t), and generates an address uniquely corresponding to the calculated power p of the transmission signal x(t). An address in a one-dimensional direction (for example, the X-axis direction). Simultaneously, the address generating circuit 216 obtains the difference ΔP from the power p1 of the transmission signal x(t-1) at the previous time (t-1) stored in the address generating circuit 216, and generates another ΔP uniquely corresponding to the difference ΔP. The address in the direction of the dimension (for example, the direction of the Y axis). The generated address value is output to the threshold calculation unit 218 , the adjustment unit 222 and the delay unit 230 .

At intervals of a unit period for threshold adjustment (hereinafter, also generally referred to as “adjustment unit period”), the threshold calculation unit 218 identifies the maximum value of the address value generated by the address generation circuit 216, and based on the identified maximum value Calculate the clipping threshold. Preferably, the adjustment unit period is within 1 millisecond to 100 milliseconds.

For example, the threshold calculation unit 218 calculates the clipping threshold by subtracting a certain offset value from the identified maximum value. That is, the clipping threshold is an address value lower by N (a certain offset value) than the maximum value. The offset value N is a positive value, and is an arbitrary natural number of 1 to 3, for example. The calculated clipping threshold is output to the adjustment unit 222 . In this way, the clipping threshold set in the adjustment unit 222 is updated at intervals of the adjustment unit period.

Incidentally, here, a plurality of address values are generated in an adjustment unit period. That is, the "adjustment unit period" includes a plurality of sampling times.

The adjusting unit 222 adjusts the distortion compensation coefficient based on the address value received from the address generating circuit 216 and the magnitude relationship with the set clipping threshold.

For example, when the address value received from the address generation circuit 216 is equal to or less than the clipping threshold, the adjustment unit 222 retrieves the distortion compensation corresponding to the address value received from the address generation circuit 216 from the LUT held in the table holding unit 224 coefficients, and output the retrieved distortion compensation coefficients to the multiplication unit 212. On the other hand, when the address value received from the address generating circuit 216 is higher than the clipping threshold, the adjusting unit 222 retrieves the distortion compensation coefficient of the address corresponding to the clipping threshold from the table holding unit 224, and converts the retrieved distortion The compensation coefficient is output to the multiplication unit 212 .

Incidentally, the distortion compensation coefficient output from the adjustment unit 222 is also input to the coefficient calculation unit 236 via the delay unit 228 as a coefficient parameter for calculating the LUT update value.

The table holding unit 224 holds LUTs. That is, the table holding unit 224 stores distortion compensation coefficients for canceling distortion of the distortion function calculation unit 214 (amplifier) in two-dimensional address positions corresponding to the power of each discrete transmission signal x(t).

The write unit 226 sets the address generated by the address generation circuit 216 and the distortion compensation coefficient calculated by the coefficient calculation unit 236 as input signals. Then, the writing unit 226 writes the distortion compensation coefficient calculated by the coefficient calculation unit 236 into the address generated by the address generation circuit 216, thereby updating the LUT. Incidentally, the read address (AR) and write address (AW) generated by the address generation circuit 216 are the same address; The read address is delayed and used as the write address.

The coefficient calculation unit 236 sets the transmission signal x(t), the feedback demodulation signal y(t) (feedback signal), and the distortion compensation coefficient output from the adjustment unit 222 as input signals. Here, the delay units 228 and 234 are provided so that the signal input to the coefficient calculation unit 236 is obtained from the same transmission signal x(t). That is, for example, the delay time D set in the delay units 228 and 234 is determined so as to satisfy D=D0+D1, where the delay time in the distortion function calculation unit 214 (amplifier) is represented by D0, and the delay time in the feedback unit 232 is represented by D1 said.

For example, as shown in FIG. 6 , the coefficient calculation unit 236 includes multiplication units 242 , 244 and 246 , a complex conjugate signal output unit (Conj) 248 , a subtraction unit 250 and an addition unit 252 .

The subtraction unit 250 outputs the difference e(t) between the transmission signal x(t) delayed by the delay unit 230 and the feedback demodulation signal y(t) (feedback signal).

The multiplication unit 246 multiplies the distortion compensation coefficient hn-1(p) by y*(t), and obtains an output u*(t) (=hn-1(p)y*(t)). The multiplying unit 244 multiplies the difference e(t) output from the subtracting unit 250 by u*(t). The multiplication unit 242 multiplies the step size parameter μ by the output of the multiplication unit 244 .

Then, the addition unit 252 adds the distortion compensation coefficient hn−1(p) and μe(t)u*(t) (the output of the multiplication unit 242 ), and outputs the addition result to the writing unit 226 .

The following calculations are performed through these mechanisms:

hn(p)=hn-1(p)+μe(t)u*(t)

e(t)=x(t)-y(t)

y(t)=hn-1(p)x(t)f(p)

u*(t)=x(t)f(p)=hn-1(p)y*(t)

p=|x(t)|2

However, assuming that x, y, f, h, u, and e are complex numbers, * is a complex conjugate number. By performing the above calculation, the distortion compensation coefficient h(p) is updated to minimize the difference signal e(t) between the transmitted signal x(t) and the feedback demodulation signal y(t), and finally converges to the optimal distortion compensation coefficient value , to compensate for the distortion of the amplifier 128.

Operation of the Distortion Compensation Unit

The operation of the distortion compensation unit 110 having the above configuration is explained. FIG. 7 is a flowchart showing an example of processing operations of the distortion compensation unit 110 according to the first embodiment. FIG. 8 is a diagram for explaining the processing operation of the distortion compensation unit 110 according to the first embodiment in a plurality of adjustment unit periods.

The flow shown in FIG. 7 starts when a given period of adjustment unit begins.

The threshold calculation unit 218 receives an input of the address value generated by the address generation circuit 216 (step S11 ).

The threshold calculation unit 218 determines whether the just-input first address value is higher than the second address value which is the maximum value of previous address values input in the current adjustment unit period (step S12 ).

When the first address value is higher than the second address value (“Yes” in step S12 ), the threshold calculation unit 218 updates the second address value with the first address value (step S13 ). On the other hand, when the first address value is equal to or lower than the second address value (NO in step S12 ), the threshold calculation unit 218 does not update the address value.

The threshold calculation unit 218 determines whether a specified time period has elapsed since the adjustment unit period started, that is, whether the adjustment unit period has ended (step S14 ).

When the adjustment unit period has not ended (NO in step S14 ), the process returns to step S11 . In this way, by repeating the processing of steps S11 to S14, the maximum value of the address value in the adjustment unit period is identified.

When the adjustment unit period ends (YES in step S14 ), the threshold calculation unit 218 calculates a clipping threshold based on the identified maximum value (step S15 ).

Here, the adjustment unit period is repeated as shown in FIG. 8 . The clipping threshold calculated based on the maximum value identified in the adjustment unit period A is set in the adjustment unit 222 in the period overlapping the next adjustment unit period B following the adjustment unit period A.

FIG. 9 is a diagram for explaining LUT update processing performed by the distortion compensation unit 110 according to the first embodiment.

When the address generated by the address generation circuit 216 is higher than the set clip threshold (YES in step S21), the coefficient calculation unit 236 based on the distortion compensation coefficient retrieved with the set clip threshold and the current transmission signal x (t) to generate LUT update values (step S22).

On the other hand, when the address generated by the address generation circuit 216 is equal to or lower than the set clipping threshold (NO in step S21), the coefficient calculation unit 236 retrieves based on the address generated by the address generation circuit 216 The distortion compensation coefficient and the current transmission signal x(t) are used to generate an LUT update value (step S23 ).

The writing unit 226 writes the distortion compensation coefficient calculated by the coefficient calculation unit 236 into the address generated by the address generation circuit 216, thereby updating the LUT (step S24).

As described above, according to the present embodiment, in the distortion compensation unit 110 , the threshold calculation unit 218 calculates the clipping threshold to be set in the adjustment unit 222 based on the address value generated by the address generation circuit 216 .

In this way, the set clip threshold can be sequentially updated to an appropriate value based on the address value generated by the address generation circuit 216, so that the generation of spurious signals can be reduced.

For example, at intervals of adjustment unit periods, threshold calculation unit 218 identifies the maximum value of address values generated by address generation circuit 216, and calculates the clipping threshold by subtracting a certain offset value N from the identified maximum value.

[b] Second Embodiment

In the second embodiment, when it is determined that the clipping threshold calculated based on the just generated address value is higher than the currently set clipping threshold, the just calculated clipping threshold is set as the newly set clipping threshold. In addition, subtraction processing of subtracting a specific value from the set clip threshold value is executed in each "execution cycle". Incidentally, the basic configuration of the distortion compensating unit in the second embodiment is the same as that of the distortion compensating unit 110 in the first embodiment, so this embodiment will be described with reference to FIG. 5 .

The threshold calculation unit 218 of the distortion compensation unit 110 in the second embodiment calculates a clipping threshold based on an input address value every time an address value is input from the address generation circuit 216 . Then, the threshold calculating unit 218 compares the clipping threshold calculated just now with the set clipping threshold currently set in the adjusting unit 222 and saved in the threshold calculating unit 218 . As a comparison result, when the clipping threshold calculated just now is higher than the currently set clipping threshold, the threshold calculation unit 218 sets the clipping threshold calculated just now as a newly set clipping threshold.

In addition, in each execution cycle, the threshold calculating unit 218 subtracts a specific value from the set clipping threshold, and resets the obtained clipping threshold in the adjusting unit 222 . Preferably, the execution period is within 1 millisecond to 100 milliseconds.

FIG. 10 is a flowchart showing an example of processing operations of the distortion compensation unit 110 according to the second embodiment. FIG. 11 is a diagram for explaining processing operations of the distortion compensation unit 110 according to the second embodiment.

When the address value has been input to the threshold calculation unit 218 (YES in step S31 ), the threshold calculation unit 218 calculates a clipping threshold based on the input address value (step S32 ).

The threshold calculation unit 218 compares the clip threshold calculated just now with the set clip threshold currently set in the adjustment unit 222 and saved in the threshold calculation unit 218 (step S33 ).

When the previously calculated clipping threshold is higher than the currently set clipping threshold ("Yes" in step S33), the threshold calculation unit 218 updates the set clipping threshold with the just calculated clipping threshold (step S34). Incidentally, when the just-calculated clip threshold is not higher than the currently set clip threshold (NO in step S33 ), the threshold calculating unit 218 does not update the set clip threshold.

The threshold calculation unit 218 determines whether the execution period of the subtraction process has expired (step S35 ). When the execution period expires (YES in step S35 ), the threshold calculation unit 218 subtracts a specific value from the set clipping threshold (step S36 ). Incidentally, when the execution period has not expired ("No" in step S35), the threshold calculation unit 218 does not execute the subtraction process.

The threshold calculation unit 218 determines whether the termination condition is satisfied (step S37 ). When the termination condition is not satisfied ("No" in step S37), the process returns to step S31; when the termination condition is satisfied ("Yes" in step S37), the processing shown in FIG. 10 is terminated. For example, the termination condition is that the wireless communication device or the like 100 is turned off.

Here, the execution cycle is repeated as shown in FIG. 11 . In FIG. 11 , in execution cycles A and D, the set clipping threshold is updated three times. On the other hand, in execution cycles B and C, the set clipping threshold is never updated. In this way, although the set clipping threshold is not updated in some execution cycles, subtraction processing is definitely performed at the boundary between two adjacent execution cycles.

As described above, according to the present embodiment, whenever a clipping threshold higher than the currently set clipping threshold is calculated based on the just generated address value in distortion compensating section 110, threshold computing section 218 uses the just-calculated clipping threshold The amplitude threshold updates the set clipping threshold.

In this way, consistency with power changes of the transmitted signal can be improved.

In addition, in each execution cycle, the threshold calculation unit 218 subtracts a specific value from the set clipping threshold.

In this way, even if the set clip threshold is set to an excessive value, the set clip threshold can be adjusted to an appropriate value.

[c] Third Embodiment

In the third embodiment, in the same manner as in the second embodiment, when it is determined that the clipping threshold calculated based on the just-generated address value is higher than the currently set clipping threshold, the just-calculated clipping threshold Set to the newly set clipping threshold. Furthermore, in the third embodiment, unlike in the second embodiment, subtraction processing is executed when the set clip threshold is not newly updated in the "execution determination period". Incidentally, the basic configuration of the distortion compensating unit in the third embodiment is the same as that of the distortion compensating unit 110 in the first embodiment, so this embodiment will be described with reference to FIG. 5 .

The threshold calculation unit 218 of the distortion compensation unit 110 in the third embodiment calculates a clipping threshold based on an input address value every time an address value is input from the address generation circuit 216 . Then, the threshold calculating unit 218 compares the clipping threshold calculated just now with the set clipping threshold currently set in the adjusting unit 222 and saved in the threshold calculating unit 218 . As a comparison result, when the clipping threshold calculated just now is higher than the currently set clipping threshold, the threshold calculation unit 218 sets the clipping threshold calculated just now as a newly set clipping threshold.

In addition, the threshold calculation unit 218 performs subtraction processing when the set clip threshold is not newly updated in the "execution determination period". The "execution determination period" is a specific period of time from any update timing of the set clipping threshold.

Fig. 12 is a flowchart showing an example of the processing operation of the distortion compensation unit 110 according to the third embodiment. Fig. 13 is a diagram for explaining the processing operation of the distortion compensation unit 110 according to the third embodiment.

The threshold calculation unit 218 determines whether the set clip threshold is newly updated in the execution determination period, that is, whether a certain period of time has elapsed since the last update time of the set clip threshold (step S41 ).

When it is determined that a certain period of time has elapsed (YES in step S41 ), the threshold calculation unit 218 subtracts a certain value from the set clipping threshold (step S36 ).

Here, as shown in FIG. 13 , the execution of the determination period is restarted every time the set clipping threshold is updated. The clipping thresholds set in the execution determination periods A and F are not newly updated, so subtraction processing is performed when the execution determination periods A and F end. Incidentally, as can be seen from the execution determination periods B and C, the execution determination period starts from the moment when the subtraction process is performed.

As described above, according to the present embodiment, when the set clip threshold is not newly updated within the execution determination period, the threshold calculating unit 218 executes subtraction processing. The execution determination period is a specific period of time from any update moment of the set clipping threshold.

In this way, the set clipping threshold can be prevented from being over-adjusted, and the set clipping threshold can be adjusted explicitly when the set clipping threshold is not re-updated in the execution determination period and may be set to an excessive value. for the appropriate value.

[d] Fourth Embodiment

In the fourth embodiment, when the following conditions are satisfied, an LUT update value is generated based on the distortion compensation coefficient retrieved with the set clipping threshold and the current transmission signal x(t). The conditions are: the address generated by the address generating circuit is higher than the set clipping threshold, and the distortion compensation coefficient corresponding to the address generated by the address generating circuit is the initial value of the table.

FIG. 14 is a diagram showing a configuration example of a distortion compensation unit according to a fourth embodiment. In FIG. 14 , the distortion compensation unit 110 includes a LUT 310 . The LUT 310 includes an adjustment unit 311 .

The adjustment unit 311 performs the same processing as the adjustment unit 222 according to any one of the first to third embodiments, and outputs the distortion compensation coefficient to the multiplication unit 212 .

In addition, only when condition 1 is satisfied, the adjustment unit 311 outputs the distortion compensation coefficient retrieved with the set clipping threshold as a coefficient parameter to the coefficient calculation unit 236 . Condition 1 is: the address generated by the address generating circuit 216 is higher than the set clipping threshold, and the distortion compensation coefficient corresponding to the address generated by the address generating circuit 216 is the initial value of the table.

On the other hand, when condition 1 is not satisfied, the adjustment unit 311 outputs the distortion compensation coefficient retrieved with the address generated by the address generation circuit 216 as a coefficient parameter to the coefficient calculation unit 236 .

FIG. 15 is a flowchart showing an example of processing operations of the distortion compensation unit 110 according to the fourth embodiment.

The adjustment unit 311 receives an input of an address value generated by the address generation circuit 216 (step S51 ).

The adjustment unit 311 compares the input address value with the set clipping threshold (step S52 ).

When the input address value is higher than the set clipping threshold ("Yes" in step S52), the adjustment unit 311 determines whether the distortion compensation coefficient associated with the input address value in the LUT is the initial value of the table (step S53).

When the distortion compensation coefficient is the table initial value (YES in step S53 ), the adjustment unit 311 outputs the distortion compensation coefficient retrieved with the set clipping threshold to the coefficient calculation unit 236 . The coefficient calculation unit 236 generates a distortion compensation coefficient, that is, an LUT update value based on the distortion compensation coefficient retrieved with the set clipping threshold and the current transmission signal x(t) (step S54 ).

On the other hand, when the input address value is equal to or lower than the set clipping threshold ("No" in step S52) or when the distortion compensation coefficient is not the initial value of the table ("No" in step S53), the adjustment unit 311 will The distortion compensation coefficient retrieved with the input address value is output to the coefficient calculation unit 236 . The coefficient calculation unit 236 generates a distortion compensation coefficient, that is, an LUT update value, based on the distortion compensation coefficient retrieved with the input address value and the current transmission signal x(t) (step S55 ).

The writing unit 226 writes the distortion compensation coefficient calculated by the coefficient calculation unit 236 into the address generated by the address generation circuit 216, thereby updating the LUT (step S56).

As described above, according to the present embodiment, in the distortion compensation unit 110, the coefficient calculation unit 236 calculates the coefficients stored in the LUT based on the transmission signal before amplification by the distortion function calculation unit 214 (amplifier), the transmission signal after the amplification, and the coefficient parameters. The updated value of the distortion compensation coefficient. When the address generated by the address generating circuit 216 is higher than the set clipping threshold, and the distortion compensation coefficient corresponding to the address generated by the address generating circuit 216 is the initial value of the table, the coefficient parameter is corresponding to the set clipping threshold The distortion compensation coefficient of .

In this way, the update value can be calculated using the distortion compensation coefficient corresponding to the set clipping threshold and closer to the ideal value than the initial value, so the time required for the update value to approach the ideal value can be shortened.

[e] Fifth embodiment

In the fifth embodiment, when the address generated by the address generation circuit is higher than the set clipping threshold, the LUT update value is generated based on the weighted average value and the current transmission signal x(t). The weighted average is a weighted average of the distortion compensation coefficients retrieved using the set clipping threshold and the distortion compensation coefficients retrieved using the address generated by the address generating circuit.

FIG. 16 is a diagram showing a configuration example of a distortion compensation unit according to a fifth embodiment. In FIG. 16 , the distortion compensation unit 110 includes a LUT 410 . The LUT 410 includes an adjustment unit 411 .

The adjustment unit 411 performs the same processing as the adjustment unit 222 according to any one of the first to third embodiments, and outputs the distortion compensation coefficient to the multiplication unit 212 .

In addition, when the address generated by the address generating circuit 216 is higher than the set clipping threshold, the adjustment unit 411 calculates the distortion compensation coefficient retrieved by using the set clipping threshold and the value found by the address generated by the address generating circuit 216. The weighted average of the distortion compensation coefficients. Then, the adjustment unit 411 outputs the calculated weighted average as a coefficient parameter to the coefficient calculation unit 236 .

On the other hand, when the address generated by the address generation circuit 216 is equal to or lower than the set clipping threshold, the adjustment unit 411 outputs the distortion compensation coefficient retrieved by the address generated by the address generation circuit 216 as a coefficient parameter to the coefficient computing unit 236 .

FIG. 17 is a flowchart showing an example of processing operations of the distortion compensation unit 110 according to the fifth embodiment.

The adjustment unit 411 performs the same processing as described in FIG. 15 (steps S51 and S52 ).

When the input address value is higher than the set clipping threshold ("Yes" in step S52), the adjustment unit 411 calculates the weighted average value as described above (step S61), and outputs the calculated weighted average value to the coefficient calculation Unit 236. The coefficient calculation unit 236 generates a distortion compensation coefficient, ie, an LUT update value, based on the weighted average value and the current transmission signal x(t) (step S62 ). Incidentally, the processing of steps S55 and S56 is performed in the same manner as described in FIG. 15 .

As described above, according to the present embodiment, in the distortion compensation unit 110, the coefficient calculation unit 236 calculates the coefficients stored in the LUT based on the transmission signal before amplification by the distortion function calculation unit 214 (amplifier), the transmission signal after the amplification, and the coefficient parameters. The updated value of the distortion compensation coefficient. When the address generated by the address generation circuit 216 is higher than the set clipping threshold, the coefficient parameter is the distortion compensation coefficient retrieved with the set clipping threshold and the distortion compensation coefficient retrieved with the address generated by the address generation circuit 216 weighted average of .

In this way, the update value can be calculated using the distortion compensation coefficient corresponding to the set clipping threshold and closer to the ideal value, so the time required for the update value to approach the ideal value can be shortened. In addition, since the update value can be calculated using the distortion compensation coefficient retrieved by the address generated by the address generation circuit 216, an update value reflecting the current situation can be calculated.

[f] Sixth embodiment

In the sixth embodiment, when updating the LUT, calculation based on the distortion compensation coefficient and the current transmission signal x(t) corresponding to the set clipping threshold value and the address generated by the address generation circuit which makes the error smaller is used. The LUT update value.

FIG. 18 is a diagram showing a configuration example of a distortion compensation unit according to a sixth embodiment. In FIG. 18 , the distortion compensation unit 110 includes a LUT 510 and a coefficient calculation unit 520 . The LUT 510 includes an adjustment unit 511 .

The adjustment unit 511 performs the same processing as the adjustment unit 222 according to any one of the first to third embodiments, and outputs the distortion compensation coefficient to the multiplication unit 212 .

In addition, when the address generated by the address generation circuit 216 is higher than the set clipping threshold, the adjustment unit 511 retrieves the distortion compensation coefficient retrieved using the set clipping threshold and the address generated by the address generating circuit 216 into Both of the distortion compensation coefficients of are output to the coefficient calculation unit 520 as coefficient parameters.

On the other hand, when the address generated by the address generation circuit 216 is equal to or lower than the set clipping threshold, the adjustment unit 511 outputs the distortion compensation coefficient retrieved by the address generated by the address generation circuit 216 as a coefficient parameter to the coefficient computing unit 520 .

The coefficient calculation unit 520 generates a distortion compensation coefficient, that is, a first LUT update value, based on the distortion compensation coefficient retrieved with the set clipping threshold and the current transmission signal x(t). In addition, the coefficient calculation unit 520 generates a distortion compensation coefficient, that is, a second LUT update value, based on the distortion compensation coefficient retrieved with the address generated by the address generation circuit 216 and the current transmission signal x(t).

Here, while calculating the first LUT update value and the second LUT update value, the corresponding error e(t) is calculated.

The coefficient calculation unit 520 selects one corresponding to a smaller error among the first LUT update value and the second LUT update value, and outputs the selected LUT update value to the writing unit 226 .

Incidentally, when the address generated by the address generation circuit 216 is equal to or lower than the set clipping threshold, the coefficient calculation unit 520 receives only the distortion compensation coefficient retrieved with the address generated by the address generation circuit 216 . Therefore, in this case, the coefficient calculation unit 520 outputs the LUT update value generated based on the distortion compensation coefficient retrieved with the address generated by the address generation circuit 216 and the current transmission signal x(t) to the writing unit 226 .

FIG. 19 is a flowchart showing an example of processing operations of the distortion compensation unit 110 according to the sixth embodiment.

The adjustment unit 511 performs the same processing as described in FIG. 15 (steps S51 and S52 ).

When the input address value is higher than the set clipping threshold (Yes in step S52), the adjustment unit 511 retrieves the distortion compensation coefficient retrieved using the set clipping threshold and the address generated by the address generation circuit into Both of the distortion compensation coefficients of are output to the coefficient calculation unit 520 . The coefficient calculation unit 520 generates a distortion compensation coefficient, that is, a first LUT update value based on the distortion compensation coefficient retrieved with the set clipping threshold and the current transmission signal x(t) (step S71 ). In addition, the coefficient calculation unit 520 generates a distortion compensation coefficient, that is, a second LUT update value based on the distortion compensation coefficient retrieved with the address generated by the address generation circuit 216 and the current transmission signal x(t) (step S71 ).

The coefficient calculation unit 520 compares the error e(t) corresponding to the first LUT update value with the error e(t) corresponding to the second LUT update value (step S72 ).

When the error e(t) corresponding to the first LUT update value is smaller than the error e(t) corresponding to the second LUT update value ("No" in step S72), the coefficient calculation unit 520 selects the first LUT update value and It is output to the writing unit 226 (step S73).

When the error e(t) corresponding to the second LUT update value is smaller than the error e(t) corresponding to the first LUT update value ("Yes" in step S72), the coefficient calculation unit 520 selects the second LUT update value and It is output to the writing unit 226 ((step S74). Incidentally, step S76 is the same process as step S55 described in FIG. 15 .

The writing unit 226 updates the LUT with the LUT update value output at any one of steps S73 , S74 , and S76 (step S75 ).

As described above, according to the present embodiment, in the distortion compensation unit 110, the coefficient calculation unit 520 calculates the coefficients stored in the LUT based on the transmission signal before amplification by the distortion function calculation unit 214 (amplifier), the transmission signal after the amplification, and the coefficient parameters. The updated value of the distortion compensation coefficient. When the address generated by the address generation circuit 216 is higher than the set clip threshold, the coefficient parameter is the distortion compensation coefficient retrieved with the set clip threshold and the distortion compensation coefficient retrieved with the address generated by the address generation circuit Both. Then, the coefficient calculation unit 520 calculates a value based on the distortion compensation coefficient corresponding to the set threshold value and the distortion compensation coefficient corresponding to the address value generated by the address generation circuit 216, which makes the error between the transmission signal before and after amplification smaller. That calculated update value is output to LUT 510 .

In this way, an update value can be calculated using a coefficient parameter that is closer to an ideal value and capable of reducing an error, and the LUT can be updated using the update value, so the time required for the update value to approach the ideal value can be shortened.

[g] Other implementations

The wireless communication device (base station) according to any one of the first to sixth embodiments can be realized by the following hardware configuration.

FIG. 20 is a diagram showing an example of a hardware configuration of a wireless communication device (base station). As shown in FIG. 20 , the wireless communication device 100 includes a radio equipment controller (REC) 100a and a radio equipment (RE) 100b. RE100b includes field programmable gate array (FPGA) 100c, micro processing unit (MPU) 100d, DAC100e, upconverter 100f, power amplifier (PA) 100g, downconverter 100h, ADC100i, connector 100j and memory 100k. FPGA100c and MPU100d are connected to input/output various signals and data. For example, the memory 100k is composed of RAM such as synchronous dynamic random access memory (SDRAM), read only memory (ROM), and flash memory. The distortion compensation unit 110 is realized by an integrated circuit such as an FPGA 100c and an MPU 100d.

In addition, various processes described in the first to sixth embodiments can be realized by causing a computer to execute a prepared program. That is, corresponding programs corresponding to the processing performed by the distortion compensation unit 110 are stored in the memory 100k and the FPGA 100c. Programs stored in the memory 100k can be read by the MPU 100d and used as processes.

According to an aspect of the present invention, generation of spurious signals can be reduced.

Claims (8)

1. A distortion compensation device for compensating the distortion of an amplifier, the distortion compensation device comprising: a multiplication unit, which multiplies the input transmission signal by the input distortion compensation coefficient; a generating unit that generates an address value corresponding to the power of the transmitted signal; an adjustment unit that, when the generated address value is higher than a set threshold, retrieves a distortion compensation coefficient corresponding to the set threshold from the storage unit and inputs the retrieved distortion compensation coefficient to the multiplication unit , when the generated address value is equal to or lower than the set threshold value, the adjustment unit retrieves a distortion compensation coefficient corresponding to the generated address value from the storage unit and inputs the retrieved distortion compensation coefficient to the the multiplication unit; and a threshold calculation unit that calculates a threshold based on the generated address value and updates the set threshold with the calculated threshold. 2. The distortion compensating apparatus according to claim 1, wherein, The threshold calculation unit calculates the threshold by identifying a maximum value of address values generated in each adjustment unit period and subtracting a certain value from the identified maximum value. 3. The distortion compensation device according to claim 1 or 2, wherein, The threshold calculation unit subtracts a specific value from the set threshold in a specific cycle. 4. The distortion compensation device according to claim 1 or 2, wherein, The threshold calculation unit subtracts a specific value from the set threshold when the set threshold is not newly updated during an execution determination period from which the threshold is set. A specific period of time from the moment of update. 5. The distortion compensating device according to claim 1 or 2, further comprising a coefficient calculation unit based on the transmission signal before amplification by the amplifier, the transmission signal after amplification, and The coefficient parameter calculates the update value of the distortion compensation coefficient stored in the storage unit, wherein, When the generated address value is higher than the set threshold, and the distortion compensation coefficient corresponding to the generated address value and stored in the storage unit is an initial value, the coefficient parameter is the same as the set The threshold value corresponds to the distortion compensation coefficient. 6. The distortion compensating device according to claim 1 or 2, further comprising a coefficient calculation unit based on the transmission signal before being amplified by the amplifier, the transmission signal after amplifying, and The coefficient parameter calculates the update value of the distortion compensation coefficient stored in the storage unit, wherein, When the generated address value is higher than the set threshold, the coefficient parameter is a weighted average of the distortion compensation coefficient corresponding to the set threshold and the distortion compensation coefficient corresponding to the generated address value. 7. The distortion compensating device according to claim 1 or 2, further comprising a coefficient calculating unit based on the transmission signal before being amplified by the amplifier, the transmission signal after being amplified, and The coefficient parameter calculates the update value of the distortion compensation coefficient stored in the storage unit, wherein, When the generated address value is higher than the set threshold, the coefficient parameter is both a distortion compensation coefficient corresponding to the set threshold and a distortion compensation coefficient corresponding to the generated address value, and The coefficient calculation unit calculates the difference between the transmission signal before the amplification and the transmission signal after the amplification based on the distortion compensation coefficient corresponding to the set threshold value and the distortion compensation coefficient corresponding to the generated address value. The update value calculated by the one whose error is smaller is output to the storage unit. 8. A distortion compensation method, the distortion compensation method comprising the following steps: generating an address value corresponding to the power of the transmitted signal; When the generated address value is higher than the set threshold value, the distortion compensation coefficient corresponding to the set threshold value is retrieved from the storage unit, and when the generated address value is equal to or lower than the set threshold value, the distortion compensation coefficient is retrieved from the storage unit the storage unit retrieves a distortion compensation coefficient corresponding to the generated address value; multiplying the transmitted signal by the retrieved distortion compensation coefficient; and A threshold is calculated based on the generated address value and the set threshold is updated with the calculated threshold.

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