CN103218308B - Buffer memory management method, memory controller and memory storage device - Google Patents

Abstract

The invention discloses a method for managing a buffer memory in a memory storage device, wherein the buffer memory is configured in the memory storage device with a rewritable nonvolatile memory module. The method comprises the following steps: and transmitting the temporary storage data temporarily stored in the buffer memory to a buffer area of the rewritable nonvolatile memory module by using a pre-programmed instruction set, wherein the temporary storage data cannot be programmed to a storage area of the rewritable nonvolatile memory module. The method also comprises releasing the storage space in the buffer memory for storing the temporary data; and reloading the temporary data from the buffer area to the storage space of the buffer memory. Therefore, the method can temporarily increase the available storage space of the buffer memory to meet the additional operation requirement. The invention also discloses a memory controller and a memory storage device.

Description

Buffer memory management method, memory controller and memory storage device

technical field

The present invention relates to a technique for managing a buffer memory, in particular to a buffer memory management method capable of temporarily increasing the memory space of the buffer memory, and a memory controller and a memory storage device using the method.

Background technique

Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Because rewritable non-volatile memory (rewritable non-volatile memory) has the characteristics of data non-volatility, power saving, small size, no mechanical structure, and fast read and write speed, it is most suitable for portable electronic products, such as notebooks. computer. A solid state drive is a memory storage device that uses fast memory as a storage medium. Therefore, the fast memory industry has become a very popular part of the electronics industry in recent years.

In a memory storage device that uses a rewritable non-volatile memory as a storage medium, a buffer memory is usually configured to temporarily store program codes or data. Due to cost considerations, such a buffer memory does not have a large memory space. When the memory space of the buffer memory is insufficient, the memory storage device cannot operate normally. However, when the memory storage device executes some programs, some additional memory space is required. For example, when sorting data of size n, usually at least a memory space of size log(n) is required. Therefore, if the memory space in the buffer memory is insufficient, the above-mentioned sorting procedure cannot be executed. Therefore, how to quickly and temporarily free up the storage space of the buffer memory is an issue that those skilled in the art are concerned about.

Contents of the invention

The present invention provides a buffer memory management method, a memory controller and a memory storage device, which can temporarily and quickly free up the storage space of the buffer memory.

An exemplary embodiment of the present invention provides a buffer memory management method for operating a buffer memory of a memory storage device, wherein the memory storage device includes a rewritable non-volatile memory module and the rewritable non-volatile memory Modules include buffers and storage areas. The buffer memory management method includes using a pre-programmed instruction set to transfer temporary data from the buffer memory to the buffer. According to the pre-programmed instruction group, the rewritable non-volatile memory module will not program the temporary storage data into the above-mentioned storage area. The method also includes releasing the storage space used for storing the temporary data in the buffer memory. The method further includes, afterward, reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the above-mentioned step of releasing the storage space of the buffer memory further includes: judging whether a specific task is to be executed or whether the space of the buffer memory is insufficient; and, when the specific task or the space of the buffer memory is to be executed When insufficient, release the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the above buffer memory management method further includes: before reloading the temporarily stored data from the buffer area of the rewritable non-volatile memory module to the storage space of the buffer memory, using this Storage space to sort the information recorded in the global chaos table.

In an exemplary embodiment of the present invention, the step of reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory includes: using a buffer read command to Temporary data is read from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the buffer memory management method further includes: during the temporary storage of data in the buffer, stop accessing the data in the storage area of the rewritable non-volatile memory module.

In an exemplary embodiment of the present invention, the above buffer memory management method further includes: dividing the buffer memory into a plurality of areas, and the above storage space is one of these areas

In an exemplary embodiment of the present invention, the buffer memory management method further includes: setting the above-mentioned multiple areas to include a mapping table temporary storage area, a variable temporary storage area, a firmware code temporary storage area, a global confusion table temporary storage area, Access data temporary storage area and remaining area.

From another perspective, an exemplary embodiment of the present invention provides a memory controller for controlling a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module includes a buffer and storage area. The memory controller includes host interface, memory interface, buffer memory and memory management circuit. The host interface is used to electrically connect to the host system. The memory interface is used to electrically connect to the rewritable non-volatile memory module. The memory management circuit is electrically connected to the host interface, the memory interface and the buffer memory. Here, the memory management circuit uses a pre-programmed instruction set to transfer a temporary data from the buffer memory to the buffer. According to the preprogramming instruction, the rewritable nonvolatile memory module does not program the temporary storage data into the storage area. In addition, the memory management circuit is also used for releasing the storage space used for storing the temporary data in the buffer memory. Afterwards, the memory management circuit is also used to reload the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the above-mentioned memory management circuit is also used for judging whether to execute a specific task or judging whether the space of the buffer memory is insufficient. When the specific task is to be executed or the space of the buffer memory is insufficient, the memory management circuit releases the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the memory management circuit also uses the storage space to sort the records before reloading the temporary data from the buffer memory of the rewritable non-volatile memory module into the storage space of the buffer memory Information in the global confusion table.

In an exemplary embodiment of the present invention, the above-mentioned memory management circuit uses a buffer read command to read the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the memory management circuit stops accessing the data in the storage area of the rewritable non-volatile memory module while the temporary storage data is stored in the buffer.

In an exemplary embodiment of the present invention, the memory management circuit is further used to divide the buffer memory into multiple areas, and set the storage space as one of these areas.

In an exemplary embodiment of the present invention, the above-mentioned multiple areas include a mapping table temporary storage area, a variable temporary storage area, a firmware code temporary storage area, a global confusion table temporary storage area, an access data temporary storage area, and a remaining area.

From another perspective, an exemplary embodiment of the present invention provides a memory storage device, which includes a connector, a rewritable non-volatile memory module, and a memory controller. The connector is used to electrically connect to the host system. The rewritable non-volatile memory module includes a buffer and a storage area. The memory controller is electrically connected to the connector and the rewritable non-volatile memory module, and has a buffer memory. Here, the memory controller uses a pre-programmed instruction set to transfer the temporary data from the buffer memory to the buffer. Moreover, according to the pre-programmed instruction group, the rewritable non-volatile memory module will not program the temporary storage data into the storage area. The memory controller is used to transfer the temporary data temporarily stored in the buffer memory to the buffer of the rewritable non-volatile memory module, and the temporary data will not be programmed into the storage area. The memory controller releases the storage space for storing temporary data in the buffer memory. Afterwards, the memory controller is also used to reload the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory.

In an exemplary embodiment of the present invention, the above-mentioned memory controller is also used for judging whether to execute a specific task or judging whether the space of the buffer memory is insufficient. When a specific task is to be executed or the space of the buffer memory is insufficient, the memory controller releases the storage space of the buffer memory.

In an exemplary embodiment of the present invention, before reloading the temporary data from the buffer of the rewritable non-volatile memory module into the storage space of the buffer memory, the memory controller utilizes the storage space to sort records in Information in the global confusion table.

In an exemplary embodiment of the present invention, the above-mentioned memory controller uses a buffer read command to read the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory.

In an exemplary embodiment of the present invention, during the period when the temporary storage data is stored in the buffer, the memory controller stops accessing the data in the storage area of the rewritable non-volatile memory module.

In an exemplary embodiment of the present invention, the memory controller is further configured to divide the buffer memory into a plurality of areas, and the storage space is one of these areas.

In an exemplary embodiment of the present invention, the above-mentioned multiple areas include a mapping table temporary storage area, a variable temporary storage area, a firmware code temporary storage area, a global confusion table temporary storage area, an access data temporary storage area, and a remaining area.

In an exemplary embodiment of the present invention, the above-mentioned rewritable non-volatile memory module further includes at least one memory chip and each memory chip includes a plurality of memory dies. Moreover, the above-mentioned buffer area and storage area are configured in the same memory chip.

In an exemplary embodiment of the present invention, the above-mentioned buffer area and storage area are configured in the same memory die.

Based on the above, the buffer management method, the memory controller and the memory storage device proposed by the exemplary embodiments of the present invention can temporarily free up the storage space of the buffer memory. And, because the time required for temporarily storing data in the buffer area of the rewritable non-volatile memory module is shorter than the time required for temporarily storing data in the storage area of the rewritable non-volatile memory module, therefore , the available storage space of the buffer memory can be rapidly and temporarily increased.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

Description of drawings

FIG. 1A shows a host system and a memory storage device according to an exemplary embodiment.

FIG. 1B is a schematic diagram of a computer, an input/output device and a memory storage device according to an exemplary embodiment.

FIG. 1C is a schematic diagram of a host system and a memory storage device according to an exemplary embodiment.

FIG. 2A is a schematic block diagram showing the memory storage device shown in FIG. 1A.

FIG. 2B is a block diagram of a rewritable non-volatile memory module according to an exemplary embodiment.

FIG. 3 is a schematic block diagram of a memory controller according to an exemplary embodiment.

FIG. 4 is a schematic diagram illustrating vacating part of the memory space of the buffer memory according to an exemplary embodiment.

Fig. 5 is a flowchart of a buffer management method according to an exemplary embodiment.

Description of main component symbols:

1000: host system

1100: computer

1102: Microprocessor

1104: random access memory

1106: Input/Output Device

1108: System bus

1110: data transmission interface

1202: mouse

1204: keyboard

1206: display

1208: Printer

1212: Pen drive

1214: memory card

1216: SSD

1310: Digital camera

1312: SD card

1314: MMC card

1316: memory stick

1318: CF card

1320: Embedded Storage

100: memory storage device

102: Connector

104: memory controller

106: Rewritable non-volatile memory module

120: buffer

140: storage area

160: memory die

122: I/O control interface

124: Control circuit

202: memory management circuit

204: host interface

206: memory interface

208: buffer memory

402: Mapping table temporary storage area

404: variable temporary storage area

406: Firmware code temporary storage area

408: Global chaos table temporary storage area

410: Access data temporary storage area

420: temporarily store data

440: storage space

S502, S504, S506, S508: steps of the buffer memory management method

detailed description

Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit). Typically memory storage devices are used with a host system so that the host system can write data to or read data from the memory storage device.

FIG. 1A shows a host system and a memory storage device according to an exemplary embodiment.

Referring to FIG. 1A , the host system 1000 generally includes a computer 1100 and an input/output (I/O) device 1106 . The computer 1100 includes a microprocessor 1102 , a random access memory (random access memory, RAM) 1104 , a system bus 1108 and a data transmission interface 1110 . The input/output device 1106 includes a mouse 1202, a keyboard 1204, a monitor 1206 and a printer 1208 as shown in FIG. 1B. It must be understood that the device shown in FIG. 1B is not limited to the I/O device 1106, and the I/O device 1106 may also include other devices.

In the embodiment of the present invention, the memory storage device 100 is electrically connected with other components of the host system 1000 through the data transmission interface 1110 . Data can be written into the memory storage device 100 or read from the memory storage device 100 by the operation of the microprocessor 1102 , the random access memory 1104 and the input/output device 1106 . For example, the memory storage device 100 may be a rewritable non-volatile memory storage device such as a pen drive 1212 , a memory card 1214 or a solid state drive (SSD) 1216 as shown in FIG. 1B .

In general, the host system 1000 is any system that can substantially cooperate with the memory storage device 100 to store data. Although in this exemplary embodiment, the host system 1000 is described as a computer system, however, in another exemplary embodiment of the present invention, the host system 1000 may be a digital camera, video camera, communication device, audio player or video player and other systems. For example, when the host system is a digital camera (video camera) 1310, the rewritable non-volatile memory storage device is the SD card 1312, MMC card 1314, memory stick (memorystick) 1316, CF card 1318 or embedded type storage device 1320 (as shown in FIG. 1C ). The embedded storage device 1320 includes an embedded multimedia card (EmbeddedMMC, eMMC). It is worth mentioning that the embedded multimedia card is directly electrically connected to the substrate of the host system.

FIG. 2 is a schematic block diagram showing the memory storage device shown in FIG. 1A.

Referring to FIG. 2 , the memory storage device 100 includes a connector 102 , a memory controller 104 and a rewritable non-volatile memory module 106 .

In this exemplary embodiment, the connector 102 is compatible with the Serial Advanced Technology Attachment (SATA) standard. However, it must be understood that the present invention is not limited thereto, and the connector 102 may also be a high-speed peripheral component connection interface ( Peripheral Component Interconnect Express, PCIExpress) standard, Universal Serial Bus (Universal Serial Bus, USB) standard, Secure Digital (SecureDigital, SD) interface standard, Memory Stick (MemoryStick, MS) interface standard, MultiMediaCard (MultiMediaCard, MMC) interface standard, small and fast (CompactFlash, CF) interface standard, Integrated Device Electronics (IDE) standard, or other suitable standards.

The memory controller 104 is used to execute a plurality of logic gates or control instructions implemented in hardware or firmware, and write data in the rewritable non-volatile memory module 106 according to the instructions of the host system 1000, Read and clear operations.

The rewritable non-volatile memory module 106 is electrically connected to the memory controller 104 and used for storing data written by the host system 1000 . Moreover, the rewritable non-volatile memory module 106 has a buffer 120 and a storage area 140 .

FIG. 2B is a block diagram of a rewritable non-volatile memory module according to an exemplary embodiment.

Please refer to FIG. 2B, in an exemplary embodiment, the rewritable non-volatile memory module 106 also includes an I/O control interface 122, a control circuit 124 and at least one memory chip (not shown), and each memory The chip includes a plurality of memory dies (eg, memory die 160 ), and each memory die includes a plurality of physical blocks. The I/O control interface 122 is used for receiving instructions and data from the memory controller 104 . The control circuit 124 is used to control the overall operation of the rewritable non-volatile memory module 106 , such as writing data into the buffer 120 and the storage area 140 . In this exemplary embodiment, the buffer area 120 and the storage area 140 are packaged in the same memory chip. In an exemplary embodiment, the buffer area 120 and the storage area 140 belong to the same memory die 160 . However, in other exemplary embodiments, the buffer area 120 and the storage area 140 may also belong to different memory dies, and the present invention is not limited thereto.

The buffer 120 is used to temporarily store data from the memory controller 104 or the temporary storage area 140 . Specifically, the process of writing data in the rewritable non-volatile memory module 106 includes two parts: data transmission and data programming. In the part of data transmission, the memory management circuit 202 of the fast memory controller 104 transmits the data to be written to the buffer 120 . In the part of data programming, the data to be written is programmed from the buffer 120 to the storage area 140 . In an exemplary embodiment, the buffer 120 can be a volatile memory, such as a dynamic random access memory (DRAM), but the buffer 120 can also be a static random access memory (static random access memory, SRAM), magneto-resistive Random access memory (Magnetoresistive Random Access Memory, MRAM), fast access random access memory (CacheRAM), synchronous dynamic random access memory (synchronous dynamic random access memory, SDRAM), video random access memory (VideoRAM, VRAM), embedded dynamic random access memory (embeddedDRAM, eDRAM) or other memory. In another exemplary embodiment, the buffer 120 may be a non-volatile memory, such as a NOR flash memory (NORFlash) or other memory.

The storage area 140 has a plurality of physical blocks. For example, these physical blocks may belong to the same memory die or belong to different memory dies. Each physical block has a plurality of physical pages, and each physical page has at least one physical sector, wherein the physical pages belonging to the same physical block can be written independently and erased simultaneously. For example, each physical block is composed of 128 physical pages, and each physical page has 8 physical sectors. That is to say, in the example where each physical sector is 512 bytes, the capacity of each physical page is 4 Kilobytes (K). However, it must be understood that the present invention is not limited thereto, and each physical block may be composed of 64 physical pages, 256 physical pages, or any other number of physical pages.

In more detail, a physical block is the smallest unit of clearing. That is, each physical block contains a minimum number of memory cells to be cleared together. Entity page is the smallest unit of program. That is, a physical page is the smallest unit for writing data. Each physical page generally includes a data bit area and a redundant bit area. The data bit area is used to store user data, and the redundant bit area is used to store system data (eg, ECC codes).

In this exemplary embodiment, the rewritable non-volatile memory module 106 is a multi-level memory cell (MultiLevelCell, MLC) NAND fast memory module, that is, a memory cell can store at least 2 bits of data. However, the present invention is not limited thereto, and the rewritable non-volatile memory module 106 may also be a single-layer memory cell (SingleLevelCell, SLC) NAND fast memory module, other fast memory modules or other memory modules with the same characteristics .

FIG. 3 is a schematic block diagram of a memory controller according to an exemplary embodiment.

Referring to FIG. 3 , the memory controller 104 includes a memory management circuit 202 , a host interface 204 , a memory interface 206 and a buffer memory 208 .

The memory management circuit 202 is used to control the overall operation of the memory controller 104 . Specifically, the memory management circuit 202 has a plurality of control instructions, and when the memory storage device 100 is operating, these control instructions are executed to perform operations such as writing, reading, and clearing data.

In this exemplary embodiment, the control commands of the memory management circuit 202 are implemented in the form of firmware. For example, the memory management circuit 202 has a microprocessor unit (not shown), and these control instructions are programmed into this ROM. When the memory storage device 100 is in operation, these control instructions will be executed by the microprocessor unit to perform operations such as writing, reading, and clearing data.

In another exemplary embodiment of the present invention, the control instructions of the memory management circuit 202 can also be stored in a specific area of the rewritable non-volatile memory module 106 in the form of program code (for example, the memory module is dedicated to storing system data system area). In particular, the ROM has driver code, and when the memory controller 104 is enabled, the microprocessor unit will first execute the driver code segment to store the data stored in the rewritable non-volatile memory module 106 The control instructions are loaded into the random access memory of the memory management circuit 202 . Afterwards, the microprocessor unit executes these control instructions to perform operations such as writing, reading and clearing data.

In addition, in another exemplary embodiment of the present invention, the control instructions of the memory management circuit 202 can also be implemented in a hardware form. For example, the memory management circuit 202 includes a microcontroller, a memory management unit, a memory writing unit, a memory reading unit, a memory clearing unit and a data processing unit. The memory management unit, the memory writing unit, the memory reading unit, the memory clearing unit and the data processing unit are electrically connected to the microcontroller. Wherein, the memory management unit is used to manage the physical block of the rewritable non-volatile memory module 106; the memory writing unit is used to issue a write command to the rewritable non-volatile memory module 106 to write data into the rewritable non-volatile memory module 106; the memory read unit is used to issue a read instruction to the rewritable non-volatile memory module 106 to read from the rewritable non-volatile memory module 106 read data in; the memory clearing unit is used to issue clearing instructions to the rewritable non-volatile memory module 106 to clear data from the rewritable non-volatile memory module 106; and the data processing unit is used to process Data to be written into the rewritable non-volatile memory module 106 and data read from the rewritable non-volatile memory module 106 .

The host interface 204 is electrically connected to the memory management circuit 202 and used for receiving and identifying commands and data transmitted by the host system 1000 . That is to say, the commands and data transmitted by the host system 1000 are transmitted to the memory management circuit 202 through the host interface 204 . In this exemplary embodiment, the host interface 204 is compatible with the SATA standard. However, it must be understood that the present invention is not limited thereto, and the host interface 204 may also be compatible with PATA standard, IEEE1394 standard, PCIExpress standard, USB standard, SD standard, MS standard, MMC standard, CF standard, IDE standard or other suitable data transmission standards.

The memory interface 206 is electrically connected to the memory management circuit 202 and used for accessing the rewritable non-volatile memory module 106 . That is to say, the data to be written into the rewritable non-volatile memory module 106 will be converted into a format acceptable to the rewritable non-volatile memory module 106 via the memory interface 206 .

The buffer memory 208 is used to temporarily store program codes or data of the memory management circuit 202 . For example, the buffer memory 208 is a static random access memory. However, it must be understood that the buffer memory 208 may also be a DRAM, a magneto-resistive RAM, a cache RAM, a synchronous DRAM, a video RAM, or a NOR gate. Flash memory, embedded DRAM or other memory.

In addition, in an exemplary embodiment, the memory controller 104 may further include a power management circuit and an error checking and correction circuit (not shown). The power management circuit is electrically connected to the memory management circuit 202 and used to control the power of the memory storage device 100 . The error checking and correcting circuit is electrically connected to the memory management circuit 202 and used for executing an error correcting procedure to ensure the correctness of data. Specifically, when the host interface 204 receives a host write command from the host system 1000, the error checking and correction circuit will generate corresponding error checking for the write data (also called update data) corresponding to the host write command. and a correction code (Error Checking and Correcting Code, ECCC Code), and the memory management circuit 202 will write the update data and the corresponding error correction code into the rewritable non-volatile memory module 106 . Afterwards, when the memory management circuit 202 reads data from the rewritable non-volatile memory module 106, it will read the error correction code corresponding to the data at the same time, and the error checking and correction circuit will check all the data according to the error correction code. The read data is subjected to error correction procedures.

In this exemplary embodiment, when the storage space of the buffer memory 208 is insufficient, the memory management circuit 202 cannot perform normally. For example, when the memory management circuit 202 needs to sort a global random table (global random table), additional storage space is required to store the contents of the global random table. Specifically, the global confusion table records the mapping relationship between a logical access unit and a physical access unit. In an exemplary embodiment, the logical access unit is a logical page, and the physical access unit is a physical page. When the memory controller 104 repeatedly writes data to a physical page in the rewritable non-volatile memory module 106, if a block-based mapping relationship is used (logic blocks are mapped to physical blocks) , the physical blocks to be written must be merged all the time, reducing the writing efficiency. Therefore, in such a case, the memory controller 104 uses a page-based mapping relationship (logical page to physical page mapping), and maintains a global confusion table to maintain the page-based mapping relationship. However, since there are more mapping relationships based on pages than based on blocks, the content of the global confusion table is also more complicated. In order to maintain and effectively access the global confusion table, the memory controller 104 sorts the information in the global confusion table from time to time. In normal sorting, however, additional memory space must be used. For example, if a quicksort algorithm (quicksort) is used to sort data of size n, an additional memory space of size log(n) must be used to execute the quicksort algorithm. Therefore, when the space in the buffer memory 208 is not enough to execute the algorithm of sorting the global confusion table, the memory management circuit 202 must temporarily clear part of the memory space of the buffer memory 208 to complete the sorting.

FIG. 4 is a schematic diagram illustrating vacating part of the memory space of the buffer memory according to an exemplary embodiment.

Please refer to FIG. 4 , generally speaking, the memory management circuit 202 of the memory controller 104 divides the storage space of the buffer memory 208 into multiple areas for storing data. For example, the memory management circuit 202 divides the buffer memory 208 into a mapping table temporary storage area 402, a variable temporary storage area 404, a firmware code temporary storage area 406, a global confusion table temporary storage area 408, and an access data temporary storage area. The storage area 410 and other remaining areas, and the temporary data 420 is stored in this remaining area (ie, the storage space 440 ). In this exemplary embodiment, the mapping table temporary storage area 402 is used for temporarily storing at least a part of the mapping table, wherein the mapping table is used for storing a mapping relationship between logical addresses and physical addresses. The variable temporary storage area 404 is used to store at least one variable used by the memory management circuit 202 during operation. The firmware code temporary storage area 406 is used for storing at least one program code executed by the memory management circuit 202 . The global confusion table temporary storage area 408 is used to temporarily store at least a part of the global confusion table. The access data temporary storage area 410 is used for temporarily storing data to be written into or read from the rewritable non-volatile memory module 106 .

As mentioned above, since the storage space of the buffer memory 208 will be planned in advance to store the programs or data that need to be temporarily stored when the memory storage device 100 operates. Therefore, the memory management circuit 202 must release the storage space of the buffer memory 208 when it is necessary to perform the above-mentioned additional operation of sorting the global confusion table. For example, in this exemplary embodiment, the memory management circuit 202 first transmits the temporary data 420 temporarily stored in the buffer memory 208 to the buffer 120 of the rewritable non-volatile memory module 106 by using an instruction set, Moreover, the command set does not require the temporary storage data 420 to be programmed into the storage area 140 .

Specifically, in this exemplary embodiment, the memory management circuit 202 can use a set of pre-programmed instructions to transfer the temporary storage data 420 from the buffer memory 208 to the buffer 120 . For example, the pre-programmed command group is composed of a "write command" field, an "address" field, and a "data" field. The "write command" field is used to indicate the rewritable non-volatile The command of the permanent memory module 106 is a write command; the "address" field is the memory address to record the data to be written; and the "data" field is to record the content of the data to be written. It is worth noting that in general data access, a write command will include a corresponding "write command" field in addition to the "write command" field, "address" field and "data" The "execution command" field of the " field is used to instruct the rewritable non-volatile memory module 106 to start programming the data to be written into the storage area 140 . However, in this exemplary embodiment, the pre-programmed command set used by the memory management circuit 202 does not include the "execute command" field corresponding to the "write command" field. Therefore, the rewritable non-volatile memory module 106 will not program the temporary storage data 420 to the storage area 140 after receiving the pre-programmed instruction set. On the other hand, since the rewritable non-volatile memory module 106 does not program the temporary storage data 420 to the storage area 140 , the time for performing programming is saved. In other words, the memory controller 104 can quickly transfer the temporary storage data 420 to the rewritable non-volatile memory module 106, thereby making the storage space 440 free and available.

After the memory management circuit 202 transmits the temporary storage data 420 to the buffer memory 120, the memory management circuit 202 will release the storage space 440 of the buffer memory 208, that is, the memory management circuit 202 can write a new data into the storage space 440, wherein , the temporary data 420 in the storage space 440 can be overwritten by new data. At this point, the memory management circuit 202 can use the storage space 440 to sort the information recorded in the global confusion table. After the memory management circuit finishes sorting the global confusion table, the memory management circuit 202 will reload the temporary data 420 from the buffer 120 of the rewritable non-volatile memory module 160 to the storage space 440 of the buffer memory 208 . Specifically, the memory management circuit 202 uses a buffer read command to read the temporary storage data 420 from the buffer 120 of the rewritable non-volatile memory module 160 to the storage space 440 of the buffer memory 208 . For example, the buffer read command is composed of a "read command" field, a "column address" field, and an "execution command" field corresponding to the "read command" field. Here, the "read command" column is used to indicate the rewritable non-volatile memory module 160 that the command is a read command to read a data; the "row address" column is used to record the data to be read. The row address for fetching data; and the "execution command" field corresponding to the "read command" field is used to instruct the rewritable non-volatile memory module 160 to start reading data. In particular, according to the buffer read command, the rewritable non-volatile memory module 160 will only provide the data in the buffer 120 to the memory management circuit 202 and will not read data from the storage area 140 again. Based on this, after receiving the buffer read command, the rewritable non-volatile memory module 160 will transfer the temporary storage data 420 to the memory from the memory address corresponding to the read data in the buffer 120 The controller 104 and the memory management circuit 202 load data into the storage space 440 of the buffer memory 208 . In this way, the procedure of temporarily increasing the available memory space of the buffer memory 208 is completed.

In another exemplary embodiment, while the temporary data 420 is stored in the buffer 120 , the memory management circuit 202 also stops accessing the data in the storage area 140 of the rewritable non-volatile memory module 106 . Specifically, when accessing the storage area 140 , all data will be temporarily stored in the buffer 120 . Therefore, the memory management circuit 202 stops accessing the data in the storage area 140 while the temporary data 420 is stored in the buffer 120 , thereby preventing the temporary data 420 stored in the buffer 120 from being overwritten and lost.

It should be noted that in this exemplary embodiment, the memory controller 104 uses the storage space 440 to sort the global confusion table after transferring the temporary storage data 420 to the buffer 120 . However, in other exemplary embodiments, the memory controller 104 can also use the storage space 440 to execute other programs, and the application of the storage space 440 is not limited in the present invention. For example, the memory controller 104 may also determine whether to execute a specific task or whether the space of the buffer memory 208 is insufficient. For example, this specific task is the sorting task of the global confusion table, but the present invention does not limit the content of this specific task. If the specific task is to be performed, the memory controller 104 releases the storage space 440 to perform the specific task. Alternatively, when the memory controller 104 determines that the space of the buffer memory 208 is insufficient, the storage space 440 may be released. On the other hand, the memory controller 104 can also take any data in the buffer memory 208 as temporary data 420 and send it to the buffer 120 , thereby temporarily increasing the available storage space of the buffer memory 208 . The present invention also does not limit the contents of the temporary storage data 420 . Alternatively, the memory controller 104 may release the memory space of any area in the buffer memory 208 (for example, the temporary variable storage area 404 ). The invention also does not limit the location of the freed memory space.

Fig. 5 is a flowchart of a buffer management method according to an exemplary embodiment.

In step S502, the memory management circuit 202 of the memory controller 104 transmits the temporary data temporarily stored in the buffer memory 208 to the buffer 120 of the rewritable non-volatile memory module 106, wherein the temporary data will not It is programmed to the storage area 140 of the rewritable non-volatile memory module 106 . In step S504 , the memory management circuit 202 releases the storage space in the buffer memory 208 for storing the temporary data. Afterwards, in step S506, the memory management circuit 202 uses the storage space to perform temporary operations. For example, perform the sorting of the sort universe confusion table above. Finally, in step S508 , the memory management circuit 202 reloads the temporarily stored data from the buffer 120 of the rewritable non-volatile memory module 106 to the storage space of the buffer memory 208 . Each step in FIG. 5 has been described in detail above, and will not be repeated here.

To sum up, the buffer memory management method, memory controller and memory storage device proposed by the exemplary embodiments of the present invention can transfer the temporarily stored data in the buffer memory to the buffer by using a pre-programmed instruction set, and the temporary The stored data will not be programmed to the storage area of the rewritable non-volatile memory module. In this way, the storage space originally used to store temporary data in the buffer memory can be released to execute other programs of the memory controller. In particular, compared to moving data to the storage area of the rewritable non-volatile memory module, the time required to temporarily store the temporary data in the buffer of the rewritable non-volatile memory module is shorter , therefore, the available storage space of the buffer memory can be temporarily and rapidly increased.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention, and any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention.

Claims (23)

1. A buffer memory management method for operating a buffer memory of a memory storage device, wherein the memory storage device includes a rewritable nonvolatile memory module and the rewritable nonvolatile memory module Including a buffer and a storage area, the buffer memory management method includes: using a preprogrammed instruction set to transfer a temporary storage data from the buffer memory to the buffer memory, wherein according to the preprogrammed instruction set, the rewritable non-volatile memory module does not transfer the temporary storage data programmed into the memory area; releasing a storage space of the buffer memory, wherein the storage space is used to store the temporary data; and reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory. 2. The buffer memory management method according to claim 1, wherein the step of releasing the storage space of the buffer memory further comprises: judging whether to execute a specific task or judging whether the space of the buffer memory is insufficient; and When the specific task is to be executed or the space of the buffer memory is insufficient, the storage space of the buffer memory is released. 3. The buffer memory management method according to claim 1, further comprising: Utilizing the storage space to sort information recorded in a global chaos table before reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module into the storage space of the buffer memory . 4. The buffer memory management method according to claim 1, wherein the step of reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory include: A buffer read command is used to read the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory. 5. The buffer memory management method according to claim 1, further comprising: During the period when the temporary storage data is stored in the buffer area, the access to the data in the storage area of the rewritable non-volatile memory module is stopped. 6. The buffer memory management method according to claim 1, further comprising: The buffer memory is divided into a plurality of areas, and the storage space is one of the areas. 7. The buffer memory management method according to claim 6, further comprising: These areas include a mapping table temporary storage area, a variable temporary storage area, a firmware code temporary storage area, a global confusion table temporary storage area, an access data temporary storage area and a residual area. 8. A memory controller, used to control a rewritable non-volatile memory module, the rewritable non-volatile memory module includes a buffer and a storage area, the memory controller includes: a host interface for electrically connecting to a host system; a memory interface for electrically connecting to the rewritable non-volatile memory module; a buffer memory; and a memory management circuit electrically connected to the host interface, the memory interface and the buffer memory, Wherein the memory management circuit uses a pre-programmed instruction set to transfer a temporary storage data from the buffer memory to the buffer memory, wherein according to the pre-programmed instruction, the rewritable non-volatile memory module does not program the temporary data into the storage area, Wherein the memory management circuit is also used to release a storage space of the buffer memory, wherein the storage space is used to store the temporarily stored data, Wherein the memory management circuit is also used for reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory. 9. The memory controller according to claim 8, wherein the memory management circuit is also used for judging whether to perform a specific task or whether the space of the buffer memory is insufficient, when the specific task or the space of the buffer memory is to be executed When insufficient, the memory management circuit releases the storage space of the buffer memory. 10. The memory controller according to claim 8, wherein before reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory, the The memory management circuit uses the storage space to sort the information recorded in a global confusion table. 11. The memory controller according to claim 8, wherein the memory management circuit uses a buffer read command to read the temporarily stored data from the buffer of the rewritable non-volatile memory module to the This storage space of the buffer memory. 12. The memory controller according to claim 8, wherein the memory management circuit stops accessing the storage area of the rewritable non-volatile memory module while the temporary data is stored in the buffer The data. 13. The memory controller according to claim 8, wherein the memory management circuit is further configured to divide the buffer memory into a plurality of areas, and the storage space is one of the areas. 14. The memory controller according to claim 13, wherein the areas include a temporary storage area for mapping tables, a temporary storage area for variables, a temporary storage area for firmware codes, a temporary storage area for global confusion tables, and an access data A temporary storage area and a rest area. 15. A memory storage device comprising: a connector for electrically connecting to a host system; A rewritable non-volatile memory module, including a buffer and a storage area; and a memory controller, electrically connected to the connector and the rewritable non-volatile memory module, and includes a buffer memory, Wherein the memory controller uses a pre-programmed instruction set to transfer a temporary storage data from the buffer memory to the buffer memory, wherein according to the pre-programmed instruction set, the rewritable non-volatile memory module will not program the temporary data into the storage area, Wherein the memory controller is also used to release a storage space of the buffer memory, wherein the storage space is used to store the temporarily stored data, Wherein the memory controller is also used for reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory. 16. The memory storage device according to claim 15 , wherein the memory controller is also used to judge whether to execute a specific task or to judge whether the space of the buffer memory is insufficient, when the specific task or the space of the buffer memory is to be executed When insufficient, the memory controller releases the storage space of the buffer memory. 17. The memory storage device according to claim 15, wherein before reloading the temporarily stored data from the buffer of the rewritable non-volatile memory module to the storage space of the buffer memory, the The memory controller uses the storage space to sort the information recorded in a global confusion table. 18. The memory storage device according to claim 15, wherein the memory controller uses a buffer read command to read the temporarily stored data from the buffer of the rewritable non-volatile memory module to the This storage space of the buffer memory. 19. The memory storage device according to claim 15, wherein the memory controller stops accessing the storage area of the rewritable non-volatile memory module while the temporary data is stored in the buffer The data. 20. The memory storage device according to claim 15, wherein the memory controller is further configured to divide the buffer memory into a plurality of areas, and the storage space is one of the areas. 21. The memory storage device according to claim 20, wherein the areas include a temporary storage area for mapping tables, a temporary storage area for variables, a temporary storage area for firmware codes, a temporary storage area for global confusion tables, and an access data A temporary storage area and a rest area. 22. The memory storage device according to claim 15, wherein the rewritable non-volatile memory module further comprises at least one memory chip and each of the memory chips comprises a plurality of memory dies, wherein the buffer area and The storage areas are configured in the same memory chip. 23. The memory storage device according to claim 15, wherein the rewritable non-volatile memory module further comprises at least one memory chip and each of the memory chips comprises a plurality of memory dies, wherein the buffer area and The storage areas are configured in the same memory die.