CN103137678A - Germanium-silicon heterogenous junction bipolar transistor and manufacturing method thereof - Google Patents
Germanium-silicon heterogenous junction bipolar transistor and manufacturing method thereof Download PDFInfo
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- CN103137678A CN103137678A CN2011103889979A CN201110388997A CN103137678A CN 103137678 A CN103137678 A CN 103137678A CN 2011103889979 A CN2011103889979 A CN 2011103889979A CN 201110388997 A CN201110388997 A CN 201110388997A CN 103137678 A CN103137678 A CN 103137678A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title abstract description 8
- 239000012535 impurity Substances 0.000 claims abstract description 87
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 56
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 56
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 33
- 238000009792 diffusion process Methods 0.000 claims abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 52
- 229910052710 silicon Inorganic materials 0.000 claims description 52
- 239000010703 silicon Substances 0.000 claims description 52
- 229910052751 metal Inorganic materials 0.000 claims description 51
- 239000002184 metal Substances 0.000 claims description 51
- 238000002347 injection Methods 0.000 claims description 30
- 239000007924 injection Substances 0.000 claims description 30
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 30
- 238000002513 implantation Methods 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 29
- 229920005591 polysilicon Polymers 0.000 claims description 29
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 28
- 229910052760 oxygen Inorganic materials 0.000 claims description 28
- 239000001301 oxygen Substances 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 22
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 20
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 20
- 238000005516 engineering process Methods 0.000 claims description 20
- 239000010936 titanium Substances 0.000 claims description 20
- 229910052719 titanium Inorganic materials 0.000 claims description 20
- 239000000126 substance Substances 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 14
- 238000001039 wet etching Methods 0.000 claims description 13
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 229910052796 boron Inorganic materials 0.000 claims description 9
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 8
- 238000002955 isolation Methods 0.000 claims description 8
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 8
- 229910052721 tungsten Inorganic materials 0.000 claims description 8
- 239000010937 tungsten Substances 0.000 claims description 8
- 239000002019 doping agent Substances 0.000 claims description 7
- 229910015900 BF3 Inorganic materials 0.000 claims description 6
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 73
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 16
- 239000011229 interlayer Substances 0.000 description 10
- 239000000377 silicon dioxide Substances 0.000 description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 239000000203 mixture Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 230000035755 proliferation Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 231100000614 poison Toxicity 0.000 description 1
- 230000007096 poisonous effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
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Abstract
The invention discloses a germanium-silicon heterogenous junction bipolar transistor. An outer base region comprises germanium impurities or carbon impurities and P-type impurities, wherein the germanium impurities or the carbon impurities are injected in an autoregistration mode by using the outer side periphery of an emission region as an autoregistration boundary. The invention further discloses a manufacturing method of the germanium-silicon heterogenous junction bipolar transistor. According to the germanium-silicon heterogenous junction bipolar transistor and the manufacturing method of the germanium-silicon heterogenous junction bipolar transistor, due to the fact that the germanium impurities or the carbon impurities are injected into the outer base region, transverse diffusion of the P-type impurities can be reduced, the width of the outer base region can be reduced, and a maximum oscillation frequency of a device is improved.
Description
Technical field
The present invention relates to semiconductor integrated circuit and make the field, particularly relate to a kind of Ge-Si heterojunction bipolar transistor; The invention still further relates to a kind of manufacture method of Ge-Si heterojunction bipolar transistor.
Background technology
In radio frequency applications, need more and more higher device feature frequency, although RFCMOS can realize upper frequency in advanced person's technology, but be difficult to satisfy fully radio frequency requirement, as be difficult to realize characteristic frequency more than 40GHz, and the R﹠D costs of advanced technologies are also very high; Compound semiconductor can be realized very high characteristic frequency device, but the shortcoming high due to material cost, that size is little adds that the most compounds semiconductor is poisonous, has limited its application.Germanium silicon (SiGe) heterojunction bipolar transistor (HBT) is the fine selection of hyperfrequency device, and what at first it utilized SiGe and silicon (Si) can be with difference, improves the Carrier Injection Efficiency of emitter region, increases the current amplification factor of device; Next utilizes the highly doped of SiGe base, reduces base resistance, improves characteristic frequency; SiGe technique is substantially compatible mutually with silicon technology in addition, so SiGe HBT has become the main force of hyperfrequency device.
Existing SiGe HBT adopts highly doped collector region buried regions, to reduce collector region resistance, adopts high concentration high-energy N type to inject, and connects the collector region buried regions, forms collector terminal (collector pick-up).The collector region that the upper outside Yanzhong of collector region buried regions is low-doped, the SiGe extension of P type doping in place forms the base, and then the heavy N-type doped polycrystalline silicon consists of emitter, finally completes the making of HBT.Can select center collector region local ion to inject when emitter window is opened, regulate puncture voltage and the characteristic frequency of HBT.Adopt in addition the parasitic capacitance between deep trench isolation reduction collector region and substrate, improve the frequency characteristic of HBT.This device technology mature and reliable, but major defect has: 1) the boron ion extends out that to cause outer base area to do narrow.2) maximum oscillation frequency (Fmax) is less than normal.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of Ge-Si heterojunction bipolar transistor, can reduce the horizontal proliferation of the p type impurity of outer base area, thereby can reduce the width of outer base area, improves the maximum oscillation frequency of device.For this reason, the present invention also provides a kind of manufacture method of Ge-Si heterojunction bipolar transistor.
For solving the problems of the technologies described above, Ge-Si heterojunction bipolar transistor provided by the invention is formed on silicon substrate, active area is comprised by the isolation of shallow slot field oxygen: a base is comprised of the P type germanium and silicon epitaxial layer that is formed on described active area and extend on the described shallow slot field oxygen of described active area week side.One emitter region is comprised of the N-type polysilicon that is formed at top, described base, and described emitter region and described base contact; The size of described emitter region is less than the size of described active area; Top in described emitter region is formed with Metal Contact, and this Metal Contact contacts and draw emitter with described emitter region.Take the outer ledge of described emitter region as the boundary, described base is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region is take the described base in, the described intrinsic base region outside as outer base area; Include the germanium of autoregistration injection or the first p type impurity of carbon impurity and autoregistration injection in described outer base area, the doped region of the doped region of described germanium or carbon impurity and described the first p type impurity is all take the outer ledge of described emitter region as the autoregistration border, and described germanium or carbon impurity are used for suppressing the diffusion of described the first p type impurity; Top at described outer base area is formed with Metal Contact, and this Metal Contact contacts and draw base stage with described outer base area.
Further improving is also to comprise: a collector region, formed by a N-type ion implanted region that is formed in described active area, and described collector region top and described base contact.One counterfeit buried regions is comprised of the N-type ion implanted region of the oxygen bottom, described shallow slot field that is formed at described active area week side; Described counterfeit buried regions also is diffused in described active area and forms with the bottom of described collector region and contacts; Be formed with the deep hole contact in the oxygen of the described shallow slot field at described counterfeit buried regions top, described deep hole contact contacts and draws collector electrode with described counterfeit buried regions.
Further improve and be, described deep hole contact forms by being filled in titanium in deep hole and titanium nitride metal level and tungsten layer; The thickness of the titanium layer of described titanium and titanium nitride metal level is that the thickness of 100 dusts～500 dusts, titanium nitride layer is 50 dusts～500 dusts.
The further improvement is to be formed with in the bottom of described deep hole contact the N-type impurity that autoregistration is injected, the satisfied condition that forms ohmic contact between described deep hole contact and described counterfeit buried regions that makes of the concentration of the N-type impurity that this autoregistration is injected.
For solving the problems of the technologies described above, the manufacture method of Ge-Si heterojunction bipolar transistor provided by the invention comprises step: form shallow slot field oxygen and active area on silicon substrate; Form a P type germanium and silicon epitaxial layer in the positive deposit of described silicon substrate, described P type germanium and silicon epitaxial layer is positioned on described active area and extends on the described shallow slot field oxygen of described active area week side, forms the base by described P type germanium and silicon epitaxial layer; Adopt depositing technics to form a N-type polysilicon on described base, then adopt chemical wet etching technique to carry out etching formation emitter region to described N-type polysilicon; After etching, described emitter region and described base contact, and the size of described emitter region is less than the size of described active area; Take the outer ledge of described emitter region as the boundary, described base is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region is take the described base in, the described intrinsic base region outside as outer base area; Do not add reticle, adopt the autoregistration injection technology that described outer base area is adulterated, comprising: inject germanium or carbon impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area; After described germanium or the autoregistration of carbon impurity are injected, inject the first p type impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area equally; The described germanium of injection or carbon impurity can suppress the diffusion of described the first p type impurity before described the first p type impurity injects; Form Metal Contact by the top at described outer base area and draw base stage; Form Metal Contact by the top in described emitter region and draw emitter.
Further the manufacture method of Ge-Si heterojunction bipolar transistor, comprise the steps:
Step 1, employing chemical wet etching technique form shallow trench and active area on silicon substrate.
Step 2, carry out the N-type Implantation in the bottom of described shallow trench and form counterfeit buried regions.
Step 3, carry out the N-type Implantation form collector region in described active area; The bottom of described collector region forms with described counterfeit buried regions and contacts.
Step 4, form a P type germanium and silicon epitaxial layer in the positive deposit of described silicon substrate, described P type germanium and silicon epitaxial layer is positioned on described active area and extends on the described shallow slot field oxygen of described active area week side, forms the base by described P type germanium and silicon epitaxial layer.
Step 5, on described base deposit one deck N-type polysilicon, adopt chemical wet etching technique to carry out etching to described N-type polysilicon and form the emitter region; After etching, described emitter region and described base contact, and the size of described emitter region is less than the size of described active area; Take the outer ledge of described emitter region as the boundary, described base is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region is take the described base in, the described intrinsic base region outside as outer base area.
Step 6, do not add reticle, adopt the autoregistration injection technology that described outer base area is adulterated, comprising: inject germanium or carbon impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area; After described germanium or the autoregistration of carbon impurity are injected, inject the first p type impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area equally; The described germanium of injection or carbon impurity can suppress the diffusion of described the first p type impurity before described the first p type impurity injects.
Step 7, form the deep hole contact in the oxygen of the described shallow slot field at described counterfeit buried regions top, described deep hole contact contacts and draws collector electrode with described counterfeit buried regions; Metal Contact is formed on the top at described outer base area, and this Metal Contact contacts and draw base stage with described outer base area; Metal Contact is formed on the top in described emitter region, and this Metal Contact contacts and draw emitter with described emitter region.
Further improve is that the implantation dosage that adopts the autoregistration injection technology to inject described germanium or carbon impurity in described outer base area is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev.
Further improve is that the implantation dosage that adopts the autoregistration injection technology to inject described the first p type impurity in described outer base area is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev, implanted dopant are boron or boron fluoride.
Further improve and be, described deep hole contact forms by being filled in titanium in deep hole and titanium nitride metal level and tungsten layer; The thickness of the titanium layer of described titanium and titanium nitride metal level is that the thickness of 100 dusts～500 dusts, titanium nitride layer is 50 dusts～500 dusts.
Further improve and be, after described deep hole forms, before described titanium and titanium nitride metal level and described tungsten layer fill, also be included in and carry out the step that N-type impurity is injected in autoregistration in described deep hole, the concentration of the N-type impurity that autoregistration is injected satisfies the condition that forms ohmic contact between described deep hole contact and described counterfeit buried regions that makes.
Ge-Si heterojunction bipolar transistor of the present invention can reduce the horizontal proliferation of the p type impurity of outer base area, thereby can reduce the width of outer base area by inject germanium or carbon impurity in outer base area, improves the maximum oscillation frequency of device.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:
Fig. 1 is embodiment of the present invention Ge-Si heterojunction bipolar transistor device architecture schematic diagram;
Fig. 2 A-Fig. 2 H is the structural representation in each step of manufacture method of embodiment of the present invention Ge-Si heterojunction bipolar transistor.
Embodiment
As shown in Figure 1, be embodiment of the present invention Ge-Si heterojunction bipolar transistor device architecture schematic diagram.Embodiment of the present invention Ge-Si heterojunction bipolar transistor is formed on silicon substrate 501, the isolation structure that active area is described active area by 503 isolation of shallow slot field oxygen be shallow trench isolation from.Ge-Si heterojunction bipolar transistor comprises:
One collector region 514 is comprised of a N-type ion implanted region that is formed in described active area.The N-type ion implanted region of described collector region 514 can adopt bolus injection, also can adopt repeatedly injection formation, and the impurity of injection is arsenic or phosphorus, and the energy of injection and dosage are determined by the puncture voltage of described Ge-Si heterojunction bipolar transistor.
One counterfeit buried regions 502 is comprised of the N-type ion implanted region of oxygen 503 bottoms, described shallow slot field that are formed at described active area week side; Described counterfeit buried regions 502 also is diffused in described active area and forms with the bottom of described collector region 514 and contacts.In embodiments of the present invention, can be in contact with one another the formation buried regions after the described counterfeit buried regions 502 of all sides of described active area is diffused into described active area; When the size of described active area than ambassador described active area week side 502 diffusions of described counterfeit buried regions after can not form contact in described active area the time, can the described counterfeit buried regions 502 of all sides of described active area be coupled together the formation buried regions by ion implantation technology.The implantation dosage that the N-type foreign ion of described counterfeit buried regions 502 injects is 1e14cm
-2～1e16cm
-2, Implantation Energy 2KeV～50KeV, implanted dopant are phosphorus.Be formed with deep hole contact 504 in the described shallow slot field at described counterfeit buried regions 502 tops oxygen 503, described deep hole contact 504 contacts and draws collector electrode with described counterfeit buried regions 502.Described deep hole contact 504 forms by being filled in titanium in deep hole and titanium nitride metal level and tungsten layer; The thickness of the titanium layer of described titanium and titanium nitride metal level is that the thickness of 100 dusts～500 dusts, titanium nitride layer is 50 dusts～500 dusts.Bottom in described deep hole contact 504 is formed with the N-type impurity that autoregistration is injected, and the concentration of the N-type impurity that this autoregistration is injected satisfies described deep hole contact 504 and 502 conditions that form ohmic contact of described counterfeit buried regions of making.
One base 511 is comprised of the P type germanium and silicon epitaxial layer that is formed on described active area and extend on the described shallow slot field oxygen 503 of described active area week side.Described base 511 forms with described collector region 514 and contacts.The contact area of described base 511 and described collector region 514 is by the base window definition, described base window forms after by dielectric layer silica 513 and polysilicon 508 etchings, and described base window is positioned at described active area top and more than or equal to the size of described active area.The part that described P type germanium and silicon epitaxial layer extends to oxygen 503 tops, described shallow slot field is also polysilicon structure and is superimposed upon on described polysilicon 508.
One emitter region 510 is comprised of the N-type polysilicon that is formed at 511 tops, described base.Described emitter region 510 and described base 511 contact; The contact area of described emitter region 510 and described base 511 is defined by emitter window.Described emitter window forms after by dielectric layer 509 etchings, and the thickness of described dielectric layer 509 is determined by the emitter region width; Described dielectric layer 509 can be mono-layer oxidized silicon, can be also the double-layer structure of silica and silicon nitride composition or the double-layer structure of silica and polysilicon composition.Described emitter window is positioned at described active area top and less than the size of described active area.
The top of described emitter region 510 extends on the described dielectric layer 509 of described emitter window outside, and the size of the described emitter region 510 after extension is also less than the size of described active area; Be formed with monox lateral wall 512 on the side of described emitter region 510.Be formed with Metal Contact 506 at the top of described emitter region 510, this Metal Contact 506 contacts and draws emitter with described emitter region 510.Take the outer ledge of described emitter region 510 as the boundary, the outer ledge of emitter region described in the embodiment of the present invention 510 is the outer ledge of described monox lateral wall 512, described base 511 is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region 510 is take the described base in, the described intrinsic base region outside as outer base area; Include the germanium of autoregistration injection or the first p type impurity of carbon impurity and autoregistration injection in described outer base area, the doped region of the doped region of described germanium or carbon impurity and described the first p type impurity is all take the outer ledge of described emitter region as the autoregistration border, and described germanium or carbon impurity are used for suppressing the diffusion of described the first p type impurity.The implantation dosage that the autoregistration of described germanium or carbon impurity is injected is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev.The implantation dosage that the autoregistration of described the first p type impurity is injected is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev, implanted dopant are boron or boron fluoride.After having injected germanium or carbon impurity in described outer base area, the diffusion zone of the boron in described outer base area or boron fluoride impurity reduces, thereby can reduce the width of outer base area, and the maximum oscillation frequency (Fmax) of device is provided at last.
The part that extends to oxygen 503 tops, described shallow slot field of described outer base area is polysilicon structure and is superimposed upon on described polysilicon 508, and this part also represents with polysilicon 508.Be formed with Metal Contact 506 at the top of described outer base area, this Metal Contact 506 contacts and draws base stage with described outer base area.After the polycrystalline substance of device forms, also be formed with an interlayer film 505, this interlayer film 505 covers the polycrystalline substance of device and and metal layer at top isolation.Described Metal Contact 506 has been passed described interlayer film 505, and described interlayer film 505 and described shallow slot field oxygen 503 have been passed in described deep hole contact 504.Be formed with the figure of metal level 507 on described interlayer film 505, described metal level 507 be connected Metal Contact 506, described deep hole contact 504 and contact and realize that emitter, base stage and collector electrode be connected connection.
As shown in Fig. 2 A to Fig. 2 H, it is the structural representation in each step of manufacture method of embodiment of the present invention Ge-Si heterojunction bipolar transistor.The manufacture method of embodiment of the present invention Ge-Si heterojunction bipolar transistor comprises the steps:
Step 1, as shown in Fig. 2 A, form hard mask layer on silicon substrate, described hard mask layer is comprised of ground floor oxide-film 517, second layer nitride film 518 and the 3rd layer of oxide-film 519 of being formed at successively on described silicon substrate.Adopt chemical wet etching technique described hard mask layer to be etched in the figure of shallow trench and active area, protected by described hard mask layer on wherein said active area, the described hard mask layer on described shallow trench is removed; Take described hard mask layer as mask, described silicon substrate is carried out etching and form shallow trench.
When the gross thickness of described hard mask layer will satisfy the follow-up counterfeit buried regions Implantation that carries out, ion can not penetrate described hard mask layer and enter into described active area.Be preferably, the thickness of described ground floor oxide-film 517 is 100 dusts～300 dusts, and the thickness of second layer nitride film 518 is 200 dusts～500 dusts, and the thickness of the 3rd layer of oxide-film 519 is 300 dusts～800 dusts.
Step 2, as shown in Fig. 2 A, adopt thermal oxidation technology to form a liner oxide film on the surface of described shallow trench, then adopt deposit HTO (High Temperature Oxidation on described liner oxide film, high-temperature oxydation) oxide layer 516, and the side that described liner oxide film and described HTO oxide layer 516 is dry-etched in described shallow trench forms inside wall 520.
Described Ge-Si heterojunction bipolar transistor energy and cmos device are integrated on same described silicon substrate 501 together; after forming described inside wall 520; adopt chemical wet etching technique that the formation zone of described Ge-Si heterojunction bipolar transistor 515 is opened with photoresist, other zone covers and protects with described photoresist 515.
Then carrying out the N-type Implantation in the bottom of described shallow trench forms counterfeit buried regions 502.The implantation dosage that the N-type foreign ion of described counterfeit buried regions 502 injects is 1e14cm
-2～1e16cm
-2, Implantation Energy 2KeV～50KeV, implanted dopant are phosphorus.
Step 3, as shown in Fig. 2 B, adopt wet-etching technology to remove the 3rd layer of oxide-film 519 of described hard mask layer, the ground floor oxide-film 517 and the second layer nitride film 518 that pass described hard mask layer carry out N-type Implantation formation collector region 514 in described active area; The N-type ion implanted region of described collector region 514 can adopt bolus injection, also can adopt repeatedly injection formation, and the impurity of injection is arsenic or phosphorus, and the energy of injection and dosage are determined by the puncture voltage of described Ge-Si heterojunction bipolar transistor.The bottom of described collector region 514 forms with described counterfeit buried regions 502 and contacts.
Remove described photoresist 515.As shown in Fig. 2 C, adopt high-density plasma (HDP) chemical vapor deposition (CVD) technique to fill HDP oxide layer formation shallow slot field oxygen 503 in described shallow trench.Afterwards, adopt CMP (Chemical Mechanical Polishing) process that described hard mask layer is removed.After heat-treating, in embodiments of the present invention, after being diffused into described active area, the described counterfeit buried regions 502 of all sides of described active area can be in contact with one another the formation buried regions; When the size of described active area than ambassador described active area week side 502 diffusions of described counterfeit buried regions after can not form contact in described active area the time, can the described counterfeit buried regions 502 of all sides of described active area be coupled together the formation buried regions by ion implantation technology.
If the described Ge-Si heterojunction bipolar transistor of the embodiment of the present invention and other cmos device are integrated on same described silicon substrate 501 together, at this moment can carry out the manufacture craft of relevant cmos device in the zone that forms described cmos device, comprise the making, the making of metal-oxide-semiconductor side wall of grid oxygen, grid etc.
Step 4, as shown in Fig. 2 D, dielectric layer deposited silica 513 and polysilicon 508 on described silicon substrate 501, the thickness of described dielectric layer silica 513 are that the thickness of 100 dusts～500 dusts, described polysilicon 508 is 200 dusts～1500 dusts.
Adopt chemical wet etching technique to carry out etching to described dielectric layer silica 513 and described polysilicon 508 and form the base window.Described base window is positioned at described active area top and more than or equal to the size of described active area.Described base window exposes the described collector region 514 of its bottom.
As shown in Fig. 2 E, form a P type germanium and silicon epitaxial layer 511 in the positive deposit of described silicon substrate 501, described P type germanium and silicon epitaxial layer 511 is positioned on described active area and extends on the described shallow slot field oxygen 503 of described active area week side, forms base 511 by described P type germanium and silicon epitaxial layer 511.Described base 511 forms with described collector region 514 and contacts, and the contact area of described base 511 and described collector region 514 is by described base window definition.The part that described P type germanium and silicon epitaxial layer 511 extends to oxygen 503 tops, described shallow slot field is also polysilicon structure and is superimposed upon on described polysilicon 508.
Described P type germanium and silicon epitaxial layer 511 is made of trilamellar membrane in embodiments of the present invention, this trilamellar membrane is followed successively by from lower to upper silicon transition zone, germanium silicon layer and silicon covering layer from described surfaces of active regions and forms, described silicon transition zone and described silicon covering layer are all intrinsic silicon, are mixed with boron impurity in described germanium silicon layer.The thickness of each of trilamellar membrane layer and the boron concentration of described germanium silicon layer and the characteristic requirements that germanium concentration has device determine.
Step 5, as shown in Fig. 2 F, in the positive dielectric layer deposited 509 of described silicon substrate 501, described dielectric layer 509 is positioned on described base 511 and described polysilicon 508.The thickness of described dielectric layer 509 is determined by the emitter region width; Described dielectric layer 509 can be mono-layer oxidized silicon, can be also the double-layer structure of silica and silicon nitride composition or the double-layer structure of silica and polysilicon composition.
Adopt chemical wet etching technique to carry out etching to described dielectric layer 509 and form emitter window.Described emitter window is positioned at described active area top and less than the size of described active area.Described emitter window is exposed the described base 511 of its bottom.
As shown in Fig. 2 F, form a N-type polysilicon 510 in the positive deposit of described silicon substrate 501, doped N-type impurity in place during 510 deposit of described N-type polysilicon is after deposit is completed, adopt ion implantation technology to inject N-type impurity, the implantation dosage of this injection is greater than 1e15cm again
-21e16cm
-2, implanted dopant is phosphorus or arsenic, Implantation Energy is determined according to the thickness of described N-type polysilicon 510.
As shown in Fig. 2 G, adopt chemical wet etching technique to carry out etching to described N-type polysilicon 510 and form emitter region 510.Described emitter region 510 and described base 511 contact; The contact area of described emitter region 510 and described base 511 is defined by emitter window.The top of described emitter region 510 extends on the described dielectric layer 509 of described emitter window outside, and the size of the described emitter region 510 after extension is also less than the size of described active area.
Take the outer ledge of described emitter region 510 as the boundary, described base 511 is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region 510 is take the described base in, the described intrinsic base region outside as outer base area.
Step 6, as shown in Fig. 2 H, form monox lateral wall 512 on the side of described emitter region 510.At this moment, the outer ledge of described emitter region 510 extends to the outer ledge of described monox lateral wall 512.
Do not add reticle, adopt the autoregistration injection technology that described outer base area is adulterated, comprising: inject germanium or carbon impurity take the outer ledge of described emitter region 510 as the autoregistration edge in described outer base area; The implantation dosage that the autoregistration of described germanium or carbon impurity is injected is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev.
After described germanium or the autoregistration of carbon impurity are injected, inject the first p type impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area equally; The implantation dosage that the autoregistration of described the first p type impurity is injected is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev, implanted dopant are boron or boron fluoride.
The described germanium of injection or carbon impurity can suppress the diffusion of described the first p type impurity before described the first p type impurity injects, the diffusion zone of boron in described outer base area or boron fluoride impurity is reduced, thereby can reduce the width of outer base area, the maximum oscillation frequency of device is provided at last.
Step 7, as shown in Figure 1, at positive deposit one interlayer film 505 of described silicon substrate 501, this interlayer film 505 covers the polycrystalline substance of device and is used to realize the polycrystalline substance of device and the isolation of metal layer at top.
Adopt chemical wet etching technique to form the contact hole that passes described interlayer film 505, and form the deep hole that passes described interlayer film 505 and described shallow slot field oxygen 503;
Carry out autoregistration and inject N-type impurity in described contact hole and described deep hole, the contact position place that the concentration of the N-type impurity that this autoregistration is injected satisfies the deep hole contact 504 that can make follow-up formation and Metal Contact 506 can form ohmic contact.
Filling titanium and titanium nitride metal level and tungsten layer in described contact hole and described deep hole forms respectively Metal Contact 506 and contacts 504 with deep hole.The thickness of the titanium layer of described titanium and titanium nitride metal level is that the thickness of 100 dusts～500 dusts, titanium nitride layer is 50 dusts～500 dusts.Described deep hole contact 504 contacts and draws collector electrode with described counterfeit buried regions 502; Described Metal Contact 506 at the top of described outer base area contacts and draws base stage with described outer base area; Described Metal Contact 506 at the top of described emitter region 510 contacts and draws emitter with described emitter region.
Be formed with the figure of metal level 507 on described interlayer film 505, described metal level 507 be connected Metal Contact 506, described deep hole contact 504 and contact and realize that emitter, base stage and collector electrode be connected connection.
Abovely by specific embodiment, the present invention is had been described in detail, but these are not to be construed as limiting the invention.In the situation that do not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (10)
1. a Ge-Si heterojunction bipolar transistor, be formed on silicon substrate, and active area be is characterized in that by shallow slot field oxygen isolation, comprising:
One base is comprised of the P type germanium and silicon epitaxial layer that is formed on described active area and extend on the described shallow slot field oxygen of described active area week side;
One emitter region is comprised of the N-type polysilicon that is formed at top, described base, and described emitter region and described base contact; The size of described emitter region is less than the size of described active area; Top in described emitter region is formed with Metal Contact, and this Metal Contact contacts and draw emitter with described emitter region;
Take the outer ledge of described emitter region as the boundary, described base is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region is take the described base in, the described intrinsic base region outside as outer base area; Include the germanium of autoregistration injection or the first p type impurity of carbon impurity and autoregistration injection in described outer base area, the doped region of the doped region of described germanium or carbon impurity and described the first p type impurity is all take the outer ledge of described emitter region as the autoregistration border, and described germanium or carbon impurity are used for suppressing the diffusion of described the first p type impurity; Top at described outer base area is formed with Metal Contact, and this Metal Contact contacts and draw base stage with described outer base area.
2. Ge-Si heterojunction bipolar transistor as claimed in claim 1, is characterized in that, also comprises:
One collector region is comprised of a N-type ion implanted region that is formed in described active area, and described collector region top and described base contact;
One counterfeit buried regions is comprised of the N-type ion implanted region of the oxygen bottom, described shallow slot field that is formed at described active area week side; Described counterfeit buried regions also is diffused in described active area and forms with the bottom of described collector region and contacts; Be formed with the deep hole contact in the oxygen of the described shallow slot field at described counterfeit buried regions top, described deep hole contact contacts and draws collector electrode with described counterfeit buried regions.
3. Ge-Si heterojunction bipolar transistor as claimed in claim 1 is characterized in that: described deep hole contact forms by being filled in titanium in deep hole and titanium nitride metal level and tungsten layer; The thickness of the titanium layer of described titanium and titanium nitride metal level is that the thickness of 100 dusts～500 dusts, titanium nitride layer is 50 dusts～500 dusts.
4. Ge-Si heterojunction bipolar transistor as claimed in claim 1, it is characterized in that: the bottom in described deep hole contact is formed with the N-type impurity that autoregistration is injected, and the concentration of the N-type impurity that this autoregistration is injected satisfies the condition that forms ohmic contact between described deep hole contact and described counterfeit buried regions that makes.
5. the manufacture method of a Ge-Si heterojunction bipolar transistor, is characterized in that, comprises step:
Form shallow slot field oxygen and active area on silicon substrate;
Form a P type germanium and silicon epitaxial layer in the positive deposit of described silicon substrate, described P type germanium and silicon epitaxial layer is positioned on described active area and extends on the described shallow slot field oxygen of described active area week side, forms the base by described P type germanium and silicon epitaxial layer;
Adopt depositing technics to form a N-type polysilicon on described base, then adopt chemical wet etching technique to carry out etching formation emitter region to described N-type polysilicon; After etching, described emitter region and described base contact, and the size of described emitter region is less than the size of described active area; Take the outer ledge of described emitter region as the boundary, described base is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region is take the described base in, the described intrinsic base region outside as outer base area;
Do not add reticle, adopt the autoregistration injection technology that described outer base area is adulterated, comprising: inject germanium or carbon impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area; After described germanium or the autoregistration of carbon impurity are injected, inject the first p type impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area equally; The described germanium of injection or carbon impurity can suppress the diffusion of described the first p type impurity before described the first p type impurity injects;
Form Metal Contact by the top at described outer base area and draw base stage; Form Metal Contact by the top in described emitter region and draw emitter.
6. the manufacture method of Ge-Si heterojunction bipolar transistor as claimed in claim 5, is characterized in that, comprises the steps:
Step 1, employing chemical wet etching technique form shallow trench and active area on silicon substrate;
Step 2, carry out the N-type Implantation in the bottom of described shallow trench and form counterfeit buried regions;
Step 3, carry out the N-type Implantation form collector region in described active area; The bottom of described collector region forms with described counterfeit buried regions and contacts;
Step 4, form a P type germanium and silicon epitaxial layer in the positive deposit of described silicon substrate, described P type germanium and silicon epitaxial layer is positioned on described active area and extends on the described shallow slot field oxygen of described active area week side, forms the base by described P type germanium and silicon epitaxial layer;
Step 5, on described base deposit one deck N-type polysilicon, adopt chemical wet etching technique to carry out etching to described N-type polysilicon and form the emitter region; After etching, described emitter region and described base contact, and the size of described emitter region is less than the size of described active area; Take the outer ledge of described emitter region as the boundary, described base is divided into intrinsic base region and outer base area, and the outer ledge that described intrinsic base region is positioned at described emitter region is take the described base in, the described intrinsic base region outside as outer base area;
Step 6, do not add reticle, adopt the autoregistration injection technology that described outer base area is adulterated, comprising: inject germanium or carbon impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area; After described germanium or the autoregistration of carbon impurity are injected, inject the first p type impurity take the outer ledge of described emitter region as the autoregistration edge in described outer base area equally; The described germanium of injection or carbon impurity can suppress the diffusion of described the first p type impurity before described the first p type impurity injects;
Step 7, form the deep hole contact in the oxygen of the described shallow slot field at described counterfeit buried regions top, described deep hole contact contacts and draws collector electrode with described counterfeit buried regions; Metal Contact is formed on the top at described outer base area, and this Metal Contact contacts and draw base stage with described outer base area; Metal Contact is formed on the top in described emitter region, and this Metal Contact contacts and draw emitter with described emitter region.
7. as the manufacture method of claim 5 or 6 described Ge-Si heterojunction bipolar transistors, it is characterized in that: the implantation dosage that adopts the autoregistration injection technology to inject described germanium or carbon impurity in described outer base area is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev.
8. as the manufacture method of claim 5 or 6 described Ge-Si heterojunction bipolar transistors, it is characterized in that: the implantation dosage that adopts the autoregistration injection technology to inject described the first p type impurity in described outer base area is: 1e15cm
-2～1e16cm
-2, Implantation Energy is: 2kev～10kev, implanted dopant are boron or boron fluoride.
9. the manufacture method of Ge-Si heterojunction bipolar transistor as claimed in claim 6 is characterized in that: described deep hole contact forms by being filled in titanium in deep hole and titanium nitride metal level and tungsten layer; The thickness of the titanium layer of described titanium and titanium nitride metal level is that the thickness of 100 dusts～500 dusts, titanium nitride layer is 50 dusts～500 dusts.
10. the manufacture method of Ge-Si heterojunction bipolar transistor as claimed in claim 9, it is characterized in that: after described deep hole forms, before described titanium and titanium nitride metal level and described tungsten layer fill, also be included in and carry out the step that N-type impurity is injected in autoregistration in described deep hole, the concentration of the N-type impurity that autoregistration is injected satisfies the condition that forms ohmic contact between described deep hole contact and described counterfeit buried regions that makes.
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| US20080203434A1 (en) * | 2005-09-30 | 2008-08-28 | Nxp B.V. | Semiconductor Device with a Bipolar Transistor and Method of Manufacturing Such a Device |
| CN102034855A (en) * | 2009-09-29 | 2011-04-27 | 上海华虹Nec电子有限公司 | Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof |
| CN102097464A (en) * | 2009-12-15 | 2011-06-15 | 上海华虹Nec电子有限公司 | High-voltage bipolar transistor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080203434A1 (en) * | 2005-09-30 | 2008-08-28 | Nxp B.V. | Semiconductor Device with a Bipolar Transistor and Method of Manufacturing Such a Device |
| CN102034855A (en) * | 2009-09-29 | 2011-04-27 | 上海华虹Nec电子有限公司 | Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof |
| CN102097464A (en) * | 2009-12-15 | 2011-06-15 | 上海华虹Nec电子有限公司 | High-voltage bipolar transistor |
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