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CN101179178B - Nitride semiconductor device and fabrication method thereof - Google Patents

Nitride semiconductor device and fabrication method thereof Download PDF

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CN101179178B
CN101179178B CN 200710197022 CN200710197022A CN101179178B CN 101179178 B CN101179178 B CN 101179178B CN 200710197022 CN200710197022 CN 200710197022 CN 200710197022 A CN200710197022 A CN 200710197022A CN 101179178 B CN101179178 B CN 101179178B
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山田英司
神川刚
荒木正浩
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
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Abstract

本发明公开了一种氮化物半导体器件及其制造方法。所述器件防止裂纹产生、带有具有均匀厚度和好的生长表面平整度的氮化物半导体薄膜,且因此特性稳定,而且能以满意的成品率制造。在此氮化物半导体器件中,氮化物半导体薄膜生长于在垂直于脊表面的方向与晶体方向<0001>之间具有倾斜角的衬底上。这有助于减小或有意加速在其整个迁移中氮化物半导体薄膜的源材料的原子或分子的扩散或移动。结果,能形成具有好的表面平整度的氮化物半导体生长层,且因此能获得具有满意特性的氮化物半导体器件。

The invention discloses a nitride semiconductor device and a manufacturing method thereof. The device prevents the generation of cracks, has a nitride semiconductor thin film having a uniform thickness and good flatness of the growth surface, and thus has stable characteristics, and can be manufactured with a satisfactory yield. In this nitride semiconductor device, a nitride semiconductor thin film is grown on a substrate having an off angle between a direction perpendicular to a ridge surface and a crystal direction <0001>. This helps to reduce or intentionally accelerate the diffusion or movement of atoms or molecules of the source material of the nitride semiconductor thin film throughout its migration. As a result, a nitride semiconductor growth layer with good surface flatness can be formed, and thus a nitride semiconductor device with satisfactory characteristics can be obtained.

Description

氮化物半导体器件及其制造方法Nitride semiconductor device and manufacturing method thereof

本申请是申请日为2005年11月2日且发明名称为“氮化物半导体器件及其制造方法”的中国专利申请No.200510119342.6的分案申请。This application is a divisional application of Chinese Patent Application No. 200510119342.6 with a filing date of November 2, 2005 and an invention title of "Nitride Semiconductor Device and Manufacturing Method Thereof".

技术领域technical field

本发明涉及一种氮化物半导体器件。更具体而言,本发明涉及一种使用至少表面由氮化物半导体形成的半导体衬底的氮化物器件,以及这种氮化物半导体器件的制造方法。The present invention relates to a nitride semiconductor device. More specifically, the present invention relates to a nitride device using a semiconductor substrate having at least a surface formed of a nitride semiconductor, and a method of manufacturing such a nitride semiconductor device.

背景技术Background technique

氮化物半导体例如GaN、AlGaN、GaInN和AlGaInN特征在于具有比AlGaInAs基或AlGaInP基半导体大的带隙Eg,还在于是直接跃迁半导体材料。由于这些原因,氮化物半导体作为用于制造半导体发光器件的、例如能在从光谱的紫外到绿色区的短波处发光的半导体激光器和覆盖从光谱的紫外到红色区的宽的发光波长范围的发光二极管的材料,已经引起了很多关注。这样,人们期望氮化物半导体在高密度光盘驱动器、全彩色显示器和其他设备中以及环境、医学和其他领域中得到广泛应用。Nitride semiconductors such as GaN, AlGaN, GaInN, and AlGaInN are characterized by having a larger band gap Eg than AlGaInAs-based or AlGaInP-based semiconductors, and are also direct transition semiconductor materials. For these reasons, nitride semiconductors are used in the manufacture of semiconductor light emitting devices such as semiconductor lasers capable of emitting light at short wavelengths from the ultraviolet to the green region of the spectrum and luminescence covering a wide emission wavelength range from the ultraviolet to the red region of the spectrum. Diode materials have attracted a lot of attention. Thus, nitride semiconductors are expected to be widely used in high-density optical disk drives, full-color displays and other devices, as well as in environmental, medical and other fields.

此外,氮化物半导体具有比GaAs基或其他半导体高的热导率,且因此可以期望应用在工作于高温且高输出的器件中。此外,氮化物半导体不需要任何例如用在AlGaAs基半导体中的砷(As)或用在ZnCdSSe基半导体中的镉(Cd)的材料,因此它们也不需要例如砷化三氢(AsH3)的源材料等,这样可以期望它们是有利于环境的化合物半导体材料。In addition, nitride semiconductors have higher thermal conductivity than GaAs-based or other semiconductors, and thus can be expected to be used in devices operating at high temperatures and high outputs. Furthermore, nitride semiconductors do not require any materials such as arsenic (As) used in AlGaAs-based semiconductors or cadmium (Cd) used in ZnCdSSe-based semiconductors, so they do not require any materials such as arsine (AsH 3 ) source materials, etc., so that they are expected to be environmentally friendly compound semiconductor materials.

然而,常规地,在各种类型的氮化物半导体器件中,氮化物半导体激光器件的制造苦于极低的成品率,即,相对于在单个晶片上制造的氮化物半导体激光器件的总量来说,无缺陷的数量是极低的。低成品率的一个原因被认为是裂纹的形成。引起裂纹的原因可能在于衬底本身或者在于把包括多个依次放置的氮化物半导体层(氮化物半导体膜)的氮化物半导体多层膜放置在衬底上的过程中。However, conventionally, among various types of nitride semiconductor devices, the manufacture of nitride semiconductor laser devices suffers from extremely low yield, that is, relative to the total amount of nitride semiconductor laser devices manufactured on a single wafer. , the number of defect-free is extremely low. One reason for the low yield is considered to be the formation of cracks. The cause of the crack may be in the substrate itself or in the process of placing a nitride semiconductor multilayer film including a plurality of nitride semiconductor layers (nitride semiconductor film) placed in sequence on the substrate.

本质上优选通过在GaN衬底上生长而形成例如由GaN形成的氮化物半导体多层膜,因为这样有助于产生具有好的晶体质量和更少缺陷的氮化物半导体多层膜。然而,直到如今还没有生产出与GaN具有好的晶格匹配的高质量的GaN单晶衬底。因此,SiC衬底因其在晶格常数上的相对小的差别而常被取代使用。然而不利的是,SiC衬底很昂贵,难于制造为大直径,并产生拉伸应变。结果,SiC衬底易于产生裂纹。此外,氮化物半导体的衬底要求由承受约1000℃的高生长温度并在用作源材料的氨气环境中抗变色(discoloration)和抗腐蚀的材料形成。It is inherently preferable to form a nitride semiconductor multilayer film of, for example, GaN by growing on a GaN substrate, since this helps to produce a nitride semiconductor multilayer film with good crystal quality and fewer defects. However, high-quality GaN single crystal substrates with good lattice matching with GaN have not been produced until now. Therefore, SiC substrates are often used instead due to their relatively small difference in lattice constants. Disadvantageously, however, SiC substrates are expensive, difficult to manufacture in large diameters, and generate tensile strain. As a result, the SiC substrate is prone to cracks. In addition, the substrate of the nitride semiconductor is required to be formed of a material that withstands a high growth temperature of about 1000° C. and is resistant to discoloration and corrosion in an ammonia atmosphere used as a source material.

基于上述讨论,通常采用蓝宝石衬底作为放置氮化物半导体多层膜的衬底。然而,蓝宝石衬底引起大的晶格失配(约13%)。因此,在蓝宝石衬底上,首先通过低温生长形成由GaN或AlN形成的缓冲层,然后,在此缓冲层上生长氮化物半导体多层膜。尽管如此,还是难以完全消除应变,因此取决于例如膜组分和膜厚的条件导致了裂纹的形成。Based on the above discussion, a sapphire substrate is generally used as a substrate for placing a nitride semiconductor multilayer film. However, the sapphire substrate causes a large lattice mismatch (about 13%). Therefore, on a sapphire substrate, a buffer layer made of GaN or AlN is first formed by low-temperature growth, and then a nitride semiconductor multilayer film is grown on this buffer layer. Nevertheless, it is difficult to completely relieve the strain, thus resulting in the formation of cracks depending on conditions such as film composition and film thickness.

引起这种裂纹的原因可能在于衬底以外的其他地方,下面将描述。当制造氮化物半导体激光器件时,在衬底上放置氮化物半导体多层膜,且该氮化物半导体多层膜由不同类型的膜例如GaN、AlGaN和InGaN组成。此处,组成氮化物半导体多层膜的各个膜具有不同的晶格常数,因此显示出晶格失配,引起裂纹的产生。作为抵抗其的对策,提出了用于减少裂纹的方法,根据此方法,采用处理过的衬底,使得在氮化物半导体多层膜生长在衬底上之后,氮化物半导体多层膜的表面不是平坦的,而是具有形成于其上的凹陷区(见日本专利申请公开No.2002-246698)。通过采用例如公开在日本专利申请公开No.2002-246698中的方法,可能减少由组成形成于衬底上的氮化物半导体多层膜的各层之间的晶格失配所导致的裂纹。然而不利的是,在日本专利申请公开No.2002-246698中所公开的方法中,形成在氮化物半导体多层膜的表面上的凹陷区降低了其平整度。The cause of such cracks may lie somewhere other than the substrate, as will be described below. When manufacturing a nitride semiconductor laser device, a nitride semiconductor multilayer film is placed on a substrate, and the nitride semiconductor multilayer film is composed of various types of films such as GaN, AlGaN, and InGaN. Here, the individual films constituting the nitride semiconductor multilayer film have different lattice constants, and thus exhibit lattice mismatch, causing cracks to occur. As a countermeasure against it, a method for reducing cracks has been proposed, according to which method, a substrate processed so that after the nitride semiconductor multilayer film is grown on the substrate, the surface of the nitride semiconductor multilayer film is not flat, but has a depressed region formed thereon (see Japanese Patent Application Laid-Open No. 2002-246698). By employing, for example, the method disclosed in Japanese Patent Application Laid-Open No. 2002-246698, it is possible to reduce cracks caused by lattice mismatch between layers constituting a nitride semiconductor multilayer film formed on a substrate. Disadvantageously, however, in the method disclosed in Japanese Patent Application Laid-Open No. 2002-246698, the depressed regions formed on the surface of the nitride semiconductor multilayer film degrade its flatness.

作为抵抗这种降低氮化物半导体多层膜表面的平整度的对策,本发明的发明人开发出了这样的方法,根据该方法,在氮化物半导体衬底上形成沟槽(trench)和脊部(ridge portion),其中沟槽为每个氮化物半导体激光器件中的一个到多个条纹形凹槽的形式,脊部每个都位于两个相邻的沟槽之间并具有约100μm到1000μm的宽度,然后,在此氮化物半导体衬底上,设置氮化物半导体多层膜。采用这种方法,可能防止裂纹,并同时在脊部表面获得相当改进的表面平整度。As a countermeasure against such lowering of the flatness of the surface of the nitride semiconductor multilayer film, the inventors of the present invention have developed a method according to which trenches and ridges are formed on a nitride semiconductor substrate (ridge portion), wherein the groove is in the form of one to a plurality of stripe-shaped grooves in each nitride semiconductor laser device, and the ridges are each located between two adjacent grooves and have a thickness of about 100 μm to 1000 μm width, and then, on this nitride semiconductor substrate, a nitride semiconductor multilayer film is provided. In this way, it is possible to prevent cracks and at the same time obtain a considerably improved surface flatness on the ridge surface.

当通过本发明的发明人所开发出的上述方法制造氮化物半导体激光器件时,氮化物半导体多层膜例如如图20所示而构造。When manufacturing a nitride semiconductor laser device by the above method developed by the inventors of the present invention, a nitride semiconductor multilayer film is structured as shown in FIG. 20, for example.

具体地,形成在由蚀刻过的n型GaN等形成的处理过的衬底6(见图19A和19B)表面上的氮化物半导体多层膜4具有例如下述层,其按照命名的顺序依次层叠在处理过衬底6的表面上:具有0.2μm层厚的n型GaN层200;具有0.75μm层厚的n型Al0.05Ga0.95N第一覆盖层(clad layer)201;具有0.1μm层厚的n型Al0.08Ga0.92N第二覆盖层202;具有1.5μm层厚的n型Al0.05Ga0.95N第三覆盖层203;具有0.02μm层厚的n型GaN引导层(guidelaycr)204;有源层205,包括均具有4nm层厚的三个InGaN阱层和均具有8nm层厚的四个GaN势垒层;具有20nm层厚的p型Al0.3Ga0.7N蒸发防止层206;具有0.02μm层厚的p型GaN引导层207;具有0.5μm层厚的p型Al0.05Ga0.95N覆盖层208;具有0.1μm层厚的p型GaN接触层209。有源层205具有下述按其命名顺序依次形成的层:势垒层、阱层、势垒层、阱层、势垒层、阱层和势垒层。在下面描述中,当需要表示由掺杂有Mg的依次叠放的层所构成的氮化物半导体层,即p型Al0.3Ga0.7N蒸发防止层206、p型GaN引导层207、p型Al0.05Ga0.95N覆盖层208和p型GaN接触层209时,就采用术语“p层”。Specifically, the nitride semiconductor multilayer film 4 formed on the surface of a processed substrate 6 (see FIGS. 19A and 19B ) formed of etched n-type GaN or the like has, for example, the following layers in order of naming Laminated on the surface of the processed substrate 6: an n-type GaN layer 200 with a layer thickness of 0.2 μm; an n-type Al 0.05 Ga 0.95 N first clad layer (clad layer) 201 with a layer thickness of 0.75 μm; a layer with a 0.1 μm thick n-type Al 0.08 Ga 0.92 N second cladding layer 202; n-type Al 0.05 Ga 0.95 N third cladding layer 203 with a layer thickness of 1.5 μm; n-type GaN guide layer (guidelaycr) 204 with a layer thickness of 0.02 μm; The active layer 205 includes three InGaN well layers each having a layer thickness of 4 nm and four GaN barrier layers each having a layer thickness of 8 nm; a p-type Al 0.3 Ga 0.7 N evaporation preventing layer 206 having a layer thickness of 20 nm; having a layer thickness of 0.02 A p-type GaN guide layer 207 with a layer thickness of μm; a p-type Al 0.05 Ga 0.9 5N cladding layer 208 with a layer thickness of 0.5 μm; a p-type GaN contact layer 209 with a layer thickness of 0.1 μm. The active layer 205 has the following layers formed sequentially in the order of their names: barrier layer, well layer, barrier layer, well layer, barrier layer, well layer, and barrier layer. In the following description, when it is necessary to indicate a nitride semiconductor layer composed of sequentially stacked layers doped with Mg, that is, the p-type Al 0.3 Ga 0.7 N evaporation prevention layer 206, the p-type GaN guide layer 207, the p-type Al 0.05 Ga 0.95 N cladding layer 208 and p-type GaN contact layer 209, the term "p-layer" is used.

这样,氮化物半导体多层膜4通过MOCVD设置在被预先处理过的处理过的衬底6的表面上。这样,制造了如图19A和19B所示的在氮化物半导体多层膜4的表面具有凹陷区的氮化物半导体晶片。在图19A和19B中,平面方向是标注在一起的。In this way, nitride semiconductor multilayer film 4 is provided on the surface of processed substrate 6 which has been previously processed by MOCVD. In this way, a nitride semiconductor wafer having recessed regions in the surface of the nitride semiconductor multilayer film 4 as shown in FIGS. 19A and 19B is manufactured. In Figures 19A and 19B, plane directions are labeled together.

用作图19A和19B所示的处理过的衬底6的是具有通过例如RIE(反应离子蚀刻)的干法蚀刻技术沿<1-100>方向形成于其上的均为条纹形的沟槽2和脊1的n型GaN衬底。沟槽形成为5μm宽、5μm深、且在两个相邻沟槽之间的距离为350μm。在如此蚀刻的处理过的衬底6上,通过例如MOCVD的生长技术形成具有如图20所示的层叠结构的氮化物半导体多层膜4。Used as the processed substrate 6 shown in FIGS. 19A and 19B has grooves each having a stripe shape formed thereon in the <1-100> direction by a dry etching technique such as RIE (Reactive Ion Etching). 2 and ridge 1 on the n-type GaN substrate. Trenches were formed to be 5 μm wide and 5 μm deep with a distance of 350 μm between two adjacent trenches. On thus etched processed substrate 6, nitride semiconductor multilayer film 4 having a laminated structure as shown in FIG. 20 is formed by a growth technique such as MOCVD.

当氮化物半导体激光器件通过由本发明的发明人所开发出的方法实际制造时,通过使用n型GaN衬底作为处理过的衬底6,并随后在该n型GaN衬底上通过MOCVD等外延生长氮化物半导体多层膜4,发现该方法在减少裂纹方面是有效的,但不能显著增加成品率。具体地,通过上述方法,制造了多个氮化物半导体激光器件,然后从其中随机采样100个氮化物半导体激光器件并测量其水平方向和垂直方向的FFP的半极大值全宽(full width halfmaximum,FWHM)。此处,实际FFP FWHM在设计值的±1范围内的氮化物半导体激光器件认为是无缺陷的。结果是仅30个氮化物半导体激光器件满足其FFP的FWHM的要求,这显示出很低的成品率。When a nitride semiconductor laser device is actually manufactured by the method developed by the inventors of the present invention, by using an n-type GaN substrate as the processed substrate 6, and then epitaxy by MOCVD or the like on the n-type GaN substrate Growing a nitride semiconductor multilayer film 4, it was found that this method was effective in reducing cracks, but could not significantly increase the yield. Specifically, through the above method, a plurality of nitride semiconductor laser devices are manufactured, and then 100 nitride semiconductor laser devices are randomly sampled from them and the full width at half maximum (full width half maximum) of the FFP in the horizontal direction and the vertical direction is measured. , FWHM). Here, a nitride semiconductor laser device whose actual FFP FWHM is within ±1 of the design value is considered to be defect-free. The result is that only 30 nitride semiconductor laser devices meet the FWHM requirements of their FFPs, which shows a very low yield.

这是因为形成的氮化物半导体多层膜4的表面不够平整。具有不足的表面平整度,各层的层厚在氮化物半导体多层膜4中是不同的,导致在各个氮化物半导体激光器件中特性的变化。这减少了具有在要求范围内的特性的器件的数目。因此,为了提高成品率,不仅需要减少裂纹的产生,也需要使层厚更均匀和膜表面更平整。This is because the surface of the formed nitride semiconductor multilayer film 4 is not flat enough. With insufficient surface flatness, the layer thicknesses of the respective layers are different in the nitride semiconductor multilayer film 4, resulting in variations in characteristics in individual nitride semiconductor laser devices. This reduces the number of devices having characteristics within the required range. Therefore, in order to improve the yield, it is not only necessary to reduce the occurrence of cracks, but also to make the layer thickness more uniform and the film surface smoother.

还发现,当电极焊盘形成在由于凹陷区而很不平整的表面上时,通过这些凹陷区泄漏的电流使得不可能获得激光器的正常电流-电压(C-V)特性。基本上,例如SiO2的绝缘膜形成在凹陷区,且电极焊盘进一步形成在上面。此处,如果该表面具有例如凹陷区的不平整区,则形成在其上的绝缘膜不会均匀地形成。当分析该绝缘膜时,证实了它具有许多这样的区域,在该区域中产生了小裂纹和凹坑且该处绝缘膜极薄。还发现这种不均匀绝缘膜是电流泄漏的原因。It was also found that when the electrode pads are formed on a surface that is very uneven due to the depressed regions, current leaking through the depressed regions makes it impossible to obtain normal current-voltage (CV) characteristics of the laser. Basically, an insulating film such as SiO 2 is formed in the recessed region, and electrode pads are further formed thereon. Here, if the surface has an uneven region such as a depressed region, the insulating film formed thereon will not be uniformly formed. When the insulating film was analyzed, it was confirmed that it had many regions where small cracks and pits were generated and where the insulating film was extremely thin. It was also found that this uneven insulating film was the cause of current leakage.

此外,在如图19A、19B和图20所示形成的氮化物半导体晶片的晶片表面内测量了表面平整度。沿<1-100>方向的表面平整度的测量结果在图21中示出。该测量是在下面条件下进行的:测量长度,600μm;测量时间,3s;探针压力,30mg;水平分辨率,1μm/取样。在所测量的600μm宽度范围内,表面的最高和最低部分之间的水平差是30nm,从图21中可以了解。在该测量中,氮化物半导体晶片假设为具有0.02°或更小的倾斜角。In addition, surface flatness was measured within the wafer surface of the nitride semiconductor wafer formed as shown in FIGS. 19A , 19B and 20 . The measurement results of surface flatness along the <1-100> direction are shown in FIG. 21 . The measurement was performed under the following conditions: measurement length, 600 μm; measurement time, 3 s; probe pressure, 30 mg; horizontal resolution, 1 μm/sample. The level difference between the highest and lowest parts of the surface is 30 nm over the measured width of 600 μm, as can be seen from FIG. 21 . In this measurement, the nitride semiconductor wafer was assumed to have an off angle of 0.02° or less.

如图19B所示,设置在处理过的衬底6表面的氮化物半导体多层膜4的各层的膜厚在晶片表面内随着位置而变化,因此导致平整度的差异。结果,氮化物半导体激光器件的特性取决于它们形成在晶片表面的何处而变化,且显著影响氮化物半导体激光器件特性的掺Mg的p层厚度(相应于如图20所示的p型Al0.3Ga0.7N蒸发防止层206到p型GaN接触层209依次层叠的p层的总厚度)在衬底表面内不同位置变化很大。As shown in FIG. 19B , the film thickness of each layer of nitride semiconductor multilayer film 4 provided on the surface of processed substrate 6 varies with position within the wafer surface, thus causing a difference in flatness. As a result, the characteristics of nitride semiconductor laser devices vary depending on where they are formed on the wafer surface, and the thickness of the Mg-doped p layer (corresponding to p-type Al as shown in FIG. 20 ) significantly affects the characteristics of nitride semiconductor laser devices. 0.3 Ga 0.7 N evaporation preventing layer 206 to p-type GaN contact layer 209 (the total thickness of the p layer stacked in sequence) varies greatly at different positions within the substrate surface.

当作为电流限制结构的脊结构形成时,脊部剩余2μm宽的条纹,且其他部分通过采用ICP(inductively coupled plasma,感应耦合等离子体)机的干法蚀刻技术而蚀刻掉。这样,如果在蚀刻之前p层的厚度在晶片表面的不同位置不同的话,那么剩下的p层膜厚,即,在蚀刻后保留的且因此最影响氮化物半导体激光器件特性的p层厚度在晶片表面不同位置也有很大变化。结果,不仅在不同氮化物半导体激光器件中层厚不同,即使在同一氮化物半导体激光器件中,剩下的p层膜厚在一些部分可以几乎为零,而在其他部分可以相当大。当剩下的p层膜厚如此变化时,其影响氮化物半导体激光器件的寿命,同时如上所述,也影响其特性例如FFP(far-field pattern,远场图案)。When the ridge structure as the current confinement structure was formed, 2 μm wide stripes remained at the ridge portion, and the other portion was etched away by a dry etching technique using an ICP (inductively coupled plasma) machine. Like this, if the thickness of p-layer is different at different positions on the wafer surface before etching, then the remaining p-layer film thickness, that is, the p-layer thickness that remains after etching and therefore most affects the characteristics of the nitride semiconductor laser device is There are also large variations at different positions on the wafer surface. As a result, not only the layer thickness differs in different nitride semiconductor laser devices, but even in the same nitride semiconductor laser device, the film thickness of the remaining p layer can be almost zero in some parts and considerably large in other parts. When the thickness of the remaining p-layer is changed in this way, it affects the lifetime of the nitride semiconductor laser device and, as mentioned above, also affects its characteristics such as FFP (far-field pattern, far-field pattern).

上述在晶片表面内存在大的层厚分布的原因是外延生长在包括氮化物半导体衬底的处理过的衬底的脊形部分上的膜的生长速度在沟槽的影响下变化,导致在晶片表面内均匀性的降低。The reason why the above-mentioned large layer thickness distribution exists in the wafer surface is that the growth speed of the film epitaxially grown on the ridge portion of the processed substrate including the nitride semiconductor substrate varies under the influence of the groove, resulting in Reduced uniformity within the surface.

具体地,如图22A和22B所示,在具有形成于其上的沟槽2的处理过的衬底6上,当外延生长开始时,在生长的初始阶段,如图22A所示,由生长在沟槽2的底部224和侧部226上的氮化物半导体薄膜而形成的沟槽生长部分222仅填充沟槽2的部分。同时,由生长在脊1的顶部223的表面上的氮化物半导体薄膜形成的顶部生长部分221在生长的同时保持氮化物半导体薄膜表面平整。Specifically, as shown in FIGS. 22A and 22B, on the processed substrate 6 having the trench 2 formed thereon, when the epitaxial growth starts, in the initial stage of growth, as shown in FIG. 22A, by the growth The trench growth portion 222 formed of the nitride semiconductor thin film on the bottom 224 and the side portion 226 of the trench 2 fills only a part of the trench 2 . Meanwhile, the top growth portion 221 formed of the nitride semiconductor thin film grown on the surface of the top 223 of the ridge 1 grows while keeping the nitride semiconductor thin film surface flat.

氮化物半导体薄膜的外延生长从图22A所示的上述状态进行到图22B所示的状态。在此状态下,由生长在沟槽2的底部224和侧部226的氮化物半导体薄膜所形成的沟槽生长部分222几乎完全填充沟槽2,并通过生长部分225连接到由生长在脊1的顶部223表面上的氮化物半导体薄膜形成的顶部生长部分221。在此状态下,淀积在生长于脊1的顶部223上的氮化物半导体薄膜表面上作为源材料的原子或分子(例如Ga原子)在热能的影响下进行迁移等以移动到生长部分225或沟槽生长部分222。由原子或分子的迁移导致的这种移动在晶片表面内不均匀地发生,且移动距离在晶片表面内不同地方是不同的。结果,如图22B所示,顶部生长部分221的表面平整度降低了。The epitaxial growth of the nitride semiconductor thin film proceeds from the above-described state shown in FIG. 22A to the state shown in FIG. 22B. In this state, the trench growth portion 222 formed by the nitride semiconductor thin film grown on the bottom 224 and the side portion 226 of the trench 2 almost completely fills the trench 2 and is connected to the substrate grown on the ridge 1 through the growth portion 225. The top growth portion 221 is formed of a nitride semiconductor thin film on the top 223 surface. In this state, atoms or molecules (for example, Ga atoms) deposited on the surface of the nitride semiconductor thin film grown on the top 223 of the ridge 1 as a source material undergo migration or the like under the influence of thermal energy to move to the growth portion 225 or The trench growth portion 222 . Such movement caused by migration of atoms or molecules occurs non-uniformly within the wafer surface, and the distance of movement varies from place to place within the wafer surface. As a result, as shown in FIG. 22B, the surface flatness of the top growth portion 221 is lowered.

在氮化物半导体衬底本身的不均匀性,例如在晶片表面内倾斜角的分布和在晶片表面内衬底曲率的分布或者在衬底表面内外延生长速率的不均匀或者在衬底表面内沟槽形成过程的不均匀的影响下,在<1-100>方向,氮化物半导体薄膜的平整度也降低。具体地,填充沟槽2所需的时间随着<1-100>方向而变化;这样,填充得较早的地方,氮化物半导体薄膜的源材料的原子或分子从脊1的顶部生长部分221迁移或者移动到生长部分225或者沟槽生长部分222。在它们移走的地方,需要更长时间形成氮化物半导体薄膜,结果形成在沟槽2中的氮化物半导体薄膜具有更大的厚度。作为对比,在沟槽2填充得较晚的地方,氮化物半导体薄膜的源材料的原子或分子不从脊1的顶部生长部分221迁移或移动到沟槽2;即使它们迁移或移动,也需要较少时间形成氮化物半导体薄膜。这样,在这些沟槽2中的氮化物半导体薄膜比沟槽2被更早填充处具有更小的膜厚。Inhomogeneity in the nitride semiconductor substrate itself, such as the distribution of the tilt angle in the wafer surface and the distribution of the curvature of the substrate in the wafer surface or the inhomogeneity of epitaxial growth rate in the substrate surface or the groove in the substrate surface The flatness of the nitride semiconductor thin film also decreases in the <1-100> direction under the influence of unevenness in the groove formation process. Specifically, the time required to fill the trench 2 varies with the <1-100> direction; like this, where it is filled earlier, atoms or molecules of the source material of the nitride semiconductor thin film grow from the top of the ridge 1 part 221 Migrate or move to the growth portion 225 or the trench growth portion 222 . Where they are removed, it takes longer to form the nitride semiconductor film, with the result that the nitride semiconductor film formed in the trench 2 has a greater thickness. In contrast, where the trench 2 is filled later, atoms or molecules of the source material of the nitride semiconductor thin film do not migrate or move from the top growth portion 221 of the ridge 1 to the trench 2; It takes less time to form a nitride semiconductor thin film. Thus, the nitride semiconductor thin film in these trenches 2 has a smaller film thickness than where the trenches 2 are filled earlier.

在生长速率取决于供给速率的情况下,即,在氮化物半导体薄膜的生长速率由供应到晶片表面的原子或分子的流量等控制的情况下,当氮化物半导体薄膜的源材料的原子或分子迁移或移动到沟槽2中时,由于供应到整个晶片表面的源材料的原子或分子的流量为常数,在氮化物半导体薄膜生长于脊1的顶部223上的地方,即顶部生长部分221中,膜厚较小。作为对比,在氮化物半导体薄膜的源材料的原子或分子不迁移或移动到沟槽2中的情况下,在氮化物薄膜生长在脊1的顶部223上的地方,即顶部生长部分221中,膜厚较大。In the case where the growth rate depends on the supply rate, that is, in the case where the growth rate of the nitride semiconductor thin film is controlled by the flow rate of atoms or molecules supplied to the wafer surface, etc., when the atoms or molecules of the source material of the nitride semiconductor thin film When migrating or moving into the trench 2, since the flux of atoms or molecules of the source material supplied to the entire wafer surface is constant, in the place where the nitride semiconductor thin film grows on the top 223 of the ridge 1, that is, in the top growth portion 221 , the film thickness is small. In contrast, in the case where atoms or molecules of the source material of the nitride semiconductor thin film do not migrate or move into the trench 2, where the nitride thin film is grown on the top 223 of the ridge 1, that is, in the top growth portion 221, The film thickness is larger.

接着,在脊1的顶部223上的顶部生长部分221中的层厚在晶片表面内变化,结果氮化物半导体薄膜的表面的平整度降低。这样,为了获得更好的表面平整度,需要阻止氮化物半导体薄膜的源材料的原子或分子从脊1上的顶部生长部分221迁移或移动到生长部分225或沟槽生长部分22中,并因此阻止它们在该处形成氮化物半导体薄膜。Next, the layer thickness in the top growth portion 221 on the top 223 of the ridge 1 varies within the wafer surface, with the result that the flatness of the surface of the nitride semiconductor thin film decreases. Thus, in order to obtain better surface flatness, it is necessary to prevent the atoms or molecules of the source material of the nitride semiconductor thin film from migrating or moving from the top growth portion 221 on the ridge 1 to the growth portion 225 or the trench growth portion 22, and thus They are prevented from forming a nitride semiconductor film there.

获得更好的平整度的另一方法是使氮化物半导体薄膜的源材料的原子或分子在其从脊1上的顶部生长部分221迁移或移动到沟槽生长部分中时在整个晶片表面均匀移动。Another way to obtain better flatness is to make the atoms or molecules of the source material of the nitride semiconductor thin film uniformly move over the entire wafer surface as they migrate or move from the top growth portion 221 on the ridge 1 into the groove growth portion .

发明内容Contents of the invention

从上述角度,本发明的目的是提供这样的氮化物半导体器件,其不产生裂纹、具有高度均匀的层厚、具有带平整表面的氮化物半导体多层膜、能以高成品率制造且没有电流泄漏。本发明的另一目的是提供这种氮化物半导体器件的制造方法。具体而言,本发明目的是在通过在至少表面由氮化物半导体形成的衬底上设置氮化物半导体多层膜而制造的氮化物半导体激光器件的制造中,防止裂纹的产生,同时通过阻止氮化物半导体薄膜的源材料的原子或分子从位于脊表面的顶部表面部分迁移或移动到沟槽中并因此防止它们在该处形成氮化物半导体薄膜,或者通过使氮化物半导体薄膜的源材料的原子或分子在整个晶片上均匀地从脊表面上的顶部表面部分迁移或移动到沟槽中,而形成具有好的表面平整度的氮化物半导体多层膜。In view of the above, it is an object of the present invention to provide a nitride semiconductor device that does not generate cracks, has a highly uniform layer thickness, has a nitride semiconductor multilayer film with a flat surface, can be manufactured with a high yield, and has no current flow. leakage. Another object of the present invention is to provide a method of manufacturing such a nitride semiconductor device. Specifically, the object of the present invention is to prevent the occurrence of cracks in the manufacture of a nitride semiconductor laser device manufactured by disposing a nitride semiconductor multilayer film on a substrate at least whose surface is formed of a nitride semiconductor, while preventing The atoms or molecules of the source material of the nitride semiconductor thin film migrate or move from the top surface portion located on the ridge surface into the grooves and thus prevent them from forming the nitride semiconductor thin film there, or by making the atoms of the source material of the nitride semiconductor thin film Or molecules uniformly migrate or move from the top surface portion on the ridge surface into the grooves over the entire wafer to form a nitride semiconductor multilayer film with good surface flatness.

根据晶体学的习惯,如果表示晶体平面或方向的指数为负,则该指数由其带有上划线的绝对值表示。在本说明书中,由于这种表示方法是不可能的,因此负指数由前面带有减号“-”的绝对值表示。According to crystallographic convention, if an index indicating a crystal plane or orientation is negative, the index is represented by its overlined absolute value. In this specification, since this notation is not possible, negative exponents are represented by absolute values preceded by a minus sign "-".

“沟槽”表示如图2所示在氮化物半导体衬底上形成为条纹形的凹陷区。图2是具有沟槽22和通过沟槽形成工艺形成于其上的脊21的处理过的衬底26的示意性截面图。该沟槽22不需要一定具有矩形截面形状,而是可以具有三角形或梯形截面形状,只要它们成形可以产生水平高度差即可。沟槽2不需要一定形成为每个都包括单个凹陷区,而是可以形成为每个都包括多个带有窄的平整部分或居间部分的凹陷区。"Trench" means a recessed region formed in a stripe shape on the nitride semiconductor substrate as shown in FIG. 2 . 2 is a schematic cross-sectional view of a processed substrate 26 having trenches 22 and ridges 21 formed thereon by a trench formation process. The groove 22 does not necessarily have a rectangular cross-sectional shape, but may have a triangular or trapezoidal cross-sectional shape as long as they are shaped to create a level difference. The grooves 2 need not necessarily be formed to each include a single depressed region, but may be formed to each include a plurality of depressed regions with a narrow flat portion or intermediate portion.

“脊”表示形成为与条纹相似形状的升高部分。图2示出了沟槽22和脊21沿同一方向形成的条纹排列。作为选择,也可以将沟槽22和脊21形成为格子形排列,其中它们形成在两个互相交叉的方向。也可以在单个衬底上将沟槽22形成为不同形状、不同深度或不同宽度。也可以在单个衬底上以变化的周期形成沟槽22。"Ridge" means a raised portion formed in a shape similar to a stripe. FIG. 2 shows a stripe arrangement in which grooves 22 and ridges 21 are formed in the same direction. Alternatively, the grooves 22 and the ridges 21 may also be formed in a lattice-like arrangement in which they are formed in two directions crossing each other. It is also possible to form trenches 22 of different shapes, different depths or different widths on a single substrate. The trenches 22 may also be formed with varying periods on a single substrate.

“处理过的衬底”表示通过在氮化物半导体上、或在设置于氮化物半导体衬底上的氮化物半导体薄膜表面上、或在表面上具有氮化物半导体层的非氮化物半导体衬底(例如蓝宝石、SiC、Si或GaAs衬底)上形成沟槽和脊而产生的衬底。"Treated substrate" means a non-nitride semiconductor substrate ( Such as sapphire, SiC, Si or GaAs substrates) produced by forming grooves and ridges.

“氮化物半导体衬底”表示至少由AlxGayInzN(0≤x≤1,0≤y≤1,0≤z≤1,且x+y+z=1)形成的衬底。在氮化物半导体衬底中,包含其中的氮原子的约20%或更少可以被下面一组元素中的至少一种取代:As、P和Sb。氮化物半导体衬底可以掺杂有例如n型或p型掺杂剂的杂质。这些杂质的例子包括:Cl、O、S、Se、Te、C、Si、Ge、Zn、Cd、Mg和Be。优选加入的杂质总量为5×1016/cm3以上但在5×1020/cm3以下。在所述杂质中,特别优选作为给氮化物半导体衬底提供n型导电性的是Si、Ge、O、Se或Cl。作为氮化物半导体衬底的主平面方向,可以采用C平面{0001}。"Nitride semiconductor substrate" means a substrate formed of at least AlxGayInzN (0≤x≤1, 0≤y≤1, 0≤z≤1, and x+y+z=1). In the nitride semiconductor substrate, about 20% or less of nitrogen atoms contained therein may be substituted with at least one of the following group of elements: As, P, and Sb. The nitride semiconductor substrate may be doped with impurities such as n-type or p-type dopants. Examples of such impurities include: Cl, O, S, Se, Te, C, Si, Ge, Zn, Cd, Mg and Be. The total amount of impurities added is preferably not less than 5×10 16 /cm 3 but not more than 5×10 20 /cm 3 . Among the impurities, Si, Ge, O, Se, or Cl are particularly preferable as providing n-type conductivity to the nitride semiconductor substrate. As the principal plane direction of the nitride semiconductor substrate, C plane {0001} can be employed.

生长在处理过的衬底上的氮化物半导体多层膜被称作氮化物半导体多层膜。此处,氮化物半导体多层膜是由AlxGayInzN(0≤x≤1,0≤y≤1,0≤z≤1,且x+y+z=1)形成的。在氮化物半导体多层膜中,包含其中的氮原子的约20%或更少可以被下面一组元素的至少一种取代:As、P和Sb。氮化物半导体多层膜可以掺杂有例如n型或p型掺杂剂的杂质。这些杂质的例子包括:Cl、O、S、Se、Te、C、Si、Ge、Zn、Cd、Mg和Be。优选加入的杂质总量为5×1016/cm3以上但在5×1020/cm3以下。在所述杂质中,特别优选作为给氮化物半导体多层膜提供n型导电性的是Si、Ge、O、Se或Te,并特别优选提供给其p型导电性的是Mg、Cd或Be。A nitride semiconductor multilayer film grown on a processed substrate is called a nitride semiconductor multilayer film. Here, the nitride semiconductor multilayer film is formed of AlxGayInzN (0≤x≤1, 0≤y≤1, 0≤z≤1, and x+y+z=1). In the nitride semiconductor multilayer film, about 20% or less of nitrogen atoms contained therein may be substituted with at least one of the following group of elements: As, P, and Sb. The nitride semiconductor multilayer film may be doped with impurities such as n-type or p-type dopants. Examples of such impurities include: Cl, O, S, Se, Te, C, Si, Ge, Zn, Cd, Mg and Be. The total amount of impurities added is preferably not less than 5×10 16 /cm 3 but not more than 5×10 20 /cm 3 . Among the impurities, Si, Ge, O, Se, or Te are particularly preferable as providing n-type conductivity to the nitride semiconductor multilayer film, and Mg, Cd, or Be are particularly preferable as providing p-type conductivity thereof. .

在半导体多层膜中,首先设置在处理过的衬底上的氮化物半导体层被称为氮化物半导体初始层(primer layer)。氮化物半导体初始层可以由例如GaN、AlGaN、AlInGaN、AlGaNP或AlGaNAs形成。In a semiconductor multilayer film, a nitride semiconductor layer first provided on a processed substrate is called a nitride semiconductor primer layer. The nitride semiconductor initial layer may be formed of, for example, GaN, AlGaN, AlInGaN, AlGaNP, or AlGaNAs.

有源层统指任何包括阱层或者包括一个或多个阱层及势垒层的层。例如,具有单量子阱结构的有源层由单阱层或者由势垒层、阱层和势垒层构成。另一方面,具有多量子阱结构的有源层由多个阱层和多个势垒层构成。An active layer generally refers to any layer that includes a well layer or includes one or more well layers and barrier layers. For example, an active layer having a single quantum well structure consists of a single well layer or a barrier layer, a well layer, and a barrier layer. On the other hand, an active layer having a multiple quantum well structure is composed of a plurality of well layers and a plurality of barrier layers.

为了实现上述目的,根据本发明的一个方面,氮化物半导体器件设置有:处理过的衬底,其通过在至少表面由氮化物半导体形成的氮化物半导体衬底的表面上形成沟槽作为至少一个凹陷区并形成脊部作为非沟槽而形成;和氮化物半导体生长层,其包括多个设置在该处理过的衬底上的氮化物半导体薄膜,该氮化物半导体生长层具有与{0001}平面对准的主平面方向。此处,从脊的表面部分沿其法线方向延伸的第一矢量与平行于晶体方向<0001>延伸的第二矢量在假设第一矢量和第二矢量开始于同一点时两者之间的角度,即倾斜角,为0.05°以上但在4°以下。In order to achieve the above objects, according to an aspect of the present invention, a nitride semiconductor device is provided with: a processed substrate formed as at least one groove by forming a groove on the surface of a nitride semiconductor substrate at least whose surface is formed of a nitride semiconductor. a recessed region and forming a ridge formed as a non-trench; and a nitride semiconductor growth layer including a plurality of nitride semiconductor thin films provided on the processed substrate, the nitride semiconductor growth layer having the same shape as {0001} The principal plane direction to which the plane is aligned. Here, the distance between a first vector extending from the surface portion of the ridge along its normal direction and a second vector extending parallel to the crystal direction <0001> assuming that the first and second vectors start at the same point The angle, that is, the inclination angle, is 0.05° or more but 4° or less.

在上述氮化物半导体器件中,优选地,处理过的衬底的倾斜角包括:第一倾斜角,该角是第一矢量与通过将第二矢量投影到由互相垂直的晶体方向<0001>、<11-20>和<1-100>中的晶体方向<0001>和<1-100>所形成的第一平面上而获得的第三矢量之间当假设第一和第三矢量开始于同一点时的角度;和第二倾斜角,该角是第一矢量与通过将第二矢量投影到由互相垂直的晶体方向<0001>、<11-20>和<1-100>中的晶体方向<0001>和<11-20>所形成的第二平面上而获得的第四矢量之间当假设第一和第四矢量开始于同一点时的角度。In the above-mentioned nitride semiconductor device, preferably, the inclination angle of the processed substrate includes: a first inclination angle, which is the difference between the first vector and the crystal direction <0001> perpendicular to each other by projecting the second vector, Between the third vector obtained on the first plane formed by the crystal directions <0001> and <1-100> in <11-20> and <1-100> when assuming that the first and third vectors start at the same the angle at one point; and the second tilt angle, which is the angle between the first vector and the crystal direction by projecting the second vector into the mutually perpendicular crystal directions <0001>, <11-20> and <1-100> The angle between the fourth vector obtained on the second plane formed by <0001> and <11-20> when it is assumed that the first and fourth vectors start at the same point.

在上述氮化物半导体器件中,优选地,令第一倾斜角为θa且第二倾斜角为0b,则|θa|≥|θb|。In the above nitride semiconductor device, preferably, assuming that the first off angle is θa and the second off angle is 0b, then |θa|≥|θb|.

在上述氮化物半导体器件中,优选地,0.09°≤|θa|°。In the above nitride semiconductor device, preferably, 0.09°≦|θa|°.

在上述氮化物半导体器件中,优选地,3×|θb|°<|θa |°<0.09°,同时0.05°≤|θa|°。In the above nitride semiconductor device, preferably, 3×|θb|°<|θa|°<0.09°, while 0.05°≤|θa|°.

在上述氮化物半导体器件中,优选地,令第一倾斜角为θa且第二倾斜角为0b,则|θa|≤|θb|。In the above nitride semiconductor device, preferably, assuming that the first off angle is θa and the second off angle is 0b, then |θa|≤|θb|.

在上述氮化物半导体器件中,优选地,0.2°≤|θb|°。In the above nitride semiconductor device, preferably, 0.2°≦|θb|°.

在上述氮化物半导体器件中,优选地,形成为沟槽的凹陷区以条纹形延伸,且凹陷区的延伸方向平行于或基本平行于晶体方向<1-100>。In the above nitride semiconductor device, preferably, the recessed regions formed as trenches extend in a stripe shape, and the extending direction of the recessed regions is parallel or substantially parallel to the crystal direction <1-100>.

在上述氮化物半导体器件中,形成为沟槽的凹陷区以条纹形延伸,且凹陷区的延伸方向平行于或基本平行于晶体方向<11-20>。In the above nitride semiconductor device, the recessed regions formed as trenches extend in a stripe shape, and the extending direction of the recessed regions is parallel or substantially parallel to the crystal direction <11-20>.

在上述氮化物半导体器件中,优选地,形成为沟槽的凹陷区形成为格子形,且在格子延伸的两个相互垂直的方向中,一个平行或基本平行于晶体方向<11-20>,另一个平行或基本平行于晶体方向<1-100>。In the above nitride semiconductor device, preferably, the recessed region formed as the trench is formed in a lattice shape, and one of the two mutually perpendicular directions in which the lattice extends is parallel or substantially parallel to the crystal direction <11-20>, The other is parallel or substantially parallel to the crystallographic direction <1-100>.

在上述氮化物半导体器件中,优选地,令第一倾斜角为θa且第二倾斜角为θb,则平行于脊的长侧边的方向平行或基本平行于晶体方向<1-100>,且|0a|≥|θb|。In the above nitride semiconductor device, preferably, let the first off angle be θa and the second off angle be θb, then the direction parallel to the long side of the ridge is parallel or substantially parallel to the crystal direction <1-100>, and |0a|≥|θb|.

在上述氮化物半导体器件中,优选地,令第一倾斜角为θa且第二倾斜角为θb,则平行于脊的长侧边的方向平行或基本平行于晶体方向<11-20>,且|θa|≤|θb|。In the above nitride semiconductor device, preferably, let the first off angle be θa and the second off angle be θb, the direction parallel to the long side of the ridge is parallel or substantially parallel to the crystal direction <11-20>, and |θa|≤|θb|.

在上述氮化物半导体器件中,优选地,第一倾斜角的平方与第二倾斜角的平方之和的平方根为0.2°以上。In the above nitride semiconductor device, preferably, the square root of the sum of the square of the first off angle and the square of the second off angle is 0.2° or more.

在上述氮化物半导体器件中,优选地,设置在沟槽的两个相邻部分之间的脊的宽度为100μm或更大但在2000μm以下。In the above nitride semiconductor device, preferably, the width of the ridge provided between two adjacent portions of the trench is 100 μm or more but 2000 μm or less.

在上述氮化物半导体器件中,优选地,与处理过的衬底表面接触的氮化物半导体薄膜为具有0.5μm或更小厚度的GaN或AlGaN。In the above nitride semiconductor device, preferably, the nitride semiconductor thin film in contact with the processed substrate surface is GaN or AlGaN having a thickness of 0.5 μm or less.

在上述氮化物半导体器件中,优选地,形成为沟槽的凹陷区的深度为1.5μm以上。In the above nitride semiconductor device, preferably, the recessed region formed as the trench has a depth of 1.5 μm or more.

在上述氮化物半导体器件中,优选地,令形成在脊上的氮化物半导体生长层的总厚度为T,则形成为沟槽的凹陷区的深度为T/2或更大。In the above nitride semiconductor device, preferably, letting the total thickness of the nitride semiconductor growth layer formed on the ridge be T, the depth of the recessed region formed as the trench is T/2 or more.

在上述氮化物半导体器件中,优选地,形成为沟槽的凹陷区的开口为3μm或更大。In the above nitride semiconductor device, preferably, the opening of the recessed region formed as the trench is 3 μm or more.

在上述氮化物半导体器件中,优选地,当包括多个氮化物半导体薄膜的氮化物半导体生长层形成时,至少一个氮化物半导体薄膜是在这样的条件下生长的:处理过的衬底表面温度为1050℃或更低,供应包含V族原子的源材料的单位时间的摩尔流速与供应包含III族原子的源材料的单位时间的摩尔流速之比是2250或更大。In the above nitride semiconductor device, preferably, when the nitride semiconductor growth layer including a plurality of nitride semiconductor thin films is formed, at least one nitride semiconductor thin film is grown under the condition that the treated substrate surface temperature is 1050° C. or lower, and the ratio of the molar flow rate per unit time for supplying the source material containing group V atoms to the molar flow rate per unit time for supplying the source material containing group III atoms is 2250 or more.

根据上述本发明,当氮化物半导体器件例如氮化物半导体激光器件通过在至少表面由氮化物半导体形成的衬底上设置氮化物半导体生长层而制造时,防止了裂纹的产生,此外阻碍了氮化物半导体薄膜的源材料的原子或分子从脊表面上的顶部生长部分迁移或扩散或移动到沟槽中,并因此阻碍了在该处形成氮化物半导体薄膜。这样,可能形成具有好的表面平整度的氮化物半导体生长层,且因此获得具有满意特性的氮化物半导体器件。According to the present invention as described above, when a nitride semiconductor device such as a nitride semiconductor laser device is manufactured by providing a nitride semiconductor growth layer on a substrate at least the surface of which is formed of a nitride semiconductor, the occurrence of cracks is prevented, and furthermore, the nitride semiconductor laser device is hindered. Atoms or molecules of the source material of the semiconductor thin film migrate or diffuse or move from the top growth portion on the ridge surface into the trenches, and thus hinder the formation of the nitride semiconductor thin film there. In this way, it is possible to form a nitride semiconductor growth layer with good surface flatness, and thus obtain a nitride semiconductor device with satisfactory characteristics.

作为选择,根据上述本发明,有意识地促进氮化物半导体薄膜的源材料的原子或分子从脊表面上的顶部生长部分迁移或扩散或移动到沟槽,使得氮化物半导体薄膜的源材料的原子或分子在晶片整个表面均匀扩散或移动。这样,可能形成具有好的表面平整度的氮化物半导体生长层,且因此获得具有满意特性的氮化物半导体器件。Alternatively, according to the present invention described above, the atoms or molecules of the source material of the nitride semiconductor thin film are intentionally promoted to migrate or diffuse or move from the top growth portion on the ridge surface to the trench so that the atoms or molecules of the source material of the nitride semiconductor thin film Molecules spread or move uniformly across the entire surface of the wafer. In this way, it is possible to form a nitride semiconductor growth layer with good surface flatness, and thus obtain a nitride semiconductor device with satisfactory characteristics.

为了实现上述目的,根据本发明的另一方面,首先形成在具有形成于其上的沟槽的处理过的衬底上的氮化物半导体初始层由包括GaN的化合物形成。In order to achieve the above object, according to another aspect of the present invention, a nitride semiconductor initial layer first formed on a processed substrate having a trench formed thereon is formed of a compound including GaN.

采用此结构,防止了裂纹的产生,此后形成的氮化物半导体多层膜具有高度均匀的层厚,并获得平整表面。With this structure, the occurrence of cracks is prevented, and the nitride semiconductor multilayer film formed thereafter has a highly uniform layer thickness and obtains a flat surface.

此处,优选地,氮化物半导体初始层的层厚为0.5μm以下。优选地,氮化物半导体初始层的层厚与氮化物半导体多层膜的总层厚之比为15%以下。优选地,垂直于沟槽侧壁表面的顶端部分的线与垂直于沟槽以外的表面的线之间的角度为60°或更大。优选地,沟槽的宽度为1μm或更多,且沟槽的周期是0.1mm或更大但在4mm以下。Here, preferably, the thickness of the nitride semiconductor initial layer is 0.5 μm or less. Preferably, the ratio of the layer thickness of the nitride semiconductor initial layer to the total layer thickness of the nitride semiconductor multilayer film is 15% or less. Preferably, an angle between a line perpendicular to the top end portion of the side wall surface of the trench and a line perpendicular to the surface other than the trench is 60° or more. Preferably, the width of the groove is 1 μm or more, and the period of the groove is 0.1 mm or more but 4 mm or less.

在上述氮化物半导体初始层由包括GaN的化合物形成的情况下,当氮化物半导体多层膜的总层厚为4μm或更小时,优选地,沟槽的深度为1μm或更大但不大于20μm,且沟槽的宽度为1μm或更大。In the case where the aforementioned nitride semiconductor initial layer is formed of a compound including GaN, when the total layer thickness of the nitride semiconductor multilayer film is 4 μm or less, preferably, the depth of the trench is 1 μm or more but not more than 20 μm , and the width of the groove is 1 μm or more.

这样,可能获得可接受的表面粗糙度(300

Figure 2007101970221_0
以下),且因此获得提供稳定特性和长寿命的器件。In this way, it is possible to obtain an acceptable surface roughness (300
Figure 2007101970221_0
below), and thus a device providing stable characteristics and long life is obtained.

根据上述本发明,通过制造具有形成于其上的沟槽的处理过的衬底,然后在该处理过的衬底上首先设置氮化物半导体层,可能防止裂纹的产生,并同时在衬底表面获得高度均匀的层厚和好的表面平整度。即,可能提高具有满足无缺陷要求特性的器件的数目,由此提高成品率。According to the present invention as described above, by manufacturing a processed substrate having a groove formed thereon, and then first disposing a nitride semiconductor layer on the processed substrate, it is possible to prevent the generation of cracks and at the same time Highly uniform layer thicknesses and good surface smoothness are obtained. That is, it is possible to increase the number of devices having characteristics satisfying the defect-free requirement, thereby improving the yield.

附图说明Description of drawings

图1是示意性地示出用在本发明第一实施例中的具有θa°倾斜角的处理过的衬底的示意图;1 is a schematic diagram schematically showing a processed substrate having an inclination angle of θa° used in a first embodiment of the present invention;

图2是示意性地示出具有形成于其上的各种形状的沟槽的处理过的衬底的截面图;2 is a cross-sectional view schematically illustrating a processed substrate having grooves of various shapes formed thereon;

图3是示意性地示出用在本发明第一实施例中的具有θb°倾斜角的处理过的衬底的示意图;3 is a schematic view schematically showing a processed substrate having an inclination angle of θb° used in the first embodiment of the present invention;

图4是示意性地示出没有倾斜角的处理过的衬底的示意图;Figure 4 is a schematic diagram schematically showing a processed substrate without an off-angle;

图5是示出p层厚度的标准偏差σ与成品率之间关系的示意图;Fig. 5 is a schematic diagram showing the relationship between the standard deviation σ of the p-layer thickness and the yield;

图6是示出倾斜角θa与p层厚度的标准偏差σ之间关系的示意图;6 is a schematic diagram showing the relationship between the inclination angle θa and the standard deviation σ of the p-layer thickness;

图7是示出倾斜角θb与p层厚度的标准偏差σ之间关系的示意图;7 is a schematic diagram showing the relationship between the tilt angle θb and the standard deviation σ of the p-layer thickness;

图8是具有设置在本发明第一实施例中所采用的、具有θb°倾斜角的处理过的衬底上的氮化物半导体生长层的晶片表面的水平高度偏差的绘图;8 is a graph of a level deviation of a wafer surface having a nitride semiconductor growth layer disposed on a processed substrate having an inclination angle of θb° employed in the first embodiment of the present invention;

图9A和9B是示意性地示出用在本发明的实例1到4中的处理过的衬底的示意图;9A and 9B are schematic diagrams schematically showing processed substrates used in Examples 1 to 4 of the present invention;

图10是具有设置在本发明实例1到4中所采用的处理过的衬底上的氮化物半导体生长层的晶片表面的水平高度偏差的绘图;10 is a plot of level deviation of a wafer surface having a nitride semiconductor growth layer disposed on a processed substrate employed in Examples 1 to 4 of the present invention;

图11A和11B是示意性地示出本发明实例1到4中的氮化物半导体激光器件的示意图;11A and 11B are diagrams schematically showing nitride semiconductor laser devices in Examples 1 to 4 of the present invention;

图12A是示意性地示出具有形成于其上的氮化物半导体多层膜的处理过的衬底围绕沟槽的一部分的透视图,图12B是沿图12A所示的线A-A所取的截面图;12A is a perspective view schematically showing a portion of a processed substrate surrounding a trench with a nitride semiconductor multilayer film formed thereon, and FIG. 12B is a cross section taken along line A-A shown in FIG. 12A picture;

图13A是氮化物半导体器件的前视图,且图13B是图13A的俯视图;FIG. 13A is a front view of a nitride semiconductor device, and FIG. 13B is a top view of FIG. 13A;

图14是图2所示的部分B的截面图;Fig. 14 is a sectional view of part B shown in Fig. 2;

图15是示出沿[1-100]方向的氮化物半导体多层膜的表面平整度的测量结果的示意图;15 is a schematic diagram showing the measurement results of the surface flatness of a nitride semiconductor multilayer film along the [1-100] direction;

图16是示出当初始GaN层厚度变化时测量到的氮化物半导体多层膜表面粗糙度的示意图;16 is a schematic diagram showing the surface roughness of a nitride semiconductor multilayer film measured when the initial GaN layer thickness is varied;

图17A是具有形成于其上的具有好的表面平整度的氮化物半导体多层膜的处理过的衬底的截面图;17A is a cross-sectional view of a processed substrate having a nitride semiconductor multilayer film having good surface flatness formed thereon;

图17B是具有形成于其上的具有差的表面平整度的氮化物半导体多层膜的处理过的衬底的截面图;17B is a cross-sectional view of a processed substrate having a nitride semiconductor multilayer film having poor surface flatness formed thereon;

图18是具有形成于其上的包括具有0.5μm或更小厚度的初始GaN层的氮化物半导体多层膜的处理过的衬底的截面图;18 is a cross-sectional view of a processed substrate having formed thereon a nitride semiconductor multilayer film including an initial GaN layer having a thickness of 0.5 μm or less;

图19A和19B是示意性地示出具有形成在常规处理过的衬底上的氮化物半导体生长层的晶片的示意图;19A and 19B are schematic diagrams schematically showing a wafer having a nitride semiconductor growth layer formed on a conventionally processed substrate;

图20是示意性地示出常规氮化物半导体生长层的截面图;20 is a cross-sectional view schematically showing a conventional nitride semiconductor growth layer;

图21是具有设置在常规处理过的衬底上的氮化物半导体生长层的晶片表面的水平高度变化的绘图;以及FIG. 21 is a plot of a level change of a wafer surface having a nitride semiconductor growth layer disposed on a conventionally processed substrate; and

图22A和22B是示出常规情况下降低的平整度如何发生的模型的示意图。22A and 22B are schematic views of models showing how reduced flatness occurs in conventional cases.

具体实施方式Detailed ways

第一实施例first embodiment

下面将参照附图描述本发明的第一实施例。下面对于实施例的描述将氮化物半导体层作为氮化物半导体器件的例子,但应该理解,本发明可以实施为任何其他类型的氮化物半导体器件。图1和3是示意性地示出用在此实施例中的处理过的衬底16和36的示意图,如当氮化物半导体多层膜4生长于其上时所观察到的。如图1和3所示,处理过的衬底16和36每个都具有固定的倾斜角。图4是示意性地示出从通常使用的具有0.02°或更小倾斜角的衬底产生的处理过的衬底的示意图。在图1、3和4中,平面方向是一起表示的。在此实施例中,通过在具有与处理过的衬底16和36相似的倾斜角的处理过的衬底上生长氮化物半导体多层膜4而制造氮化物半导体激光器件。A first embodiment of the present invention will be described below with reference to the drawings. The following description of the embodiments takes a nitride semiconductor layer as an example of a nitride semiconductor device, but it should be understood that the present invention can be implemented as any other type of nitride semiconductor device. 1 and 3 are diagrams schematically showing processed substrates 16 and 36 used in this embodiment, as viewed when nitride semiconductor multilayer film 4 is grown thereon. As shown in Figures 1 and 3, processed substrates 16 and 36 each have a fixed tilt angle. FIG. 4 is a schematic diagram schematically showing a processed substrate produced from a generally used substrate having an off-angle of 0.02° or less. In Figures 1, 3 and 4, planar directions are indicated together. In this embodiment, a nitride semiconductor laser device is manufactured by growing a nitride semiconductor multilayer film 4 on a processed substrate having a similar off angle to that of the processed substrates 16 and 36 .

首先,将给出如何从具有0.02°或更小倾斜角即,几乎零度的衬底制造处理过的衬底46的描述,如图4所示。在此实施例中,假设采用GaN衬底为作处理过的衬底16、36和46。First, a description will be given of how to manufacture a processed substrate 46 from a substrate having an off angle of 0.02° or less, that is, almost zero degrees, as shown in FIG. 4 . In this embodiment, it is assumed that a GaN substrate is used as the processed substrates 16, 36 and 46.

首先,在n型GaN衬底的整个表面上通过溅射法,SiO2等被气相淀积为1μm膜厚。接着,通过通常的光刻工艺,条纹形抗蚀剂图案沿<1-100>方向形成使得当沿平行于<11-20>方向从一条纹的中心线向另一条纹中心线测量时,抗蚀剂开口具有5μm宽度,且条纹位于350μm间隔内(此后称为“周期”)。接着,通过干法刻蚀技术例如RIE(反应离子刻蚀),SiO2膜和n型GaN衬底被蚀刻以形成具有5μm沟槽深度和5μm开口宽度的沟槽42。然后,通过使用刻蚀剂例如HF(氟化氢),除去SiO2。这样,形成了具有形成于其上的沟槽42和脊41的处理过的衬底46。First, SiO 2 or the like is vapor-deposited to a film thickness of 1 µm on the entire surface of the n-type GaN substrate by the sputtering method. Next, by a usual photolithography process, a stripe-shaped resist pattern is formed along the <1-100> direction such that when measured from the center line of one stripe to the center line of the other stripe in parallel to the <11-20> direction, the resist The etchant openings had a width of 5 μm, and the stripes were located at intervals of 350 μm (hereinafter referred to as “periods”). Next, by a dry etching technique such as RIE (Reactive Ion Etching), the SiO 2 film and n-type GaN substrate were etched to form trenches 42 having a trench depth of 5 μm and an opening width of 5 μm. Then, SiO 2 is removed by using an etchant such as HF (hydrogen fluoride). In this way, a processed substrate 46 is formed having grooves 42 and ridges 41 formed thereon.

在此实施例中,SiO2被气相淀积以在GaN衬底表面上形成SiO2膜。取代地,另一种电介质材料膜等可以形成在GaN衬底表面上。上述SiO2膜可以通过溅射气相淀积以外的方法形成;例如可以通过例如电子束气相淀积或等离子CVD方法形成。抗蚀剂图案的周期不限于上面具体提到的350μm,而是可以根据将制造的氮化物半导体激光器件的宽度而变化。在此实施例中,沟槽42通过干法刻蚀技术而形成;然而,也可以通过湿法刻蚀技术等形成它们。In this embodiment, SiO 2 is vapor deposited to form a SiO 2 film on the surface of the GaN substrate. Alternatively, another dielectric material film or the like may be formed on the GaN substrate surface. The aforementioned SiO 2 film may be formed by a method other than sputtering vapor deposition; for example, it may be formed by, for example, electron beam vapor deposition or plasma CVD. The period of the resist pattern is not limited to 350 μm specifically mentioned above, but may vary according to the width of the nitride semiconductor laser device to be manufactured. In this embodiment, the trenches 42 are formed by a dry etching technique; however, they may also be formed by a wet etching technique or the like.

处理过的衬底46可以通过直接在上述n型GaN衬底表面上形成沟槽42而制造,或者可以通过在n型GaN衬底或者在除了n型氮化物半导体衬底以外的氮化物半导体衬底上首先生长GaN、InGaN、AlGaN、InAlGaN等氮化物半导体薄膜,然后在其上形成沟槽而形成。The processed substrate 46 can be manufactured by directly forming the trench 42 on the above-mentioned n-type GaN substrate surface, or can be fabricated by forming the trench 42 on the n-type GaN substrate or on a nitride semiconductor substrate other than the n-type nitride semiconductor substrate. On the bottom, first grow nitride semiconductor films such as GaN, InGaN, AlGaN, and InAlGaN, and then form trenches on it.

处理过的衬底16和36基本上通过与处理过的衬底46相同的方法形成。差异如下。用于生产处理过的衬底16的衬底具有关于作为旋转轴的晶体方向<11-20>旋转或倾斜θa°的晶体方向<1-100>和<0001>,且因此在晶体方向<0001>与垂直于衬底上的生长表面的方向之间具有θa的倾斜角。另一方面,用于产生处理过的衬底36的衬底具有关于作为旋转轴的晶体方向<1-100>旋转或倾斜θb°的晶体方向<11-20>和<0001>,且因此在晶体方向<0001>与垂直于衬底上的生长表面的方向之间具有θb的倾斜角。在分别具有θa和θb倾斜角的这些衬底的每个上,沟槽12及32和脊11及31以与上述相同的方式形成。此处,假设每个衬底具有零倾斜角而进行光致抗蚀剂图案形成、蚀刻和其他工艺。Processed substrates 16 and 36 are formed by substantially the same method as processed substrate 46 . The differences are as follows. The substrate used to produce the processed substrate 16 has crystal directions <1-100> and <0001> rotated or inclined by θa° with respect to the crystal direction <11-20> as the axis of rotation, and thus in the crystal direction <0001 > have an inclination angle of θa from the direction perpendicular to the growth surface on the substrate. On the other hand, the substrate used to produce the processed substrate 36 has the crystal directions <11-20> and <0001> rotated or inclined by θb° with respect to the crystal direction <1-100> as the axis of rotation, and thus in There is an inclination angle of θb between the crystal direction <0001> and the direction perpendicular to the growth surface on the substrate. On each of these substrates having inclination angles of θa and θb, respectively, grooves 12 and 32 and ridges 11 and 31 are formed in the same manner as described above. Here, photoresist patterning, etching, and other processes are performed assuming that each substrate has a zero tilt angle.

倾斜角不仅可以在一个方向倾斜,例如上述单独的θa或θb,也可以同时在不同方向以不同角度(θa和θb)倾斜。具体地,假设关于旋转轴<11-20>方向晶体方向<1-100>和<0001>均旋转或倾斜θa°,使得在晶体方向<0001>与垂直于衬底的生长表面的方向之间存在θa的倾斜角。那么,令位移矢量A作为开始于旋转之前沿晶体方向<0001>的单位矢量(长度为1)且结束于旋转之后沿晶体方向<0001>的单位矢量的位移矢量。此外,假设关于旋转轴<1-100>方向晶体方向<11-20>和<0001>均旋转或倾斜θb°,使得在晶体方向<0001>与垂直于衬底的生长表面的方向之间存在θb的倾斜角。那么,令位移矢量B成为开始于旋转之前沿晶体方向<0001>的单位矢量且结束于旋转之后沿晶体方向<0001>的单位矢量的位移矢量。然后,令位移矢量C为位移矢量A和B之和,并使合成矢量D为旋转之前沿晶体方向<0001>的单位矢适与位移矢量C之和。然后,此合成矢量D的端点方向可以成为倾斜角倾斜的方向。在本说明书中,在衬底由于晶体方向<0001>倾斜位移矢量C而具有倾斜角的情况中,通过表述上述倾斜角θa和θb二者而表示。The inclination angle can not only be inclined in one direction, such as the above-mentioned θa or θb alone, but also can be inclined in different directions at different angles (θa and θb) at the same time. Specifically, it is assumed that both the crystal directions <1-100> and <0001> are rotated or tilted by θa° about the rotation axis <11-20> direction, so that between the crystal direction <0001> and the direction perpendicular to the growth surface of the substrate There is an inclination angle of θa. Then, let the displacement vector A be the displacement vector starting from the unit vector (of length 1) along the crystal direction <0001> before the rotation and ending with the unit vector along the crystal direction <0001> after the rotation. Furthermore, it is assumed that both the crystal directions <11-20> and <0001> are rotated or tilted by θb° with respect to the rotation axis <1-100> direction, so that there exists between the crystal direction <0001> and the direction perpendicular to the growth surface of the substrate The tilt angle of θb. Then, let the displacement vector B be the displacement vector starting with the unit vector along the crystal direction <0001> before the rotation and ending with the unit vector along the crystal direction <0001> after the rotation. Then, let the displacement vector C be the sum of the displacement vectors A and B, and let the resulting vector D be the sum of the unit vector along the crystal direction <0001> and the displacement vector C before rotation. Then, the direction of the end point of this resultant vector D can be the direction in which the inclination angle is inclined. In this specification, in the case where the substrate has an off angle due to the tilt displacement vector C of the crystal direction <0001>, it is expressed by expressing both the above-mentioned off angles θa and θb.

倾斜角的确定Determination of inclination angle

作为本实施例说明的一部分,首先将参照相关附图,给出衬底的倾斜角如何影响设置在具有形成于其上的沟槽和脊的处理过的衬底上的氮化物半导体薄膜的生长。As part of the description of this embodiment, how the inclination angle of the substrate affects the growth of a nitride semiconductor thin film disposed on a processed substrate having grooves and ridges formed thereon will first be given with reference to the relevant drawings. .

如图4所示,当采用具有0.02°或更小倾斜角,即几乎零度的处理过的衬底46时,垂直于脊41的顶部43并垂直于沟槽42的底部44的方向平行于晶体方向<0001>。此外,分别与晶体方向<0001>、<1-100>和<11-20>对准的三个轴彼此垂直。在这种情况下,淀积在脊41顶部43的氮化物半导体薄膜材料的原子和分子15不是以高概率沿特定方向扩散,而是各向同性地从其被淀积的位置扩散。结果,氮化物半导体薄膜材料的原子或分子15各向同性地迁移或者扩散,且它们的一部分移动到沟槽42中并形成氮化物半导体薄膜。As shown in FIG. 4, when using a processed substrate 46 having an inclination angle of 0.02° or less, that is, almost zero, the direction perpendicular to the top 43 of the ridge 41 and perpendicular to the bottom 44 of the groove 42 is parallel to the crystal Direction <0001>. Furthermore, the three axes respectively aligned with the crystal directions <0001>, <1-100> and <11-20> are perpendicular to each other. In this case, the atoms and molecules 15 of the nitride semiconductor thin film material deposited on the top 43 of the ridge 41 do not diffuse in a specific direction with high probability, but diffuse isotropically from the position where they are deposited. As a result, atoms or molecules 15 of the nitride semiconductor thin film material migrate or diffuse isotropically, and a part of them moves into the trench 42 and forms the nitride semiconductor thin film.

通常,当沟槽12、32和42形成时,它们并不是在整个晶片表面完全均匀地形成的,而是在用于形成光致抗蚀剂图案的光刻工艺中和在用于进行干法刻蚀等的刻蚀工艺中,会发生可归因于工艺的波动。结果,不直的波动边界部分17、37和47可能形成在沟槽12、32和42与脊11、31和41之间的边界,且在沟槽12、31和42的侧部19、39和49与底部14、34和44不垂直处,可能形成波动方形部分18、38和48。Usually, when the grooves 12, 32 and 42 are formed, they are not completely uniformly formed on the entire wafer surface, but are formed during the photolithography process for forming the photoresist pattern and during the dry process. In an etching process such as etching, fluctuations attributable to the process occur. As a result, non-straight undulating boundary portions 17, 37, and 47 may be formed at the boundaries between the grooves 12, 32, and 42 and the ridges 11, 31, and 41, and at the sides 19, 39 of the grooves 12, 31, and 42. Where and 49 are not perpendicular to the bottoms 14, 34 and 44, undulating square portions 18, 38 and 48 may be formed.

当沟槽12、32和42与脊11、31和41由于上述可归因于工艺的波动而在晶片整个表面不均匀形成时,淀积在脊11、31和41顶部13、33和43的氮化物半导体薄膜源材料的原子和分子15迁移或扩散或移动到沟槽12、31和42的程度在整个晶片上不是均匀的,而是不同区域是不同的。即,在晶片上的一些区域,淀积在脊11、31和41顶部13、33和43的氮化物半导体薄膜源材料的原子和分子15更倾向于迁移或扩散或移动到沟槽12、32和42,且在晶片上的其他区域,淀积在脊11、31和41顶部13、33和43的氮化物半导体薄膜源材料的原子和分子15不那么倾向于迁移或扩散或移动到沟槽12、32和42。When the grooves 12, 32, and 42 and the ridges 11, 31, and 41 are formed unevenly over the entire surface of the wafer due to the above-mentioned fluctuations attributable to the process, the The degree to which the atoms and molecules 15 of the nitride semiconductor thin film source material migrate or diffuse or move into the trenches 12, 31 and 42 is not uniform across the wafer but varies from region to region. That is, in some regions on the wafer, the atoms and molecules 15 of the source material of the nitride semiconductor film deposited on the tops 13, 33 and 43 of the ridges 11, 31 and 41 are more likely to migrate or diffuse or move to the grooves 12, 32 and 42, and in other regions on the wafer, the atoms and molecules 15 of the nitride semiconductor thin film source material deposited on the tops 13, 33 and 43 of the ridges 11, 31 and 41 are less inclined to migrate or diffuse or move to the grooves 12, 32 and 42.

如上所述,如果淀积在脊11、31和41顶部13、33和43的氮化物半导体薄膜源材料的原子和分子15迁移或扩散或移动到沟槽12、31和42的程度在整个晶片上不是均匀的,其影响生长在脊11、31和41上的氮化物半导体薄膜的平整度,结果生长在脊11、31和41上的氮化物半导体薄膜的膜厚度在整个晶片上变化,一个区与另一个区显示不同的值。As described above, if the atoms and molecules 15 of the nitride semiconductor thin film source material deposited on the tops 13, 33, and 43 of the ridges 11, 31, and 41 migrate or diffuse or move to the grooves 12, 31, and 42, the entire wafer is not uniform, which affects the flatness of the nitride semiconductor thin film grown on the ridges 11, 31 and 41, and as a result the film thickness of the nitride semiconductor thin film grown on the ridges 11, 31 and 41 varies across the wafer, a zone displays a different value from another zone.

如果生长在脊11、31和41上的氮化物半导体薄膜的厚度如此变化,其对形成在脊11、31和41上的氮化物半导体激光器件有不利影响。图5示出了表示脊上的p层厚度的偏差程度(相应于图20所示的依次设置的p型Al0.3Ga0.7N蒸发防止层206到到p型GaN接触层209的p层的总厚度)的标准偏差σ与成品率之间的关系。图5中的图表示出了当p层厚度的标准偏差σ为0.03μm以下时,实现了90%以上的高成品率,但是当p层厚度的标准偏差σ为0.03μm以上时,成品率急剧下降。If the thickness of the nitride semiconductor thin film grown on the ridges 11, 31 and 41 is so varied, it has an adverse effect on the nitride semiconductor laser device formed on the ridges 11, 31 and 41. FIG. 5 shows the degree of deviation of the p-layer thickness on the ridge (corresponding to the total p-layer thickness of the p-type Al 0.3 Ga 0.7 N evaporation preventing layer 206 to the p-type GaN contact layer 209 arranged in sequence shown in FIG. 20 . Thickness) the relationship between the standard deviation σ and yield. The graph in Fig. 5 shows that when the standard deviation σ of the p-layer thickness is 0.03 μm or less, a high yield of more than 90% is achieved, but when the standard deviation σ of the p-layer thickness is more than 0.03 μm, the yield drops sharply. decline.

上述当p层厚度的标准偏差σ为0.03μm以上时成品率急剧下降的原因是,如果p型GaN引导层207、p型Al0.05Ga0.95N覆盖层208等的厚度变化太大,则当制造氮化物半导体衬底器件结构时,它们的电学和光学特性有变化。此外,如果氮化物半导体激光器件在p层厚度显示大的标准偏差σ的区域中制造时,在通电(energization)过程中会发生电流泄漏。这也导致低成品率。The above-mentioned reason why the yield drops sharply when the standard deviation σ of the p-layer thickness is 0.03 μm or more is that if the thickness of the p-type GaN guide layer 207, the p-type Al 0.05 Ga 0.95 N cladding layer 208, etc. varies too much, when the manufacturing When devices are constructed on nitride semiconductor substrates, their electrical and optical properties change. Furthermore, if the nitride semiconductor laser device is manufactured in a region where the p-layer thickness shows a large standard deviation σ, current leakage occurs during energization. This also results in a low yield.

如上所述,当制造氮化物半导体激光器件时,为了实现高成品率,需要提高生长在脊上的氮化物半导体薄膜的平整度,包括氮化物半导体激光器件将被制造的区域的p层的厚度。为此,本发明的发明人发明了下面两种方法:通过一种方法阻碍氮化物半导体薄膜的源材料的原子或分子15迁移或扩散或移动到沟槽;且通过一种方法有意识地促进氮化物半导体薄膜的源材料的原子或分子15迁移或扩散或移动到沟槽。As described above, when manufacturing a nitride semiconductor laser device, in order to achieve a high yield, it is necessary to improve the flatness of the nitride semiconductor thin film grown on the ridge, including the thickness of the p-layer of the region where the nitride semiconductor laser device is to be manufactured . For this reason, the inventors of the present invention have invented the following two methods: a method by which the atoms or molecules 15 of the source material of the nitride semiconductor thin film are hindered from migrating or diffusing or moving to the trench; and a method by which nitrogen is consciously promoted. The atoms or molecules 15 of the source material of the compound semiconductor thin film migrate or diffuse or move to the trench.

在上述两种方法中,阻碍氮化物半导体薄膜的源材料的原子或分子15迁移或扩散或移动到沟槽的方法涉及通过使用如图3所示的其中晶体方向<0001>和<1-100>均以晶体方向<11-20>为旋转轴旋转或倾斜θa°的衬底而产生处理过的衬底16,即,旋转之后的晶体方向<0001>关于旋转之前的晶体方向<0001>具有θa的倾斜角的衬底,然后在该处理过的衬底上生长氮化物半导体薄膜。已经发现,当氮化物半导体薄膜生长在这种处理过的衬底16上时,淀积在脊11的顶部13上的氮化物半导体薄膜的源材料的原子或分子15更显著的沿基本平行于<1-100>方向,即,沿平行于沟槽2延伸方向而不是沿<11-20>方向的方向迁移或扩散或移动。结果,淀积在脊11顶部13上的氮化物半导体薄膜的源材料的原子或分子15被阻碍迁移或扩散或移动到沟槽12。这样,在脊11的顶部13上,氮化物半导体薄膜形成有好的表面平整度。Among the above two methods, the method of hindering the migration or diffusion or movement of the atoms or molecules 15 of the source material of the nitride semiconductor thin film to the trench involves the use of crystal directions <0001> and <1-100 as shown in FIG. >Substrates each rotated or tilted by θa° around the crystallographic orientation <11-20> as the axis of rotation yields a processed substrate 16, i.e., the crystallographic orientation <0001> after rotation has A substrate with an inclination angle of θa, and then a nitride semiconductor thin film is grown on the processed substrate. It has been found that, when a nitride semiconductor thin film is grown on such a processed substrate 16, the atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on the top 13 of the ridge 11 are more prominently aligned substantially parallel to the <1-100> direction, that is, migration or diffusion or movement in a direction parallel to the extending direction of the trench 2 rather than in the <11-20> direction. As a result, atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on top 13 of ridge 11 are prevented from migrating or diffusing or moving to trench 12 . Thus, on the top 13 of the ridge 11, the nitride semiconductor thin film is formed with good surface flatness.

另一方面,上述两种方法中,其中有意识地促进氮化物半导体薄膜的源材料的原子或分子15迁移或扩散或移动到沟槽的方法涉及通过使用如图3所示、晶体方向<0001>和<11-20>均以晶体方向<1-100>为旋转轴旋转或倾斜θb°的衬底,即旋转之后的晶体方向<0001>关于旋转之前的晶体方向<0001>具有θb倾斜角的衬底而产生处理过的衬底16,然后在该处理过的衬底上生长氮化物半导体薄膜。已经发现,当氮化物半导体薄膜生长在这种处理过的衬底36上时,淀积在脊31的顶部33上的氮化物半导体薄膜的源材料的原子或分子15更显著地沿基本平行于<11-20>方向的方向,即,沿垂直于沟槽延伸方向并平行于脊31顶部33的表面的方向而不是沿<1-100>方向的方向迁移或扩散或移动。结果,淀积在脊11顶部13上的氮化物半导体薄膜的源材料的原子或分子15被大量促进以迁移或扩散或移动到沟槽12。这样,尽管存在波动边界部分37和波动方形部分38,淀积在脊31的顶部33上的氮化物半导体薄膜的源材料的原子或分子15在整个晶片表面均匀地迁移或扩散或移动到沟槽32。这样,在脊11的顶部13,氮化物半导体薄膜形成有好的表面平整度。On the other hand, of the above-mentioned two methods, the method in which the migration or diffusion or movement of atoms or molecules 15 of the source material of the nitride semiconductor thin film to the trench is intentionally promoted involves and <11-20> are both rotated or tilted by θb° around the crystal direction <1-100> as the rotation axis, that is, the crystal direction <0001> after rotation has a θb tilt angle with respect to the crystal direction <0001> before rotation substrate to produce a processed substrate 16, and then a nitride semiconductor thin film is grown on the processed substrate. It has been found that, when a nitride semiconductor thin film is grown on such a processed substrate 36, the atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on the top 33 of the ridge 31 are more remarkably aligned substantially parallel to The direction of the <11-20> direction, that is, migrates or diffuses or moves in a direction perpendicular to the groove extending direction and parallel to the surface of the top 33 of the ridge 31 rather than in the <1-100> direction. As a result, atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on top 13 of ridge 11 are greatly promoted to migrate or diffuse or move to trench 12 . Thus, despite the presence of the undulating boundary portion 37 and the undulating square portion 38, the atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on the top 33 of the ridge 31 uniformly migrate or diffuse over the entire wafer surface or move to the grooves. 32. Thus, on the top 13 of the ridge 11, the nitride semiconductor thin film is formed with good surface flatness.

公知氮化物半导体薄膜例如GaN基半导体薄膜在<11-20>方向比在<1-100>方向生长得快。因此,当处理过的衬底16通过使用其中晶体方向<0001>和<1-100>均以晶体方向<11-20>为旋转轴以θa°旋转的衬底而产生,然后氮化物半导体薄膜生长在该处理过的衬底16上时,上述值θa需要足够大以促进淀积在脊11的顶部13上的氮化物半导体薄膜的源材料的原子或分子15,使之沿基本平行于<1-100>方向即沿沟槽12延伸方向迁移或扩散或移动,并防止淀积在脊11顶部13的氮化物半导体薄膜的源材料的原子或分子15沿平行于<11-20>方向即沿垂直于沟槽2延伸方向的方向迁移或扩散或移动到沟槽12中。It is known that a nitride semiconductor thin film such as a GaN-based semiconductor thin film grows faster in the <11-20> direction than in the <1-100> direction. Therefore, when the processed substrate 16 is produced by using a substrate in which both the crystal directions <0001> and <1-100> are rotated at θa° with the crystal direction <11-20> as the axis of rotation, then the nitride semiconductor thin film When growing on this processed substrate 16, the above-mentioned value θa needs to be large enough to promote the atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on the top 13 of the ridge 11, so that it is substantially parallel to The 1-100> direction migrates or diffuses or moves along the extending direction of the trench 12, and prevents the atoms or molecules 15 of the source material of the nitride semiconductor thin film deposited on the top 13 of the ridge 11 from moving along the direction parallel to the <11-20> direction. Migrate or diffuse or move into the trench 12 in a direction perpendicular to the direction in which the trench 2 extends.

上述倾斜角θa和θb与p层厚度的标准偏差σ之间的关系在图6和7中示出。图6示出了当氮化物半导体激光器件通过使用倾斜角θa的绝对值大于或等于倾斜角θb的绝对值的处理过的衬底而制造时所测量到的倾斜角θa与脊上的p层厚度的标准偏差σ之间的关系。图7示出了当氮化物半导体激光器件通过使用倾斜角θa的绝对值小于或等于倾斜角θb的绝对值的处理过的衬底而制造时所测量到的倾斜角θb与脊上的p层厚度的标准偏差σ之间的关系。沿图6和7的水平轴的符号(+或-)通过任意把与实际采用的晶片相交叉的一个方向当作正而确定;这样,在晶体学术语中,符号+和-是等价的,仅倾斜角θa和θb的绝对值有意义。The relationship between the above-described inclination angles θa and θb and the standard deviation σ of the p-layer thickness is shown in FIGS. 6 and 7 . 6 shows the relationship between the measured inclination angle θa and the p-layer on the ridge when the nitride semiconductor laser device is manufactured by using a processed substrate whose absolute value of the inclination angle θa is greater than or equal to the absolute value of the inclination angle θb. The relationship between the standard deviation σ of the thickness. 7 shows the relationship between the measured inclination angle θb and the p-layer on the ridge when the nitride semiconductor laser device is manufactured by using a processed substrate whose absolute value of the inclination angle θa is less than or equal to the absolute value of the inclination angle θb. The relationship between the standard deviation σ of the thickness. The signs (+ or -) along the horizontal axes of Figures 6 and 7 are determined by arbitrarily treating one direction intersecting the actual wafer used as positive; thus, in crystallographic terms, the signs + and - are equivalent , only the absolute values of the tilt angles θa and θb are meaningful.

图6示出了下列内容。在采用倾斜角θa的绝对值大于或等于倾斜角θb的绝对值的处理过的衬底的情况下,当倾斜角θa的绝对值为0.09°或更大时,p层厚度的标准偏差σ是0.03μm以下,这样氮化物半导体激光器件可以以高成品率制造(见图5)。即使当倾斜角θa的绝对值小于0.09°时,只要倾斜角0a的绝对值大于倾斜角θb绝对值的三倍,且此外倾斜角θa的绝对值大于0.05°,则p层厚度的标准偏差σ是0.03μm或更小。否则,p层厚度的标准偏差σ大于0.03μm;这样,在生长表面不可能获得好的表面平整度,且因此不可能实现高成品率。Fig. 6 shows the following. In the case of using a processed substrate in which the absolute value of the inclination angle θa is greater than or equal to the absolute value of the inclination angle θb, when the absolute value of the inclination angle θa is 0.09° or more, the standard deviation σ of the p-layer thickness is Below 0.03 μm, such nitride semiconductor laser devices can be manufactured with high yield (see Figure 5). Even when the absolute value of the inclination angle θa is less than 0.09°, the standard deviation σ is 0.03 μm or less. Otherwise, the standard deviation σ of the p-layer thickness is greater than 0.03 μm; thus, it is impossible to obtain a good surface flatness on the growth surface, and thus it is impossible to achieve a high yield.

图7示出了如下内容。在采用倾斜角θa的绝对值小于或等于倾斜角θb的绝对值的处理过的衬底的情况下,当倾斜角θb的绝对值为0.2°或更大时,p层厚度的标准偏差σ是0.03μm以下,并且,当倾斜角θb的绝对值小于0.2°时,p层厚度的标准偏差σ大于0.03μm。即,当倾斜角θb的绝对值为0.2°或更大时,可以在生长表面获得好的表面平整度,且氮化物半导体激光器件能以高成品率制造。Fig. 7 shows the following. In the case of using a processed substrate in which the absolute value of the inclination angle θa is smaller than or equal to the absolute value of the inclination angle θb, when the absolute value of the inclination angle θb is 0.2° or more, the standard deviation σ of the p-layer thickness is 0.03 μm or less, and when the absolute value of the inclination angle θb is less than 0.2°, the standard deviation σ of the p-layer thickness is greater than 0.03 μm. That is, when the absolute value of the inclination angle θb is 0.2° or more, good surface flatness can be obtained on the growth surface, and the nitride semiconductor laser device can be manufactured with a high yield.

在通过为倾斜角θb赋予大绝对值而获得好的表面质量的方法中,采用晶体方向<0001>和<11-20>均以晶体方向<1-100>为旋转轴以θb°旋转或倾斜的处理过的衬底36,这样晶体方向<0001>关于垂直于脊31的顶部33的方向以0b°倾斜。这样,原子或分子15沿一个方向迁移或扩散或移动到沟槽32。这样,如图8所示,生长在处理过的衬底36上的氮化物半导体薄膜的表面是倾斜的。图8示出了采用表面水平高度差检测器沿垂直于沟槽32延伸方向的方向(基本上平行于<11-20>方向)跨越生长在处理过的衬底36上的氮化物半导体薄膜表面扫描的结果。图8示出了形成在脊31的顶部33上的氮化物半导体薄膜32表面沿晶体方向倾斜的方向倾斜。然而,脊31的中心部分的高度,即其上形成氮化物半导体激光器件的脊部的提高部分基本上是均匀的,且p层厚度也是均匀的。这样,这些在氮化物半导体激光器件的制造中不会引起问题。顺便提及,在采用晶体方向<0001>和<1-100>均以晶体方向<11-20>为旋转轴以θa°旋转或倾斜的处理过的衬底16时,氮化物半导体薄膜的源材料的原子或分子15被阻碍移动或扩散到沟槽12中,且这样,当氮化物半导体薄膜如上所述生长在处理过的衬底16上时,形成在脊11顶部13上的氮化物半导体薄膜的表面不是倾斜的,而是表面是平坦的。这样,更优选采用晶体方向<0001>和<1-100>均以晶体方向<11-20>为旋转轴以θa°旋转或倾斜的衬底16。In the method of obtaining a good surface quality by assigning a large absolute value to the inclination angle θb, both the crystal directions <0001> and <11-20> are used to rotate or tilt at θb° with the crystal direction <1-100> as the axis of rotation The processed substrate 36 such that the crystal direction <0001> is inclined at 0b° with respect to the direction perpendicular to the top 33 of the ridge 31 . In this way, the atoms or molecules 15 migrate or diffuse or move to the trench 32 in one direction. Thus, as shown in FIG. 8, the surface of the nitride semiconductor thin film grown on the processed substrate 36 is inclined. FIG. 8 shows that a surface level difference detector is used to cross the surface of a nitride semiconductor thin film grown on a processed substrate 36 along a direction perpendicular to the extending direction of the trench 32 (substantially parallel to the <11-20> direction). The result of the scan. FIG. 8 shows that the surface of the nitride semiconductor thin film 32 formed on the top 33 of the ridge 31 is inclined in the direction in which the crystal direction is inclined. However, the height of the central portion of the ridge 31, that is, the raised portion of the ridge on which the nitride semiconductor laser device is formed is substantially uniform, and the p-layer thickness is also uniform. Thus, these do not cause problems in the manufacture of nitride semiconductor laser devices. Incidentally, when using the processed substrate 16 in which both the crystal directions <0001> and <1-100> are rotated or tilted at θa° with the crystal direction <11-20> as the axis of rotation, the source of the nitride semiconductor thin film The atoms or molecules 15 of the material are hindered from moving or diffusing into the groove 12, and thus, when the nitride semiconductor thin film is grown on the processed substrate 16 as described above, the nitride semiconductor formed on the top 13 of the ridge 11 The surface of the film is not inclined, but the surface is flat. Thus, it is more preferable to use the substrate 16 in which both the crystal directions <0001> and <1-100> are rotated or tilted by θa° with the crystal direction <11-20> as the axis of rotation.

在衬底的晶体方向被上述位移矢量C偏移的情况下,即,在衬底的晶体方向以倾斜角θa和θb倾斜的情况下,当倾斜角θa的平方与倾斜角θb的平方之和的平方根为0.2°以上时,生长在处理过的衬底上的氮化物半导体薄膜具有好的表面平整度。In the case where the crystal orientation of the substrate is shifted by the displacement vector C described above, that is, in the case where the crystal orientation of the substrate is inclined at the inclination angles θa and θb, when the sum of the square of the inclination angle θa and the square of the inclination angle θb When the square root of is 0.2° or more, the nitride semiconductor thin film grown on the processed substrate has good surface flatness.

上述描述涉及沟槽12、32或42沿平行或基本平行于<1-100>方向延伸的情况,但在沟槽12、32或42沿平行或基本平行于<11-20>方向延伸的情况下也可以得到类似的优点。即使在凹陷区不但沿平行或基本平行于<1-100>方向形成,如沟槽12、32或42,而且沿平行或基本平行于<11-20>方向形成,使得沟槽形成为格子形的情况下,也可能在脊上形成具有好的表面平整度的氮化物半导体薄膜。在这种情况下,优选设置倾斜角θa和θb使得淀积在脊上的氮化物半导体薄膜的源材料的原子或分子沿被沟槽彼此分隔的脊的长边扩散或移动。The above description refers to the case where the groove 12, 32 or 42 extends parallel or substantially parallel to the <1-100> direction, but in the case where the groove 12, 32 or 42 extends parallel or substantially parallel to the <11-20> direction Similar advantages can also be obtained below. Even if the recessed area is not only formed parallel or substantially parallel to the <1-100> direction, such as grooves 12, 32 or 42, but also formed parallel or substantially parallel to the <11-20> direction, so that the grooves are formed in a lattice shape In the case of ridges, it is also possible to form a nitride semiconductor thin film with good surface flatness on the ridges. In this case, it is preferable to set the inclination angles θa and θb so that atoms or molecules of the source material of the nitride semiconductor thin film deposited on the ridges diffuse or move along the long sides of the ridges separated from each other by the trenches.

通过如上所述改变衬底的晶体方向的倾斜角,可能在生长于脊上的氮化物半导体薄膜上获得好的表面平整度。By changing the inclination angle of the crystal direction of the substrate as described above, it is possible to obtain good surface flatness on the nitride semiconductor thin film grown on the ridge.

当上述衬底的晶体方向的倾斜仅包含倾斜角θa或θb或者同时包含倾斜角θa和θb时,即使当每个倾斜角都设置为小于0.05°时,在实际上也难以将每个衬底都制造具有小于0.05°的倾角。通常,采用解理(cleavage)来制造激光发射端表面。然而,解理发生在例如沿垂直于{0001}平面的矢量方向的{11-20}或{1-100}平面内,且这样端部表面是倾斜的。这样,将倾斜角设置为4°以上使得芯片难以裂开。因此,优选倾斜角即衬底的晶体方向的倾斜角为0.05°以上,但在4°以下。When the inclination of the crystal direction of the above-mentioned substrate includes only the inclination angle θa or θb or both inclination angles θa and θb, even when each inclination angle is set to be less than 0.05°, it is practically difficult to make each substrate Both are fabricated with an inclination angle of less than 0.05°. Typically, cleavage is used to fabricate the laser emitting end surface. However, cleavage occurs in, for example, the {11-20} or {1-100} plane along the vector direction perpendicular to the {0001} plane, and thus the end surface is inclined. In this way, setting the inclination angle to 4° or more makes it difficult for the chip to crack. Therefore, it is preferable that the inclination angle, that is, the inclination angle of the crystal orientation of the substrate, is not less than 0.05° but not more than 4°.

范例1Example 1

接着,将参照相关附图描述第一实施例的实际范例。应该理解,虽然下面提出的范例涉及作为氮化物半导体器件范例的氮化物半导体激光器件,但本发明适用于任何其他类型的氮化物半导体器件。图11A是示意性地示出本范例的氮化物半导体激光器件的截面图,且图11B是图11A的俯视图。图9B是示意性地示出在第一实施例的范例中在氮化物半导体薄膜生长于其上之前的处理过的衬底90,且图9A是图9B的俯视图。在图9A、9B和11A、11B中,平面方向一起示出,并假设倾斜角等于零。在图9A和9B所示的处理过的衬底90上,设置例如如图20所示构造的氮化物半导体多层膜4,以制造如图11所示的氮化物半导体激光器件。Next, a practical example of the first embodiment will be described with reference to the relevant drawings. It should be understood that although the examples presented below relate to a nitride semiconductor laser device as an example of a nitride semiconductor device, the present invention is applicable to any other type of nitride semiconductor device. FIG. 11A is a cross-sectional view schematically showing the nitride semiconductor laser device of the present example, and FIG. 11B is a plan view of FIG. 11A . FIG. 9B is a diagram schematically showing the processed substrate 90 before the nitride semiconductor thin film is grown thereon in the example of the first embodiment, and FIG. 9A is a plan view of FIG. 9B . In Figures 9A, 9B and 11A, 11B, the planar directions are shown together and it is assumed that the tilt angle is equal to zero. On the processed substrate 90 shown in FIGS. 9A and 9B , for example, a nitride semiconductor multilayer film 4 structured as shown in FIG. 20 is provided to manufacture a nitride semiconductor laser device as shown in FIG. 11 .

首先,处理过的衬底90通过与上述处理过的衬底16、36和46相同的方式制造。然而,此处用于制造处理过的衬底90的是具有-0.35°倾斜角θa和-0.02°倾斜角θb的衬底。沟槽91形成有5μm的开口宽度W,5μm的深度Y以及相邻沟槽91之间350μm的周期。First, a processed substrate 90 is fabricated in the same manner as the above-described processed substrates 16, 36, and 46. However, what is used here to manufacture the processed substrate 90 is a substrate having an off angle θa of -0.35° and an off angle θb of -0.02°. The grooves 91 are formed with an opening width W of 5 μm, a depth Y of 5 μm, and a period between adjacent grooves 91 of 350 μm.

在如此制造的处理过的衬底90上,通过适当使用常规公知技术例如MOCVD,设置了由如图20所示的多个氮化物半导体薄膜构成的氮化物半导体多层膜4。此处,首先,n型GaN层200在1075℃生长温度和1200的源材料V/III比(即,包含V族原子的源材料的单位时间摩尔数供应流速与包含III族原子的源材料的单位时间摩尔数供应流速之比)条件下生长。接着,在1075℃生长温度下,依次设置下述层:n型Al0.05Ga0.95N的第一覆盖层201、n型Al0.08Ga0.92N的第二覆盖层202、n型Al0.05Ga0.95N的第三覆盖层203和n型GaN引导层204。接着在顶上,下述层按其命名顺序依次设置:有源层205、p型Al0.3Ga0.7N蒸发防止层206、p型GaN引导层207、p型Al0.05Ga0.95N覆盖层208和p型GaN接触层209。此处,有源层205在约800℃生长温度下生长,且p型Al0.3Ga0.7N蒸发防止层206、p型GaN引导层207、p型Al0.05Ga0.95N覆盖层208和p型GaN接触层209在约1030℃生长温度下生长。On processed substrate 90 thus produced, nitride semiconductor multilayer film 4 composed of a plurality of nitride semiconductor thin films as shown in FIG. 20 is provided by appropriately using conventionally known techniques such as MOCVD. Here, first, the n-type GaN layer 200 is grown at a growth temperature of 1075° C. and a source material V/III ratio of 1200 (that is, the supply flow rate of the moles of the source material containing V group atoms per unit time versus that of the source material containing Group III atoms The ratio of the number of moles per unit time to the flow rate) grows under the condition. Next, at a growth temperature of 1075°C, the following layers are sequentially provided: the first cladding layer 201 of n-type Al 0.05 Ga 0.95 N, the second cladding layer 202 of n-type Al 0.08 Ga 0.92 N, the n-type Al 0.05 Ga 0.95 N The third cladding layer 203 and the n-type GaN guiding layer 204. Next on top, the following layers are arranged in order of their names: active layer 205, p-type Al 0.3 Ga 0.7 N evaporation preventing layer 206, p-type GaN guiding layer 207, p-type Al 0.05 Ga 0.95 N cladding layer 208 and p-type GaN contact layer 209 . Here, the active layer 205 is grown at a growth temperature of about 800° C., and the p-type Al 0.3 Ga 0.7 N evaporation preventing layer 206, the p-type GaN guiding layer 207, the p-type Al 0.05 Ga 0.95 N capping layer 208, and the p-type GaN The contact layer 209 is grown at a growth temperature of about 1030°C.

这样,在具有形成于其上的沟槽91和脊92的处理过的衬底90上,设置包括多个氮化物半导体薄膜的氮化物半导体多层膜4。此处,沟槽91的开口宽度等不限于上述提出的具体值。然而,如果沟槽91的开口宽度X小于3μm,当氮化物半导体多层膜4形成时,沟槽91容易被填充。这不仅阻碍出现在氮化物半导体多层膜4内部的应变的释放,而且引起淀积在脊92上的氮化物半导体薄膜的源材料的原子或分子迁移或扩散或移动到沟槽91中。这样,设置在脊92上的氮化物半导体多层膜4不期望地具有差的表面平整度。类似地,如果沟槽91的深度Y小于1.5μm,当氮化物半导体多层膜4形成时,沟槽91不期望地容易被填满。这样,优选沟槽91的开口宽度X为3μm以上,且沟槽91的开口深度Y为1.5μm以上。此外,如果形成在处理过的衬底90上的氮化物半导体多层膜4的总层厚大于沟槽91深度Y的两倍,当氮化物半导体多层膜4设置在处理过的衬底90上时,沟槽91不期望地容易被填满。这样,优选沟槽91的深度Y大于形成在处理过的衬底90上的氮化物半导体多层膜4的总厚度的一半。Thus, on processed substrate 90 having grooves 91 and ridges 92 formed thereon, nitride semiconductor multilayer film 4 including a plurality of nitride semiconductor thin films is provided. Here, the opening width and the like of the groove 91 are not limited to the specific values set forth above. However, if the opening width X of trench 91 is smaller than 3 μm, trench 91 is easily filled when nitride semiconductor multilayer film 4 is formed. This not only hinders the release of strain occurring inside nitride semiconductor multilayer film 4 but also causes atoms or molecules of the source material of the nitride semiconductor thin film deposited on ridge 92 to migrate or diffuse or move into trench 91 . Thus, nitride semiconductor multilayer film 4 disposed on ridge 92 undesirably has poor surface flatness. Similarly, if the depth Y of the trench 91 is less than 1.5 μm, the trench 91 is undesirably easily filled up when the nitride semiconductor multilayer film 4 is formed. In this way, it is preferable that the opening width X of the groove 91 is 3 μm or more, and the opening depth Y of the groove 91 is 1.5 μm or more. In addition, if the total layer thickness of the nitride semiconductor multilayer film 4 formed on the processed substrate 90 is greater than twice the depth Y of the trench 91, when the nitride semiconductor multilayer film 4 is disposed on the processed substrate 90 When on, the groove 91 is undesirably easy to be filled. Thus, it is preferable that the depth Y of the trench 91 is greater than half the total thickness of the nitride semiconductor multilayer film 4 formed on the processed substrate 90 .

此外,如果沿基本平行于<11-20>方向的方向上,即沿垂直于沟槽91的延伸方向且平行于脊92表面的方向上所测的位于相邻沟槽91之间的脊92的宽度小于100μm,则出现在氮化物半导体多层膜4中的应变不被释放,导致裂纹的产生,而且还难于在脊92上制造氮化物半导体激光器件。另一方面,如果脊92的宽度大于2000μm,它们不再防止在氮化物半导体多层膜4中的裂纹的产生。这样,优选脊92的宽度为100μm以上但在2000μm以下。In addition, if the ridge 92 between adjacent grooves 91 is measured along the direction substantially parallel to the <11-20> direction, that is, along the direction perpendicular to the extending direction of the groove 91 and parallel to the surface of the ridge 92 If the width is less than 100 μm, the strain occurring in the nitride semiconductor multilayer film 4 is not released, resulting in the generation of cracks, and it is also difficult to manufacture a nitride semiconductor laser device on the ridge 92 . On the other hand, if the width of ridges 92 is larger than 2000 μm, they no longer prevent the generation of cracks in nitride semiconductor multilayer film 4 . Thus, it is preferable that the width of the ridge 92 is 100 μm or more and 2000 μm or less.

在氮化物半导体多层膜4中,n型GaN层200(见图20)与AlGaN或其他层相比,更容易迁移或扩散或移动。因此,如果n型GaN层200的层厚大于0.5μm,生长在脊92上的n型GaN层200更容易流入沟槽91中。而且,随后氮化物半导体多层膜4的总层厚更大,结果沟槽91容易被氮化物半导体多层膜4填充。这样,优选n型GaN层200的层厚为0.5μm以下。考虑到迁移,优选n型GaN层200的层厚为0μm,即,生长从n型Al0.05Ga0.95N第一覆盖层201开始。In the nitride semiconductor multilayer film 4, the n-type GaN layer 200 (see FIG. 20) migrates or diffuses or moves more easily than AlGaN or other layers. Therefore, if the layer thickness of n-type GaN layer 200 is greater than 0.5 μm, n-type GaN layer 200 grown on ridge 92 flows into trench 91 more easily. Also, the total layer thickness of nitride semiconductor multilayer film 4 is larger subsequently, with the result that trench 91 is easily filled with nitride semiconductor multilayer film 4 . Thus, the thickness of the n-type GaN layer 200 is preferably 0.5 μm or less. In consideration of migration, the thickness of the n-type GaN layer 200 is preferably 0 μm, that is, the growth starts from the n-type Al 0.05 Ga 0.95 N first cladding layer 201 .

已经发现,当设置由多个氮化物半导体薄膜组成的氮化物半导体多层膜4时,氮化物半导体薄膜的源材料的原子或分子迁移或扩散或移动的难易随着各个氮化物半导体薄膜生长所处的生长条件而变化。为了获得生长在脊92上的氮化物半导体多层膜4的表面的好的平整度,各个氮化物半导体薄膜需要在防止氮化物半导体薄膜的源材料的原子或分子的迁移的条件下生长。优选作为这种生长条件的是处理过的衬底的表面温度为1050℃以下,且V/III比(包含V族原子的源材料的单位时间的摩尔供应流速与包含III族原子的源材料的单位时间的摩尔供应流速之比)为2250以上。It has been found that when the nitride semiconductor multilayer film 4 composed of a plurality of nitride semiconductor thin films is provided, the ease of migration or diffusion or movement of atoms or molecules of source materials of the nitride semiconductor thin films increases with the growth of the individual nitride semiconductor thin films. vary with growing conditions. In order to obtain good flatness of the surface of nitride semiconductor multilayer film 4 grown on ridge 92, each nitride semiconductor thin film needs to be grown under conditions preventing migration of atoms or molecules of the source material of the nitride semiconductor thin film. Preferable as such growth conditions are that the surface temperature of the treated substrate is 1050° C. or lower, and the V/III ratio (the molar supply flow rate per unit time of the source material containing group V atoms to that of the source material containing group III atoms) Molar supply flow rate ratio per unit time) is 2250 or more.

测量了上述具有形成在其上的氮化物半导体多层膜4的处理过的衬底90的表面的表面平整度。沿基本上平行于<1-100>方向即沿平行于沟槽91延伸方向的方向所测量的表面平整度的测量结果在图10中示出。测量是在脊92的中心部分进行的。此处,如同将从图10的图表中理解的,在所测量的600μm宽度区域范围内,表面的最高和最低部分的水平高度差为约20nm,且因此与在处理过的衬底6通过使用具有几乎零(0.02°或更小)倾斜角的晶片而制造然后在其上生长氮化物半导体多层膜4的情况下获得的测量结果(300nm)相比是非常小的。这样,获得了好的表面平整度。The surface flatness of the surface of the above-mentioned processed substrate 90 having nitride semiconductor multilayer film 4 formed thereon was measured. Measurement results of surface flatness measured in a direction substantially parallel to the <1-100> direction, ie, in a direction parallel to the extending direction of the groove 91 are shown in FIG. 10 . Measurements are made at the central portion of the ridge 92 . Here, as will be understood from the graph of FIG. 10 , within the measured 600 μm width region, the difference in level between the highest and lowest parts of the surface is about 20 nm, and is therefore comparable to that seen in the processed substrate 6 by using The measurement results (300 nm) obtained in the case where a wafer having an almost zero (0.02° or less) tilt angle was fabricated and then grown thereon the nitride semiconductor multilayer film 4 were very small. In this way, good surface flatness is obtained.

此外,通过如上所述在处理过的衬底90上形成氮化物半导体多层膜4,制造了图11A和11B所示的氮化物半导体激光器件。该氮化物半导体激光器件具有用作激光波导的激光条93和设置成将激光条93夹在中间的用于电流限制(current constriction)的SiO2膜94,它们位于在处理过的衬底90的脊92上所形成的氮化物半导体多层膜4的表面上,其中该处理过的衬底90具有形成于其上的沟槽91。然后,在激光条93和SiO2膜94的表面上,形成p侧电极95,且在处理过的衬底90的底表面上形成n型电极96。形成在p侧电极95表面上的直接位于激光条93上的升高部分称为条纹97。Further, by forming the nitride semiconductor multilayer film 4 on the processed substrate 90 as described above, the nitride semiconductor laser device shown in FIGS. 11A and 11B was fabricated. This nitride semiconductor laser device has a laser bar 93 serving as a laser waveguide and a SiO2 film 94 for current constriction disposed to sandwich the laser bar 93, which are located on a processed substrate 90. On the surface of the nitride semiconductor multilayer film 4 formed on the ridge 92, the processed substrate 90 has the groove 91 formed thereon. Then, on the surfaces of the laser bar 93 and the SiO 2 film 94 , a p-side electrode 95 is formed, and an n-type electrode 96 is formed on the bottom surface of the processed substrate 90 . The raised portion directly on the laser bar 93 formed on the surface of the p-side electrode 95 is called a stripe 97 .

与上述类似的具有脊结构的氮化物半导体激光器件可以通过首先在处理过的衬底90上设置氮化物半导体多层膜4然后适当使用常规公知技术而制造,因此将不给出其制造方法等的详细描述。然后,通过在处理过的衬底90(晶片)上设置氮化物半导体多层膜4而如此制造的多个氮化物半导体激光器件可以被分为单个器件。此处,首先,一部分处理过的衬底90被除去使得晶片具有约100μm厚度。然后,作为n型电极96,在处理过的衬底90底表面上,Hf/Al层从处理过的衬底90一侧按此序形成。接着,晶片被沿着基本平行于<11-20>方向即垂直于沟槽91延伸方向且平行于脊92表面的方向解理以形成谐振腔端面。这样,制造了每个都设置有多个氮化物半导体激光器件的条(bar)(未示出)。在此范例中,氮化物半导体的解理面是{11-20}平面,并以θa°倾斜角倾斜。这引起晶片将难于解理且难于获得好的解理表面的担心。然而,实际证明,只要倾斜角为4°以下,就可以获得好到足以用作氮化物半导体激光器件解理面的解理表面。此处,优选氮化物半导体激光器件的谐振腔长度为300μm以上但在1200μm以下。在此范例中,谐振腔长度为600μm。此外,在如上所述通过解理晶片形成的谐振腔端面上,SiO2和TiO2电介质膜通过电子束淀积等交替气相淀积以形成电介质多层膜。这些电介质多层膜的材料不限于SiO2/TiO2,而是可以为SiO2/Al2O3等。n型电极96的材料不限于那些上面具体提到的,而是可以为Hf/Al/Mo/Au、Hf/Al/Pt/Au、Hf/Al/W/Au、Hf/Au、Hf/Mo/Au等。A nitride semiconductor laser device having a ridge structure similar to the above can be manufactured by first disposing a nitride semiconductor multilayer film 4 on a processed substrate 90 and then appropriately using a conventionally known technique, and thus its manufacturing method etc. will not be given a detailed description of . Then, a plurality of nitride semiconductor laser devices thus manufactured by disposing nitride semiconductor multilayer film 4 on processed substrate 90 (wafer) can be divided into individual devices. Here, first, a part of the processed substrate 90 was removed so that the wafer had a thickness of about 100 μm. Then, as n-type electrode 96, on the bottom surface of treated substrate 90, an Hf/Al layer was formed in this order from the treated substrate 90 side. Next, the wafer is cleaved along a direction substantially parallel to the <11-20> direction, ie, perpendicular to the extending direction of the grooves 91 and parallel to the surface of the ridge 92, to form resonant cavity end faces. In this way, bars (not shown) each provided with a plurality of nitride semiconductor laser devices were manufactured. In this example, the cleavage plane of the nitride semiconductor is a {11-20} plane and is inclined at an off angle of θa°. This raises concerns that the wafer will be difficult to cleave and to obtain a good cleaved surface. However, it has actually been proved that as long as the inclination angle is 4° or less, a cleaved surface good enough to be used as a cleaved surface of a nitride semiconductor laser device can be obtained. Here, it is preferable that the cavity length of the nitride semiconductor laser device is 300 μm or more and 1200 μm or less. In this example, the cavity length is 600 μm. Furthermore, on the resonator end faces formed by cleaving the wafer as described above, SiO 2 and TiO 2 dielectric films are alternately vapor-deposited by electron beam deposition or the like to form dielectric multilayer films. The material of these dielectric multilayer films is not limited to SiO 2 /TiO 2 , but may be SiO 2 /Al 2 O 3 or the like. The material of the n-type electrode 96 is not limited to those specifically mentioned above, but may be Hf/Al/Mo/Au, Hf/Al/Pt/Au, Hf/Al/W/Au, Hf/Au, Hf/Mo /Au etc.

在与图11所示的类似的氮化物半导体激光器件中,p侧电极95从氮化物半导体多层膜4一侧由例如Mo/Au或Mo/Pt/Au形成,或者由单层Au形成。在此范例中,SiO2膜94用作用于电流限制的绝缘层;取代地,可以采用任何其他的绝缘材料例如ZrO、TiO2或Si3N4In a nitride semiconductor laser device similar to that shown in FIG. 11, the p-side electrode 95 is formed of, for example, Mo/Au or Mo/Pt/Au, or a single layer of Au from the nitride semiconductor multilayer film 4 side. In this example, the SiO 2 film 94 is used as an insulating layer for current confinement; instead, any other insulating material such as ZrO, TiO 2 or Si 3 N 4 may be used.

然后如此制造的条被分割成芯片以获得单个的氮化物半导体激光器件。由于此分割是通过常规公知技术进行的,因此将不给出其详细描述。The bars thus manufactured are then singulated into chips to obtain individual nitride semiconductor laser devices. Since this division is performed by conventionally known techniques, no detailed description thereof will be given.

在如此制造的氮化物半导体激光器件中,没有观察到裂纹的发生。此外,从制造的本范例的多个氮化物半导体激光器件中,随机抽取100个氮化物半导体激光器件,并测量了沿水平和垂直方向的它们的FFP(远场图案,far-fieldpattern)的FWHM(半极大值全宽,full width at half maximum)。此处,其实际FFP FWHM在设计值的±1度范围的氮化物半导体激光器件被算作是无缺陷的。结果是94个氮化物半导体激光器件满足其FFP的FWHM的要求,显示了很高的成品率。In the nitride semiconductor laser device thus manufactured, the occurrence of cracks was not observed. In addition, from among the plurality of nitride semiconductor laser devices manufactured in this example, 100 nitride semiconductor laser devices were randomly selected, and the FWHM of their FFP (far-field pattern) in the horizontal and vertical directions was measured. (Full width at half maximum, full width at half maximum). Here, a nitride semiconductor laser device whose actual FFP FWHM is within ±1 degree of the design value is counted as defect-free. The result was 94 nitride semiconductor laser devices meeting the FWHM requirements of their FFP, showing a high yield.

如上所述,通过在具有θa和θb倾斜角的处理过的衬底90上生长多个氮化物半导体薄膜而形成氮化物半导体多层膜4,可能减少p层厚度的变化并因此在氮化物半导体薄膜上获得好的平整度,也可能抑制裂纹的产生且因此以高成品率制造具有满意特性的氮化物半导体激光器件。As described above, by forming the nitride semiconductor multilayer film 4 by growing a plurality of nitride semiconductor thin films on the processed substrate 90 having the off angles of θa and θb, it is possible to reduce the variation in the thickness of the p layer and thus reduce the variation in the thickness of the nitride semiconductor It is also possible to suppress the generation of cracks by obtaining good flatness on the thin film and thus manufacture a nitride semiconductor laser device with satisfactory characteristics at a high yield.

范例2Example 2

在此范例中,处理过的衬底以与范例1相同的方法制造。不同之处在于:用于制造处理过的衬底的衬底具有-0.05的倾斜角θa和-0.39°的倾斜角θb;沟槽的开口宽度为80μm;且相邻沟槽之间的间距为300μm。在其他方面,氮化物半导体激光器件以与范例1相同的方式制造。In this example, processed substrates were fabricated in the same manner as in Example 1. The difference is that: the substrate used to manufacture the processed substrate has an inclination angle θa of -0.05 and an inclination angle θb of -0.39°; the opening width of the trench is 80 μm; and the spacing between adjacent trenches is 300 μm. In other respects, a nitride semiconductor laser device was fabricated in the same manner as in Example 1.

在此范例中,如范例1一样,在氮化物半导体多层膜4设置在处理过的衬底上以后,测量了形成在脊上的氮化物半导体多层膜4的表面的表面平整度。在所测量的600μm宽度区域中,表面的最高和最低部分之间的水平高度差为24nm,且这样获得了好的表面平整度。In this example, as in Example 1, after the nitride semiconductor multilayer film 4 was provided on the processed substrate, the surface flatness of the surface of the nitride semiconductor multilayer film 4 formed on the ridge was measured. In the measured 600 μm wide area, the level difference between the highest and lowest parts of the surface was 24 nm, and a good surface flatness was obtained in this way.

此外,从本范例制造的多个氮化物半导体激光器件中,随机抽取100个氮化物半导体激光器件,并测量了它们沿水平和垂直方向的FFP(远场图案)的FWHM(半极大值全宽)。此处,其实际FFP FWHM在设计值的±1度范围的氮化物半导体激光器件被算作是无缺陷的。结果是91个氮化物半导体激光器件满足其FFP的FWHM的要求,显示了很高的成品率。In addition, from a plurality of nitride semiconductor laser devices manufactured in this example, 100 nitride semiconductor laser devices were randomly selected, and their FWHM (full half maximum value) of FFP (far field pattern) along the horizontal and vertical directions were measured. Width). Here, a nitride semiconductor laser device whose actual FFP FWHM is within ±1 degree of the design value is counted as defect-free. The result was 91 nitride semiconductor laser devices meeting the FWHM requirements of their FFP, showing a high yield.

范例3Example 3

在此范例中,处理过的衬底以与范例1相同的方法制造。不同之处在于:用于制造处理过的衬底的衬底具有0.21°的倾斜角θa和-0.21°的倾斜角θb。在其他方面,氮化物半导体激光器件以与范例1相同的方式制造。In this example, processed substrates were fabricated in the same manner as in Example 1. The difference is that the substrate used to manufacture the processed substrate has an inclination angle θa of 0.21° and an inclination angle θb of -0.21°. In other respects, a nitride semiconductor laser device was fabricated in the same manner as in Example 1.

在此范例中,如范例1一样,在氮化物半导体多层膜4设置在处理过的衬底上以后,测量了形成在脊上的氮化物半导体多层膜4的表面的表面平整度。在所测量的600μm宽度区域中,表面的最高和最低部分之间的水平高度差为10nm,因而获得了好的表面平整度。In this example, as in Example 1, after the nitride semiconductor multilayer film 4 was provided on the processed substrate, the surface flatness of the surface of the nitride semiconductor multilayer film 4 formed on the ridge was measured. In the measured 600 μm wide area, the level difference between the highest and lowest parts of the surface was 10 nm, thus achieving good surface flatness.

此外,从本范例制造的多个氮化物半导体激光器件中,随机抽取100个氮化物半导体激光器件,并测量了它们沿水平和垂直方向的FFP(远场图案)的FWHM(半极大值全宽)。此处,其实际FFP FWHM在设计值的±1度范围的氮化物半导体激光器件被算作是无缺陷的。结果是97个氮化物半导体激光器件满足其FFP的FWHM的要求,显示了很高的成品率。In addition, from a plurality of nitride semiconductor laser devices manufactured in this example, 100 nitride semiconductor laser devices were randomly selected, and their FWHM (full half maximum value) of FFP (far field pattern) along the horizontal and vertical directions were measured. Width). Here, a nitride semiconductor laser device whose actual FFP FWHM is within ±1 degree of the design value is counted as defect-free. The result was 97 nitride semiconductor laser devices meeting the FWHM requirements of their FFP, showing a high yield.

范例4Example 4

在此范例中,处理过的衬底以与范例1相同的方法制造。不同之处在于:用于制造处理过的衬底的衬底具有0.10°的倾斜角θa和-0.02°的倾斜角θb;在构成氮化物半导体多层膜4的各层中,n型GaN层200、n型Al0.05Ga0.95N第一覆盖层201、n型Al0.08Ga0.92N第二覆盖层202、n型Al0.05Ga0.95N第三覆盖层203和n型GaN引导层204在1030℃的生长温度下生长;且n型GaN层200和n型GaN引导层204在源材料的V/III比为4500的条件下生长。在其他方面,氮化物半导体激光器件以与范例1相同的方式制造。In this example, processed substrates were fabricated in the same manner as in Example 1. The difference is that: the substrate used to manufacture the processed substrate has an inclination angle θa of 0.10° and an inclination angle θb of -0.02°; among the layers constituting the nitride semiconductor multilayer film 4, the n-type GaN layer 200. n-type Al 0.05 Ga 0.95 N first cladding layer 201, n-type Al 0.08 Ga 0.92 N second cladding layer 202, n-type Al 0.05 Ga 0.95 N third cladding layer 203 and n-type GaN guide layer 204 at 1030°C and the n-type GaN layer 200 and the n-type GaN guiding layer 204 are grown under the condition that the V/III ratio of the source material is 4500. In other respects, a nitride semiconductor laser device was fabricated in the same manner as in Example 1.

在此范例中,如范例1一样,在氮化物半导体多层膜4设置在处理过的衬底上以后,测量了形成在脊上的氮化物半导体多层膜4的表面的表面平整度。在所测量的600μm宽的区域中,表面的最高和最低部分之间的水平高度差为28nm,且这样获得了好的表面平整度。In this example, as in Example 1, after the nitride semiconductor multilayer film 4 was provided on the processed substrate, the surface flatness of the surface of the nitride semiconductor multilayer film 4 formed on the ridge was measured. In the measured 600 μm wide area, the level difference between the highest and lowest parts of the surface was 28 nm, and a good surface flatness was obtained in this way.

此外,从本范例制造的多个氮化物半导体激光器件中,随机抽取100个氮化物半导体激光器件,并测量了它们沿水平和垂直反向的FFP(远场图案)的FWHM(半极大值全宽)。此处,其实际FFP FWHM在设计值的±1度范围的氮化物半导体激光器件被算作是无缺陷的。结果是90个氮化物半导体激光器件满足其FFP的FWHM的要求,显示了很高的成品率。In addition, from a plurality of nitride semiconductor laser devices manufactured in this example, 100 nitride semiconductor laser devices were randomly selected, and their FWHM (half-maximum value) of FFP (far-field pattern) along horizontal and vertical inversions were measured. full width). Here, a nitride semiconductor laser device whose actual FFP FWHM is within ±1 degree of the design value is counted as defect-free. The result was 90 nitride semiconductor laser devices meeting the FWHM requirements of their FFP, showing a high yield.

如上所述,在此范例中,衬底的倾斜角比范例1到3中的小。然而,在构成氮化物半导体多层膜4的各层中,n型GaN层200、n型Al0.05Ga0.95N第一覆盖层201、n型Al0.08Ga0.92N第二覆盖层202、n型Al0.05Ga0.95N第三覆盖层203和n型GaN引导层204在阻碍迁移的条件下生长。这有助于以高成品率制造具有满意特性的氮化物半导体激光器件。As described above, in this example, the inclination angle of the substrate was smaller than that in examples 1 to 3. However, among the layers constituting the nitride semiconductor multilayer film 4, the n-type GaN layer 200, the n-type Al 0.05 Ga 0.95 N first cladding layer 201, the n-type Al 0.08 Ga 0.92 N second cladding layer 202, the n-type The third cladding layer 203 of Al 0.05 Ga 0.95 N and the n-type GaN guide layer 204 are grown under the condition of hindering migration. This contributes to the manufacture of nitride semiconductor laser devices with satisfactory characteristics at a high yield.

第二实施例second embodiment

沟槽的形成trench formation

图12A是示意性地示出围绕具有设置于其上的氮化物半导体多层膜的处理过的衬底的沟槽的部分的透视图,且图12B是沿图12A所示的线A-A所取的截面图。参考标号120表示处理过的衬底,参考标号121表示氮化物半导体多层膜,且参考标号122表示沟槽。12A is a perspective view schematically showing a portion of a trench surrounding a processed substrate having a nitride semiconductor multilayer film disposed thereon, and FIG. 12B is taken along the line A-A shown in FIG. 12A cross-sectional view. Reference numeral 120 denotes a processed substrate, reference numeral 121 denotes a nitride semiconductor multilayer film, and reference numeral 122 denotes a trench.

在此实施例中,采用表面为C平面(0001)的氮化物半导体衬底。首先,在氮化物半导体衬底的整个表面上,SiO2等(未示出)通过溅射而气相淀积为具有1μm的膜厚。SiO2等的膜可以通过其他方法例如电子束气相淀积或等离子体CVD而形成。In this embodiment, a nitride semiconductor substrate whose surface is C-plane (0001) is used. First, on the entire surface of the nitride semiconductor substrate, SiO 2 or the like (not shown) is vapor-deposited by sputtering to have a film thickness of 1 μm. A film of SiO 2 or the like can be formed by other methods such as electron beam vapor deposition or plasma CVD.

接着,通过通常的光刻工艺,抗蚀剂设置为沿[1-100]方向具有5μm宽度(在图12中以W表示)的条形窗口和250μm周期(在图12B中以T表示)的图案。此周期T依赖于半导体激光芯片的宽度;具体地,当芯片具有200μm宽度时,周期T设为200μm。然后,通过ICP(感应耦合等离子,inductively coupled plasma)、RIE(反应离子刻蚀,reactive ion etching)等,SiO2被蚀刻从而以5μm宽度暴露氮化物半导体衬底的表面,且因此形成用于在氮化物半导体衬底上形成沟槽的SiO2掩模。然后,氮化物半导体衬底被刻蚀以形成沟槽122。这样,具有形成在其上的沟槽的氮化物半导体衬底被称为处理过的衬底120。Next, through a common photolithography process, the resist is set as a strip window with a width of 5 μm (indicated by W in FIG. 12 ) and a period of 250 μm (indicated by T in FIG. 12B ) along the [1-100] direction. pattern. This period T depends on the width of the semiconductor laser chip; specifically, when the chip has a width of 200 μm, the period T is set to 200 μm. Then, by ICP (inductively coupled plasma), RIE (reactive ion etching, reactive ion etching) or the like, SiO 2 is etched to expose the surface of the nitride semiconductor substrate in a width of 5 μm, and thus formed for A SiO 2 mask for trench formation on a nitride semiconductor substrate. Then, the nitride semiconductor substrate is etched to form trenches 122 . As such, a nitride semiconductor substrate having trenches formed thereon is referred to as a processed substrate 120 .

沟槽122的深度(在图12B中以D表示)为例如5μm。此处,优选沟槽122的深度D为2μm以上但在20μm以下。如果深度D小于2μm,沟槽122可能被氮化物半导体多层膜121填充。如果沟槽122被填充,裂纹可能产生,在表面内层厚可能变得不均匀,而且产生其他问题。然而,如果氮化物半导体多层膜121的总层厚为4μm以下,只要包括两端的深度D在从1μm到2μm范围内,就可能防止裂纹并保持平整。在另一方面,如果深度D大于20μm,在光刻和抛光工艺中会产生问题。例如,在光刻工艺中,在处理过的衬底120表面上的抗蚀剂的厚度倾向于不均匀,且这样抗蚀剂在未被充分曝光处可以保持,另一方面,在抛光工艺中,当晶片为芯片分割准备被抛光来减薄为约100μm时,晶片可能破裂。The depth of the groove 122 (indicated by D in FIG. 12B ) is, for example, 5 μm. Here, it is preferable that the depth D of the groove 122 is not less than 2 μm and not more than 20 μm. If the depth D is less than 2 μm, the trench 122 may be filled with the nitride semiconductor multilayer film 121 . If the trench 122 is filled, cracks may occur, the layer thickness may become non-uniform within the surface, and other problems arise. However, if the total layer thickness of nitride semiconductor multilayer film 121 is 4 μm or less, it is possible to prevent cracks and maintain flatness as long as depth D including both ends is in the range from 1 μm to 2 μm. On the other hand, if the depth D is greater than 20 μm, problems may arise in photolithography and polishing processes. For example, in a photolithography process, the thickness of the resist on the surface of the processed substrate 120 tends to be non-uniform, and thus the resist can remain where it is not sufficiently exposed, on the other hand, in the polishing process , when the wafer is polished to be thinned to about 100 μm in preparation for chip singulation, the wafer may crack.

优选沟槽122的宽度W为1μm以上。如果宽度W小于1μm,当氮化物半导体多层膜121生长时,沟槽122被完全填充。这是因为从沟槽122两边缘生长的氮化物半导体多层膜121在沟槽顶端形成桥,并在沟槽122上相接。当沟槽122被填充时,裂纹可能产生,在表面内层厚可能变得欠均匀,而且产生其他问题。Preferably, the width W of the trench 122 is 1 μm or more. If the width W is smaller than 1 μm, the trench 122 is completely filled when the nitride semiconductor multilayer film 121 is grown. This is because the nitride semiconductor multilayer film 121 grown from both edges of the trench 122 forms a bridge at the top of the trench and is connected to the trench 122 . When trenches 122 are filled, cracks may develop, layer thickness may become less uniform within the surface, and other problems arise.

此处,沟槽122完全不同于为了减少从表面扩展到晶体生长膜的缺陷密度而利用横向(水平)生长效应以在衬底上形成沟槽的技术。在横向生长中,为了获得水平生长效应,沟槽通常以约等于或小于形成的层的膜厚的间距而形成,而且即使在沟槽到沟槽间距最大的情况下,以约三倍于该膜厚的间距形成。Here, the trench 122 is completely different from the technique of forming a trench on a substrate using a lateral (horizontal) growth effect in order to reduce defect density extending from the surface to a crystal growth film. In lateral growth, in order to obtain the horizontal growth effect, trenches are usually formed at a pitch approximately equal to or less than the film thickness of the formed layer, and even at the largest trench-to-trench pitch, at approximately three times the pitch. The interval of film thickness is formed.

作为对比,在此实施例中,沟槽122不是为了上述目的而形成,而是为了防止裂纹的目的。此处的间距与氮化物半导体激光器件的宽度处于相同量级,具体地,最小约为0.1mm。此外,简单地形成沟槽22导致显著降低的平整度。这样,优选间距(周期)为4mm或更小。如果间距(周期)大于4mm,不可能有效地释放出现在膜中的晶格应变和热膨胀系数差异导致的应变,因此产生裂纹。这样,优选沟槽122的间距(周期)为0.1mm或更大但在4mm以下。In contrast, in this embodiment, the groove 122 is not formed for the above purpose, but for the purpose of preventing cracks. The pitch here is on the same order as the width of the nitride semiconductor laser device, specifically, the minimum is about 0.1 mm. Furthermore, simply forming the grooves 22 results in significantly reduced planarity. Thus, it is preferable that the pitch (period) is 4 mm or less. If the pitch (period) is greater than 4 mm, it is impossible to effectively release the lattice strain occurring in the film and the strain due to the difference in thermal expansion coefficient, thus generating cracks. Thus, it is preferable that the pitch (period) of the grooves 122 is 0.1 mm or more but 4 mm or less.

然后,在蚀刻之后,SiO2被例如HF的蚀刻剂完全除去,以完成在氮化物半导体多层膜121生长之前的衬底处理。Then, after etching, SiO 2 is completely removed by an etchant such as HF to complete substrate processing before the growth of the nitride semiconductor multilayer film 121 .

在上述描述中,通过气相蚀刻来蚀刻SiO2和氮化物半导体衬底;作为选择,它们可以用处于液相的蚀刻剂而蚀刻。采用蚀刻的沟槽形成可以在首先生长氮化物半导体层GaN、InGaN、AlGaN、InAlGaN等之后进行。即,也可能首先生长氮化物半导体层,然后形成沟槽122,然后生长氮化物半导体多层膜121。In the above description, SiO 2 and nitride semiconductor substrates are etched by vapor phase etching; alternatively, they may be etched with an etchant in a liquid phase. Trench formation using etching may be performed after first growing a nitride semiconductor layer GaN, InGaN, AlGaN, InAlGaN, or the like. That is, it is also possible to grow the nitride semiconductor layer first, then form the trench 122, and then grow the nitride semiconductor multilayer film 121.

在采用氮化物半导体衬底以外的衬底(例如蓝宝石、SiC、Si或GaAs衬底)的情况下,首先形成GaN、InGaN、AlGaN、InAlGaN等氮化物半导体层,然后生长氮化物半导体多层膜121。In the case of using a substrate other than a nitride semiconductor substrate (such as a sapphire, SiC, Si, or GaAs substrate), first form a nitride semiconductor layer such as GaN, InGaN, AlGaN, InAlGaN, and then grow a nitride semiconductor multilayer film 121.

氮化物半导体多层膜的外延生长Epitaxial Growth of Nitride Semiconductor Multilayers

图13A是氮化物半导体器件的前视图,且图13B是图13A的俯视图。图14是图13所示的部分B的截面图。现在,参照图14,将描述氮化物半导体器件如何制造。FIG. 13A is a front view of a nitride semiconductor device, and FIG. 13B is a top view of FIG. 13A. FIG. 14 is a sectional view of part B shown in FIG. 13 . Now, referring to FIG. 14, how a nitride semiconductor device is manufactured will be described.

首先,在MOCVD机上,使用NH3作为V族源材料且TMGa(三甲基镓)或TEGa(三乙基镓)作为III族源材料,硅烷(SiH4)作为添加于其中掺杂源材料,在1100℃衬底温度下,具有0.2μm膜厚的n型初始GaN层123形成于处理过的衬底120上。初始GaN层123是氮化物半导体初始层的例子;取代地,可以采用任何其他的氮化物半导体初始层,例如AlGaN、AlInGaN、AlGaNP或AlGaNAs。First, on the MOCVD machine, use NH 3 as the V-group source material and TMGa (trimethylgallium) or TEGa (triethylgallium) as the III-group source material, and silane (SiH 4 ) as the dopant source material added therein, An n-type initial GaN layer 123 having a film thickness of 0.2 μm was formed on the processed substrate 120 at a substrate temperature of 1100° C. The initial GaN layer 123 is an example of a nitride semiconductor initial layer; instead, any other nitride semiconductor initial layer such as AlGaN, AlInGaN, AlGaNP, or AlGaNAs may be used.

接着,在1050℃衬底温度下,通过使用V族源材料例如TMAl(三甲基铝)或TEAl(三乙基铝),生长三层n型覆盖层,从初始GaN层123一例其包括:具有2.3μm层厚的n型Al0.05Ga0.95N覆盖层124、具有0.2μm层厚的n型Al0.08Ga0.92N覆盖层125和具有1.0μm层厚的n型Al0.05Ga0.95N覆盖层126。作为n型杂质,添加了5×1017到1×1019/cm3的硅。Next, at a substrate temperature of 1050° C., by using a group V source material such as TMAl (trimethylaluminum) or TEAl (triethylaluminum), three layers of n-type cladding layers are grown, for example from the initial GaN layer 123 which includes: n-type Al 0.05 Ga 0.95 N cladding layer 124 with a layer thickness of 2.3 μm, n-type Al 0.08 Ga 0.92 N cladding layer 125 with a layer thickness of 0.2 μm and n-type Al 0.05 Ga 0.95 N cladding layer 126 with a layer thickness of 1.0 μm . As an n-type impurity, 5×10 17 to 1×10 19 /cm 3 of silicon is added.

接着,n型GaN光导层(具有1×1016到1×1018/cm3的Si杂质浓度)127生长到具有0.2μm厚度。Next, an n-type GaN photoconductive layer (having a Si impurity concentration of 1×10 16 to 1×10 18 /cm 3 ) 127 is grown to have a thickness of 0.2 μm.

然后,衬底温度降低到800℃,且按下面顺序生长包括三个周期的均具有4nm厚度的In0.1Ga0.9N阱层与均具有8nm厚度的In0.01Ga0.99N势垒层组合的有源层(具有多量子阱结构)128:势垒层、阱层、势垒层、阱层、势垒层、阱层和势垒层。优选在势垒层和阱层之间或在阱层和势垒层之间生长中断1秒以上但在180秒以下,因为这样做有助于提高各层的平整度且因此减少光发射FWHM。此处,可以任意避免添加SiH4到势垒层或势垒层和阱层。Then, the substrate temperature was lowered to 800° C., and an active layer comprising three periods of In 0.1 Ga 0.9 N well layers each having a thickness of 4 nm combined with In 0.01 Ga 0.99 N barrier layers each having a thickness of 8 nm was grown in the following order. Layer (with multiple quantum well structure) 128: barrier layer, well layer, barrier layer, well layer, barrier layer, well layer and barrier layer. It is preferable to interrupt the growth between the barrier layer and the well layer or between the well layer and the barrier layer for more than 1 second but less than 180 seconds, because doing so helps to improve the planarity of the layers and thus reduces the light emission FWHM. Here, the addition of SiH4 to the barrier layer or the barrier layer and the well layer can be arbitrarily avoided.

在As添加到有源层1.28的情况下,AsH3(砷化三氢)或TBAs(三丁基砷)用作源材料。在P添加到有源层128的情况下,PH3(磷化氢)或TBP(三丁基磷)用作源材料。在Sb添加到有源层128的情况下,TMSb(三甲基锑)或TISb(三乙基锑)用作源材料。当有源层128形成时,作为N的源材料,取代NH3,可以采用任何其他源材料,例如N2H4(联氨,hydrazine)、C2N2H8(二甲肼,dimethylhydrazine)或任何其他含N的源材料。In case As is added to the active layer 1.28, AsH3 (arsine) or TBAs (tributylarsine) is used as source material. In the case where P is added to the active layer 128, PH3 (phosphine) or TBP (tributylphosphine) is used as a source material. In the case where Sb is added to the active layer 128, TMSb (trimethylantimony) or TISb (triethylantimony) is used as a source material. When the active layer 128 is formed, as the source material of N, instead of NH 3 , any other source material can be used, such as N 2 H 4 (hydrazine, hydrazine), C 2 N 2 H 8 (dimethylhydrazine, dimethylhydrazine) or any other N-containing source material.

接着,衬底温度升高到1000℃,且下面的层依次生长:具有0.02μm厚度的p型Al0.2Ga0.8N载流子阻隔层129、具有0.02μm厚度的p型GaN光导层130、具有5μm厚度的p型Al0.05Ga0.95N覆盖层131和具有0.1μm厚度的p型GaN接触层132。作为用于p型杂质的源材料,采用EtCP2Mg(二乙基环戊二烯基镁,bisethylcyclopentadienylmagnesium),且Mg以1×1018到2×1020/cm3的浓度添加。优选p型GaN接触层132朝向p电极133具有越来越高的p型杂质浓度。这有助于减少由p电极133引起的接触电阻。为了除去阻碍用作p型杂质的Mg的激活的在p型层中剩余的氢,在p型层的生长中可以混合微量的氧。Next, the substrate temperature was raised to 1000° C., and the following layers were sequentially grown: a p-type Al 0.2 Ga 0.8 N carrier blocking layer 129 with a thickness of 0.02 μm, a p-type GaN optical guide layer 130 with a thickness of 0.02 μm, a A p-type Al 0.05 Ga 0.95 N cladding layer 131 with a thickness of 5 μm and a p-type GaN contact layer 132 with a thickness of 0.1 μm. As a source material for p-type impurities, EtCP 2 Mg (bisethylcyclopentadienylmagnesium) is used, and Mg is added at a concentration of 1×10 18 to 2×10 20 /cm 3 . It is preferable that p-type GaN contact layer 132 has a higher and higher p-type impurity concentration toward p-electrode 133 . This helps to reduce the contact resistance caused by the p-electrode 133 . In order to remove hydrogen remaining in the p-type layer that hinders the activation of Mg serving as a p-type impurity, a trace amount of oxygen may be mixed in the growth of the p-type layer.

如上所述制造的各个氮化物半导体多层膜121的厚度之和约为3.58μm。氮化物半导体多层膜121由初始GaN层123、n型Al0.05Ga0.95N覆盖层124、n型Al0.08Ga0.92N覆盖层125、n型Al0.05Ga0.95N覆盖层126、n型GaN光导层127、有源层128、p型Al0.2Ga0.8N载流子阻隔层129、p型GaN光导层130、p型Al0.05Ga0.95N覆盖层131和p型GaN接触层132组成。The sum of the thicknesses of the individual nitride semiconductor multilayer films 121 manufactured as described above is about 3.58 μm. The nitride semiconductor multilayer film 121 consists of an initial GaN layer 123, an n-type Al 0.05 Ga 0.95 N cladding layer 124, an n-type Al 0.08 Ga 0.92 N cladding layer 125, an n-type Al 0.05 Ga 0.95 N cladding layer 126, and an n-type GaN light guide layer 127, active layer 128, p-type Al 0.2 Ga 0.8 N carrier blocking layer 129, p-type GaN optical guiding layer 130, p-type Al 0.05 Ga 0.95 N cladding layer 131 and p-type GaN contact layer 132.

在p型GaN接触层132生长之后,在MOCVD机的反应器内的所有气体被氮载气和NH3取代,且温度以60℃/min的速度降低。当衬底温度变为等于80℃时,NH3的供应停止,然后该衬底温度保持5分钟,然后衬底温度降低到室温。此处,优选衬底所保持的温度在650℃到900℃之间,且在该温度处所保持的时间为3分钟以上但在10分钟以下。此外,优选温度降低的速度为30℃/min以上。After the growth of the p-type GaN contact layer 132, all the gases in the reactor of the MOCVD machine were replaced by nitrogen carrier gas and NH 3 , and the temperature was decreased at a rate of 60° C./min. When the substrate temperature became equal to 80°C, the supply of NH 3 was stopped, and then the substrate temperature was maintained for 5 minutes, and then the substrate temperature was lowered to room temperature. Here, it is preferable that the temperature at which the substrate is held is between 650° C. and 900° C., and the time at which the substrate is held at this temperature is 3 minutes or more but 10 minutes or less. In addition, it is preferable that the rate of temperature decrease is 30° C./min or more.

如上所制造的氮化物半导体多层膜121通过拉曼(Raman)测量而评价。结果是,在晶片从MOCVD机中取出后,即使没有进行p型化的退火,仍然在生长之后立刻观察到了p型特征(Mg被激活了)。此外,由于p电极133的形成所导致的接触电阻更低。上述方法可以与常规p型化的退火相结合以实现更高的Mg激活速率。The nitride semiconductor multilayer film 121 manufactured as above was evaluated by Raman measurement. As a result, p-type features (Mg activated) were observed immediately after growth even without p-type annealing after the wafer was removed from the MOCVD machine. In addition, the contact resistance due to the formation of the p-electrode 133 is lower. The above method can be combined with conventional p-type annealing to achieve a higher Mg activation rate.

在上述实施例中,有源层128被如此构建使得以势垒层开始并以势垒层结束;取代地,它也可以被如此构建使得以阱层开始并以阱层结束。阱层的数目不限于上述具体提出的三个,而是可以为十个以下,因为这种情况下它们提供低的域值电流密度并能在室温持续振荡。阱层数目的特别优选范围是从两个到六个,因为此时它们提供特别低的域值电流密度。上述有源层128可以额外地包含Al。此处,没有作为杂质的Si添加到组成有源层的阱层和势垒层128;然而,可以添加杂质。添加例如Si的杂质到有源层128倾向于提高光发射密度。除了Si,这样的杂质包括O、C、Ge、Zn和Mg,且这些可以单独使用或者其中的两个或多个组合使用。优选添加的杂质的总量为约1×1017到8×1018/cm3。杂质可以添加到阱层和势垒层或者只添加到阱层或势垒层。In the above-described embodiments, the active layer 128 is structured so as to start with a barrier layer and end with a barrier layer; instead, it may also be structured so as to start with a well layer and end with a well layer. The number of well layers is not limited to three specifically mentioned above, but may be ten or less, since in this case they provide a low threshold current density and can sustain oscillation at room temperature. A particularly preferred range for the number of well layers is from two to six, since then they provide particularly low threshold current densities. The above-mentioned active layer 128 may additionally contain Al. Here, Si as an impurity is not added to the well layer and barrier layer 128 constituting the active layer; however, an impurity may be added. Adding impurities such as Si to the active layer 128 tends to increase light emission density. Such impurities include O, C, Ge, Zn, and Mg in addition to Si, and these may be used alone or in combination of two or more thereof. The total amount of impurities added is preferably about 1×10 17 to 8×10 18 /cm 3 . Impurities may be added to the well layer and the barrier layer or only to the well layer or the barrier layer.

p型Al0.2Ga0.8N载流子阻隔层129可以具有除了上述具体提出的以外的任何其他组分。具有添加于其中的In的AlGaN即使在低温下生长时也发生p型化(p-typification)。这有助于减少有源层128在晶体生长过程中受到的损坏,因此是优选的。载流子阻隔层129本身可以被省略,但设置它则有助于低的域值电流密度。这是因为载流子阻隔层129用于封住有源层128中的载流子。p型Al0.2Ga0.8N载流子阻隔层129中的Al组分越高,就有越高密度的载流子被封住,因此就更好。在另一方面,优选减少Al组分,只要能保持载流子被封住(enclosure),因为这样做有助于提高在载流子阻隔层129中的载流子迁移率,因此有助于减少那里的电阻。The p-type Al 0.2 Ga 0.8 N carrier blocking layer 129 may have any other composition than those specifically mentioned above. AlGaN having In added thereto undergoes p-typification even when grown at a low temperature. This helps to reduce damage to the active layer 128 during crystal growth and is therefore preferable. The carrier blocking layer 129 itself can be omitted, but its presence contributes to a low threshold current density. This is because the carrier blocking layer 129 serves to seal carriers in the active layer 128 . The higher the Al composition in the p-type Al 0.2 Ga 0.8 N carrier blocking layer 129 is, the higher the density of carriers is blocked, and therefore the better. On the other hand, it is preferable to reduce the Al composition, as long as the carrier can be kept sealed (enclosure), because doing so helps to improve the carrier mobility in the carrier blocking layer 129, thus contributing to Reduce the resistance there.

在上述实施例中,n型覆盖层124到126和p型覆盖层131每个都是由Al0.05Ga0.95N或Al0.08Ga0.92N晶体形成的。取代地,可以采用具有除了0.05或0.08之外的Al组分的AlGaN晶体。在这些层中的Al组分越高,它们的能隙和折射率与有源层128的差就越大。这有助于有效地封住(enclose)有源层128中的载流子和光,并有助于减少激光振荡的域值电流密度。在另一方面,只要保持载流子和光被封住,减少Al组分有助于提高在覆盖层124到126中的载流子迁移率,并有助于降低器件的工作电压。In the above-described embodiments, the n-type cladding layers 124 to 126 and the p-type cladding layer 131 are each formed of Al 0.05 Ga 0.95 N or Al 0.08 Ga 0.92 N crystal. Alternatively, an AlGaN crystal having an Al composition other than 0.05 or 0.08 may be used. The higher the Al composition in these layers, the greater their energy gap and refractive index difference from the active layer 128 . This helps to effectively enclose carriers and light in the active layer 128, and helps reduce the threshold current density of laser oscillation. On the other hand, reducing the Al composition helps to increase the carrier mobility in the capping layers 124 to 126 and helps to lower the operating voltage of the device as long as the carriers and light are kept trapped.

在上述实施例中,n型AlGaN覆盖层124到126具有三层结构。这允许垂直横向模式具有单峰,提高了光阻隔效率,并有助于提高激光的光学特性并减少激光域值电流密度。n型AlGaN覆盖层的数目可以为三以外的其他数目;即,可以采用一个或多个而不引起任何问题。在上述描述中,覆盖层由三元素混合晶体形成,即AlGaN;取代地,可以采用四元素混合晶体,例如AlInGaN、AlGaNP或AlGaNAs。为了低的电阻,p型覆盖层130可以具有包括p型AlGaN层和p型GaN层的超晶格结构,或者包括p型AlGaN层和p型AlGaN层的超晶格层,或者包括p型AlGaN和p型InGaN层的超晶格结构。In the above-described embodiments, the n-type AlGaN cladding layers 124 to 126 have a three-layer structure. This allows the vertical transverse mode to have a single peak, improves the light blocking efficiency, and helps to improve the optical properties of the laser and reduce the laser threshold current density. The number of n-type AlGaN cladding layers may be other than three; that is, one or more may be employed without causing any problem. In the above description, the cladding layer is formed of a three-element mixed crystal, that is, AlGaN; instead, a four-element mixed crystal, such as AlInGaN, AlGaNP, or AlGaNAs, may be used. For low resistance, the p-type cladding layer 130 may have a superlattice structure including a p-type AlGaN layer and a p-type GaN layer, or a superlattice layer including a p-type AlGaN layer and a p-type AlGaN layer, or include a p-type AlGaN layer. and a superlattice structure of p-type InGaN layers.

氮化物半导体多层膜的特性Properties of Nitride Semiconductor Multilayer Films

在本实施例所制造的氮化物半导体多层膜121中,没有观察到裂纹。此外,表面内的表面平整度在触摸探针型水平高度差检测计(touch-probe-typelevel difference tester)上进行测量。图15示出了氮化物半导体多层膜121在[1-100]方向的表面平整度的测量结果。结果显示,在所测量的600μm范围内,表面粗糙度(Ra)为100

Figure 2007101970221_1
以下,且显示获得了具有很小的表面不规则性的平整表面。还在衬底的整个表面详细测量了Ra,且结果显示获得了平整表面。In the nitride semiconductor multilayer film 121 produced in this example, no cracks were observed. In addition, the surface flatness within the surface was measured on a touch-probe-type level difference tester. FIG. 15 shows the measurement results of the surface flatness of the nitride semiconductor multilayer film 121 in the [1-100] direction. The results show that the surface roughness (Ra) is 100 in the measured range of 600 μm
Figure 2007101970221_1
Below, and it is shown that a flat surface with little surface irregularity is obtained. Ra was also measured in detail over the entire surface of the substrate, and the results showed that a flat surface was obtained.

此外,在SEM(扫描电子显微镜)下,测量了氮化物半导体多层膜121的各层厚度在衬底表面内的分布。结果显示,表明变化程度的标准偏差的数值小至最大为5%。即,发现多层膜的各层的厚度是均匀的。Furthermore, under a SEM (Scanning Electron Microscope), the distribution of the thickness of each layer of the nitride semiconductor multilayer film 121 within the surface of the substrate was measured. The results show that values of the standard deviation indicating the degree of variation are as small as a maximum of 5%. That is, it was found that the thickness of each layer of the multilayer film was uniform.

器件分割工艺Device Separation Process

接着,将给出把具有设置在脊12上的氮化物半导体多层膜121的晶片从MOCVD机中取出然后将晶片处理为氮化物半导体器件芯片的工艺描述。Next, a description will be given of a process of taking out the wafer having the nitride semiconductor multilayer film 121 provided on the ridge 12 from the MOCVD machine and then processing the wafer into nitride semiconductor device chips.

首先,形成充当激光波导区的脊条纹部分134。这是通过从外延晶片表面侧到p型覆盖层131的中间或底端而蚀刻外延晶片使得剩下条纹形部分而形成的。此处,条纹宽度为1到3μm且优选1.3到2μm。然后,绝缘膜135形成在脊条纹部分134以外的地方。此处,绝缘膜135可以由AlGaN形成。由于p形GaN接触层132的保持未蚀刻的部分是暴露的,在此部分上以及在绝缘膜135上,通过依次气相淀积Pd/Mo/Au而形成p电极133。First, the ridge stripe portion 134 serving as a laser waveguide region is formed. This is formed by etching the epitaxial wafer from the epitaxial wafer surface side to the middle or bottom end of the p-type cladding layer 131 so that stripe-shaped portions remain. Here, the stripe width is 1 to 3 μm and preferably 1.3 to 2 μm. Then, an insulating film 135 is formed other than the ridge-stripe portion 134 . Here, the insulating film 135 may be formed of AlGaN. Since a portion of the p-type GaN contact layer 132 which remains unetched is exposed, on this portion as well as on the insulating film 135, the p-electrode 133 is formed by sequentially vapor-depositing Pd/Mo/Au.

此处,绝缘膜135可以由除了上述具体提到的以外的材料形成,例如钛、锆、钽、铝等的氧化物或氮化物。p电极(216)可以取代地由Pd/Pt/Au、Pd/Au或Ni/Au形成。Here, the insulating film 135 may be formed of materials other than those specifically mentioned above, such as oxides or nitrides of titanium, zirconium, tantalum, aluminum, or the like. The p-electrode (216) may alternatively be formed of Pd/Pt/Au, Pd/Au or Ni/Au.

此外,外延晶片的底表面(氮化物半导体衬底的表面)被抛光以使晶片为80到200μm厚,从而利于后面进行的晶片的分割。n电极136通过在底表面120上依次设置Hf/Al而形成。n电极136可以取代地由Hf/Al/Mo/Au、Hf/Al/Pt/Au、Hf/Al/W/Au、Hf/Au、Hf/Mo/Au或者在这些之一中用Ti或Zr取代Hf的改进组合。In addition, the bottom surface of the epitaxial wafer (the surface of the nitride semiconductor substrate) is polished so that the wafer is 80 to 200 μm thick, thereby facilitating division of the wafer to be performed later. The n-electrode 136 is formed by sequentially disposing Hf/Al on the bottom surface 120 . The n-electrode 136 may instead be made of Hf/Al/Mo/Au, Hf/Al/Pt/Au, Hf/Al/W/Au, Hf/Au, Hf/Mo/Au or Ti or Zr in one of these An improved combination to replace Hf.

最后,外延晶片沿垂直于脊条纹方向的方向被解理以产生具有600μm谐振腔长度的法布理-玻罗(Fabry-Pérot)谐振腔。优选谐振腔长度为250μm到1000μm。通过此工艺,晶片被分割成条,每条都具有横向延伸的连接在一起的氮化物半导体器件阵列。具有沿<1-100>方向形成的脊条纹部分134的氮化物半导体器件的谐振腔端面是氮化物半导体晶体的{1-100}平面。取代在端面反馈,可以采用通过设置在内部的折射光栅(diffraction gratings)实现反馈的DFB(分布式反馈),或者通过设置在外部的折射光栅实现反馈的DBR(分布式布拉格反射器)。Finally, the epitaxial wafer was cleaved in a direction perpendicular to the ridge-stripe direction to produce a Fabry-Pérot cavity with a cavity length of 600 μm. Preferably the resonant cavity length is 250 μm to 1000 μm. Through this process, the wafer is diced into strips, each strip having a laterally extending array of connected nitride semiconductor devices. The cavity end face of the nitride semiconductor device having the ridge-stripe portion 134 formed in the <1-100> direction is the {1-100} plane of the nitride semiconductor crystal. Instead of feedback at the end face, a DFB (Distributed Feedback) in which feedback is realized by diffraction gratings provided inside, or a DBR (Distributed Bragg Reflector) in which feedback is realized by diffraction gratings provided outside may be used.

在Fabry-Pérot的谐振腔端面形成后,具有约80%的反射率的SiO2和TiO2电介质膜交替气相淀积在这些端面以形成电介质多层反射膜(未示出)。电介质多层反射膜可以由任何其他电介质材料形成。此后,条被分割成单个的器件以获得图13所示的氮化物半导体器件。该器件具有设置在其中间的激光波导区(脊条纹部分134),并具有250μm的横向宽度。After the Fabry-Pérot cavity facets were formed, SiO2 and TiO2 dielectric films with a reflectivity of about 80% were alternately vapor-deposited on these facets to form a dielectric multilayer reflective film (not shown). The dielectric multilayer reflective film can be formed of any other dielectric material. Thereafter, the bar is divided into individual devices to obtain the nitride semiconductor device shown in FIG. 13 . This device has a laser waveguide region (ridge-stripe portion 134) disposed in the middle thereof, and has a lateral width of 250 μm.

氮化物半导体器件的特性Characteristics of Nitride Semiconductor Devices

在整个实验中,证实氮化物半导体器件在下面条件下实现了5000小时以上的激光振荡寿命:振荡波长405±2nm;激光输出60mW;环境温度70℃。此外,获得了具有小的表面不规则性的平坦表面,且在衬底表面内氮化物半导体多层膜121的各层厚度是高度均匀的。这样,在各个器件中具有很小的特性的变化,从而提供了高可靠性。结果,减少了具有不满足无缺陷器件要求特性的器件的数目,提高了成品率。Throughout the experiment, it was confirmed that the nitride semiconductor device achieved a laser oscillation life of more than 5000 hours under the following conditions: oscillation wavelength 405±2nm; laser output 60mW; ambient temperature 70°C. In addition, a flat surface with small surface irregularities is obtained, and the thickness of each layer of the nitride semiconductor multilayer film 121 is highly uniform within the substrate surface. In this way, there is little variation in characteristics among individual devices, thereby providing high reliability. As a result, the number of devices having characteristics not satisfying the requirements for a defect-free device is reduced, and the yield is improved.

表面平整度与裂纹产生之间的关系Relationship Between Surface Flatness and Crack Generation

现在,将给出观察到的当初始GaN层123随沟槽122的深度D和宽度W而变化时表面平整度与裂纹产生之间的关系。图16示出了当初始GaN层123的厚度从0变化到2.0μm时观测到的氮化物半导体多层膜121的表面粗糙度的测量结果。Now, the observed relationship between surface flatness and crack generation when the initial GaN layer 123 varies with the depth D and width W of the trench 122 will be given. FIG. 16 shows measurement results of the surface roughness of the nitride semiconductor multilayer film 121 observed when the thickness of the initial GaN layer 123 was varied from 0 to 2.0 μm.

在先前进行的整个实验中,公知对于器件特性和器件寿命的变化允许的表面粗糙度的范围是300

Figure 2007101970221_2
以下。该厚度300相当于当p型层具有0.62μm厚度时器件总厚度的约5%。此外,如果表面粗糙度为5%,表明可比较的(comparable)变化存在于各层厚度中(此处,p型层的厚度)。p型层厚度的变化最影响激光特性。当作为电流限制结构的脊条纹部分134形成时,p层的2μm宽的部分被剩余作为脊条纹部分134,且剩余部分被通过气相蚀刻例如ICP而蚀刻。由于公知最显著影响激光特性的是脊条纹部分134的高度,即从有源层128到被蚀刻区的距离,如果p型层厚度在衬底表面内不同位置处是变化的,激光特性随着变化。这样,大的表面粗糙度不仅导致低的成品率,而且不利地影响器件寿命。Throughout the previous experiments, it is known that the allowable range of surface roughness for the variation of device characteristics and device lifetime is 300
Figure 2007101970221_2
the following. The thickness is 300 This corresponds to about 5% of the total thickness of the device when the p-type layer has a thickness of 0.62 μm. Furthermore, if the surface roughness is 5%, it shows that comparable variation exists in each layer thickness (here, the thickness of the p-type layer). Variations in the thickness of the p-type layer most affect the lasing characteristics. When the ridge stripe portion 134 as the current confinement structure is formed, a 2 μm wide portion of the p layer is left as the ridge stripe portion 134 , and the remaining portion is etched by vapor phase etching such as ICP. Because it is known that the height of the ridge stripe part 134 is the height of the ridge stripe part 134, that is, the distance from the active layer 128 to the etched region, if the thickness of the p-type layer varies at different positions in the substrate surface, the laser characteristics will increase with the Variety. Thus, large surface roughness not only leads to low yield, but also adversely affects device lifetime.

图16示出当初始GaN层123的厚度为0.5μm以下时,表面粗糙度为300

Figure 2007101970221_4
以下。这样,优选用在此实施例中的初始GaN层123的厚度为0.5μm以下。在氮化物半导体多层膜121包括初始GaN层123以外的GaN的情况下,优选在氮化物半导体多层膜121中的GaN层的总厚度为氮化物半导体多层膜121的总层厚的15%以下。FIG. 16 shows that when the thickness of the initial GaN layer 123 is 0.5 μm or less, the surface roughness is 300
Figure 2007101970221_4
the following. Thus, it is preferable that the thickness of initial GaN layer 123 used in this embodiment is 0.5 μm or less. In the case where the nitride semiconductor multilayer film 121 includes GaN other than the initial GaN layer 123, it is preferable that the total thickness of the GaN layers in the nitride semiconductor multilayer film 121 is 15% of the total layer thickness of the nitride semiconductor multilayer film 121. %the following.

这样,进行了充分地研究以发现为什么当初始GaN层123的厚度大于0.5mm时,导致如图16所示的大的表面粗糙度,换句话说,在表面内出现大的层厚分布。通过该研究,发现氮化物半导体多层膜121的各层厚度变化是因为当氮化物半导体多层膜121外延生长时,初始GaN层123受到其影响。Thus, sufficient research was conducted to find out why, when the thickness of the initial GaN layer 123 is greater than 0.5 mm, a large surface roughness as shown in FIG. 16 results, in other words, a large layer thickness distribution occurs within the surface. Through this study, it was found that the thickness of each layer of the nitride semiconductor multilayer film 121 varies because the initial GaN layer 123 is affected by it when the nitride semiconductor multilayer film 121 is epitaxially grown.

图17A是带有具有好的平整度的氮化物半导体多层膜121的处理过的衬底120的截面图,且图17B是带有具有差的平整度的氮化物半导体多层膜121的处理过的衬底120的截面图。现在,将参照图12和17A、17B给出产生氮化物半导体多层膜121的各层的厚度变化的生长机制模型的详细描述。17A is a sectional view of a processed substrate 120 with a nitride semiconductor multilayer film 121 having good flatness, and FIG. 17B is a processed substrate 120 with a nitride semiconductor multilayer film 121 having poor flatness. A cross-sectional view of the processed substrate 120. Now, a detailed description will be given of a growth mechanism model that produces a change in thickness of each layer of nitride semiconductor multilayer film 121 with reference to FIGS. 12 and 17A, 17B.

发现当垂直于氮化物半导体多层膜121在图12所示的沟槽122以外的表面137的线[0001]与垂直于在沟槽122顶端的侧壁表面122a的线R之间的角θ小于60°时,出现大的氮化物半导体多层膜121的各层厚度的变化。在这种情况下,如图17B所示,氮化物半导体多层膜121流入沟槽122。发生该流入是因为在氮化物半导体多层膜121外延生长时已经到达表面137的源材料(主要是Ga)通过表面迁移来促进从而流入沟槽122。It is found that when the angle θ between the line [0001] perpendicular to the surface 137 of the nitride semiconductor multilayer film 121 outside the trench 122 shown in FIG. When the angle is less than 60°, a large variation in the thickness of each layer of the nitride semiconductor multilayer film 121 occurs. In this case, the nitride semiconductor multilayer film 121 flows into the trench 122 as shown in FIG. 17B . This inflow occurs because the source material (mainly Ga) that has reached surface 137 at the time of epitaxial growth of nitride semiconductor multilayer film 121 is promoted by surface migration to flow into trench 122 .

如图21所示,当初始GaN层123的厚度为1.0μm时,氮化物半导体多层膜121的表面平整度是这样的:其最高和最低部分的水平高度差为300nm,显示出表面具有大的表面不规则性。As shown in FIG. 21, when the thickness of the initial GaN layer 123 is 1.0 μm, the surface flatness of the nitride semiconductor multilayer film 121 is such that the level difference between the highest and lowest parts thereof is 300 nm, showing that the surface has a large surface irregularities.

此外,在衬底表面内氮化物半导体多层膜121的层厚变化在反射膜厚探测器上进行了评价。此处,对从反射膜厚探测器获得的反射峰轮廓进行了快速傅立叶变换处理(FFT),并基于其间具有各层之中最大的折射率差的p型载流子阻隔层129与p型GaN光导层130之间界面的反射峰,评价了在衬底表面内的p型层厚度分布。此处,p层的厚度表示下面三层的总厚度:p型GaN光导层130、p型AlGaN覆盖层131和p型GaN接触层132。结果发现,当初始GaN层123的厚度为0.5μm或更大时,在衬底表面内层厚度的变化程度(标准偏差)为5%或更大。In addition, the layer thickness variation of the nitride semiconductor multilayer film 121 within the substrate surface was evaluated on a reflective film thickness detector. Here, fast Fourier transform processing (FFT) was performed on the reflection peak profile obtained from the reflection film thickness detector, and based on the p-type carrier blocking layer 129 having the largest refractive index difference among the layers and the p-type The reflection peaks at the interface between the GaN optical guiding layers 130 evaluate the p-type layer thickness distribution within the substrate surface. Here, the thickness of the p layer represents the total thickness of the following three layers: p-type GaN optical guiding layer 130 , p-type AlGaN cladding layer 131 and p-type GaN contact layer 132 . As a result, it was found that when the thickness of the initial GaN layer 123 is 0.5 [mu]m or more, the degree of variation (standard deviation) of the layer thickness within the substrate surface is 5% or more.

此外,在SEM下详细观察了在沟槽122中的生长。下面将参照图12和18详细描述所观测到的。图18是具有其中初始GaN层123具有0.5μm以下厚度的氮化物半导体多层膜121的处理过的衬底的截面图。图18示出了当初始GaN层123具有0.5μm以下厚度时,在沟槽122上端的厚度比在表面137上的平坦区E的厚度大H。厚度差H为0.2到1.5μm。Furthermore, the growth in trench 122 was observed in detail under SEM. What was observed will be described in detail below with reference to FIGS. 12 and 18 . 18 is a cross-sectional view of a processed substrate having a nitride semiconductor multilayer film 121 in which an initial GaN layer 123 has a thickness of 0.5 μm or less. FIG. 18 shows that when the initial GaN layer 123 has a thickness of 0.5 μm or less, the thickness at the upper end of the trench 122 is greater than the thickness of the flat region E on the surface 137 by H. The thickness difference H is 0.2 to 1.5 μm.

此外,在这种情况下,垂直于图12所示的氮化物半导体多层膜121除了沟槽122以外的表面137的线[0001]与垂直于沟槽122顶端的侧壁表面122a的线R之间的角θ大于60°。具有角θ等于60°的表面被认为是相应于(11-22)平面。在此实施例中,角θ为80°。角θ应该大于60°,并优选80°以上。这是因为,角θ越大于60°,其上容易发生流入的(11-22)平面越不容易出现。Further, in this case, the line [0001] perpendicular to the surface 137 of the nitride semiconductor multilayer film 121 shown in FIG. The angle θ between them is greater than 60°. A surface with an angle θ equal to 60° is considered to correspond to the (11-22) plane. In this embodiment, the angle θ is 80°. The angle θ should be greater than 60°, and preferably 80° or greater. This is because the larger the angle θ is than 60°, the less likely is the (11-22) plane on which inflow occurs.

生长模型growth model

基于到此为止所给出的结果,将给出使用具有形成于其上的沟槽122的处理过的衬底120的生长模式模型的描述。当源材料气体的供应开始且生长开始时,Ga源材料到达表面。然后,Ga在表面上迁移(表面扩散),且当它到达能量稳定的位置时,它被膜吸收。随着此过程的重复,膜逐渐生长。同时,当初始GaN层123的厚度变为0.5μm以上时,如图17B所示,Ga原子从表面137朝沟槽122迁移。在此流入过程中,由于各种原因例如在沟槽形成过程中的不均匀性,Ga原子沿[11-22]方向的流入是极度不均匀的。这样,尽管在一些区域中发生流入,但在其他区域不容易发生流入。Based on the results presented so far, a description will be given of a growth mode model using the processed substrate 120 having the trench 122 formed thereon. When the supply of source material gas starts and growth starts, the Ga source material reaches the surface. Ga then migrates on the surface (surface diffusion), and when it reaches an energetically stable position, it is absorbed by the film. As this process is repeated, the membrane grows gradually. Meanwhile, when the thickness of initial GaN layer 123 becomes 0.5 μm or more, Ga atoms migrate from surface 137 toward trench 122 as shown in FIG. 17B . During this inflow process, the inflow of Ga atoms along the [11-22] direction is extremely inhomogeneous due to various reasons such as inhomogeneity in the trench formation process. In this way, although inflow occurs in some areas, inflow does not easily occur in other areas.

流入沟槽122发生的地方,表面137由于和源材料效率有关的原因而变薄。流入不容易发生的地方,表面137变厚。这样,导致了差的平整度。因此,通过抑制此流入,可能获得好的平整度。抑制流入的一种生长方法是在沟槽122顶端以高于其他地方的生长速率生长初始GaN层123,使得形成防止Ga源材料流入沟槽122的阻隔壁(图18中的厚度差H)。这对于使层厚均匀是有效的。如先前所述,当初始GaN层123具有0.5μm以下层厚时形成这样的阻隔壁。Where inflow into trench 122 occurs, surface 137 is thinned for reasons related to source material efficiency. Where inflow is less likely to occur, the surface 137 becomes thicker. Thus, poor flatness results. Therefore, by suppressing this inflow, it is possible to obtain good flatness. One growth method to suppress influx is to grow initial GaN layer 123 at the top of trench 122 at a higher growth rate than elsewhere so that a barrier wall (thickness difference H in FIG. 18 ) is formed that prevents Ga source material from flowing into trench 122. This is effective for making the layer thickness uniform. As previously described, such barrier ribs are formed when the initial GaN layer 123 has a layer thickness of 0.5 μm or less.

此外,如先前所述,优选沟槽122之间的间距为0.1mm以上但为4mm以下。优选初始GaN层123的层厚为0.5μm以下。优选初始GaN层123的层厚为氮化物半导体多层膜121的总层厚的15%以下。角θ应大于60°,优选80°以上。优选沟槽122的深度D为2μm以上但为20μm以下,且沟槽122的宽度W为1μm以上。In addition, as previously described, it is preferable that the pitch between the grooves 122 is not less than 0.1 mm but not more than 4 mm. The initial GaN layer 123 preferably has a thickness of 0.5 μm or less. The thickness of the initial GaN layer 123 is preferably 15% or less of the total thickness of the nitride semiconductor multilayer film 121 . The angle θ should be greater than 60°, preferably greater than 80°. Preferably, the depth D of the trench 122 is not less than 2 μm and not more than 20 μm, and the width W of the trench 122 is not less than 1 μm.

根据本发明的氮化物半导体器件在激光器件、光发射器件、光接收器件等中发现了广泛的应用,且因此能适合用在光盘存储/再现设备、激光打印机、条形码读出器、投影仪、显示设备等中。The nitride semiconductor device according to the present invention finds wide application in laser devices, light-emitting devices, light-receiving devices, etc., and thus can be suitably used in optical disk storage/reproduction equipment, laser printers, barcode readers, projectors, display device etc.

Claims (10)

1. nitride compound semiconductor device comprises:
The substrate of handling, form on the surface by the nitride-based semiconductor substrate that forms by nitride-based semiconductor at least one surface as the groove of at least one depressed area and as the spine of non-groove form and
The nitride semiconductor growing layer comprises a plurality of nitride semiconductor thin films on the substrate that is grown in described processing,
The primary flat direction of set described nitride semiconductor growing layer with the 0001} planar alignment,
Inclination angle wherein, promptly first vector that extends from the surface portion of spine along the direction vertical with the top of spine be parallel to crystallographic direction<0001 angulation between second vector that extends, when supposing that described first vector and described second vector start from same point, be more than 0.05 ° but below 4 °, and
The width of wherein said non-groove is greater than 100 μ m but below 2000 μ m,
Wherein the depressed area is stayed on the part surface of the described nitride semiconductor growing layer on the groove of the substrate that is positioned at described processing,
Wherein the inclination angle comprises: first inclination angle, this angle be second vector and by first vector is projected to by mutually perpendicular crystallographic direction<0001,<11-20 and<1-100 in crystallographic direction<0001 and<1-100 between the 3rd vector that obtains on formed first plane, the angle when hypothesis the second and the 3rd vector starts from same point; With second inclination angle, this angle be second vector and by first vector is projected to by mutually perpendicular crystallographic direction<0001,<11-20 and<1-100 in crystallographic direction<0001 and<11-20 angle between the four-vector that obtains on formed second plane, when hypothesis second and the four-vector start from same point
Make that first inclination angle is that the θ a and second inclination angle are θ b, then | θ a| 〉=| θ b|, 0.09 °≤| θ a|.
2. nitride compound semiconductor device as claimed in claim 1, extend with stripe-shaped the described depressed area that wherein forms groove, and described depressed area is parallel or be basically parallel to crystallographic direction<1-100〉extend.
3. nitride compound semiconductor device as claimed in claim 1, extend with stripe-shaped the described depressed area that wherein forms groove, and described depressed area is parallel or be basically parallel to crystallographic direction<11-20〉extend.
4. nitride compound semiconductor device as claimed in claim 1 is the GaN with the following thickness of 0.5 μ m with the contacted described nitride semiconductor thin film of the substrate surface of described processing wherein, or AlGaN.
5. nitride compound semiconductor device as claimed in claim 1, the degree of depth that wherein forms the described depressed area of described groove are more than the 1.5 μ m.
6. nitride compound semiconductor device as claimed in claim 1, wherein making the gross thickness that is formed on the described nitride semiconductor growing layer in the described spine is T, the degree of depth that then forms the described depressed area of described groove is more than the T/2.
7. nitride compound semiconductor device as claimed in claim 1, the A/F that wherein forms the described depressed area of described groove are more than the 3 μ m.
8. nitride compound semiconductor device as claimed in claim 1,
Wherein the nitride semiconductor growing layer comprises the nitride-based semiconductor initiation layer on the substrate that at first is formed on described processing, and
Wherein said nitride-based semiconductor initiation layer is the compound that contains GaN, and total bed thickness of described nitride semiconductor growing layer is below the 4 μ m.
9. nitride compound semiconductor device as claimed in claim 8, the degree of depth of wherein said groove are that 1 μ m is above but below 20 μ m.
10. nitride compound semiconductor device as claimed in claim 8, the width of wherein said groove are more than the 1 μ m.
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