CN101136064A - Control device and method for providing setting signal by using load circuit - Google Patents

Abstract

The present invention provides a control device for outputting a setting signal. The control device comprises a power circuit, a load circuit and a determination circuit, wherein the power circuit is used to provide an output current; the load circuit is coupled to the power circuit and is used to determine an input signal according to the output current; and the determination circuit is coupled to the load circuit and is used to determine the setting signal according to the input signal and at least one reference value.

Description

Control device and method for providing setting signal by using load circuit

technical field

The invention relates to a signal generating device and a related method, in particular to a control device and a related method based on a reference value and a setting signal provided by a load circuit.

Background technique

Generally speaking, the existing way of controlling the card reader (Card Reader) chip is usually through the control settings stored in the Electrically Erasable Programmable Read only Memory (Electrically Erasable Programmable Read only Memory, EEPROM) or by Use the General Purpose I/O Interface (GPIO) to control it. However, when using the EEPROM, the card reader chip itself needs to connect the EEPROM via multiple pins. In addition to the programmable read-only memory, in order to receive each bit of the control setting value recorded in the electrically erasable programmable read-only memory, although its control logic is relatively simple, it needs to have corresponding hardware circuits or components To cooperate with the control card reader chip, at the same time, the high cost of the EEPROM itself will also increase the cost of the overall system. In addition, if the general-purpose input-output interface is used instead to output control signals to control the card reader chip (for example, to control the configuration settings of the card reader chip), the general-purpose input-output interface will cause its own problems due to the need for multiple control methods. The number of pins required by itself is quite large, which is due to the fact that the control signal output by its pins is a digital signal, so it only has the representation of bit "0" and bit "1" and cannot reduce its pins The number, which in turn leads to an increase in the cost of the card reader chip.

In addition, if an analog-to-digital converter (Analog-to-Digital Convener, ADC) is used instead to convert the analog control signal input from the outside of the card reader chip into a digital control signal to realize the mechanism of controlling the card reader chip, then Because the analog/digital converter needs to convert the instantaneously changing analog control signal into a digital control signal through sampling in real time, the implementation of the overall circuit becomes more complicated, even if it can integrate the analog/digital converter Into the card reader chip to reduce the number of pins, but its cost will also increase.

In summary, although the existing mechanisms can control the operation of the card reader chip, they cannot effectively reduce the number of pins required to input control signals to the card reader chip and the overall system cost at the same time.

Contents of the invention

Therefore, one of the objects of the present invention is to provide a control device and method for generating a setting signal based on a reference value and an input signal provided by a load circuit, which can effectively reduce the input setting signal to a chip (such as a card reader chip) The number of pins required and the overall system cost at the time, in order to solve the problems mentioned above.

The invention discloses a control device for setting chips. The control device includes a power supply circuit, a load circuit and a determination circuit, wherein the power supply circuit is used to provide an output current, the load circuit is coupled to the power supply circuit, and is used to determine an input signal according to the output current, and the The determining circuit is coupled to the load circuit and used for determining the setting signal according to the input signal and at least one reference value.

Description of drawings

Fig. 1 is a schematic diagram of an embodiment of the control device of the present invention.

Description of reference symbols

100 control device 105 power circuit 110 load circuit 115 decision circuit 120 timer 125 first decision unit 130 second decision unit

Detailed ways

In the present invention, for the card reader chip itself, the control signal does not require particularly high signal real-time performance, so the sampling circuit in the analog/digital converter can be discarded without changing the overall circuit in practice. It is complicated and will not cause inconsistent system functions, and the spirit of the present invention is to use this as an improved basis to realize a mechanism that only needs a single pin to control the operation of the card reader chip. The detailed description is as follows.

Please refer to FIG. 1 , which is a schematic diagram of an embodiment of a control device 100 of the present invention. The control device 100 can be applied to a card reader chip to generate a setting signal to set its chip configuration, however, the present invention is not limited thereto, that is, the control device 100 can also be applied to chips with other purposes/functions should also belong to the scope of the present invention.

As shown in FIG. 1 , the control device 100 includes a power supply circuit 105 , a load circuit 110 and a determination circuit 115 . In one embodiment, the power circuit 105 can be used to provide the output current I _out with a fixed current value. The load circuit 110 includes a capacitor C and a resistor R connected in parallel, wherein the capacitor C and the resistor R are charged or discharged according to the output current I _out to set the input signal S _in . The decision circuit 115 includes a timer 120, a first decision unit 125 and a second decision unit 130, wherein the timer 120 generates a timing value T _v according to the voltage level of the input signal S _in , which is obtained by The timing value T _v is determined by the time when the timing input signal S _in reaches a second predetermined voltage level from a first predetermined voltage level, wherein the first and second predetermined voltage levels can be set according to design requirements, For example, the first and second predetermined voltage levels can be set to 0V and 0.8V respectively. The first determination unit 125 receives the timing value T. and a plurality of reference values S ₁ to S _N-1 , and determine a first setting signal component C ₁ by comparing the timing value T _v with a plurality of reference values S ₁ to S _N-1 , that is, when the input When the signal S _in reaches the second predetermined voltage level, the first determination unit 125 compares the timing value T _v with the reference values S _{1 -SN-1} to determine the first set signal component C ₁ . The second determination unit 130 generates a second setting signal component C ₂ according to the input signal S _in and a plurality of reference values S ₁ ′˜S _M-1 ′. The setting signal _Sc outputted by the decision circuit 115 is composed of the first setting signal component _C1 and the second setting signal component _C2 . In order to simplify the diagram, in FIG. 1 , the first setting signal component C ₁ and the second setting signal component C ₂ are directly combined to form the setting signal _Sc . For example, if the first setting signal component C ₁ and the second setting signal component C ₂ have x bits and Y bits respectively, then the output setting signal _Sc has (x+Y) bits .

In a preferred embodiment, the control device 100 uses the fixed output current _Iout provided by a current source in the power supply circuit 105 to charge and discharge the capacitor C and the resistor R in the load circuit 110, so its operation principle is described as follows .

When the card reader chip is just activated, the voltage level of the input signal S _in will rise due to the capacitor C being charged by the output current I _out , and the capacitors with different capacitance values will be charged from a voltage level to The time for another voltage level is also different, for example, a capacitor with a larger capacitance value will be charged more slowly. Therefore, the purpose of setting the first set signal component _C1 can be achieved by setting the capacitance value of the capacitor C. At this time, the timer 120 can be used to time the input signal S _in from a first predetermined voltage level (for example 0 volts) reaches a second predetermined voltage level (for example, 0.8 volts) to determine the timing value T _v , and then, the first decision unit 125 is responsible for comparing the timing value T _v with a plurality of reference values S ₁ ~ _{SN- 1} (which is a reference time value) to determine the first setting signal component C ₁ . In the above example, counting from the first predetermined voltage level is not limited to counting from 0 volts, and counting can also be started from a non-zero voltage level, which also conforms to the spirit of the present invention.

When the load circuit 110 tends to a steady state, that is, the resistor R and the capacitor C have been charged and discharged for a sufficient time to reach a steady state, at this time, although the voltage level of the input signal S _in remains stable, however, the input signal The voltage level of S _in will have different voltage levels due to the different impedance values selected by the resistor R. Therefore, the second determination unit 130 can be based on the voltage level of the input signal S _in in a steady state and the reference value s ₁ '～S _M-1 '(which are different reference voltage levels) to generate the second setting signal component C ₂ , and finally, the second setting signal component C ₂ and the first setting signal component C ₁ form a setting Output and set the card reader chip with a fixed signal _Sc .

Please note here that in this embodiment, both the determination circuit 115 and the power supply circuit 105 can be integrated in the card reader chip, and the capacitor C and the resistor R in the load circuit 110 are set on the card reader chip. Therefore, the user can dynamically change the capacitance value of the capacitor C and the resistance value of the resistor _R externally according to the representative bit value of the setting signal S c required by the card reader chip. However, in another embodiment, the decision circuit 115, the power supply circuit 105 and the load circuit 110 can all be integrated in the card reader chip, although this architecture cannot dynamically set the capacitance C according to the requirements of the card reader chip The capacitance value and the impedance value of the resistor R, but the circuit structure for generating the setting signal composed of the decision circuit 115, the power supply circuit 105 and the load circuit 110 still belongs to the scope of the present invention.

To sum up the above, in the embodiment where the resistor R and the capacitor C are arranged outside the card reader chip, the user can adjust the resistor R and capacitor C to generate different setting signals Sc to set the card reader chip , and at the same time, because the input signal S _in is transmitted to the decision circuit 115 only through a single pin of the card reader chip (such as the terminal P shown in FIG. 1 ), the cost of chip packaging can be greatly reduced. Please note here that N-1 reference values S ₁ ~S _N-1 will be able to generate the first setting signal component C ₁ that can set log ₂ N bits, and M-1 reference values s ₁ '~S _M-1 ' will be able to generate the second setting signal component C ₂ which can set log ₂ M bits, and thus will eventually form a setting signal S _c which can set log ₂ N+log ₂ M bits. For example, for a digital setting signal that needs 4 bits at the end (that is, there are 16 different digital setting signals), the value of N can be set to 4 and the value of M can also be set to 4, that is Only six reference values S ₁ ~ S ₃ , S ₁ ' ~ S ₃ ' are needed to complete the 4-bit setting signal.

Please note here that in this embodiment, in order to achieve more types of setting signals to set the card reader chip, multiple reference values S ₁ ~S _N-1 , S ₁ ′~S _M-1 ′ are used However, if only the reference values S ₁ , S ₁ ′ are used to implement, although only a few types of setting signals can be achieved in operation, it is also helpful to solve the problems caused by the prior art.

In the embodiment of the present invention, only a single pin is required to set the operation of the chip of the card reader. However, in other embodiments, the mechanism provided by the present invention can also be used to implement the chip with multiple The architecture of the group control device. Since each control device uses a pin to connect the load circuit, more types of setting signals can be obtained to set the card reader chip.

In another embodiment, the resistor R in the second determination unit 130 and the load circuit 110 can be removed, and at this time, the setting signal _Sc can be determined only by comparing the charging time of different capacitance values, That is to say, the setting signal _Sc only includes the first setting signal component C ₁ . Although compared with the embodiment shown in FIG. 1 , it cannot obtain more types of setting signals, but it can also solve the The problem of high packaging cost caused by too many pins also belongs to the scope of the present invention. Even in another embodiment, the capacitor C in the first decision unit 130, the timer 120 and the load circuit 110 can be removed, and the setting signal can be determined only by comparing the different potential differences generated by the output current. S _c , that is, the setting signal S _c only includes the second setting signal component C ₂ , although compared with the embodiment shown in Figure 1, it cannot obtain more types of setting signals, but it can also solve the problem. The problem of high packaging cost caused by too many chip pins also belongs to the scope of the present invention. It can be seen from the above-mentioned embodiments that the impedance change caused by the content change of the load circuit 110 should also belong to the scope of the present invention.

In addition, in another embodiment, the current source in the power supply circuit 105 is not limited to only use a fixed current source, for example, a non-fixed current source that increases/decreases with time can also be used Current source, and the above reference value must be changed accordingly, although this kind of non-fixed current source will make the reference value need to be adjusted and it will become more difficult to choose, but as long as the current value of the output current I _out is predictable , that is, regular changes rather than random changes, can also be applied to the control device 100 .

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (12)

1. one kind is used for the control device of setting chip, and it comprises:

One power circuit is used to provide an output current;

One load circuit is coupled to this power circuit, is used for determining an input signal according to this output current; And

One decision-making circuit is coupled to this load circuit, is used for according to this input signal and at least one group of reference value to determine a setting signal.

2. control device as claimed in claim 1, wherein this load circuit comprises:

One capacitance component is used for carrying out charge or discharge to set this input signal according to this output current.

3. control device as claimed in claim 1, wherein this load circuit comprises:

One resistor assembly, the potential difference (PD) that is used for producing according to this output current is to set this input signal.

4. control device as claimed in claim 2, wherein this load circuit comprises:

One resistor assembly, it is in parallel with this capacitance component, and the potential difference (PD) that is used for producing according to this output current is to set this input signal.

5. control device as claimed in claim 2, wherein this decision-making circuit comprises:

One timer is used for according to this input signal to produce a clocking value; And

One first decision unit is coupled to this timer, is used for according to this clocking value and this at least one group of reference value to determine this setting signal.

6. control device as claimed in claim 4, wherein this decision-making circuit comprises:

One timer is used for according to this input signal to produce a clocking value;

One first decision unit is coupled to this timer, is used for according to this clocking value and one first group of reference value to produce one first setting signal composition; And

One second decision unit is coupled to this load circuit, is used for according to this input signal and one second group of reference value to produce one second setting signal composition;

Wherein this setting signal is determined by this first setting signal composition and this second setting signal composition.

7. control device as claimed in claim 5, wherein this clocking value is determined from the time that one first predetermined voltage level reaches one second predetermined voltage level by this input signal.

8. control device as claimed in claim 6, wherein this clocking value is determined from the time that one first predetermined voltage level reaches one second predetermined voltage level by this input signal.

9. control device as claimed in claim 6, wherein this second group of reference value is one group of reference voltage level, and relatively this group reference voltage level and this input signal produce this second setting signal composition in this second decision unit.

10. control device as claimed in claim 1, wherein this decision-making circuit is integrated in the chip, and this load circuit is arranged at the outside of this chip.

11. control device as claimed in claim 10, this input signal that wherein this load circuit produced only transfers to this decision-making circuit via the single pin of this chip.

12. control device as claimed in claim 1, this output current that wherein this power circuit provided is certain electric current.

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