CN100534200C - Error detection device and method for video decoder - Google Patents

Abstract

The invention relates to a facility and method for detecting errors of video decoder. The facility includes: a scanner unit which is used for detecting syntax video signs in the bit stream, a storage unit which is used for saving the additional information of the type of the detected signs and location information of bit-stream, a comparing unit which is used for comparing the location on the bit-stream guided by the video recorder and the location of the signs saved in storage unit for the additional information, and a controlling unit which is used for decoding from the location of related signs after the decoding location is changed according to the error information of the comparing unit.

Description

Error detection device and method for video decoder

technical field

The invention relates to an error detection device and method of a video decoder.

Background technique

Video codecs (codec) are widely used with the standardized operation of ITU's H.261/263/264 and ISO's MPEG-1/2/4, etc., especially with the Internet, the third generation of wireless communication With the development of the Internet, etc., it has become the main application program (application) in the network environment.

When using a network to transmit video signals, especially in a wireless environment, data loss (loss) and corruption (corruption) will occur on the transmission channel. Therefore, the video decoder must have the function of detecting errors in time and hiding the detected errors while decoding the erroneous data.

It is the goal of all transmission systems to quickly and accurately transmit the information you want to transmit, and enable the other party to flexibly use the correct information. For this reason, in most digital transmission systems, the sender encodes the digital data to be transmitted according to certain coding rules and then transmits it, and the receiver decodes the encoded transmission data and extracts all the data from it. data needed. When data is encoded and then transmitted, errors rarely occur during transmission, and if errors do occur, the receiver can correct them.

Generally speaking, the error detection method is composed of a method for checking the video standard syntax and semantics.

Now, with reference to the accompanying drawings, the structure and actions of the existing video decoder used to play the video code stream will be briefly described. The video decoder includes error detection equipment and equipment for recovering and concealing the detected errors. .

FIG. 1 is a schematic structural diagram of a video decoder based on the prior art.

Referring to FIG. 1, the bit buffer 102 is responsible for receiving the transmitted bit stream and storing it.

The picture header detection circuit 104 is responsible for detecting the picture header pasted to the head of each picture in the bit stream stored in the bit buffer 102, and determining the type (I, P, B) of each picture.

The control center circuit 112 is responsible for judging the video code stream of one image from the bit buffer 102 into each I frame period based on the above judgment.

The segment header detection circuit 105 is responsible for detecting the segment header pasted to the head of each segment in the bit stream.

The variable length decoder 106 is in charge of variable length decoding of the bit stream for each image based on the Huffman codes in the Huffman code table stored in the first ROM (memory) 110 .

The inverse quantization circuit 107 is responsible for dequantizing the data after the variable-length decoding process according to the quantization critical value in the quantization code table memorized in the second ROM (memory) 111, and calculates the DCT (discrete cosine transform) coefficient data.

IDCT (Inverse DCT: inverse discrete cosine transform) circuit 108 is responsible for performing inverse discrete cosine transform (IDCT) and transforming DCT coefficient data.

The MC (Motion Compensation: motion compensation) circuit 109 is responsible for performing motion compensation prediction according to the processing result of the IDCT circuit 108. The processing results of the MC circuit 109 are selectively stored in various regions of the frame buffer 103 (forward reference region 103a; backward reference region 103b; B-picture storage region 103c). The decoded image data stored in any one of the regions of the frame buffer 103 (the front reference region 103a; the rear reference region 103b; the B image storage region 103c) passes through the MC circuit 109 and is processed by the MC circuit 109. It is output as a video signal to a playback device (not shown) connected to the video decoder 101 .

The Huffman error detection circuit 113 monitors the decoding process of the variable length decoder 106 and detects errors in the bit stream segment by segment. That is, when the data corresponding to the segment is not stored in the Huffman coding table, or the data corresponding to the segment is inconsistent with the past decoded data, it is determined that the segment has an error.

The control center circuit 112 controls the variable-length decoder 106 to stop the decoding process of the first segment judged to have an error according to the result of the determination, and invalidates the decoding process result of the first segment. And, according to the detected segment header, the second segment that needs to be decoded after the first segment is judged from the above-mentioned bit buffer 102, and the variable length of the second segment is performed in the above-mentioned variable length decoder 106. long decoding.

On the other hand, the control center circuit 112 controls the MC circuit 109 and the frame buffer 103 to replace the first fragment to be stored in the frame buffer 103 with the previous one including the first fragment and output it. 3rd fragment contained in the image to the player. This third fragment corresponds structurally to the above-mentioned first fragment. Therefore, what is output is not the decoded data of the segment where the error occurred, but the decoded data of the segment corresponding to the erroneous segment in the previous picture. In this way, fragment errors are hidden.

However, it is difficult to detect all the errors contained in the above-mentioned bit-stream only by utilizing the above-mentioned special syntax and semantics of the compressed bit-stream.

Therefore, on the error detection device of the existing video decoder, the errors that are not detected cannot be properly concealed on the screen, so it has a very bad influence on the video quality after decoding, and it will also cause Operational failure of the signal processing circuit.

Contents of the invention

The present invention is proposed to solve the above problems, and its purpose is to provide an error detection device and method for a video decoder. Utilizing the device and method, the present invention can perform error detection on the video decoder in addition to using methods relying on syntax and semantics, and additionally utilize the types of flags existing in the syntax and the location information on the bit stream as the basis for error detection. The way of recovering the detected error information minimizes the influence caused by the bit stream with errors.

In order to achieve the above object, the error detection device of the video decoder based on the present invention is characterized in that it includes the following components: a sign pre-scan section that is responsible for detecting the video syntax sign from the input bit stream; An additional information storage unit that stores the type of the logo detected by the logo preview unit and the position information on the bit stream; it is responsible for comparing the position of the logo guided by the video decoder on the bit stream with the position information stored in the above additional information storage unit An error detection unit that compares the positions of the flags and outputs an error detection signal when the positions of the marks do not coincide with each other.

In order to achieve the above object, the error detection method of a video decoder based on the present invention is characterized in that it includes the following steps: responsible for scanning the bit stream input into the video decoder; The step of storing all the detected valid flags on the above-mentioned bit stream and the additional information formed by the position information of the above-mentioned valid flags; responsible for combining the flag positions on the bit stream guided by the video decoder with the above-mentioned additional information stored in the additional information storage unit The step of comparing the positions of each mark; the step responsible for judging an error when the result of the above comparison is that the positions of the marks are inconsistent.

According to the compression method of the input bit stream, the additional information is characterized in that it includes a frame header, a GOB header, a segment header, etc., or includes a VOS header, a VOL header, a GOV header, a VOP header, and a resync header, etc.

The present invention is characterized in that it further includes the step of re-decoding from the position of the relevant flag when it is judged that the above-mentioned error has occurred.

Effect of the present invention:

With the video decoder error detection device and method based on the present invention, in addition to using the method of syntax and semantics in the existing video decoder for error detection, it is also possible to additionally use the type of flags that exist in the syntax Error recovery processing is performed on the error information detected with the position information on the bit stream, and in this way, the impact of the erroneous bit stream is minimized.

In order to further illustrate the above-mentioned purpose, structural features and effects of the present invention, the present invention will be described in detail below in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic structural diagram of a video decoder based on the prior art.

Fig. 2 is a schematic structural diagram of a video decoder including an error detection device according to the present invention.

Fig. 3 is a schematic structural diagram of a decoder including an error detection device according to an embodiment of the present invention.

Explanation of the symbols of the main parts in the accompanying drawings:

210: Logo pre-scanning department 220: Additional information storage department

230: Error detection unit 310: Decoding unit

312: control center circuit

Detailed ways

The implementation of the error detection device and method for a video decoder of the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 2 is a schematic structural diagram of a video decoder including an error detection device according to the present invention.

The error detection device of the video decoder based on the present invention, as shown in FIG.

The marker pre-scanning unit 210 is responsible for scanning the input bit stream and detecting the markers on the video syntax from the bit stream. According to the different compression methods of the input bit stream, the above-mentioned signs on the video syntax include frame header, GOB header, segment header, etc., or include VOS header, VOL header, GOV header, VOP header, and resync (resync) header, etc.

The additional information storage unit 220 is responsible for storing the type of the marker detected by the marker pre-scan unit and the position information on the bit stream.

The error detection unit 230 is responsible for comparing the position of the flag guided by the video decoder on the bit stream with the position of the flag stored in the additional information storage unit 220, and outputs an error detection signal when the positions of the flags are inconsistent with each other. .

The error detection device of the video decoder based on the present invention having the above structure can easily use the type of the flag stored in the above-mentioned additional information storage unit 220, the position information on the bit stream, and the flag checked at the time of decoding. The position on the bitstream at which an error was detected while decoding.

Then, based on the error information output by the error detection unit 230, the video decoder starts decoding again from the detected error-related flag.

Fig. 3 is a schematic structural diagram of a decoder including an error detection device according to an embodiment of the present invention.

As shown in FIG. 3 , a video decoder that includes an error detection device based on an embodiment of the present invention generally includes: a decoding unit 301 constituting the decoder, a sign preview unit 210, an additional information storage unit 220 and an error detection unit 230.

The decoding unit 301 includes: a bit buffer 102, a frame buffer 103, an image header detection circuit 104, a segment header detection circuit 105, a variable length decoder 106, an inverse quantization circuit 107, an IDCT circuit 108, and an MC circuit 109 , the first ROM110, the second ROM111, the control center circuit 312, the Huffman error detection circuit 113, and the like. Among the parts constituting the above-mentioned decoding unit 301 , the same parts as those of the conventional equipment are denoted by the same symbols.

Next, the operation of the decoder including the error detection device according to the embodiment of the present invention having the above-mentioned structure will be described.

First, a compressed bit stream is input from a transmission medium to the decoder including error detection means. The transmission media includes not only recording media such as video CD, CD-ROM, DVD, and digital video recorder, but also communication media such as short-distance communication network (LAN), television media such as terrestrial TV or satellite TV, and optical cable TV.

If the compressed bit stream is input, then the flag pre-scan unit 210 performs free scanning to detect the video syntax flag contained in the bit stream before the decoding unit 301 processes the input bit stream, Then generate additional information.

The valid marker of the video signal on the video syntax, according to the compression method of the above video signal, includes the following information.

In the case of H.263, including Frame Header (Frame Header), GOB Header (GOB Header), Slice Header (Slice Header), etc.

In the case of MPEG4SP, it includes VOS Header (VOS Header), VOL Header (VOL Header), GOV Header (GOV Header), VOP Header (VOP Header) and synchronization mark (Resync Marker).

The additional information storage unit 220 stores the type of the marker detected by the marker pre-scan unit 210 and position information on the bit stream. That is, all valid flags found in the bit stream, the types of the respective flags, and position information on the bit stream are all stored in the above-mentioned additional information storage unit 220 .

The error detection unit 230 compares the position of the flag on the bit stream guided by the decoding unit 301 with the position of the flag stored in the additional information storage unit, and outputs an error detection signal when the positions of the flags do not coincide with each other. .

In addition to the method of using additional information and relying on syntax and semantics, the error detection unit 230 also additionally performs error detection. This additional error detection process is as follows:

First, the position on the bit stream currently guided by the decoding unit 301 is compared with the position of each flag in the above-mentioned additional information storage unit 220 .

If the position of the effective flag stored in the above-mentioned additional information storage unit 220 exceeds the current bit stream pointer (pointer), if the relevant flag cannot be properly resolved (parsed), it is due to the influence of an error that occurred before , so that in the process of not normally decomposing the bit stream, the relevant flags are passed because they are not regarded as flags, and because the errors cannot be detected by relying on the method of syntax and semantics, it can be judged that an error has occurred.

If the error detection unit 230 detects the occurrence of such errors, the control center circuit 312 of the decoding unit 301 inputs an error occurrence signal to indicate that an error has occurred. Therefore, the above-mentioned control center circuit 312 starts to decode again from the position of the relevant flag that was passed over without decomposing.

In detail, the control center circuit 312 stops the currently ongoing decoding operation according to the error detection signal output by the error detection unit 230 . That is, the control center circuit 312 stops the decoding process of the bit stream including the flag that is determined to have an error by the variable length decoder 106 based on the error detection signal of the error detection unit 230, and makes the The result of the decoding process performed on the bitstream marked above is invalid.

Therefore, in order to perform correct decoding, the control center circuit 312 changes the position where decoding is restarted to the position where the relevant flag is located, and starts decoding again from here. Therefore, the bit stream is re-interpreted from the above-mentioned bit buffer 102 starting from the flag where an error is detected, and the variable-length decoding is performed by the above-mentioned variable-length decoder 106 .

Those of ordinary skill in the art should recognize that the above embodiments are only used to illustrate the present invention, rather than as a limitation to the present invention, as long as within the scope of the spirit of the present invention, the above-described embodiments Changes and modifications will fall within the scope of the claims of the present invention.

Claims (4)

1, a kind of error detector element of Video Decoder is characterized in that comprising following part:

The sign that detects video sentence structure sign from the bit stream of input is swept portion in advance;

Be responsible for above-mentioned the sign kind of the sign that detects of the portion of sweeping and the additional information reservoir that the positional information on the described bit stream stores in advance;

To the sign of Video Decoder guiding on described bit stream the position and the position of the stored sign of said additional information reservoir compare, and when the position of above-mentioned sign is mutually internally inconsistent the wrong detection unit of output error detection signal.

2, a kind of error-detecting method of Video Decoder is characterized in that comprising following step:

The step that the bit stream of input video decoder is scanned;

The step that the additional information that positional information constituted of whole effective markers on the above-mentioned above-mentioned bit stream that detects according to scanning and above-mentioned effective marker is stored;

The step that mark position on the bit stream of Video Decoder guiding and position as each stored sign of additional information are compared;

When above-mentioned comparative result is mark position when inconsistent, just judge wrong step to occur.

3, the error-detecting method of Video Decoder as claimed in claim 2 is characterized in that:

According to the compress mode of described incoming bit stream, comprise frame head, GOB head, slice header in the described additional information, perhaps comprise VOS head, VOL head, GOV head, vop header and heavy synchronous head.

4, the error-detecting method of Video Decoder as claimed in claim 2 is characterized in that:

When judging when making a mistake, described method also comprises the step that begins to decode again from the correlating markings position.

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