CN100420033C - Field effect transistor and method of manufacturing the same - Google Patents
Field effect transistor and method of manufacturing the same Download PDFInfo
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Abstract
一种场效应晶体管,其包括一第一导电类型的半导体层;一第二导电类型的源极区域与一第二导电类型的漏极区域分别形成于上述半导体层,该源极区域与该漏极区域相距一定距离;一绝缘氧化层形成于上述半导体层,且位于上述源极区域与漏极区域之间;一源极电极、一漏极电极与一栅极电极分别形成于上述源极区域、漏极区域与绝缘氧化层,其中,该半导体层为一半导体性的碳纳米管层。
A field effect transistor, which includes a semiconductor layer of a first conductivity type; a source region of a second conductivity type and a drain region of a second conductivity type are respectively formed on the semiconductor layer, the source region and the drain The electrode regions are separated by a certain distance; an insulating oxide layer is formed on the above-mentioned semiconductor layer, and is located between the above-mentioned source region and the drain region; a source electrode, a drain electrode and a gate electrode are respectively formed on the above-mentioned source region . The drain region and the insulating oxide layer, wherein the semiconductor layer is a semiconducting carbon nanotube layer.
Description
【技术领域】 【Technical field】
本发明涉及一种场效应晶体管,尤其涉及一种基于碳纳米管的场效应晶体管及其制造方法。The invention relates to a field effect transistor, in particular to a carbon nanotube-based field effect transistor and a manufacturing method thereof.
【背景技术】 【Background technique】
自从第一个IC(Integrated Circuit)诞生以来,以硅器件为基础的微处理器产品的研发与制造在摩尔定律下以每18个月晶体管的数量翻一番的速度极速发展着。到2002年,微处理器已经含有7600万个晶体管,能够实现非常强大的功能。然而,科学界普遍认为摩尔定律不会永远有效,50纳米是现代半导体工艺的极限,而Intel的最新工艺是0.13微米,即硅极限将在10~15年内到达。Since the birth of the first IC (Integrated Circuit), the R&D and manufacturing of microprocessor products based on silicon devices has been developing at a rapid rate of doubling the number of transistors every 18 months under Moore's Law. By 2002, microprocessors contained 76 million transistors and were capable of very powerful functions. However, the scientific community generally believes that Moore's Law will not be valid forever, 50 nanometers is the limit of modern semiconductor technology, and Intel's latest technology is 0.13 microns, that is, the silicon limit will be reached within 10 to 15 years.
硅器件的基础是硅原子组成的晶体。晶体中硅原子不连续的能级构成了能量带,半导体中的电子在能量带中运动。能带的能量远远大于硅原子能级的能量,它会使电子从原子的特定能级中逸出。如果硅片上晶体管尺寸非常小,能带导致的电子逸出就会产生相邻晶体管之间严重漏电,造成电子开关无法“关断”。另外,晶体管尺寸过小也会给散热造成巨大困难。这些物理性的难题将使提高硅器件集成度的成本越来越高。The basis of silicon devices is a crystal composed of silicon atoms. The discontinuous energy levels of silicon atoms in the crystal constitute the energy band, and the electrons in the semiconductor move in the energy band. The energy band is much larger than the energy of the energy level of the silicon atom, and it will cause electrons to escape from the specific energy level of the atom. If the size of the transistors on a silicon chip is very small, the escape of electrons due to the energy band can cause severe leakage between adjacent transistors, making the electronic switch unable to "turn off". In addition, the small size of the transistor will also cause great difficulties in heat dissipation. These physical challenges will make increasing the integration of silicon devices increasingly expensive.
自从1991年,Ijima发现碳纳米管(具体参见Nature,1991,354,56)以来,1998年,IBM与NEC合作成功地用一根半导体性的碳纳米管制成场效应晶体管(具体参见Applied Physics Letters,1998,73,2447),从而拉开了用碳器件取代硅器件的序幕。该基于一根碳纳米管的晶体管体现出良好地电学性能,当栅极电压变动时,源极漏极间的电导变化为10万倍。由于碳纳米管的尺寸非常小,据预测,如果用碳纳米管制成器件,其晶体管的密度可比当前最先进的0.13微米硅器件高6万倍。Since Ijima discovered carbon nanotubes in 1991 (see Nature, 1991, 354, 56 for details), in 1998, IBM and NEC successfully used a semiconducting carbon nanotube to make a field effect transistor (see Applied Physics Letters for details) , 1998, 73, 2447), which opened the prelude to replace silicon devices with carbon devices. The transistor based on a carbon nanotube exhibits good electrical performance. When the gate voltage changes, the conductance between the source and the drain changes by 100,000 times. Due to the very small size of carbon nanotubes, it is predicted that if devices made of carbon nanotubes are used, the density of transistors can be 60,000 times higher than that of the most advanced 0.13 micron silicon devices.
然而,上述用单根碳纳米管制备的场效应晶体管需要采用特殊制备工艺,如使用原子力显微镜(AFM,Atom Force Microscope)进行加工,制备成本非常高,仅适合用于实验阶段,不适合于大规模生产。However, the above-mentioned field effect transistor prepared with a single carbon nanotube requires a special preparation process, such as using an atomic force microscope (AFM, Atom Force Microscope) for processing, and the preparation cost is very high, which is only suitable for the experimental stage and is not suitable for large-scale applications. mass production.
因此,提供一种制备方法简单、成本低、热性能好的场效应晶体管十分必要。Therefore, it is very necessary to provide a field effect transistor with simple preparation method, low cost and good thermal performance.
【发明内容】 【Content of invention】
为解决现有技术的技术问题,本发明的目的是提供一种制备方法简单、成本低、热性能好的场效应晶体管。In order to solve the technical problems of the prior art, the object of the present invention is to provide a field effect transistor with simple preparation method, low cost and good thermal performance.
本发明的另一目的是提供此种场效应晶体管的制备方法。Another object of the present invention is to provide a method for preparing such a field effect transistor.
为实现本发明的目的,本发明提供一种场效应晶体管,其包括一第一导电类型的半导体层;一第二导电类型的源极区域与一第二导电类型的漏极区域分别形成于上述半导体层,该源极区域与该漏极区域相距一定距离;一绝缘氧化层形成于上述半导体层,且位于上述源极区域与漏极区域之间;一源极电极、一漏极电极与一栅极电极分别形成于上述源极区域、漏极区域与绝缘氧化层,其中,该半导体层为一半导体性的碳纳米管层。To achieve the purpose of the present invention, the present invention provides a field effect transistor, which includes a semiconductor layer of a first conductivity type; a source region of a second conductivity type and a drain region of a second conductivity type are respectively formed on the above-mentioned A semiconductor layer, the source region and the drain region are at a certain distance; an insulating oxide layer is formed on the semiconductor layer and is located between the source region and the drain region; a source electrode, a drain electrode and a The gate electrodes are respectively formed on the source region, the drain region and the insulating oxide layer, wherein the semiconductor layer is a semiconducting carbon nanotube layer.
本发明碳纳米管层中碳纳米管的直径为2~10纳米,高度为20~500纳米,绝缘氧化层的材料为二氧化硅。The diameter of the carbon nanotube in the carbon nanotube layer of the present invention is 2-10 nanometers, the height is 20-500 nanometers, and the material of the insulating oxide layer is silicon dioxide.
为实现本发明的另一目的,本发明还提供一种制备此种场效应晶体管的方法,包括以下步骤:To achieve another object of the present invention, the present invention also provides a method for preparing such a field effect transistor, comprising the following steps:
提供一第一导电类型的半导体性碳纳米管层衬底;providing a semiconducting carbon nanotube layer substrate of a first conductivity type;
在上述碳纳米管层衬底形成第二导电类型的源极区域与漏极区域,该源极区域与漏极区域相距一定距离;Forming a source region and a drain region of the second conductivity type on the above-mentioned carbon nanotube layer substrate, the source region and the drain region are separated by a certain distance;
在碳纳米管衬底上、源极区域与漏极区域之间形成一绝缘氧化层;forming an insulating oxide layer on the carbon nanotube substrate between the source region and the drain region;
分别设置金属电极于上述源极区域、漏极区域与绝缘氧化层上。Metal electrodes are respectively disposed on the source region, the drain region and the insulating oxide layer.
与现有技术相比较,本发明的场效应晶体管具有如下优点:其一,直接采用碳纳米管层替代传统场效应晶体管的硅衬底,能够与传统硅工艺技术相结合,适合大规模生产应用;其二,碳纳米管本身具有极高的导热系数,达到400~1000Watt/mK,因而可以有效地将晶体管工作所产生的热量快速散掉,从而解决当集成度提高所存在的散热问题;其三,由于采用碳纳米管作为衬底,其纳米级加工可以使得目前硅器件0.13微米的工艺变得更小,如60纳米以下,所以每个晶体管之尺寸会变得更小,且由于碳原子本身比硅原子稳定,可以实现以更少的电子移动来完成晶体管的开关功能,从而能够减少系统热量的产生。Compared with the prior art, the field effect transistor of the present invention has the following advantages: First, the carbon nanotube layer is directly used to replace the silicon substrate of the traditional field effect transistor, which can be combined with the traditional silicon process technology, and is suitable for large-scale production applications ; Second, carbon nanotubes themselves have extremely high thermal conductivity, reaching 400-1000Watt/mK, so they can effectively dissipate the heat generated by the operation of transistors quickly, thereby solving the problem of heat dissipation when the integration level increases; Third, due to the use of carbon nanotubes as the substrate, its nanoscale processing can make the current silicon device 0.13 micron process smaller, such as below 60 nanometers, so the size of each transistor will become smaller, and because carbon atoms It is more stable than silicon atoms, and can realize the switching function of transistors with less electron movement, thereby reducing the generation of heat in the system.
【附图说明】【Description of drawings】
图1是本发明的场效应晶体管的示意图。FIG. 1 is a schematic diagram of a field effect transistor of the present invention.
图2是本发明的场效应晶体管的制备方法的示意图。Fig. 2 is a schematic diagram of a method for preparing a field effect transistor of the present invention.
【具体实施方式】 【Detailed ways】
下面将结合附图及具体实施例对本发明进行详细说明。The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.
请参阅图1,本发明提供一种场效应晶体管11,其包括一P型碳纳米管层12衬底;一N型掺杂区域作为源极区域13与一N型掺杂区域作为漏极区域14分别形成于上述P型碳纳米管层12,该源极区域13与漏极区域14相距一定距离;一绝缘氧化层15形成于上述P型碳纳米管层12上,且位于上述源极区域13与漏极区域14之间;一源极电极131、一漏极电极141及一栅极电极151分别形成于上述源极区域13、漏极区域14与绝缘氧化层15上。其中,本实施例的绝缘氧化层15为二氧化硅层,金属电极选自铝、金或铜电极。Please refer to Fig. 1, the present invention provides a kind of field effect transistor 11, and it comprises a P-type
本发明进一步提供一种场效应晶体管11的制备方法,其包括以下步骤:The present invention further provides a method for preparing a field effect transistor 11, which comprises the following steps:
步骤10是提供一P型碳纳米管层衬底;Step 10 is to provide a p-type carbon nanotube layer substrate;
步骤20是在上述P型碳纳米管层衬底相距一定距离通过离子注入方法进行掺杂,形成N型的源极区域与漏极区域,其中本实施例采用磷离子进行掺杂;Step 20 is to dope the P-type carbon nanotube layer substrate at a certain distance by ion implantation to form N-type source region and drain region, wherein phosphorus ions are used for doping in this embodiment;
步骤30是在碳纳米管层衬底上、源极区域与漏极区域之间形成一绝缘氧化层;Step 30 is to form an insulating oxide layer on the carbon nanotube layer substrate, between the source region and the drain region;
步骤40是分别设置金属电极于上述源极区域、漏极区域与绝缘氧化层上,分别形成场效应晶体管的源极电极、漏极电极与栅极电极。Step 40 is disposing metal electrodes on the source region, the drain region and the insulating oxide layer to form the source electrode, the drain electrode and the gate electrode of the field effect transistor respectively.
本发明碳纳米管层衬底的形成方法包括以下步骤:The forming method of the carbon nanotube layer substrate of the present invention comprises the following steps:
提供一基底,基底材料可选自碳、玻璃或硅;providing a substrate, the substrate material can be selected from carbon, glass or silicon;
在基底上沉积一催化剂层,催化剂层的厚度为5~30纳米,催化剂层沉积的方法可选用真空热蒸镀挥发法,也可选用电子束蒸发法。催化剂的材料可选用铁、钴、镍、铂、钯或其合金,本实施方式选用铁作为催化剂材料,其沉积的厚度为10纳米;Deposit a catalyst layer on the substrate, the thickness of the catalyst layer is 5-30 nanometers, the method of deposition of the catalyst layer can be vacuum thermal evaporation volatilization method or electron beam evaporation method. The material of the catalyst can be iron, cobalt, nickel, platinum, palladium or its alloys. In this embodiment, iron is selected as the catalyst material, and the thickness of its deposition is 10 nanometers;
将带有催化剂层的基底置于空气中,退火以使催化剂层氧化、收缩成为纳米级的催化剂颗粒。待退火完毕,再将分布有催化剂颗粒的基底置于反应室内(图未示),通入碳源气乙炔以及保护气体氩气,利用低温热化学气相沉积法,在上述催化剂颗粒上生长碳纳米管,形成碳纳米管薄膜,碳源气亦可选用其它含碳的气体,如乙烯、苯、一氧化碳等。其中,以苯作为碳源气时,其保护气体应选用氢气,以一氧化碳作为碳源气时,其催化剂应选用五羰基铁Fe(CO)5。本发明生成的碳纳米管的直径为2~10纳米,高度为20~500纳米,低温化学气相沉积法的生长温度为550~600摄氏度。The substrate with the catalyst layer is placed in the air, and annealed to oxidize and shrink the catalyst layer into nanoscale catalyst particles. After the annealing is completed, place the substrate with the catalyst particles in the reaction chamber (not shown in the figure), pass through the carbon source gas acetylene and the protective gas argon, and use the low-temperature thermal chemical vapor deposition method to grow carbon nanometers on the catalyst particles. tubes to form a carbon nanotube film. The carbon source gas can also be other carbon-containing gases, such as ethylene, benzene, carbon monoxide, etc. Among them, when benzene is used as the carbon source gas, the protective gas should be hydrogen, and when carbon monoxide is used as the carbon source gas, the catalyst should be iron pentacarbonyl Fe(CO) 5 . The diameter of the carbon nanotube produced by the invention is 2-10 nanometers, the height is 20-500 nanometers, and the growth temperature of the low-temperature chemical vapor deposition method is 550-600 degrees Celsius.
本实施例的场效应晶体管11为P沟道金属氧化物半导体场效应晶体管,本领域的技术人员应明白,对N型碳纳米管层衬底进行P型掺杂即可形成N沟道型金属氧化物半导体场效应晶体管。同样,用半导体型碳纳米管层取代传统晶体管的硅衬底亦可形成结型场效应晶体管,绝缘栅型场效应晶体管等其它场效应晶体管。The field effect transistor 11 of the present embodiment is a P-channel metal oxide semiconductor field-effect transistor, and those skilled in the art should understand that the N-channel metal oxide semiconductor field effect transistor can be formed by performing P-type doping on the N-type carbon nanotube layer substrate. Oxide Semiconductor Field Effect Transistor. Similarly, other field effect transistors such as junction field effect transistors and insulated gate field effect transistors can be formed by replacing the silicon substrate of traditional transistors with semiconductor carbon nanotube layers.
本发明的场效应晶体管具有如下优点:其一,直接采用碳纳米管层替代传统场效应晶体管的硅衬底,能够与传统硅工艺技术相结合,适合大规模生产应用;其二,碳纳米管本身具有极高的导热系数,达到400~1000Watt/mK,因而可以有效地将晶体管工作所产生的热量快速散掉,从而解决当集成度提高所存在的散热问题;其三,由于采用碳纳米管作为衬底,其纳米级加工可以使得目前硅器件0.13微米的工艺变得更小,如60纳米以下,所以每个晶体管的尺寸亦变得更小,且由于碳原子本身比硅原子稳定,可以实现以更少的电子移动来完成晶体管的开关功能,从而能够减少系统热量的产生。The field effect transistor of the present invention has the following advantages: first, the silicon substrate of the traditional field effect transistor is directly replaced by the carbon nanotube layer, which can be combined with the traditional silicon process technology, and is suitable for large-scale production and application; It has a very high thermal conductivity, reaching 400-1000Watt/mK, so it can effectively dissipate the heat generated by the operation of the transistor quickly, thereby solving the problem of heat dissipation when the integration level increases; third, due to the use of carbon nanotubes As a substrate, its nanoscale processing can make the current 0.13 micron process of silicon devices smaller, such as below 60 nanometers, so the size of each transistor becomes smaller, and because carbon atoms themselves are more stable than silicon atoms, they can The switching function of the transistor is realized with less electron movement, thereby reducing the generation of heat in the system.
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| US6515339B2 (en) * | 2000-07-18 | 2003-02-04 | Lg Electronics Inc. | Method of horizontally growing carbon nanotubes and field effect transistor using the carbon nanotubes grown by the method |
| US20030178617A1 (en) * | 2002-03-20 | 2003-09-25 | International Business Machines Corporation | Self-aligned nanotube field effect transistor and method of fabricating same |
| CN1466218A (en) * | 2002-07-05 | 2004-01-07 | 中国科学院物理研究所 | Random memory made of carbon nanotubes and its preparation method |
| CN1474458A (en) * | 2002-08-07 | 2004-02-11 | 中国科学院物理研究所 | Single-electron memory designed by Coulomb blocking principle and its preparation method |
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| US6515339B2 (en) * | 2000-07-18 | 2003-02-04 | Lg Electronics Inc. | Method of horizontally growing carbon nanotubes and field effect transistor using the carbon nanotubes grown by the method |
| US20030178617A1 (en) * | 2002-03-20 | 2003-09-25 | International Business Machines Corporation | Self-aligned nanotube field effect transistor and method of fabricating same |
| CN1466218A (en) * | 2002-07-05 | 2004-01-07 | 中国科学院物理研究所 | Random memory made of carbon nanotubes and its preparation method |
| CN1474458A (en) * | 2002-08-07 | 2004-02-11 | 中国科学院物理研究所 | Single-electron memory designed by Coulomb blocking principle and its preparation method |
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