CN109659329A - Imaging sensor with shared structure pixel layout - Google Patents
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- CN109659329A CN109659329A CN201910072333.8A CN201910072333A CN109659329A CN 109659329 A CN109659329 A CN 109659329A CN 201910072333 A CN201910072333 A CN 201910072333A CN 109659329 A CN109659329 A CN 109659329A
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- 238000003384 imaging method Methods 0.000 title claims description 26
- 238000007667 floating Methods 0.000 claims abstract description 26
- 238000009792 diffusion process Methods 0.000 claims abstract description 25
- 230000005540 biological transmission Effects 0.000 claims description 15
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 239000000126 substance Substances 0.000 claims description 5
- 238000002955 isolation Methods 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 2
- 230000005622 photoelectricity Effects 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 abstract description 6
- 238000013461 design Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 239000002184 metal Substances 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 238000010276 construction Methods 0.000 description 3
- 238000005286 illumination Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
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- 238000013473 artificial intelligence Methods 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012806 monitoring device Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H04N25/778—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes
- H10F39/8023—Disposition of the elements in pixels, e.g. smaller elements in the centre of the imager compared to larger elements at the periphery
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/803—Pixels having integrated switching, control, storage or amplification elements
- H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/813—Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels
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Abstract
本发明提供一种具有共享结构像素布局的图像传感器，所述图像传感器包括由多个按行和列设置的共享像素单元构成的像素阵列。所述共享像素单元包括第一感光单元和第二感光单元，其共享复位晶体管，浮动扩散点，源极跟随晶体管，还可以包括一行选择晶体管。所述浮动扩散点设置于所述第一感光单元和所述第二感光单元结构所形成的开口处，所述源极跟随晶体管面向所述开口设置；所述行选择晶体管设置于所述共享单元的角部位置。本发明提供的图像传感器结构布局紧凑，所述源极跟随晶体管靠近所述浮动扩散点，能有效降低所述浮动扩散点电容，提升像素电路的转换增益。
The present invention provides an image sensor with a shared structure pixel layout, the image sensor comprising a pixel array formed by a plurality of shared pixel units arranged in rows and columns. The shared pixel unit includes a first photosensitive unit and a second photosensitive unit, which share a reset transistor, a floating diffusion point, a source follower transistor, and may also include a row selection transistor. The floating diffusion point is disposed at the opening formed by the first photosensitive unit and the second photosensitive unit structure, the source follower transistor is disposed facing the opening; the row selection transistor is disposed in the shared unit corner position. The image sensor provided by the present invention has a compact structure and layout, and the source follower transistor is close to the floating diffusion point, which can effectively reduce the capacitance of the floating diffusion point and improve the conversion gain of the pixel circuit.
Description
Technical field
The present invention relates to image sensor technologies, more particularly to one kind, and there is pixel shared structure and compact layout to be arranged,
To reduce floating diffusion point capacitor and improve the imaging sensor of pixel circuit conversion gain.
Background technique
Imaging sensor is widely used in each field, such as smart phone, monitoring device, unmanned plane, and artificial intelligence etc. is more
Kind uses, and its application demand small.Common imaging sensor uses 4 transistor designs, a photodiode
In addition a transmission transistor, a reset transistor, the circuit of a source following transistor and a row selecting transistor
Structure.Pixel unit can be used for reducing Pixel Dimensions using shared structure and improve fill factor (fill factor).Filling because
For son corresponding to ratio of the region area relative to pixel cell area shared by photosensitive unit, picture can be promoted by improving fill factor
The sensitivity of plain circuit and signal-to-noise ratio.
In image sensor placement's design, such as Patent No. ZL200610006729.6, it is entitled " sensor array "
Layout design scheme disclosed in document, using the layout that 2 pixels are shared or 4 pixels are shared, Fig. 3 in patent described above,
Shown in Fig. 4, Fig. 6 layout and Fig. 7 circuit, source following transistor SF is arranged at a distance from apart from each other with floating diffusion point FD,
The capacitor that this arrangement floating diffusion point FD is generated is relatively large, and circuit conversion gain is lower, therefore pixel circuit is sensitive
Degree can reduce.Secondly, row selecting transistor SEL and source following transistor are arranged between two shared pixel units, this
Kind arragement construction can reduce the quantum efficiency of photosensitive pixel to the incident light of stop portions photodiode PD1 and PD2.
The present invention is based on the above problems, to further increase the design layout of pixel circuit and floating diffusion point being effectively reduced
The capacitor of FD improves pixel circuit conversion gain, promotes the quantum efficiency of photosensitive pixel, proposes based on shared pixel cell structure
Compact, the rationally distributed design scheme of new setting, to meet the image sensor design and application with shared dot structure.
Summary of the invention
The present invention proposes a kind of imaging sensor with shared structure pixel layout, and described image sensor includes by more
The pixel array that the shared pixel unit of a setting of tiling in rows and columns is constituted, each shared pixel unit include:
First photosensitive unit comprising photodiode and the transmission transistor for being connected to the photodiode, it is described
Photodiode is arranged along a direction, and the transmission transistor is along the corner of the photodiode with certain tilt angle
Setting；
Second photosensitive unit, it is identical as first photosensitive unit and with first photosensitive unit mirror image in the horizontal direction
It is symmetrical arranged；
First photosensitive unit and second photosensitive unit share a reset transistor, floating diffusion point, Ji Yiyuan
Pole follows transistor；
The setting structure of two transmission transistors of first photosensitive unit and second photosensitive unit is formed
One opening, the floating diffusion point are arranged at the opening；The source following transistor is set towards and close to the opening
It sets；The reset transistor is set between first photosensitive unit and second photosensitive unit；
Optionally, first photosensitive unit and second photosensitive unit further include a shared row selecting transistor, institute
State the corner that row selecting transistor is set to the shared pixel unit；
Optionally, the row selecting transistor is set to the corner of the source following transistor proximal end, to reduce
Its influence to the photodiode incident light；
Optionally, the transmission transistor is arranged along the corner of the photodiode with about 45 degree of tilt angles；
Optionally, first photosensitive unit and second photosensitive unit expand along the reset transistor, the floating
The horizontal direction center line of scatterplot and the source following transistor is in mirror symmetry；
Optionally, the setting knot of two transmission transistors of first photosensitive unit and second photosensitive unit
Structure is formed by about 90 degree of opening；
Optionally, metal connecting line is replaced to connect the source following transistor and row selection with doped silicon connection type
Transistor, to reduce influence of the metal connecting line to the photodiode incident light；The reset transistor is substituted with doped silicon
Metal connecting line is connected to the floating diffusion point, to improve the aperture opening ratio of the opening；
Optionally, the surrounding of each shared pixel unit uses high potential silicon (silicon with positive
Voltage isolation setting) is carried out, the symmetry of the shared pixel unit is improved, prevents electrical signal crosstalk；
Optionally, described image sensor is FSI (front side illumination, front-illuminated) imaging sensor
Or BSI (back side illumination, back-illuminated type) imaging sensor.
Imaging sensor proposed by the present invention with shared structure pixel layout, the every of setting of tiling in pixel array
A shared pixel unit is arranged using compact layout, and the opening of two photosensitive pixel arragement constructions is arranged in floating diffusion point
Place, source following transistor face is mutually and close to the opening, then source following transistor and floating diffusion point distance are close, then floats
The capacitor for spreading point is small, can effectively improve conversion gain.Meanwhile the corner of shared pixel unit is arranged in row selecting transistor
Position, on the incident light of photodiode block influence it is smaller, the quantum efficiency of pixel unit can be effectively improved；Source electrode follows crystalline substance
Connection between body pipe and row selecting transistor and between reset transistor and floating diffusion point substitutes metal using doped silicon
Line connection, can further decrease the influence to photodiode incident light.
Detailed description of the invention
Fig. 1 is the circuit diagram for the image sensor embodiment one that the present invention provides；
Fig. 2 is the layout structure schematic diagram of the corresponding shared pixel unit of pixel circuit of embodiment one in Fig. 1；
Fig. 3 is the circuit diagram for the image sensor embodiment two that the present invention provides；
Fig. 4 is the layout structure schematic diagram of the corresponding shared pixel unit of pixel circuit of embodiment two in Fig. 3；And
Fig. 5 is the pixel array layout structural schematic diagram of image sensor embodiment two proposed by the present invention.
Specific embodiment
The content provided below in conjunction with each accompanying drawings and embodiments to the present invention is described in detail.Mentioned below
Each accompanying drawings and embodiments are accordingly to be described in each embodiment in order to illustrate the content of present invention not to the content of present invention structure
At limitation.
Fig. 1 is the circuit diagram for the image sensor embodiment one with shared structure pixel layout that the present invention provides, such as
Shown in Fig. 1, photodiode PD1 and transmission transistor TX1 constitute the first photosensitive unit, and photodiode PD2 and transmission are brilliant
Body pipe TX2 constitutes the second photosensitive unit.First photosensitive unit and the second photosensitive unit constitute shared structure, share floating diffusion
Point FD, reset transistor RST, source following transistor SF.Reset transistor is connected to variable voltage source Vref, and source electrode follows crystalline substance
The drain electrode of body pipe is connected to fixed power source VDD, and picture element signal is output to alignment by the source electrode of source following transistor SF
(Pout).Circuit diagram shown in Fig. 1 is the pixel unit circuit for the imaging sensor one of which embodiment that the present invention provides.
Below for the image sensor pixel circuit provided in Fig. 1, propose that a kind of arragement construction is compact, pixel unit performance obtain into
The shared pixel unit design layout that one step is promoted.
Fig. 2 is that the layout structure of one of them shared pixel unit of image sensor embodiment one proposed by the present invention shows
It is intended to.Fig. 2 schematic diagram is in order to illustrate the purpose of device arrangements structure, not to the concrete shape of each device, size or angle
It is construed as limiting.In physical circuit design, different shapes can be designed as according to concrete application.In conjunction with pixel circuit in Fig. 1
Each device cell, transmission transistor TX1 are arranged in the corner of photodiode PD1 and are arranged by a tilt angle, usual feelings
45 degree of angles can be tilted under condition to be configured.Mode carries out transmission transistor TX2 and photodiode PD2 in the same configuration
Setting.The second photosensitive unit that the first photosensitive unit and PD1 and TX2 that PD1 and TX1 is constituted are constituted is along horizontal direction mirror image pair
Claim setting, as shown in Figure 2.Reset transistor RST is arranged between the first photosensitive unit and the second photosensitive unit.Transmit crystal
The setting structure of pipe TX1 and transmission transistor TX2 will form an opening, and floating diffusion point FD is arranged in the opening and distance
Opening is most nearby.The face source following transistor SF is mutually open setting, and is arranged close to floating diffusion point FD, such set-up mode
Capacitor caused by floating diffusion point FD is small, and the conversion gain of pixel circuit can be improved.First photosensitive unit and second photosensitive
Unit along reset transistor RST, floating diffusion point FD and source following transistor SF mirror symmetry, pixel circuit it is symmetrical
The noise of pixel circuit can be effectively reduced well in property.
In each shared cell of pixel array, the connection of reset transistor RST to floating diffusion point, which can use, mixes
Miscellaneous silicon substitution metal wire is attached, and in specific layout designs, is routed simpler, and the aperture opening ratio of opening portion is larger, can be with
Improve the luminous flux for being incident on photodiode.Isolation can be carried out using high potential silicon in each shared pixel unit surrounding to set
It sets, guarantees good symmetry between shared pixel unit, while the electricity string prevented between pixel shared cell can be played
It disturbs, further increases image sensor performance.
Fig. 3 is the image sensor pixel circuit for the second embodiment that the present invention provides, different from pixel circuit in Fig. 1
, two shared photosensitive units in the present embodiment remove shared reset transistor RST, and floating diffusion point FD and source electrode follow crystalline substance
It further include a row selecting transistor RS outside body pipe SF.In the present embodiment pixel circuit, reset crystalline substance transistor RST and source electrode with
Fixed power source VDD is connected to transistor SF.Picture element signal is output to alignment by row selecting transistor RS.Fig. 3 pixel circuit
Corresponding layout designs are as shown in figure 4, Fig. 4 is the layout structure signal of a shared pixel unit in the embodiment of the present invention two
Figure.The schematic diagram is not constituted to the concrete shape of each device, size or angle in order to illustrate the purpose of device arrangements structure
Limitation.In physical circuit design, different shapes can be designed as according to concrete application.
The layout knot in shared pixel cell layouts' structural schematic diagram and embodiment one provided in the embodiment of the present invention two
Structure is except that further include a row selecting transistor RS in layout setting, row selecting transistor RS is arranged in shared pixel
The corner positions of unit.As shown in Figure 4, close to the angle end of the proximal end source following transistor SF.The selection of this setup row
Transistor RS is small on the light influence for being incident on photodiode PD1 or PD2, to improve the quantum efficiency of shared pixel unit.
It, can since the setting of the distance of source following transistor SF and row selecting transistor RS is slightly remote relative to the setting position of other devices
To connect source following transistor SF and row selecting transistor RS using doped silicon substitution metal wire.This connection type can be reduced
Metal wire connection causes the light for being incident on photodiode PD1 to block influence, avoids the low quantum efficiency of drop photosensitive unit.
Similarly, shared pixel unit surrounding can carry out isolation setting using high potential silicon each of in the present embodiment, can guarantee altogether
The good symmetry of pixel unit is enjoyed, while can prevent electrical signal crosstalk bring from influencing.
Fig. 5 be in Fig. 4 the shared pixel unit that provides tile in rows and columns setting composition pixel array schematic diagram.This
The imaging sensor with shared structure pixel layout proposed is invented including but not limited to pixel array shown in Fig. 5, the picture
The picture element signal of pixel array output is read out control and processing through control circuit and exports.Proposed by the invention having is shared
The imaging sensor of pixel unit pixel array can be FSI imaging sensor or BSI imaging sensor, the present invention can
In the range of implementation.
Each examples and drawings that the present invention provides are for illustrative purposes, without departing substantially from of the invention widely main
Under purport and range, various forms of equivalent modifications are feasible.The embodiment of the present invention can be carried out according to above-mentioned detailed description
Modification.It should not be construed as limited to institute in present invention specific implementation content and claim elements for the term in claim
The specific embodiment of exposure.On the contrary, range completely determining in claim, which should be interpreted that, explains establishment according to claim
Statement.Specification of the invention and each attached drawing should be considered as it is explanatory, rather than it is constrained.
Claims (9)
1. a kind of imaging sensor with shared structure pixel layout, including by multiple shared cell structures being arranged in rows and columns
At pixel array, which is characterized in that each shared pixel unit includes:
First photosensitive unit including photodiode and is connected to the transmission transistor of the photodiode, the photoelectricity two
Pole pipe is arranged along a direction, and the transmission transistor is arranged along the corner of the photodiode with a tilt angle；Second sense
Light unit, it is identical as first photosensitive unit and with first photosensitive unit in the horizontal direction mirror symmetry be arranged；
First photosensitive unit and second photosensitive unit share reset transistor, and floating diffusion point and source electrode follow crystal
Pipe；
The transmission transistor setting structure of first photosensitive unit and second photosensitive unit forms an opening, described
Floating diffusion point is arranged at the opening；The source following transistor is arranged towards and close to the opening, the reset
Transistor is set between first photosensitive unit and second photosensitive unit.
2. the imaging sensor according to claim 1 with shared structure pixel layout, which is characterized in that described first
Photosensitive unit and second photosensitive unit include a shared row selecting transistor.
3. the imaging sensor according to claim 2 with shared structure pixel layout, which is characterized in that the row choosing
Select the corner that transistor is set to the shared pixel unit.
4. the imaging sensor according to claim 1 with shared structure pixel layout, which is characterized in that the transmission
Transistor is arranged along the corner of the photodiode with 45 degree of tilt angles.
5. the imaging sensor according to claim 1 or 3 with shared structure pixel layout, which is characterized in that described
First photosensitive unit and second photosensitive unit follow crystalline substance along the reset transistor, floating diffusion point and the source electrode
The horizontal direction center line mirror symmetry of body pipe.
6. the imaging sensor according to claim 2 with shared structure pixel layout, which is characterized in that the source electrode
Transistor is followed to be connected to the row selecting transistor by doped silicon.
7. the imaging sensor according to claim 1 with shared structure pixel layout, which is characterized in that the reset
Transistor is connected to the floating diffusion point by doped silicon.
8. the imaging sensor according to claim 1 with shared structure pixel layout, which is characterized in that described shared
Pixel unit surrounding is using the isolation setting of high potential silicon.
9. the imaging sensor according to claim 1 or 3 with shared structure pixel layout, which is characterized in that described
Imaging sensor is FSI imaging sensor or BSI imaging sensor.
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| CN201910072333.8A CN109659329A (en) | 2019-01-25 | 2019-01-25 | Imaging sensor with shared structure pixel layout |
| US16/414,669 US10727268B1 (en) | 2019-01-25 | 2019-05-16 | CMOS image sensor with compact pixel layout |
| CN201910454041.0A CN110061026B (en) | 2019-01-25 | 2019-05-28 | Image sensor with shared structure pixel layout |
| US16/902,509 US10777601B1 (en) | 2019-01-25 | 2020-06-16 | CMOS image sensor with compact pixel layout |
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| CN110336953A (en) * | 2019-07-02 | 2019-10-15 | 思特威(上海)电子科技有限公司 | Quaternary dot structure imaging sensor and reading and control method thereof |
| CN110891137A (en) * | 2019-11-15 | 2020-03-17 | Oppo广东移动通信有限公司 | Image sensor and electronic device, image processing method and storage medium |
| CN110896082A (en) * | 2019-05-28 | 2020-03-20 | 思特威(上海)电子科技有限公司 | Image sensor with novel layout |
| CN114697579A (en) * | 2020-12-31 | 2022-07-01 | 思特威(上海)电子科技股份有限公司 | Shared Pixel Structure and Image Sensing Device for Autofocus |
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| CN110896082A (en) * | 2019-05-28 | 2020-03-20 | 思特威(上海)电子科技有限公司 | Image sensor with novel layout |
| CN110336953A (en) * | 2019-07-02 | 2019-10-15 | 思特威(上海)电子科技有限公司 | Quaternary dot structure imaging sensor and reading and control method thereof |
| CN110336953B (en) * | 2019-07-02 | 2021-04-16 | 思特威(上海)电子科技股份有限公司 | Image sensor with four-pixel structure and reading control method |
| CN110891137A (en) * | 2019-11-15 | 2020-03-17 | Oppo广东移动通信有限公司 | Image sensor and electronic device, image processing method and storage medium |
| CN114697579A (en) * | 2020-12-31 | 2022-07-01 | 思特威(上海)电子科技股份有限公司 | Shared Pixel Structure and Image Sensing Device for Autofocus |
| CN116939389A (en) * | 2022-03-31 | 2023-10-24 | 思特威(上海)电子科技股份有限公司 | Shared pixel unit, image sensor and signal reading method thereof |
| CN116936585A (en) * | 2022-03-31 | 2023-10-24 | 思特威(上海)电子科技股份有限公司 | Shared pixel unit, image sensor and signal readout method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110061026B (en) | 2024-05-28 |
| CN110061026A (en) | 2019-07-26 |
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Application publication date: 20190419 |