Elevator vibration data acquisition circuit with fully isolated analog and digital signals
Technical Field
The invention relates to the technical field of special equipment, in particular to an elevator vibration data acquisition circuit with full isolation of analog and digital signals.
Background
Elevator vibration and elevator riding comfort are closely related, EVA is a common tool for elevator vibration test, but EVA is expensive, heavy in size and inconvenient to carry. The existing elevator vibration data is collected and then sent to a CPU in a rear-end data processing system for subsequent processing, but the noise of a digital circuit in the rear-end data processing system is larger; after the elevator vibration data acquisition circuit is directly connected with the rear-end data processing system, noise of the digital circuit in the rear-end data processing system can be transmitted to the data acquisition circuit in a conduction mode, and therefore accuracy of data acquired by the elevator vibration data acquisition circuit is low.
Disclosure of Invention
In order to overcome the problems, the invention aims to provide the elevator vibration data acquisition circuit with full isolation of analog and digital signals, so that the signal to noise ratio of the elevator vibration data acquisition circuit is improved, and the elevator vibration data acquisition circuit has the effect of reducing noise.
The invention is realized by adopting the following scheme: the elevator vibration data acquisition circuit with fully isolated analog and digital signals is connected with a rear-end data processing system and comprises a power isolation module, a power circuit conversion module, an acceleration sensor, an analog and digital signal isolation module and an analog-to-digital conversion module, wherein the power isolation module isolates an external power supply, the power isolation module is connected with the power circuit conversion module, the power circuit conversion module converts a 12V power supply into a power supply voltage required by the acceleration sensor and a power supply voltage required by the analog-to-digital conversion module, the acceleration sensor converts acquired analog signal data into digital signal data through the analog-to-digital conversion module, the analog and digital signal isolation module is respectively connected with the analog-to-digital conversion module and the rear-end data processing system, noise of the rear-end data processing system is prevented from being transmitted to the elevator vibration data acquisition circuit in a conduction mode, and noise interference of the elevator vibration data acquisition circuit is reduced.
Further, the power isolation module includes a power module URB2412YMD-10WR3, a capacitor C87, a capacitor C88, an electrolytic capacitor CD17, a capacitor C86, a capacitor C85, and an electrolytic capacitor CD16, wherein the capacitor C87, the capacitor C88, and the electrolytic capacitor CD17 are connected in parallel, one end of the electrolytic capacitor CD17 is connected with an internal power supply, the other end of the electrolytic capacitor CD17 is connected with an analog signal ground GND, one end of the capacitor C87 is connected with a VOUT pin of the power module URB2412YMD-10WR3, the other end of the capacitor C87 is connected with a VGND pin of the power module URB2412YMD-10WR3, the capacitor C86, the capacitor C85, and the electrolytic capacitor CD16 are connected in parallel, one end of the electrolytic capacitor CD16 is connected with an external power supply, the other end of the electrolytic capacitor CD16 is connected with a digital signal ground wire ND pin of the power module URB2412YMD-10WR3, and the other end of the capacitor C85 is connected with an EARTH pin 241H of the power module URB 2D-10 WR 3.
Further, the power circuit conversion module comprises a 12V power supply to 9V power supply circuit, a 9V power supply to 3.3V power supply circuit, a 9V power supply to 2.5V power supply circuit and a 9V power supply to 5V power supply circuit, wherein the 12V power supply to 9V power supply circuit is connected with the power isolation module, one end of the 9V power supply to 3.3V power supply circuit, the 9V power supply to 2.5V power supply circuit and one end of the 9V power supply to 5V power supply circuit are connected with the 12V power supply to 9V power supply circuit, the other end of the 9V power supply to 3.3V power supply circuit, the 9V power supply to 2.5V power supply circuit and the other end of the 9V power supply to 5V power supply circuit are connected with the analog-to-digital conversion module, and the acceleration sensor is connected with the 12V power supply to 9V power supply circuit.
Further, the 12V power to 9V power circuit includes an LM317DCY chip, a capacitor C8, a chip inductor B2, an electrolytic capacitor CD3, a capacitor C9, a resistor R14, a capacitor C12, a resistor R11, a diode D3, a resistor R9, an electrolytic capacitor CD2, a capacitor C6, a capacitor C7, and a resistor R953; one end of the electrolytic capacitor CD3 and one end of the capacitor C9 are connected in series with the capacitor C8 and the patch inductor B2 after being connected in parallel, and the other end of the electrolytic capacitor CD3 and the capacitor C9 are connected with the VIN pin of the LM317DCY chip; the capacitor C8 is connected with an internal power supply of the power isolation module, one end of the resistor R14 is connected with an ADJ pin of the LM317DCY chip after being connected with the capacitor C12 in parallel, and the other end of the resistor R is connected with an analog signal ground wire GND; one end of the resistor R11 and the diode D3 are connected in parallel and then connected with an OUT pin of the LM317DCY chip, and the other end of the resistor R11 and the diode D3 are connected with the capacitor C12; one end of the electrolytic capacitor CD2, the capacitor C6, the capacitor C7 and the resistor R953 are connected in parallel, and then the other end of the electrolytic capacitor is connected with one end of the resistor R9, and the other end of the electrolytic capacitor is connected with the analog signal ground wire GND; the other end of the resistor R9 is connected with the diode D3;
the 9V power supply to 3.3V power supply circuit comprises: one end of the capacitor C17 and one end of the capacitor C18 which are connected IN parallel are connected with the capacitor C7 of the 12V power supply to 9V power supply circuit, the other end of the capacitor C18 is connected with the IN pin of the AZ1117H-3.3TRG1 chip, the VOUT pin and the OUT pin of the AZ1117H-3.3TRG1 chip are connected IN parallel, and one end of the capacitor C19, the capacitor C20 and the resistor R51 which are connected IN parallel are connected with the VOUT pin of the AZ1117H-3.3TRG1 chip, and the other end of the capacitor C18 is connected with the analog signal ground wire GND;
the 9V power supply to 2.5V power supply circuit comprises: the capacitor C26 and the capacitor C27 are connected in parallel, one end of the capacitor C26 is connected with a capacitor C7 of a 12V power supply-to-9V power supply circuit, and the other end of the capacitor C27 is connected with a VIN pin of the AZ1117EHADJ chip; the resistor R19 and the resistor R20 are connected in series, one end of the resistor R20 is connected with an ADJ pin of the AZ1117EHADJ chip, and the other end of the resistor R20 is connected with an OUT pin of the AZ1117EHADJ chip; one end of the capacitor C22, the capacitor C23 and the resistor R50 which are connected in parallel is connected with an OUT pin of the AZ1117EHADJ chip, and the other end of the capacitor C22, the capacitor C23 and the resistor R50 is connected with an analog signal ground wire GND;
the 9V power supply to 5V power supply circuit comprises: ADR4533ARZ chip, electric capacity C50, paster inductance B9, electrolytic capacitor CD13, electric capacity C51, resistance R34, electrolytic capacitor CD14, electric capacity C52, electric capacity C53, electrolytic capacitor CD13, electric capacity C51 one end after parallelly connected connect with said electric capacity C50, paster inductance B9 in series, another end is connected with Vin pin of ADR4533ARZ chip; one end of the electrolytic capacitor CD14, the capacitor C52 and the capacitor C53 are connected in parallel and then connected with the resistor R34, the other end of the electrolytic capacitor is connected with the ground wire GND of the analog signal, and the resistor R34 is connected with the VOUT pin of the ADR4533ARZ chip.
Further, the analog-to-digital conversion module comprises a J39 socket, an AD7766 chip, a resistor R41, a resistor R45, a capacitor C71, a capacitor C80, a capacitor C57, a capacitor C72 and a capacitor C73, wherein the acceleration sensor is connected with the J39 socket, a 1 st pin of the J39 socket is connected with a capacitor C7 of the 12V power supply to 9V power supply circuit, a 2 nd pin of the J39 socket is connected with a vin+ pin of the AD7766 chip through the resistor R41, a 3 rd pin of the J39 socket is connected with a VIN-pin of the AD7766 chip through the resistor R45, a 4 th pin and a 5 th pin of the J39 socket are connected in parallel and then connected with an analog signal ground GND, a vref+ pin of the AD7766 chip is connected with the capacitor C71 and the capacitor C53 of the 9V power supply to 5V power supply circuit, one end of the capacitor C80 and the capacitor C57 are connected in parallel and the other end of the capacitor is connected with an AVdd pin of the AD7766 chip, and the other end of the capacitor is connected with the analog signal ground GND; the AVdd pin of the AD7766 chip is connected with the capacitor C23 of the 9V power supply to 2.5V power supply circuit, the DVdd pin of the AD7766 chip is respectively connected with the capacitor C23 and the capacitor C72 of the 9V power supply to 2.5V power supply circuit, and the Vdrive pin of the AD7766 chip is respectively connected with the capacitor C20 and the capacitor C73 of the 9V power supply to 3.3V power supply circuit.
Further, the analog and digital signal isolation module includes an ADUM3151A chip, an acpl_m61 chip, a capacitor C89, a resistor R70, a resistor R71, a resistor R72, a resistor R73, a resistor R79, a capacitor C95, a resistor R48, a resistor R74, a resistor R77, a resistor R78, and a capacitor C96, the VDD pin of the acpl_m61 chip is connected to the VDD1 pin of the ADUM3151A chip, the resistor R74 is connected to the inode pin of the acpl_m61 chip, the resistor R77 is connected to the VO pin of the acpl_m61 chip, the resistor R78 is connected to the VO pin of the acpl_m61 chip, the VDD2 pin of the ADUM3151A chip is connected to the Vdrive pin of the AD7766 chip, the capacitor C89 is connected to the VDD2 pin of the ADUM3151A chip, the resistor R70 is connected to the SCLK pin of the ADUM3151A chip, the resistor R77 is connected to the ADUM pin of the ADUM chip is connected to the VOA pin of the acpl_m61 chip, the resistor C73 is connected to the VOA pin of the VOA chip, and the VOA pin of the ADUM3151A chip is connected to the VOA pin of the ADUM 3151.
Further, the acceleration data acquired by the acceleration sensor is subjected to filtering processing to reduce interference of external interference signals, and the filtering processing specifically includes: through the 2000hz sampling rate, firstly, a 50hz notch filtering algorithm is carried out on the obtained acceleration raw data:
y 50 (k)=-A(1,2)*y 50 (k-1)-A(1,3)*y 50 (k-2) +b (1, 1) x (k) +b (1, 2) x (k-1) +b (1, 3) x (k-2), wherein
x (k) is the original value of acceleration sampling at k moment, y 50 (k) The filtered acceleration data is notched for 50 hz;
a (i, j) represents matrix a ith row j column data; b (i, j) represents matrix B ith row j column data; omega 0 For the trap frequency, 50hz, ω f For the signal sampling frequency, alpha is a trap coefficient, and 0.9 is taken;
and then carrying out a 100hz notch filtering algorithm on the acceleration data after the 50hz notch filtering algorithm:
y 100 (k)=-C(1,2)*y 100 (k-1)-C(1,3)*y 100 (k-2)+D(1,1)*y 50 (k)+D(1,2)*y 50 (k-1)+D(1,3)*y 50 (k-2)
wherein y is 100 (k) The acceleration data after 100hz notch filtering;
c (i, j) represents matrix C ith row j column data; d (i, j) represents matrix D ith row j column data; omega 1 For the trap frequency, 100hz, ω f For the signal sampling frequency, alpha is a trap coefficient, and 0.9 is taken;
and finally, the acceleration data after 100hz notch filtering is subjected to second-order chebyshev low-pass filtering with the cut-off frequency of 120hz, the acceleration data after the second-order chebyshev low-pass filtering is used for primary time integration to obtain triaxial speed data, and the acceleration data after the second-order chebyshev low-pass filtering is used for secondary time integration to obtain the position information of the elevator.
The invention has the beneficial effects that: the elevator vibration data acquisition circuit is provided with the power isolation module, the power circuit conversion module and the analog and digital signal isolation module, wherein the power isolation module isolates an external power supply from a power supply of equipment so as to improve the signal-to-noise ratio of the elevator vibration data acquisition circuit and reduce the effect of noise, and the analog and digital signal isolation module completely isolates two ends of a digital signal and an analog signal, so that the accuracy of data acquisition of the elevator vibration data acquisition circuit is improved; and the acceleration data acquired by the acceleration sensor is filtered to reduce the interference of external interference signals, so that the accuracy of the acceleration data is improved, and the accuracy of the data acquired by the elevator vibration data acquisition circuit is also improved.
Drawings
Fig. 1 is a schematic circuit structure of the present invention.
Fig. 2 is a schematic diagram of a detailed circuit of the present invention.
Fig. 3 is a detailed structural schematic diagram of the power isolation module of the present invention.
Fig. 4 is a detailed structural diagram of the power circuit conversion module of the present invention.
Fig. 5 is a detailed structural schematic diagram of the analog-to-digital conversion module of the present invention.
Fig. 6 is a detailed schematic diagram of the analog and digital signal isolation module of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
Referring to fig. 1 to 6, the elevator vibration data acquisition circuit with full isolation of analog and digital signals according to the present invention is connected to a back-end data processing system, and the elevator vibration data acquisition circuit includes a power isolation module, a power circuit conversion module, an acceleration sensor, an analog and digital signal isolation module, and an analog-to-digital conversion module, where the power isolation module isolates an external power supply, and the power isolation module is connected to the power circuit conversion module, the power circuit conversion module converts a 12V power supply into a power supply voltage required by an acceleration sensor and a power supply voltage required by the analog-to-digital conversion module, the acceleration sensor converts acquired analog signal data into digital signal data through the analog-to-digital conversion module, and the analog and digital signal isolation module is respectively connected to the analog-to-digital conversion module and the back-end data processing system, and the analog and digital signal isolation module prevents noise of the back-end data processing system from being transmitted to the elevator vibration data acquisition circuit in a conductive manner, thereby reducing noise interference of the elevator vibration data acquisition circuit. Wherein the whole circuit diagram of fig. 1 is divided into a left side and a right side; namely, the left side is an elevator vibration data acquisition circuit, and the right side is a rear-end data processing system; the left side and the right side, the external power supply is isolated by a power isolation module (URB 2412YMD-10WR3 of Jin Shengyang); the communication signals of the left side and the right side are isolated through an ADUM3151A chip and an ACPL-M61 chip in the analog and digital signal isolation module; thus, the ground wires on the left side and the right side are completely insulated; thus, noise on the right rear end data processing system is not transmitted to the right part acquisition circuit in a conduction mode; thereby reducing noise interference to left side circuit signal acquisition; the signal to noise ratio of the whole system data acquisition circuit can be improved.
In the invention, the power isolation module comprises a power module URB2412YMD-10WR3, a capacitor C87, a capacitor C88, an electrolytic capacitor CD17, a capacitor C86, a capacitor C85 and an electrolytic capacitor CD16, wherein the capacitor C87, the capacitor C88 and the electrolytic capacitor CD17 are connected in parallel, one end of the electrolytic capacitor CD17 is connected with an internal power supply, the other end of the electrolytic capacitor CD17 is connected with an analog signal ground GND, one end of the capacitor C87 is connected with a VOUT pin of the power module URB2412YMD-10WR3, the other end of the capacitor C87 is connected with a VGND pin of the power module URB2412YMD-10WR3, the capacitor C86, the capacitor C85 and the electrolytic capacitor CD16 are connected in parallel, one end of the electrolytic capacitor CD16 is connected with an external power supply, the other end of the electrolytic capacitor CD16 is connected with a digital signal ground wire ND pin, one end of the capacitor C85 is connected with a VIN pin of the power module URB 2412D-10 WR3, and the other end of the capacitor C85 is connected with an EARTH pin of the power module URB 2412D-10 WR 3.
The power circuit conversion module comprises a 12V power supply to 9V power supply circuit, a 9V power supply to 3.3V power supply circuit, a 9V power supply to 2.5V power supply circuit and a 9V power supply to 5V power supply circuit, wherein the 12V power supply to 9V power supply circuit is connected with the power isolation module, one end of the 9V power supply to 3.3V power supply circuit, the 9V power supply to 2.5V power supply circuit and one end of the 9V power supply to 5V power supply circuit are connected with the 12V power supply to 9V power supply circuit, the other end of the 9V power supply to 3.3V power supply circuit, the 9V power supply to 2.5V power supply circuit and the other end of the 9V power supply to 5V power supply circuit are connected with the analog-to-digital conversion module, and the acceleration sensor is connected with the 12V power supply to 9V power supply circuit.
The 12V power supply to 9V power supply circuit comprises an LM317DCY chip, a capacitor C8, a patch inductor B2, an electrolytic capacitor CD3, a capacitor C9, a resistor R14, a capacitor C12, a resistor R11, a diode D3, a resistor R9, an electrolytic capacitor CD2, a capacitor C6, a capacitor C7 and a resistor R953; one end of the electrolytic capacitor CD3 and one end of the capacitor C9 are connected in series with the capacitor C8 and the patch inductor B2 after being connected in parallel, and the other end of the electrolytic capacitor CD3 and the capacitor C9 are connected with the VIN pin of the LM317DCY chip; the capacitor C8 is connected with an internal power supply of the power isolation module, one end of the resistor R14 is connected with an ADJ pin of the LM317DCY chip after being connected with the capacitor C12 in parallel, and the other end of the resistor R is connected with an analog signal ground wire GND; one end of the resistor R11 and the diode D3 are connected in parallel and then connected with an OUT pin of the LM317DCY chip, and the other end of the resistor R11 and the diode D3 are connected with the capacitor C12; one end of the electrolytic capacitor CD2, the capacitor C6, the capacitor C7 and the resistor R953 are connected in parallel, and then the other end of the electrolytic capacitor is connected with one end of the resistor R9, and the other end of the electrolytic capacitor is connected with the analog signal ground wire GND; the other end of the resistor R9 is connected with the diode D3; the 12V power supply to 9V power supply circuit provides power for the acceleration sensor, and also provides power for the 9V power supply to 3.3V power supply circuit, the 9V power supply to 2.5V power supply circuit and the 9V power supply to 5V power supply circuit.
The 9V power supply to 3.3V power supply circuit comprises: one end of the capacitor C17 and one end of the capacitor C18 which are connected IN parallel are connected with the capacitor C7 of the 12V power supply to 9V power supply circuit, the other end of the capacitor C18 is connected with the IN pin of the AZ1117H-3.3TRG1 chip, the VOUT pin and the OUT pin of the AZ1117H-3.3TRG1 chip are connected IN parallel, and one end of the capacitor C19, the capacitor C20 and the resistor R51 which are connected IN parallel are connected with the VOUT pin of the AZ1117H-3.3TRG1 chip, and the other end of the capacitor C18 is connected with the analog signal ground wire GND;
the 9V power supply to 2.5V power supply circuit comprises: the capacitor C26 and the capacitor C27 are connected in parallel, one end of the capacitor C26 is connected with a capacitor C7 of a 12V power supply-to-9V power supply circuit, and the other end of the capacitor C27 is connected with a VIN pin of the AZ1117EHADJ chip; the resistor R19 and the resistor R20 are connected in series, one end of the resistor R20 is connected with an ADJ pin of the AZ1117EHADJ chip, and the other end of the resistor R20 is connected with an OUT pin of the AZ1117EHADJ chip; one end of the capacitor C22, the capacitor C23 and the resistor R50 which are connected in parallel is connected with an OUT pin of the AZ1117EHADJ chip, and the other end of the capacitor C22, the capacitor C23 and the resistor R50 is connected with an analog signal ground wire GND;
the 9V power supply to 5V power supply circuit comprises: ADR4533ARZ chip, electric capacity C50, paster inductance B9, electrolytic capacitor CD13, electric capacity C51, resistance R34, electrolytic capacitor CD14, electric capacity C52, electric capacity C53, electrolytic capacitor CD13, electric capacity C51 one end after parallelly connected connect with said electric capacity C50, paster inductance B9 in series, another end is connected with Vin pin of ADR4533ARZ chip; one end of the electrolytic capacitor CD14, the capacitor C52 and the capacitor C53 are connected in parallel and then connected with the resistor R34, the other end of the electrolytic capacitor is connected with the ground wire GND of the analog signal, and the resistor R34 is connected with the VOUT pin of the ADR4533ARZ chip.
Because the AD7766 chip needs 3 paths of power supplies, a 9V power supply to 3.3V power supply circuit, a 9V power supply to 2.5V power supply circuit and a 9V power supply to 5V power supply circuit are arranged, and the power supply circuits are respectively 3.3V,2.5V and 5V reference voltages; 9V conversion to 3.3V was achieved with AZ 1117-3.3TRG1; 9V to 2.5V power conversion is realized by AZ1117 EHADJ; the ultra-low noise and high-precision reference voltage source chip of the ADR4533ARZ chip is used for realizing the conversion from 9V to 5V reference voltage.
The analog-to-digital conversion module comprises a J39 socket, an AD7766 chip, a resistor R41, a resistor R45, a capacitor C71, a capacitor C80, a capacitor C57, a capacitor C72 and a capacitor C73, wherein the acceleration sensor is connected with the J39 socket, a 1 st pin of the J39 socket is connected with a capacitor C7 of a 12V power supply-to-9V power supply circuit, a 2 nd pin of the J39 socket is connected with a VIN+ pin of the AD7766 chip through the resistor R41, a 3 rd pin of the J39 socket is connected with a VIN-pin of the AD7766 chip through the resistor R45, a 4 th pin and a 5 th pin of the J39 socket are connected in parallel and then connected with an analog signal ground wire GND, a VRef+ pin of the AD7766 chip is connected with a capacitor C71 and a capacitor C53 of the 9V power supply-to-5V power supply circuit respectively, one end of the capacitor C80 and the capacitor C57 are connected in parallel and the other end of the capacitor C57 is connected with an analog signal ground wire GND; the AVdd pin of the AD7766 chip is connected with the capacitor C23 of the 9V power supply to 2.5V power supply circuit, the DVdd pin of the AD7766 chip is respectively connected with the capacitor C23 and the capacitor C72 of the 9V power supply to 2.5V power supply circuit, and the Vdrive pin of the AD7766 chip is respectively connected with the capacitor C20 and the capacitor C73 of the 9V power supply to 3.3V power supply circuit.
The J39 socket is connected to the analog signal differential output socket of the acceleration sensor; the acceleration sensor is powered by a 9V power supply; then the data of the acceleration sensor are transmitted out through analog differential signals; connecting the sensor analog differential signal to a 24bit ADC conversion chip AD7766; thereby realizing the purpose of converting the analog differential signal into the digital signal of the SPI interface.
The analog and digital signal isolation module comprises an ADUM3151A chip, an ACPL_M61 chip, a capacitor C89, a resistor R70, a resistor R71, a resistor R72, a resistor R73, a resistor R79, a capacitor C95, a resistor R48, a resistor R74, a resistor R77, a resistor R78 and a capacitor C96, wherein the VDD pin of the ACPL_M61 chip is connected with the VDD1 pin of the ADUM3151A chip, the resistor R74 is connected with the Anode pin of the ACPL_M61 chip, the resistor R77 is connected with the Catmode pin of the ACPL_M61 chip, the resistor R78 is connected with the VO pin of the ACPL_M61 chip, the VDD2 pin of the ADUM3151A chip is connected with the Vdrive pin of the AD7766 chip, the capacitor C89 is connected with the VDD2 pin of the ADUM3151A chip, the resistor R70 is connected with the K pin of the ADUM3151A chip, the resistance R71 is connected with the CAUM pin of the ADUM3151A chip, the resistance R31 is connected with the VO pin of the CAUM chip, the resistance C73 is connected with the VOA pin of the ADUM3151 chip, and the VOA pin is connected with the VO pin of the VO 31 chip. The analog and digital signal isolation module prevents noise of the rear-end data processing system from being transmitted to the elevator vibration data acquisition circuit in a conduction mode, so that noise interference of the elevator vibration data acquisition circuit is reduced; and the acceleration data acquired by the acceleration sensor is filtered to reduce the interference of external interference signals, so that the accuracy of the acceleration data is improved, and the accuracy of the data acquired by the elevator vibration data acquisition circuit is also improved.
The acceleration data acquired by the acceleration sensor is subjected to filtering processing to reduce interference of external interference signals, wherein the filtering processing specifically comprises the following steps: through the 2000hz sampling rate, firstly, a 50hz notch filtering algorithm is carried out on the obtained acceleration raw data:
y 50 (k)=-A(1,2)*y 50 (k-1)-A(1,3)*y 50 (k-2) +b (1, 1) x (k) +b (1, 2) x (k-1) +b (1, 3) x (k-2), wherein
x (k) is the original value of acceleration sampling at k moment, y 50 (k) The filtered acceleration data is notched for 50 hz;
a (i, j) represents matrix a ith row j column data; b (i, j) represents matrix B ith row j column data; omega 0 For the trap frequency, 50hz, ω f For the signal sampling frequency, alpha is a trap coefficient, and 0.9 is taken; i.e. < ->A(1,3)=α 2 ;B(1,1)=1;
And then carrying out a 100hz notch filtering algorithm on the acceleration data after the 50hz notch filtering algorithm:
y 100 (k)=-C(1,2)*y 100 (k-1)-C(1,3)*y 100 (k-2)+D(1,1)*y 50 (k)+D(1,2)*y 50 (k-1)+D(1,3)*y 50 (k-2)
wherein y is 100 (k) The acceleration data after 100hz notch filtering;
c (i, j) represents matrix C ith row j column data; d (i, j) represents matrix D ith row j column data; omega 1 For the trap frequency, 100hz, ω f For the signal sampling frequency, alpha is a trap coefficient, and 0.9 is taken;
and finally, the acceleration data after 100hz notch filtering is subjected to second-order chebyshev low-pass filtering with the cut-off frequency of 120hz, the acceleration data after the second-order chebyshev low-pass filtering is used for primary time integration to obtain triaxial speed data, and the acceleration data after the second-order chebyshev low-pass filtering is used for secondary time integration to obtain the position information of the elevator. Thus, the proportion of the interference signal in the useful signal is reduced, and the accuracy of the acceleration data is improved.
In a word, the elevator vibration data acquisition circuit is provided with the power isolation module, the power circuit conversion module and the analog and digital signal isolation module, the power isolation module isolates an external power supply from a power supply of equipment so as to improve the signal-to-noise ratio of the elevator vibration data acquisition circuit and reduce the effect of noise, and the analog and digital signal isolation module completely isolates two ends of a digital signal and an analog signal, so that the accuracy of data acquisition of the elevator vibration data acquisition circuit is improved.
The foregoing description is only of the preferred embodiments of the invention, and all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.