CN109166895A - A kind of array substrate and display device - Google Patents
A kind of array substrate and display device Download PDFInfo
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- CN109166895A CN109166895A CN201811013833.6A CN201811013833A CN109166895A CN 109166895 A CN109166895 A CN 109166895A CN 201811013833 A CN201811013833 A CN 201811013833A CN 109166895 A CN109166895 A CN 109166895A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
- H10K2102/302—Details of OLEDs of OLED structures
- H10K2102/3023—Direction of light emission
- H10K2102/3035—Edge emission
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Abstract
本申请提供了一种阵列基板及显示装置，其中所述阵列基板为底发射OLED阵列基板，包括多个像素单元，各所述像素单元划分为发光区域和透光区域，所述发光区域的阵列基板包括：基板，以及设置在所述基板上的驱动晶体管和存储电容，显示光线穿过所述存储电容出射。本申请技术方案通过底发射结构的OLED阵列基板实现透明显示，发光区域设置有可穿过显示光线的存储电容，由于是底发射结构，所以阵列基板的封装盖板上无需设置黑矩阵等结构，进而阵列基板上的像素单元无需与封装盖板上的黑矩阵等结构进行精确对准，相比较于现有顶发射结构实现透明显示的技术，本申请提供的阵列基板可以降低对合精度，简化工艺。
The present application provides an array substrate and a display device, wherein the array substrate is a bottom emission OLED array substrate, and includes a plurality of pixel units, each of which is divided into a light-emitting area and a light-transmitting area, and an array of the light-emitting areas The substrate includes: a substrate, a driving transistor and a storage capacitor arranged on the substrate, and the display light is emitted through the storage capacitor. The technical solution of the present application realizes transparent display through an OLED array substrate with a bottom emission structure, and the light emitting area is provided with a storage capacitor that can pass through the display light. Furthermore, the pixel units on the array substrate do not need to be precisely aligned with structures such as the black matrix on the package cover. Compared with the existing technology of realizing transparent display with a top emission structure, the array substrate provided by the present application can reduce the alignment accuracy and simplify the craft.
Description
Technical field
The present invention relates to field of display technology, more particularly to a kind of array substrate and display device.
Background technique
With the development of information-intensive society, novel display technology such as transparent display etc. obtains good user's body
It tests, has a vast market foreground.But transparent display panel and the transparent display including transparent display panel do not have also at present
There is commercialization, the reason is that the transparency of transparent display and the luminous efficiency of panel have competition.Enhance transparence display face
The design of plate transparency can be to reduce light-emitting area, so that reducing luminous efficiency is cost, vice versa.
The prior art is to enhance the transparency, and emission structure at top production transparent display panel is generallyd use, due to top emitting
The structures such as color film corresponding with the pixel region of lower cover plate, black matrix are provided on upper cover plate, contraposition deviation is to luminous efficiency shadow
Sound is very big, and therefore, the transparent display panel of top emitting is high to upper cover plate and the required precision of lower cover plate pairing, and the process is more complicated.
Summary of the invention
Present invention offer and a kind of array substrate and display device, to simplify technique.
To solve the above-mentioned problems, the invention discloses a kind of array substrate, the array substrate is bottom emitting OLED gusts
Column substrate, including multiple pixel units, each pixel unit are divided into light emitting region and transmission region, the light emitting region
Array substrate includes:
Substrate, and driving transistor on the substrate and storage capacitance are set, display light passes through the storage
Capacitor outgoing.
Optionally, the storage capacitance includes:
It is cascading in the first pole plate, first medium layer and the second pole plate of the substrate side, first pole
Plate is arranged close to the substrate；
First pole plate is connect with the grid of the driving transistor, second pole plate and the driving transistor
Active layer connection.
Optionally, the driving transistor includes:
Be cascading the active layer on the substrate, gate insulating layer, the grid, second dielectric layer and
Source-drain electrode, the active layer are arranged close to the substrate；
The active layer includes channel region, the first conducting area and the second conducting area, and the grid is on the substrate just
Projection covers the orthographic projection of the channel region on the substrate, and the source-drain electrode is by being arranged in the second dielectric layer
Via hole with it is described first conducting area connect；
The side that the second dielectric layer deviates from the substrate is arranged in first pole plate, by being arranged described second
Via hole on dielectric layer is connect with the grid, and second pole plate is situated between by setting in the first medium layer and described second
Via hole on matter floor is connect with second conducting area.
Optionally, the array substrate of the light emitting region further include:
The pixel defining layer that second pole plate deviates from the substrate side is arranged in patterning；
Stacking be covered on second pole plate and the pixel defining layer away from the organic material layer of the substrate side and
First electrode layer, the organic material layer are arranged close to the substrate.
Optionally, the array substrate of the light emitting region further include:
It is covered on the first reflecting layer that the first electrode layer deviates from the substrate side, first reflecting layer is described
Orthographic projection on substrate covers the light emitting region.
Optionally, the substrate includes:
Substrate and color blocking layer, flatness layer and the buffer layer being cascading over the substrate, the color blocking layer are leaned on
The nearly substrate setting, the orthographic projection of the color blocking layer over the substrate cover the driving transistor and the storage capacitance
Orthographic projection over the substrate.
Optionally, the array substrate of the transmission region includes:
The substrate, and it is the buffer layer over the substrate of being cascading, the first medium layer, described
Second dielectric layer, the organic material layer and the first electrode layer, the buffer layer are arranged close to the substrate.
To solve the above-mentioned problems, the invention also discloses a kind of display device, including the encapsulation cover plate that is stacked and
Array substrate described in any embodiment.
Optionally, the encapsulation cover plate includes:
Package substrates and the package substrates are set close to the second reflecting layer of the array substrate side, described second
Orthographic projection of the reflecting layer in the array substrate covers the light emitting region.
Optionally, the material in second reflecting layer is that the first electrode layer in conductive material, with the array substrate connects
It connects.
Compared with prior art, the present invention includes the following advantages:
This application provides a kind of array substrate and display devices, wherein the array substrate is bottom emitting OLED array base
Plate, including multiple pixel units, each pixel unit are divided into light emitting region and transmission region, the array of the light emitting region
Substrate includes: substrate, and driving transistor on the substrate and storage capacitance is arranged, and display light passes through the storage
Capacitor outgoing.Technical scheme realizes transparence display, light emitting region setting by the OLED array of bottom emitting structure
There is the storage capacitance that can make to show that light passes through, due to being bottom emitting structure, so without setting on the encapsulation cover plate of array substrate
Set the structures such as black matrix, so the pixel unit in array substrate be not necessarily to carry out with structures such as black matrix on encapsulation cover plate it is accurate
Alignment, is compared to the technology that existing emission structure at top realizes transparence display, and array substrate provided by the present application can reduce pair
Precision is closed, technique is simplified.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below by institute in the description to the embodiment of the present invention
Attached drawing to be used is needed to be briefly described, it should be apparent that, the accompanying drawings in the following description is only some implementations of the invention
Example, for those of ordinary skill in the art, without any creative labor, can also be according to these attached drawings
Obtain other attached drawings.
Fig. 1 shows a kind of the schematic diagram of the section structure of array substrate of one embodiment of the application offer；
Fig. 2 shows a kind of planar structure schematic diagrams for array substrate that one embodiment of the application provides；
Fig. 3 shows a kind of step flow chart of the preparation method of array substrate of one embodiment of the application offer；
Fig. 4 shows a kind of step flow chart of the preparation method of substrate of one embodiment of the application offer；
Fig. 5 show the offer of one embodiment of the application a kind of driving transistor and storage capacitance preparation method the step of
Flow chart；
Fig. 6 shows a kind of the schematic diagram of the section structure of display device of one embodiment of the application offer；
Fig. 7 show one embodiment of the application offer a kind of array substrate preparation method in completing substrate production cut open
Face structural schematic diagram；
Fig. 8 shows completion driving crystal control in a kind of preparation method of array substrate of one embodiment of the application offer
The schematic diagram of the section structure of work；
Fig. 9 shows completion storage capacitance production in a kind of preparation method of array substrate of one embodiment of the application offer
The schematic diagram of the section structure；
Figure 10 show one embodiment of the application offer a kind of array substrate preparation method in complete organic material layer
With the schematic diagram of the section structure of first electrode layer production.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
In the description of the present invention, unless otherwise indicated, the meaning of " plurality " is two or more；Term " on ",
The orientation or positional relationship of the instructions such as "lower", "left", "right", "inner", "outside" is to be based on the orientation or positional relationship shown in the drawings,
It is merely for convenience of description of the present invention and simplification of the description, rather than the machine or element of indication or suggestion meaning must have specifically
Orientation is constructed and operated in a specific orientation, therefore is not considered as limiting the invention.
One embodiment of the application provides a kind of array substrate, and referring to Figures 1 and 2, which is bottom emitting OLED
Array substrate, including multiple pixel units, each pixel unit are divided into light emitting region 10a and transmission region 10b, light emitting region
The array substrate of 10a includes: substrate 11, and driving transistor 12 on the substrate 11 and storage capacitance 13 is arranged, and shows light
Line is emitted across storage capacitance 13.
Specifically, driving transistor 12 includes grid, active layer, source electrode and drain electrode etc., top gate structure or bottom gate can be
Structure etc., the application are not construed as limiting its specific structure.In practical applications, drive the drain electrode of transistor 12 can be with organic hair
One electrode of photosphere connects, for driving organic luminous layer to shine.
Storage capacitance 13 can be the capacitor including two pole plates, such as the grid company of a pole plate and driving transistor 12
It connects, another pole plate can be connect with the source electrode of driving transistor 12, and storage capacitance 13 is used for the grid of storage driving transistor 12
Pole tension.Storage capacitance 13 can also be that the laminated body, capacitor etc. including three pole plates, such as intermediate pole plate are connect with grid, two
The pole plate of side is connect with source electrode respectively, and the application is not construed as limiting the specific structure of storage capacitance 13.
When storage capacitance 13 has there are two when the dielectric layer between pole plate and two pole plates, it is electric that display light passes through storage
Hold 13 outgoing and refer to that display light passes through two pole plates and this overall structure of dielectric layer is emitted, i.e., storage capacitance 13 can pass through
Show light, specific transmitance can be designed according to 13 structure of storage capacitance and the factors such as material determine.Storage capacitance 13
Pole plate can be the transparent conductive materials such as ITO, to improve transmitance.With storage capacitance in the prior art be by data line or
Grid formation is compared, and the light efficiency out of light emitting region can be improved in the storage capacitor construction that may pass through display light in the present embodiment
Rate.
In practical applications, the array substrate of light emitting region can also include being sequentially formed at driving transistor 12 and storage
Capacitor 13 deviates from pixel defining layer, the organic luminous layer etc. of 11 side of substrate.In order to realize bottom emitting, the array base of light emitting region
Plate can also include reflecting layer, which is arranged in the side that organic luminous layer deviates from substrate 11, and reflecting layer can also be arranged
In the side with array substrate close on the encapsulation cover plate of array substrate pairing, to reflect and deviate from from substrate display light
Drive the outgoing of the side of transistor and storage capacitance.The present embodiment is not construed as limiting the specific setting position in reflecting layer.
Array substrate provided in this embodiment realizes transparence display by the OLED array of bottom emitting structure, shines
Region is provided with the storage capacitance that can make to show that light passes through, and due to being bottom emitting structure, display light is directly sent out from substrate-side
Out, without passing through the gap etc. between encapsulation cover plate and array substrate and encapsulation cover plate, therefore the encapsulation cover plate of array substrate
Upper no setting is required structures such as black matrix, and then the pixel unit in array substrate is not necessarily to and the structures such as black matrix on encapsulation cover plate
It is precisely aligned, is compared to the technology for realizing transparence display using emission structure at top, array substrate provided by the present application can
To reduce pairing precision, simplify technique.
Wherein, the active layer material of transistor 12 is driven to can be various oxides, silicon materials and organic material etc.,
Such as the material of active layer may include following at least one: a-IGZO, ZnON, IZTO, a-Si, p-Si, six thiophene, polythiophene
Deng.Array substrate provided in this embodiment can be using Oxide technology, silicon technology and the manufacture of organic matter technology.
In a kind of implementation of above-described embodiment, referring to Figures 1 and 2, storage capacitance 13 may include: to stack gradually
The first pole plate 131, first medium layer 132 and the second pole plate 133 of 11 side of substrate are set, and the first pole plate 131 is close to substrate
11 settings；First pole plate 131 is connect with the grid 123 of driving transistor 12, and the second pole plate 133 is active with driving transistor 12
Layer connection.
Specifically, realize the first pole plate 131 with drive the grid of transistor 12 connect and the second pole plate 133 and drive
There are many modes of the active layer connection of transistor 12, related with the driving structure of transistor 12 in practical applications, the application
Specific connection type is not construed as limiting.Below to be illustrated for a kind of structure for driving transistor 12.
Referring to Figures 1 and 2, driving transistor 12 may include: be cascading active layer 121 on the substrate 11,
Gate insulating layer 122, grid 123, second dielectric layer 124 and source-drain electrode 125, active layer 121 are arranged close to substrate 11；It is active
Floor 121 includes channel region 121a, the first conducting area 121b and the second conducting area 121c, the orthographic projection of grid 123 on the substrate 11
Cover channel region 121a orthographic projection on the substrate 11, source-drain electrode 125 pass through the via hole that is arranged in second dielectric layer 124 with
First conducting area 121b connection；The side that second dielectric layer 124 deviates from substrate 11 is arranged in first pole plate 131, is existed by setting
Via hole in second dielectric layer 124 is connect with grid 123, and the second pole plate 133 is situated between by setting in first medium layer 132 and second
Via hole on matter floor 124 is connect with the second conducting area 121c.
Array base-plate structure provided in this embodiment, active layer 121 second conducting area 121c, the first pole plate 131 and
Second pole plate 133 may be constructed laminated body, capacitor, wherein the current potential of the second conducting area 121c and the second pole plate 133 of active layer 121
It is identical.
Wherein, the material of the first conducting area 121b and the second conducting area 121c can be the channel region 121a material of conductor
Or other conductive materials etc..
Referring to Fig.1, the array substrate of light emitting region 10a can also include: that patterning is arranged in the second pole plate 133 away from base
The pixel defining layer 16 of 11 side of plate, for defining open area and non-open areas.Drive transistor 12 on the substrate 11
Orthographic projection be located at non-open areas, the orthographic projection of storage capacitance 13 on the substrate 11 is located at open area.
Referring to Fig.1, the array substrate of light emitting region 10a can also include: that stacking is covered on the second pole plate 133 and pixel circle
Given layer 16 deviates from the organic material layer 14 and first electrode layer 15 of 11 side of substrate, and organic material layer 14 is arranged close to substrate 11.
Wherein, the anode and cathode or cathode and anode of the second pole plate 133 and first electrode layer 15 respectively as organic material layer 14.
In order to realize bottom emitting, the array substrate of light emitting region 10a can also include: to be covered on first electrode layer 15 to deviate from
First reflecting layer of 11 side of substrate, the orthographic projection covering light emitting region 10a or first of the first reflecting layer on the substrate 11 are anti-
The orthographic projection of layer on the substrate 11 is penetrated to be overlapped with light emitting region 10a.
In the various embodiments described above, substrate 11 be may further include: substrate 111 and is cascading in substrate 111
On color blocking layer 112, flatness layer 113 and buffer layer 114, color blocking layer 112 close to substrate 111 be arranged, color blocking layer 112 is in substrate
The orthographic projection of orthographic projection covering driving transistor 12 and storage capacitance 13 on substrate 111 on 111.
Color blocking layer 112 may include red color resistance layer, green color blocking layer and blue color blocking layer.
The case where illumination has an impact the threshold value of driving transistor 12 in order to prevent, and especially active layer material is IGZO
Under, metal light shield layer can be set on substrate 111 for driving 12 shading of transistor, but the source electrode of metal and driving transistor 12
Connection, generates METAL HEATING PROCESS effect there may be electric current during the work time.The present embodiment is using color blocking layer 112 as driving
The light shield layer of transistor 12 can generate METAL HEATING PROCESS effect with surface, promote the reliability of array substrate.
It should be noted that 112 structure of color blocking layer in the present embodiment is not required, can also lead in practical applications
The organic material layer 14 in different pixel unit printing different colours is crossed to realize colored display.
Referring to Fig.1, the array substrate of transmission region 10b may include substrate 111, and be cascading in substrate
Buffer layer 114, first medium layer 132, second dielectric layer 124, organic material layer 14 and first electrode layer 15 on 111, wherein
Buffer layer 114 is arranged close to substrate 111.The array substrate of transmission region 10b eliminate pixel defining layer 16 and flatness layer 113 with
Promote transparency.
Electrode (such as first electrode layer 15), capacitor plate (such as the first pole plate 131 and the second pole in the various embodiments described above
Plate 133 etc.) and the material of signal lead (such as grid, source-drain electrode) can be common metal material, such as Ag, Cu, Al,
The alloy material of Mo etc. or multiple layer metal such as MoNb/Cu/MoNb etc. or above-mentioned metal, such as AlNd, MoNb, are also possible to gold
Belong to stack architecture such as ITO/Ag/ITO etc. with transparent conductive oxide (such as ITO, AZO) formation.
Dielectric layer (such as first medium layer 132 and second dielectric layer 124), insulating layer (such as grid in the various embodiments described above
Pole insulating layer 122 etc.), the material of pixel defining layer 16 and buffer layer (such as buffer layer 114) includes but is not limited to conventional
Such as SiOx, SiNx, SiON dielectric material or various novel organic insulating materials or High k material such as AlOx, HfOx,
TaOx etc..
The material of flatness layer 113 in the various embodiments described above is including but not limited to polysiloxanes based material, acrylic system material
The smoothing materials such as material or polyimides based material.
Array substrate in above-described embodiment can be obtained by following preparation method, referring to Fig. 3, the array of light emitting region
The preparation method of substrate may include:
Step 301: substrate is provided.
Step 302: driving transistor and storage capacitance are formed on substrate, display light passes through the storage capacitance and goes out
It penetrates.
The step of reference Fig. 4, above-mentioned steps 301, may include:
Step 401: substrate is provided.
Step 402: sequentially forming color blocking layer, flatness layer and buffer layer, the orthographic projection of color blocking layer on substrate on substrate
The orthographic projection of covering driving transistor and storage capacitance on substrate.
Specifically, initial wash is carried out to substrate such as glass etc., successively makes tri- kinds of color blocking layers of R, G, B on substrate, so
Spin coating flatness layer (Resin) is simultaneously graphical afterwards, and PECVD (low temperature) deposits whole face inorganic insulating material as buffer layer later.Fig. 7
Show the schematic diagram of the section structure of completing substrate production.
Referring to Fig. 5, the step of driving transistor and storage capacitance is being formed on substrate in step 302, may include:
Step 501: active layer, gate insulating layer, grid, second dielectric layer and source-drain electrode are sequentially formed on substrate；
Active layer includes channel region, the first conducting area and the second conducting area, and orthographic projection covering channel region of the grid on substrate is in substrate
On orthographic projection, source-drain electrode, which passes through the via hole that is arranged in second dielectric layer area is connected with first, to be connect.
Specifically, active layer ACT material and graphical is deposited on substrate, is sequentially depositing gate insulating layer GI and grid later
Pole Gate metal is simultaneously graphical, deposits second medium layer material and aperture by PECVD；It is then deposited as the source of metal routing
Drain electrode S/D metal is simultaneously graphical, and source-drain electrode passes through the via hole being arranged in second dielectric layer and connect with the first conducting area.It is complete
The schematic diagram of the section structure at driving transistor fabrication is as shown in Figure 8.
Step 502: sequentially forming the first pole plate, first medium layer and the second pole away from the side of substrate in second dielectric layer
Plate, the first pole plate pass through the via hole being arranged in second dielectric layer and connect with grid, and the second pole plate is by being arranged in first medium
Via hole on floor and second dielectric layer is connect with the second conducting area.
Specifically, the first plate material such as ITO etc. and wet etching are deposited away from the side of substrate in second dielectric layer,
The grid of ITO connection driving transistor after making graphically, forms the first pole plate of storage capacitance.
Then it deposits first medium layer material and etches the hole Via hole, deposition the second plate material such as ITO etc. and figure
Change, connect floor ITO with the second conducting area of transistor is driven by Via hole.Complete the section of storage capacitance production
Structural schematic diagram is as shown in Figure 9.
In practical applications, above-mentioned preparation method can also include: to coat picture away from the side of substrate in the second pole plate
Element defines layer material and graphical, and the open area of definition is made to be located at the surface of the first pole plate；Then in the second pole plate and picture
Element, which defines successively to cover on layer, forms organic material layer and first electrode layer such as IZO etc..Wherein, organic material layer can pass through steaming
The modes such as plating are formed.Figure 10 shows the schematic diagram of the section structure for completing organic material layer and first electrode layer production.Wherein,
The anode and cathode or cathode and anode of two pole plates and first electrode layer respectively as organic material layer.
It should be noted that each layer structure can be with reference to the array substrate of light emitting region in the array substrate of transmission region
Preparation method, which is not described herein again.
In another embodiment of the application, a kind of display device is additionally provided, referring to Fig. 6, which may include layer
Array substrate 62 described in the encapsulation cover plate 61 of folded setting and any of the above-described embodiment.
It should be noted that display device in the present embodiment can be with are as follows: display panel, Electronic Paper, mobile phone, plate electricity
Any products or components having a display function such as brain, television set, laptop, Digital Frame, navigator.
Display device provided in this embodiment, due to using the array substrate of bottom emitting, what light passed through before injection
Thicknesses of layers is relatively thin, so that the light extraction efficiency of light emitting region is higher, improves display brightness；And the array substrate light of top emitting exists
It is needed before projecting by color blocking layer on the filler and encapsulation cover plate between array substrate and encapsulation cover plate and flat
Layer etc., the thickness of these film layers is big, causes loss big, light extraction efficiency is low.
Wherein, encapsulation cover plate 61 may include: package substrates 611 and be arranged in package substrates 611 close to array substrate 62
Second reflecting layer 612 of side, orthographic projection of second reflecting layer 612 in array substrate 62 cover light emitting region.Wherein, second
The material in reflecting layer 612 can be conductive material, and connect with first electrode layer.
Display device provided in this embodiment, conductive 612 one side of the second reflecting layer are incident to cap for reflecting
Light on plate 61；On the other hand, the second reflecting layer 612 is contacted with the first electrode layer in array substrate, can reduce by first
The IR drop of electrode layer, improves the homogeneity of signal.The material in the second reflecting layer 612 for example can be the materials such as ITO/Ag/ITO
Material.Second reflecting layer 612 deposition of reflective cathodic metal and can graphically be formed in package substrates 611.
Display device provided in this embodiment, using the storage capacitance that may pass through display light, underface can be color
Resistance layer has made the second reflecting layer on the encapsulation cover plate of surface corresponding position, has collectively formed the luminous zone of transparent display
Region.Other regions of backboard are transparent region simultaneously, remove pixel defining layer and flatness layer to promote transparency, and corresponding
Encapsulation cover plate region does not have metal.
The embodiment of the present application provides a kind of array substrate and display device, wherein the array substrate is bottom emitting OLED
Array substrate, including multiple pixel units, each pixel unit are divided into light emitting region and transmission region, the light emitting region
Array substrate include: substrate, and setting driving transistor on the substrate and storage capacitance, display light pass through institute
State storage capacitance outgoing.Technical scheme realizes transparence display, luminous zone by the OLED array of bottom emitting structure
Domain is provided with the storage capacitance that can make to show that light passes through, due to being bottom emitting structure, so on the encapsulation cover plate of array substrate
The structures such as black matrix that no setting is required, so the pixel unit in array substrate be not necessarily to the structures such as black matrix on encapsulation cover plate into
Row precisely aligns, and is compared to the technology that existing emission structure at top realizes transparence display, and array substrate provided by the present application can be with
Pairing precision is reduced, technique is simplified.
All the embodiments in this specification are described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiments, the same or similar parts between the embodiments can be referred to each other.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that the process, method, commodity or the equipment that include a series of elements not only include that
A little elements, but also including other elements that are not explicitly listed, or further include for this process, method, commodity or
The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged
Except there is also other identical elements in process, method, commodity or the equipment for including the element.
A kind of array substrate provided by the present invention and display device are described in detail above, it is used herein
A specific example illustrates the principle and implementation of the invention, and the above embodiments are only used to help understand originally
The method and its core concept of invention；At the same time, for those skilled in the art, according to the thought of the present invention, specific
There will be changes in embodiment and application range, in conclusion the content of the present specification should not be construed as to of the invention
Limitation.
Claims (10)
1. a kind of array substrate, which is characterized in that the array substrate is bottom emitting OLED array, including multiple pixel lists
Member, each pixel unit are divided into light emitting region and transmission region, and the array substrate of the light emitting region includes:
Substrate, and driving transistor on the substrate and storage capacitance are set, display light passes through the storage capacitance
Outgoing.
2. array substrate according to claim 1, which is characterized in that the storage capacitance includes:
It is cascading in the first pole plate, first medium layer and the second pole plate of the substrate side, first pole plate leans on
The nearly substrate setting；
First pole plate is connect with the grid of the driving transistor, and second pole plate is active with the driving transistor
Layer connection.
3. array substrate according to claim 2, which is characterized in that the driving transistor includes:
The active layer, gate insulating layer, the grid, second dielectric layer and the source and drain being cascading on the substrate
Electrode, the active layer are arranged close to the substrate；
The active layer includes channel region, the first conducting area and the second conducting area, the orthographic projection of the grid on the substrate
The orthographic projection of the channel region on the substrate is covered, the source-drain electrode passes through the mistake being arranged in the second dielectric layer
Hole is connect with first conducting area；
The side that the second dielectric layer deviates from the substrate is arranged in first pole plate, by being arranged in the second medium
Via hole on layer is connect with the grid, and second pole plate is by being arranged in the first medium layer and the second dielectric layer
On via hole with it is described second conducting area connect.
4. array substrate according to claim 3, which is characterized in that the array substrate of the light emitting region further include:
The pixel defining layer that second pole plate deviates from the substrate side is arranged in patterning；
Stacking is covered on second pole plate and the pixel defining layer deviates from the organic material layer and first of the substrate side
Electrode layer, the organic material layer are arranged close to the substrate.
5. array substrate according to claim 4, which is characterized in that the array substrate of the light emitting region further include:
It is covered on the first reflecting layer that the first electrode layer deviates from the substrate side, first reflecting layer is in the substrate
On orthographic projection cover the light emitting region.
6. array substrate according to claim 4, which is characterized in that the substrate includes:
Substrate and color blocking layer, flatness layer and the buffer layer being cascading over the substrate, the color blocking layer is close to institute
Substrate setting is stated, the orthographic projection of the color blocking layer over the substrate covers the driving transistor and the storage capacitance in institute
State the orthographic projection on substrate.
7. array substrate according to claim 6, which is characterized in that the array substrate of the transmission region includes:
The substrate, and the buffer layer, the first medium layer, described second over the substrate that be cascading
Dielectric layer, the organic material layer and the first electrode layer, the buffer layer are arranged close to the substrate.
8. a kind of display device, which is characterized in that including described in the encapsulation cover plate being stacked and any one of claim 1 to 7
Array substrate.
9. display device according to claim 8, which is characterized in that the encapsulation cover plate includes:
Package substrates and the package substrates are set close to the second reflecting layer of the array substrate side, second reflection
Orthographic projection of the layer in the array substrate covers the light emitting region.
10. display device according to claim 9, which is characterized in that the material in second reflecting layer is conductive material,
It is connect with the first electrode layer in the array substrate.
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