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CN109074320A - 一种缓存替换方法,装置和系统 - Google Patents

一种缓存替换方法,装置和系统 Download PDF

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Publication number
CN109074320A
CN109074320A CN201780023595.4A CN201780023595A CN109074320A CN 109074320 A CN109074320 A CN 109074320A CN 201780023595 A CN201780023595 A CN 201780023595A CN 109074320 A CN109074320 A CN 109074320A
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CN109074320B (zh
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于绩洋
方磊
蔡卫光
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/128—Replacement control using replacement algorithms adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/885—Monitoring specific for caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G06F2212/1044—Space efficiency improvement
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

本发明实施例提供了一种计算机中的缓存替换方法、装置和系统。该计算机包括高层级缓存和低层级缓存，低层级缓存与高层级缓存为包含关系，该方法包括：处理器在低层级缓存中选择第一缓存行作为待替换缓存行，并监控高层级缓存中是否发生对第一缓存行的相应缓存行的命中，如果在低层级缓存发生缓存未命中前，高层级缓存中发生了对第一缓存行的相应缓存行的命中，则在低层级缓存中保留第一缓存行，并选择第二缓存行作为待替换缓存行。通过对高层级缓存访问情况的监控，避免了对高层级缓存中被频繁访问的缓存行的后无效，提升了缓存命中率。

Description

PCT国内申请，说明书已公开。

Claims (21)

  1. PCT国内申请，权利要求书已公开。
CN201780023595.4A 2017-03-08 2017-03-08 一种缓存替换方法,装置和系统 Active CN109074320B (zh)

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PCT/CN2017/075952 WO2018161272A1 (zh) 2017-03-08 2017-03-08 一种缓存替换方法，装置和系统

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EP (1) EP3572946B1 (zh)
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CN112667534A (zh) * 2020-12-31 2021-04-16 海光信息技术股份有限公司 缓冲存储装置、处理器及电子设备
CN113760787A (zh) * 2021-09-18 2021-12-07 成都海光微电子技术有限公司 多级高速缓存数据推送系统、方法、设备和计算机介质
CN117971718A (zh) * 2024-03-28 2024-05-03 北京微核芯科技有限公司 一种多核处理器的缓存替换方法及其装置
CN119127731A (zh) * 2024-11-15 2024-12-13 中科亿海微电子科技（苏州）有限公司 一种监听过滤器

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US20200226066A1 (en) * 2020-03-27 2020-07-16 Intel Corporation Apparatus and method for efficient management of multi-level memory
US12099451B2 (en) 2021-09-29 2024-09-24 Advanced Micro Devices, Inc. Re-reference interval prediction (RRIP) with pseudo-LRU supplemental age information
US20230244606A1 (en) * 2022-02-03 2023-08-03 Arm Limited Circuitry and method
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CN112612727A (zh) * 2020-12-08 2021-04-06 海光信息技术股份有限公司 一种高速缓存行替换方法、装置及电子设备
CN112612727B (zh) * 2020-12-08 2023-07-07 成都海光微电子技术有限公司 一种高速缓存行替换方法、装置及电子设备
CN112667534A (zh) * 2020-12-31 2021-04-16 海光信息技术股份有限公司 缓冲存储装置、处理器及电子设备
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CN113760787A (zh) * 2021-09-18 2021-12-07 成都海光微电子技术有限公司 多级高速缓存数据推送系统、方法、设备和计算机介质
CN117971718A (zh) * 2024-03-28 2024-05-03 北京微核芯科技有限公司 一种多核处理器的缓存替换方法及其装置
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CN119127731A (zh) * 2024-11-15 2024-12-13 中科亿海微电子科技（苏州）有限公司 一种监听过滤器

Also Published As

Publication number Publication date
CN109074320B (zh) 2023-11-17
WO2018161272A1 (zh) 2018-09-13
US20190370187A1 (en) 2019-12-05
EP3572946A1 (en) 2019-11-27
EP3572946B1 (en) 2022-12-07
EP3572946A4 (en) 2020-02-19

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