CN108735896A - The production method of MRAM - Google Patents
The production method of MRAM Download PDFInfo
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- CN108735896A CN108735896A CN201710250894.3A CN201710250894A CN108735896A CN 108735896 A CN108735896 A CN 108735896A CN 201710250894 A CN201710250894 A CN 201710250894A CN 108735896 A CN108735896 A CN 108735896A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
- 239000003989 dielectric material Substances 0.000 claims abstract description 68
- 238000000034 method Methods 0.000 claims abstract description 62
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 238000004528 spin coating Methods 0.000 claims abstract description 30
- 238000005530 etching Methods 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims description 51
- 229910052751 metal Inorganic materials 0.000 claims description 51
- 239000010949 copper Substances 0.000 claims description 33
- 229910052802 copper Inorganic materials 0.000 claims description 32
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 31
- 230000008569 process Effects 0.000 claims description 27
- 238000000926 separation method Methods 0.000 claims description 26
- 230000004888 barrier function Effects 0.000 claims description 18
- 238000003303 reheating Methods 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 11
- -1 silicon oxide compound Chemical class 0.000 claims description 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 239000007788 liquid Substances 0.000 abstract description 13
- 238000010992 reflux Methods 0.000 abstract description 7
- 238000011049 filling Methods 0.000 abstract description 4
- 239000000463 material Substances 0.000 description 15
- 238000010586 diagram Methods 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 7
- 229910004166 TaN Inorganic materials 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- ALKZAGKDWUSJED-UHFFFAOYSA-N dinuclear copper ion Chemical compound [Cu].[Cu] ALKZAGKDWUSJED-UHFFFAOYSA-N 0.000 description 2
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 2
- 239000002305 electric material Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 150000002739 metals Chemical group 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 150000004760 silicates Chemical class 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 229910004156 TaNx Inorganic materials 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000013036 cure process Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
This application provides a kind of production methods of MRAM.The production method includes：Multiple pre-storing units are arranged in interval on a surface of the substrate, and each pre-storing unit includes a MTJ device；Dielectric material is arranged on the surface of the separate substrate of multiple pre-storing units using spin-coating method, dielectric material covers each MTJ device and full of the gap between two neighboring MTJ device；Dielectric material is hardened, dielectric layer is formed.Dielectric material is arranged on the surface of pre-storing unit using spin-coating method in the production method, it will not form higher step while filling gap on the surface of MTJ, so that the surface smoothness of the dielectric layer formed is good, dielectric material extra on etching method removal MTJ subsequently can be directly used, and since the reflux characteristic of the liquid dielectric materials for spin coating is good and makes the dielectric layer formed with uniform flat and high fracture-resistant with certain viscosity.
Description
Technical field
This application involves field of semiconductor technology, in particular to a kind of production method of MRAM.
Background technology
STT-MRAM is a kind of potential, revolutionary universal-memory technologies, directly spin polarized current can be utilized to drive
Nanomagnets magnetic moment inverts, and completes information write-in.It is integrated with the high storage density of DRAM, SRAM fast reading and writing ability,
The superior functions such as the non-volatile and low-power consumption of Flash and high stability, in addition, it has the advantage used infinitely；With
Traditional MRAM is compared, and has better autgmentability, a lower write information electric current, and especially it is simultaneous with advanced semiconductor technology
Hold.
While STT-MRAM device performances are excellent, more harsh challenge is also proposed to semiconductor technology processing procedure, especially
Its requirement higher to every layer film roughness in device, to CMP process (Chemical Mechanical
Planarization, CMP) propose the challenge of bigger.
The core work unit of STT-MRAM is by " magnetic reference layer/insulative barriers layer/magnetic free layer " sandwich structure group
At magnetic tunnel-junction (MTJ).
In addition, after MTJ device 6' prepares completion, the dielectric layer 7' between two neighboring MTJ device 6' is needed
To realize the electrical isolation between adjacent MTJ device.Currently, mainly preparing dielectric layer using PECVD/LPCVD using TEOS
7', but since prepared dielectric layer 7' is conformal covering, dielectric layer 7' is while coverage gap, the shape on MTJ device 6'
At certain thickness dielectric layer, and then form the dielectric layer 7' shown in FIG. 1 with step shape.
In order to make MTJ device be interconnected with top electrode thereon, the dielectric layer on MTJ device need to be removed, and will polish eventually
Point is accurately controlled on MTJ cell (such as its quilting material Ta), and there is no suitable high selectivities currently on the market
SiO2:Ta lapping liquids are accurately parked on Ta and control whole wafer uniform surface for the chemically mechanical polishing in rear road
Property have greatly challenge.
Invention content
The main purpose of the application is to provide a kind of production method of MRAM, to solve dielectric layer in the prior art
The problem of what set-up mode was brought is difficult to accurately remove the dielectric layer on MTJ.
To achieve the goals above, according to the one side of the application, a kind of production method of MRAM, the making are provided
Method includes：Multiple pre-storing units are arranged in interval on a surface of the substrate, and each above-mentioned pre-storing unit includes a MTJ device
Part；Dielectric material, above-mentioned dielectric are arranged on the surface far from above-mentioned substrate of above-mentioned multiple pre-storing units using spin-coating method
Material covers each above-mentioned MTJ device and full of the gap between two neighboring above-mentioned MTJ device；Above-mentioned dielectric material is carried out hard
Change, forms dielectric layer.
Further, after forming above-mentioned pre-storing unit, before above-mentioned dielectric material is set, above-mentioned production method
Further include：Pre- dielectric layer is deposited on the surface far from above-mentioned substrate of above-mentioned pre-storing unit, above-mentioned pre- dielectric layer covering is each
Above-mentioned MTJ device simultaneously covers each above-mentioned gap, what above-mentioned dielectric material was arranged in above-mentioned pre- dielectric layer far from above-mentioned MTJ device
On surface.
Further, above-mentioned pre- dielectric layer is silicon oxide compound layer.
Further, the thickness of above-mentioned pre- dielectric layer is between 10~20nm.
Further, the ratio of the depth in each above-mentioned gap and width is less than or equal to 15:1.
Further, above-mentioned dielectric material includes low-K dielectric material.
Further, using the thickness of the above-mentioned dielectric material of above-mentioned spin-coating method setting between 20~200nm.
Further, the process hardened to above-mentioned dielectric material includes：Primary heating is carried out to above-mentioned dielectric material,
The temperature of above-mentioned primary heating is between 150~300 DEG C, and the time of above-mentioned primary heating is between 30~60min；To above giving an account of
Electric material carries out reheating, and the temperature of above-mentioned reheating is between 300~400 DEG C, and the time of above-mentioned reheating is 30
Between~60min.
Further, after forming above-mentioned dielectric layer, above-mentioned production method further includes：Step A1, etching remove on each
State the above-mentioned dielectric layer in part above on the surface far from above-mentioned substrate of MTJ device and each above-mentioned gap so that on each
The exposed surface of the exposed surface and the remaining above-mentioned dielectric layer in its both sides of stating MTJ device is in the same plane；Step A2,
The exposed surface of above-mentioned MTJ device and setting top electrode metal on the exposed surface of remaining above-mentioned dielectric layer, form top electrode
Layer；Step A3 removes the above-mentioned top electrode metal on remaining above-mentioned dielectric layer surface, in each above-mentioned MTJ device far from upper
It states and forms top electrode on the surface of substrate.
Further, after forming above-mentioned dielectric layer, above-mentioned production method further includes：Step B1, etching removal are located at
It is logical to form second in above-mentioned dielectric layer for the above-mentioned dielectric layer in part on the surface far from above-mentioned substrate of each above-mentioned MTJ device
Hole, above-mentioned second through-hole are arranged correspondingly on the surface far from above-mentioned substrate of above-mentioned MTJ device；Step B2, each
Top electrode metal is set in above-mentioned second through-hole, forms top electrode.
Further, above-mentioned steps B1 further includes：Etching removal is on the part on the two side of each above-mentioned MTJ device
Electric layer is given an account of, forms above-mentioned second through-hole, depth of above-mentioned second through-hole in above-mentioned MTJ device both sides is H1, above-mentioned second is logical
Depth of the hole on the surface far from above-mentioned substrate of above-mentioned MTJ device is H2, H1>H2。
Further, the process that above-mentioned pre-storing unit is arranged includes：Interval setting is multiple on the surface of above-mentioned substrate
Connect metal layer；Separation layer is set on the surface far from above-mentioned substrate of above-mentioned multiple connection metal layers；Positioned at each above-mentioned
First through hole is opened up in above-mentioned separation layer on connection metal layer, and above-mentioned first through hole and above-mentioned connection metal layer one are a pair of
It answers；Hearth electrode metal is set in each above-mentioned first through hole, forms hearth electrode, and the table far from above-mentioned substrate of above-mentioned hearth electrode
Face and the surface far from above-mentioned substrate of above-mentioned separation layer are in the same plane；In each above-mentioned hearth electrode far from above-mentioned connection gold
Belong to and an above-mentioned MTJ device is set on the surface of layer, and then forms spaced above-mentioned multiple pre-storing units.
Further, above-mentioned connection metal layer is layers of copper, in the step of above-mentioned separation layer is arranged and the above-mentioned layers of copper of setting
Between step, the process that above-mentioned pre-storing unit is arranged further includes：It is arranged on the surface far from above-mentioned substrate of above-mentioned layers of copper
Copper barrier layer, above-mentioned separation layer are arranged on the surface far from above-mentioned layers of copper of above-mentioned copper barrier layer, and above-mentioned first through hole opens up
In above-mentioned copper barrier layer and above-mentioned separation layer on each above-mentioned connection metal layer.
Further, above-mentioned MRAM is STT-MRAM, and above-mentioned MTJ device is p-MTJ devices.
Using the technical solution of the application, spin coating (Spin-On-Deposition, SOD) method be it is a kind of will be by solvent and Jie
The liquid dielectric matter that electric matter mixes, the method that substrate surface is coated directly onto by way of spin coating.Liquid dielectric matter master
There is the oxide that the oxide (such as SiOC) of silicates, siloxanes spin-coating glass, C doping is adulterated with H.It is used in the application
Dielectric material is arranged on the surface of pre-storing unit in spin-coating method, due to the reflux characteristic of the liquid dielectric materials for spin coating
It is good, higher step will not be formed on the surface of MTJ while filling gap, so that the table of the dielectric layer formed
Surface evenness is good, subsequently can directly use dielectric material extra on etching method removal MTJ, avoid and thrown using chemical machinery
It is difficult control that dielectric material was brought on light processing MTJ, which cannot accurately be parked on MTJ and control whole wafer surface homogeneity,
The problem of processed.And preferably and with certain viscosity to be formed due to the reflux characteristic of the liquid dielectric materials for spin coating
Dielectric layer have uniform flat and high fracture-resistant.
Description of the drawings
The accompanying drawings which form a part of this application are used for providing further understanding of the present application, and the application's shows
Meaning property embodiment and its explanation do not constitute the improper restriction to the application for explaining the application.In the accompanying drawings：
Fig. 1 shows the partial structural diagram in the manufacturing process of MRAM in the prior art a kind of；
Fig. 2 shows a kind of offers of embodiment of the application on substrate provided with the structural representation after pre-storing unit
Figure；
Fig. 3 shows the structural schematic diagram being arranged in the pre-stored single face of Fig. 2 after dielectric layer；
Fig. 4 is shown in another embodiment of the application sets gradually pre- dielectric layer in the pre-stored single face of Fig. 2
With the structural schematic diagram after dielectric layer；
Fig. 5 shows that the part of dielectric layer in removal Fig. 3 forms the structural schematic diagram after the second through-hole；
Fig. 6 shows the structural schematic diagram being arranged in the first through hole of Fig. 5 after top electrode；
Fig. 7 shows the dielectric material on the surfaces removal MTJ in another embodiment of the application and in displaced surface
Structural schematic diagram after material；
Fig. 8 shows the structural schematic diagram being arranged on the surfaces MTJ of Fig. 7 and in displaced surface after top electrode layer；
Fig. 9 shows the structural schematic diagram after the top electrode metal on removal Fig. 8 dielectric layers surface；
Figure 10 shows that the copper that set gradually on the surface of connection metal layer that the application another embodiment provides stops
Structural schematic diagram after layer and other structures layer；And
Figure 11 shows the partial structural diagram for the MRAM that another embodiment of the application provides.
Wherein, above-mentioned attached drawing includes the following drawings label：
6', MTJ device；7', dielectric layer；1, substrate；2, metal layer is connected；3, copper barrier layer；4, separation layer；5, bottom electricity
Pole；6, MTJ device；7, dielectric layer；8, top electrode；02, enhance metal connecting layer；07, pre- dielectric layer；08, top electrode layer；70,
Second through-hole.
Specific implementation mode
It is noted that following detailed description is all illustrative, it is intended to provide further instruction to the application.Unless another
It indicates, all technical and scientific terms used herein has usual with the application person of an ordinary skill in the technical field
The identical meanings of understanding.
It should be noted that term used herein above is merely to describe specific implementation mode, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative
It is also intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " packet
Include " when, indicate existing characteristics, step, operation, device, component and/or combination thereof.
As background technology is introduced, use PECVD/LPCVD that dielectric layer, this kind of set-up mode are set in the prior art
So that the dielectric layer formed has higher step-like protrusion, the chemically mechanical polishing for rear road above MTJ device
For, to reach the planarization of entire dielectric layer and control whole wafer surface homogeneity has greatly challenge, to understand
Technical problem certainly as above, present applicant proposes a kind of production methods of MRAM.
In a kind of typical embodiment of the application, a kind of production method of MRAM is provided, which includes：
Multiple pre-storing units are arranged in interval on the surface of substrate 1, and each above-mentioned pre-storing unit includes a MTJ device 6, forms figure
Structure shown in 2；Dielectric material is arranged on the surface far from above-mentioned substrate 1 of above-mentioned multiple pre-storing units using spin-coating method
Material, above-mentioned dielectric material cover each above-mentioned MTJ device 6 and full of the gaps between two neighboring above-mentioned MTJ device 6；To above-mentioned
Dielectric material is hardened, and forms dielectric layer 7, and then form structure shown in Fig. 3.
Spin coating (Spin-On-Deposition, SOD) method is a kind of by the liquid mixed by solvent and dielectric medium Jie
Electric matter, the method that substrate surface is coated directly onto by way of spin coating.Liquid dielectric matter mainly has silicates, siloxanes rotation
Apply glass, the oxide that the oxide (such as SiOC) of C doping is adulterated with H.
Dielectric material is arranged on the surface of pre-storing unit using spin-coating method in the application, due to the liquid for spin coating
The reflux characteristic of dielectric material is good, will not form higher step on the surface of MTJ while filling gap, and then make
The surface smoothness for the dielectric layer that must be formed is good, subsequently can directly use dielectric material extra on etching method removal MTJ, keep away
Exempt from accurately be parked on MTJ and control entire crystalline substance using what dielectric material on chemical mechanical polish process MTJ was brought
The problem of circular surfaces homogeneity is difficult control.And preferably and have one due to the reflux characteristic of the liquid dielectric materials for spin coating
Fixed viscosity and make the dielectric layer formed that there is uniform flat and high fracture-resistant.
During spin coating, the spin coating thickness of dielectric material is to realize being full of of the gap between MTJ device, MTJ device
Surface covering and until reaching surface relatively flat, thickness can be further ensured that dielectric in this way between 20~200nm
Surface of the material full of gap, MTJ device covers and reaches surface relatively flat.Specific spin coating can be completed with a step, also may be used
To divide multistep multiple spin coating to complete.
But the thickness of the dielectric material of above-mentioned spin coating is not limited between 20~200nm, those skilled in the art can
With according to the practical certain thickness dielectric material of situation spin coating.
Cure process is generally high-temperature process, and dielectric material is likely to occur contraction in high-temperature process, thus
The gap that the dielectric layer to be formed cannot be completely covered between MTJ device and two neighboring MTJ device is may result in, in order to keep away
The generation for exempting from this case, is further ensured that completely isolated two adjacent MTJ devices, in a kind of embodiment of the application,
It is formed after above-mentioned pre-storing unit, before above-mentioned dielectric material is arranged, above-mentioned production method further includes：Above-mentioned pre-stored
Pre- dielectric layer 07 is deposited on the surface far from above-mentioned substrate 1 of unit, above-mentioned pre- dielectric layer 07 covers each above-mentioned MTJ device 6 simultaneously
Each above-mentioned gap is covered, above-mentioned dielectric material is arranged on the surface far from above-mentioned MTJ device 6 of above-mentioned pre- dielectric layer 07, shape
At structure shown in Fig. 4.
In a kind of embodiment of the application, above-mentioned pre- dielectric layer 07 is silicon oxide compound layer, and the material is in high-temperature process
Will not shrink, be further ensured that completely isolated two adjacent MTJ devices, also, the silicon oxide compound layer its can adopt
Be arranged with any sedimentation in the prior art, for example use PECVD or LPCVD, raw material can be TEOS or other.This
Field technology personnel can select suitable raw material and suitable process that the pre- dielectric layer 07 is arranged according to actual conditions.
Also, the pre- dielectric layer of the application is not limited to above-mentioned silicon oxide compound layer, can be in the prior art
It is any to play the material layer that two adjacent MTJ devices are isolated.Those skilled in the art can select to close according to actual conditions
Suitable material.
Under normal conditions, material in the deposition rate of side wall than in the slow of bottom wall, in order to further ensure above-mentioned pre- dielectric
Layer can be completely covered the bottom wall and side wall in gap between two MTJ devices, above-mentioned pre- in a kind of embodiment of the application
The thickness of dielectric layer 07 is between 10~20nm.
The thickness of above-mentioned pre- dielectric layer is not limited to above-mentioned range, and those skilled in the art can be according to specific feelings
Thickness of spacing and MTJ device between condition, such as two MTJ etc. is to meet it MTJ is completely covered because what is usually set
Device and the bottom wall and side wall in gap.
In a kind of embodiment of the application, the depth in each above-mentioned gap and the ratio of width are less than or equal to 15:1.In this way may be used
It can be formed completely with being further ensured that the dielectric material of liquid can be completely attached to the bottom wall in gap, and then being further ensured that
The dielectric layer of adjacent MTJ is isolated.
Dielectric material in the application can be any dielectric material in the prior art, and those skilled in the art can root
Select suitable material as dielectric material according to actual conditions.
In order into reduce MRAM resistance, and then reduce MRAM energy consumption, and simultaneously in order to enable formed dielectric layer needed for
Hardening temperature it is relatively low, in a kind of embodiment of the application, above-mentioned dielectric material includes low-K dielectric material, and preferably dielectric is normal
Material of the numerical digit between 2.0~3.5.Can be specifically organic sesqui siloxane spin on polymers (an organic
Silsesquioxane spin-on polymer), organic sesqui siloxane spin on polymers (inorganic
Silsesquioxane spin-on polymer) or adulterate the oxide of C or adulterate the oxide of H.
In a kind of embodiment of the application, include in the environment by oxygen and/or water vapour to dielectric material into
Row hardening, carries out above-mentioned hardening process, to be further ensured that the more preferable progress of hardening process under the atmosphere including nitrogen.
In order to enable dielectric material preferably hardens, and then forms stability and the preferable dielectric layer of isolation performance, this
In a kind of embodiment of application, the process hardened to above-mentioned dielectric material is divided into two steps：The first step, to above-mentioned dielectric material
Primary heating is carried out, the temperature of above-mentioned primary heating is between 150~300 DEG C, and the time of above-mentioned primary heating is in 30~60min
Between；Second step carries out reheating to above-mentioned dielectric material, and the temperature of above-mentioned reheating, should between 300~400 DEG C
Temperature can so that dielectric material is fully hardened, and not influence other performances of MRAM simultaneously, and the time of above-mentioned reheating exists
Between 30~60min.
In order to further ensure the temperature of hardening process does not influence other performances of MRAM and enables to dielectric material simultaneously
Expect fully hardened, in a kind of embodiment in the application, the temperature of above-mentioned reheating is between 350~395 DEG C.
In another embodiment of the application, after forming above-mentioned dielectric layer 7, above-mentioned production method further includes removal portion
Divide dielectric layer and form the process of top electrode, specific process includes：Step B1, etching removal is positioned at each above-mentioned MTJ device 6
It is logical to form shown in fig. 5 multiple second in above-mentioned dielectric layer 7 for the above-mentioned dielectric layer 7 in part on surface far from above-mentioned substrate 1
Hole 70, above-mentioned second through-hole 70 are arranged correspondingly on the surface far from above-mentioned substrate 1 of above-mentioned MTJ device 6；Step
Top electrode metal is arranged in each above-mentioned second through-hole 70, forms top electrode 8 shown in fig. 6 by B2.
In order to enable the electrical contact of top electrode and MTJ device is good, and in a preferred embodiment of the present application, above-mentioned top electricity
The critical size (Critical Dimension, CD) of pole should be greater than the critical size equal to MTJ device, and then be further ensured that
The surface of the separate substrate of top electrode reply MTJ device is completely covered.
In a kind of embodiment of the application, above-mentioned steps B1 further includes：Etching removal is positioned at the two of each above-mentioned MTJ device 6
The above-mentioned dielectric layer 7 in part on side wall forms above-mentioned second through-hole 70, as shown in figure 5, above-mentioned second through-hole 70 is in above-mentioned MTJ
The depth of 6 both sides of device is H1, depth of above-mentioned second through-hole 70 on the surface far from above-mentioned substrate of above-mentioned MTJ device 6
For H2, H1>H2.It may further ensure that in this way and form good electrical contact between top electrode and MTJ device.The MTJ specifically removed
The height of dielectric layer in device side wall should be depending on actual conditions.
In the another embodiment of the application, after forming above-mentioned dielectric layer 7, above-mentioned production method further includes：Step
A1, etching remove on the part above on the surface far from above-mentioned substrate 1 of each above-mentioned MTJ device 6 and each above-mentioned gap
Give an account of electric layer 7 so that the exposed surface of the remaining above-mentioned dielectric layer in the exposed surface of each above-mentioned MTJ device 6 and its both sides 7 is same
In one plane, as shown in Figure 7；Step A2, above-mentioned MTJ device 6 exposed surface and remaining above-mentioned dielectric layer 7 it is exposed
Top electrode metal is set on surface, forms top electrode layer 08 shown in Fig. 8；Step A3 removes remaining 7 surface of above-mentioned dielectric layer
On top electrode metal, form top electrode 8 shown in Fig. 9 on surface of each above-mentioned MTJ device 6 far from above-mentioned substrate 1, should
Removing the process of metal can be completed by photoetching and etching.
Similarly, in order to further ensure top electrode and MTJ device form good electrical contact, one kind of the application is preferably
In embodiment, the critical size (Critical Dimension, CD) of above-mentioned top electrode is greater than or equal to the crucial ruler of MTJ device
It is very little,
It should be noted that in the case of without specified otherwise, " etching " in the application can be in the prior art
Dry etching and wet etching, those skilled in the art can select suitable lithographic method according to specific circumstances.
In addition, any setting gold in the prior art may be used in the method for the setting electrode layer or electrode in the application
Belong to the method for layer, such as sputtering method may be used.Those skilled in the art can select suitable setting side according to actual conditions
Metal is arranged in method.
In another embodiment of the application, the process that above-mentioned pre-storing unit is arranged includes：On the surface of above-mentioned substrate 1
Multiple connection metal layers 2 are arranged in upper interval；On the surfaces far from above-mentioned substrates 1 of above-mentioned multiple connection metal layers 2 setting every
Absciss layer 4；Open up first through hole in the above-mentioned separation layer 4 on each above-mentioned connection metal layer 2, and above-mentioned first through hole with it is upper
Connection metal layer 2 is stated to correspond；Hearth electrode metal is set in each above-mentioned first through hole, forms hearth electrode 5, and above-mentioned bottom electricity
The surface far from above-mentioned substrate 1 of pole 5 with the surface far from above-mentioned substrate 1 of above-mentioned separation layer 4 in the same plane, specifically
Process includes setting hearth electrode and subsequent flatening process；In each above-mentioned hearth electrode 5 far from above-mentioned connection metal layer 2
One MTJ device 6 is set on surface, and then forms spaced above-mentioned multiple pre-storing units, as shown in Fig. 2 to Fig. 9, respectively
Pre-storing unit includes one-to-one connection metal layer 2, separation layer 4, hearth electrode 5 and MTJ device 6.
In order to further ensure hearth electrode and MTJ device form good electrical contact, one kind of the application is preferred to be implemented
In example, the critical size (Critical Dimension, CD) of above-mentioned hearth electrode 5 is greater than or equal to the crucial ruler of MTJ device 6
It is very little.
The material of above-mentioned connection metal layer is selected from metals, the those skilled in the art such as Cu, Au, Ag, Al or TaN can basis
Actual conditions select suitable material to form connection metal layer.In a kind of embodiment of the application, above-mentioned connection metal layer 2 is copper
Layer.
Since metallic copper is easier to diffuse in separation layer, so that the isolation effect of separation layer is poor, or even occur
The problem of electric leakage, and the adhesive property of copper and separation layer is poor, in order to further increase the isolation effect and device of separation layer
Stability, in a kind of embodiment of the application, when above-mentioned connection metal layer 2 is layers of copper, in the step that above-mentioned separation layer 4 is arranged
Suddenly be arranged above-mentioned layers of copper the step of between, the process of the above-mentioned above-mentioned pre-storing unit of setting further includes：In the remote of above-mentioned layers of copper
Copper barrier layer 3 is set, also, on the surface from above-mentioned substrate 1 at this point, first through hole is not only opened in separation layer, is also opened in
Copper barrier layer forms structure shown in Fig. 10.The table far from above-mentioned layers of copper in above-mentioned copper barrier layer 3 is arranged in above-mentioned separation layer 4
On face, specific set-up mode can be deposition etc..
Above-mentioned copper barrier layer can be that any copper barrier layer material in the prior art is formed, such as TaNx or Ta,
Those skilled in the art can select suitable material to form copper barrier layer according to actual conditions.The layer specifically can by PVD,
The methods of CVD or ALD deposit, and preferably ALD or SIP (Self-Ionized PVD) modes deposit.
Top electrode in the application with hearth electrode can be that conductive material commonly used in the prior art is formed, such as copper,
Ta or TaN etc., preferably resistivity low conductive material, such as TaN or Ta.
It can need to be arranged third through-hole between hearth electrode in the application and connection metal layer according to manufacturing process, and
The conductive metals such as Cu are filled in third through-hole, form enhancing metal connecting layer 02 as shown in figure 11, to be further ensured that bottom electricity
There is good electrical contact between pole 5 and connection metal layer 2.In the case, the forming method of hearth electrode can refer to above-mentioned
The forming method of top electrode.
Substrate in the application includes substrate and in all necessary structures of the roads substrate Shang Qian technique and device,
Such as including CMOS etc..
Comprising processes such as photoetching involved in actual process processing procedure in preparation process described herein, but at this
It is not shown in schematic diagram in patent.
MTJ device in the application can be any one MTJ device in the prior art, and MTJ device is mainly by referring to
Layer/insulative barriers layer/free layer is constituted, while including the magnetic or non magnetic thin of a variety of achievable specific functions of other multilayers
Film.Those skilled in the art can select the MTJ device of suitable construction according to actual conditions.
The production method of MRAM in the application is suitable for any type MRAM in the prior art, one kind in the application
In embodiment, above-mentioned MRAM is STT-MRAM (Spin Transfer Torque Magnetic Random Access
Memory, abbreviation spin transfer torque magnetic RAM), STT-MRAM is different from traditional MRAM, utilizes electric current
Spin transfer torque effect (STT) carries out write operation, write efficiency higher to MRAM.
In order to further increase the high temperature resistance of STT-MRAM, and then it is further ensured that the hardening in above-mentioned dielectric material
Process will not impact other performances of device, and in a kind of embodiment of the application, above-mentioned MTJ device is p-MTJ (vertical
Magnetize MTJ) device.
In order to enable those skilled in the art can clearly understand the technical solution of the application, below with reference to tool
The embodiment of body illustrates the scheme of the application.
Embodiment
The manufacturing process of STT-MRAM includes：
Prepare the substrate 1 for including the structure prepared by preceding road technique in substrate and substrate.
Damascus technics deposited copper metal layer is used on substrate 1, and surface of multiple layers of copper far from substrate is same
In a plane, multiple connection metal layers 2 in Figure 10 are formed.
TaN is deposited on the surface of the separate substrate 1 of each 2 layers of metal layer of connection, forms copper barrier layer 3.
SiO is formed using PECVD using TEOS on copper barrier layer 32Layer, i.e. separation layer 4.
First through hole is opened up in copper barrier layer 3 and separation layer 4 using the method for photoetching and etching；And it is logical first
Metal TaN is filled in hole, forms hearth electrode 5, and body structure surface is planarized using chemically mechanical polishing, makes above-mentioned hearth electrode 5
The surface far from above-mentioned substrate 1 on surface and above-mentioned separation layer 4 far from above-mentioned substrate 1 is in the same plane.
MTJ device 6, depth and the width in the gap between two neighboring MTJ device 6 are set on the surface of each hearth electrode 5
The ratio of degree is equal to 5:1, SiO is deposited using PECVD on the surface of the separate hearth electrode of MTJ device2, formed covering MTJ with
And the pre- dielectric layer 07 in gap, the thickness of pre- dielectric layer 07 is 15nm.
Using spin-coating method in 07 spin coating SiOC of pre- dielectric layer so that the dielectric material covers the surface of pre- dielectric layer 07 and fills
Full gap；Primary heating is carried out to above-mentioned dielectric material, the temperature of above-mentioned primary heating is 200 DEG C, above-mentioned primary heating when
Between be 40min；Reheating is carried out to above-mentioned dielectric material, the temperature of above-mentioned reheating is 350 DEG C, above-mentioned reheating
Time is 40min in the time, forms dielectric layer 7.
Etching removes upper above on the surface far from above-mentioned substrate 1 of each above-mentioned MTJ device 6 and each above-mentioned gap
Give an account of electric material so that the exposed surface of the remaining above-mentioned dielectric layer in the exposed surface of each above-mentioned MTJ device 6 and its both sides 7 exists
In approximately the same plane；Ta, shape are deposited on the exposed surface of above-mentioned MTJ device 6 and the exposed surface of remaining above-mentioned dielectric layer 7
At top electrode layer 08；The top electrode metal on remaining 7 surface of above-mentioned dielectric layer is removed by photoetching and etching technics, each
Top electrode 8 is formed on the surface far from above-mentioned substrate 1 of above-mentioned MTJ device 6, so far forms structure shown in Fig. 10.
It can be seen from the above description that the application the above embodiments realize following technique effect：
Dielectric material is arranged on the surface of pre-storing unit using spin-coating method in the application, due to the liquid for spin coating
The reflux characteristic of dielectric material is good, will not form higher step on the surface of MTJ while filling gap, and then make
The surface smoothness for the dielectric layer that must be formed is good, subsequently can directly use dielectric material extra on etching method removal MTJ, keep away
Exempted from using dielectric material on chemical mechanical polish process MTJ bring cannot accurately be parked on MTJ, milling time is long and
The big problem of roughness.And preferably and with certain viscosity made due to the reflux characteristic of the liquid dielectric materials for spin coating
The dielectric layer that must be formed has uniform flat and high fracture-resistant.
The foregoing is merely the preferred embodiments of the application, are not intended to limit this application, for the skill of this field
For art personnel, the application can have various modifications and variations.Within the spirit and principles of this application, any made by repair
Change, equivalent replacement, improvement etc., should be included within the protection domain of the application.
Claims (14)
1. a kind of production method of MRAM, which is characterized in that the production method includes：
Multiple pre-storing units are arranged in interval on the surface of substrate (1), and each pre-storing unit includes a MTJ device
(6)；
Dielectric material is arranged on the surface far from the substrate (1) of the multiple pre-storing unit using spin-coating method, it is described
Dielectric material covers each MTJ device (6) and full of the gap between the two neighboring MTJ device (6)；And
The dielectric material is hardened, dielectric layer (7) is formed.
2. manufacturing method according to claim 1, which is characterized in that after forming the pre-storing unit, be arranged
Before the dielectric material, the production method further includes：
Pre- dielectric layer (07), the pre- dielectric layer are deposited on the surface far from the substrate (1) of the pre-storing unit
(07) it covers each MTJ device (6) and covers each gap,
The dielectric material setting is on the surface far from the MTJ device (6) of the pre- dielectric layer (07).
3. production method according to claim 2, which is characterized in that the pre- dielectric layer (07) is silicon oxide compound layer.
4. production method according to claim 2, which is characterized in that the thickness of the pre- dielectric layer (07) is in 10~20nm
Between.
5. manufacturing method according to claim 1, which is characterized in that the depth in each gap and the ratio of width be less than or
Equal to 15:1.
6. manufacturing method according to claim 1, which is characterized in that the dielectric material includes low-K dielectric material.
7. manufacturing method according to claim 1, which is characterized in that using the dielectric material of spin-coating method setting
Thickness between 20~200nm.
8. manufacturing method according to claim 1, which is characterized in that the process packet hardened to the dielectric material
It includes：
Primary heating is carried out to the dielectric material, the temperature of the primary heating is described once to add between 150~300 DEG C
The time of heat is between 30~60min；And
To the dielectric material carry out reheating, the temperature of the reheating between 300~400 DEG C, it is described it is secondary plus
The time of heat is between 30~60min.
9. manufacturing method according to claim 1, which is characterized in that after forming the dielectric layer (7), the making
Method further includes：
Step A1, etching remove on the surface far from the substrate (1) of each MTJ device (6) and each gap
The part dielectric layer (7) of top so that the exposed surface of each MTJ device (6) and the remaining dielectric in its both sides
The exposed surface of layer (7) is in the same plane；
Step A2 is arranged on the exposed surface of the MTJ device (6) and the exposed surface of the remaining dielectric layer (7) and pushes up
Electrode metal forms top electrode layer (08)；And
Step A3 removes the top electrode metal on remaining dielectric layer (7) surface, in each MTJ device (6)
Top electrode (8) is formed on surface far from the substrate (1).
10. manufacturing method according to claim 1, which is characterized in that after forming the dielectric layer (7), the system
Further include as method：
Step B1, part of the etching removal on the surface far from the substrate (1) of each MTJ device (6) are given an account of
Electric layer (7), forms the second through-hole (70) in the dielectric layer (7), and second through-hole (70) is arranged correspondingly in institute
It states on the surface far from the substrate (1) of MTJ device (6)；And
Top electrode metal is arranged in step B2 in each second through-hole (70), forms top electrode (8).
11. manufacturing method according to claim 10, which is characterized in that the step B1 further includes：
The part dielectric layer (7) of the etching removal on the two side of each MTJ device (6), it is logical to form described second
Hole (70), depth of second through-hole (70) in the MTJ device (6) both sides is H1, second through-hole (70) is described
Depth on the surface far from the substrate of MTJ device (6) is H2, H1>H2。
12. manufacturing method according to claim 1, which is characterized in that the process that the pre-storing unit is arranged includes：
Multiple connection metal layers (2) are arranged in interval on the surface of the substrate (1)；
The setting separation layer (4) on the surface far from the substrate (1) of the multiple connection metal layer (2)；
Open up first through hole in the separation layer (4) on each connection metal layer (2), and the first through hole with
The connection metal layer (2) corresponds；
Hearth electrode metal is set in each first through hole, forms hearth electrode (5), and the hearth electrode (5) is separate described
The surface of substrate (1) and the surface far from the substrate (1) of the separation layer (4) are in the same plane；And
A MTJ device (6) is set on the surface far from the connection metal layer (2) of each hearth electrode (5), into
And form spaced the multiple pre-storing unit.
13. production method according to claim 12, which is characterized in that the connection metal layer (2) is layers of copper, is being arranged
Between the step of the step of separation layer (4) and the setting layers of copper, the process of the setting pre-storing unit is also wrapped
It includes：
The setting copper barrier layer (3) on the surface far from the substrate (1) of the layers of copper, the separation layer (4) are arranged in institute
It states on the surface far from the layers of copper of copper barrier layer (3), the first through hole is opened on each connection metal layer (2)
In the copper barrier layer (3) and the separation layer (4).
14. production method according to any one of claim 1 to 13, which is characterized in that the MRAM is STT-MRAM,
The MTJ device (6) is p-MTJ devices.
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| CN201710250894.3A CN108735896A (en) | 2017-04-17 | 2017-04-17 | The production method of MRAM |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10944044B2 (en) | 2019-08-07 | 2021-03-09 | International Business Machines Corporation | MRAM structure with T-shaped bottom electrode to overcome galvanic effect |
| US11114606B2 (en) | 2019-09-23 | 2021-09-07 | International Business Machines Corporation | MRAM devices containing a harden gap fill dielectric material |
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| CN1379446A (en) * | 2001-03-30 | 2002-11-13 | 华邦电子股份有限公司 | Chemical Mechanical Polishing Combined with Spin Coating |
| JP2006120742A (en) * | 2004-10-20 | 2006-05-11 | Renesas Technology Corp | Semiconductor device and method of manufacturing the same |
| US20060148234A1 (en) * | 2004-12-31 | 2006-07-06 | Industrial Technology Research Institute | Non-via method of connecting magnetoelectric elements with conductive line |
| US20140210103A1 (en) * | 2011-08-01 | 2014-07-31 | Avalanche Technology Inc. | MRAM with Sidewall Protection and Method of Fabrication |
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| CN1255741A (en) * | 1998-11-27 | 2000-06-07 | 世大积体电路股份有限公司 | Surface Planarization Methods |
| CN1379446A (en) * | 2001-03-30 | 2002-11-13 | 华邦电子股份有限公司 | Chemical Mechanical Polishing Combined with Spin Coating |
| JP2006120742A (en) * | 2004-10-20 | 2006-05-11 | Renesas Technology Corp | Semiconductor device and method of manufacturing the same |
| US20060148234A1 (en) * | 2004-12-31 | 2006-07-06 | Industrial Technology Research Institute | Non-via method of connecting magnetoelectric elements with conductive line |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10944044B2 (en) | 2019-08-07 | 2021-03-09 | International Business Machines Corporation | MRAM structure with T-shaped bottom electrode to overcome galvanic effect |
| US11114606B2 (en) | 2019-09-23 | 2021-09-07 | International Business Machines Corporation | MRAM devices containing a harden gap fill dielectric material |
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Application publication date: 20181102 |