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CN107315369B - A BMC chip intelligent co-processing device - Google Patents

A BMC chip intelligent co-processing device Download PDF

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CN107315369B
CN107315369B CN201710567604.8A CN201710567604A CN107315369B CN 107315369 B CN107315369 B CN 107315369B CN 201710567604 A CN201710567604 A CN 201710567604A CN 107315369 B CN107315369 B CN 107315369B
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arm processor
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alarm
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CN107315369A (en
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刘同强
王朝辉
童元满
赵元
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Suzhou Metabrain Intelligent Technology Co Ltd
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Suzhou Wave Intelligent Technology Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0428Safety, monitoring
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0421Multiprocessor system
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/048Monitoring; Safety
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/22Pc multi processor system
    • G05B2219/2214Multicontrollers, multimicrocomputers, multiprocessing
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/24Pc safety
    • G05B2219/24125Watchdog, check at timed intervals

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
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Abstract

本发明公开一种BMC芯片智能协处理装置及处理方法,包括:ARM处理器,通信模块,与ARM处理器连接的协处理模块,分别与ARM处理器、协处理模块连接的服务器主板,以及通过通信模块与协处理模块连接的管理平台。本发明在BMC芯片内部处理器失效后,维持视频及控制的传输,并发送警报到管理平台,实时传送服务器工作状态,起到监视服务器运行的作用,同时根据失效间隔的时间决定发送警报级别,以及决定是否关闭服务器,确保服务器不出现事故。

The invention discloses a BMC chip intelligent co-processing device and a processing method, comprising: an ARM processor, a communication module, a co-processing module connected to the ARM processor, a server main board connected to the ARM processor and the co-processing module respectively, and through A management platform for connecting the communication module and the co-processing module. After the failure of the internal processor of the BMC chip, the present invention maintains the transmission of video and control, sends an alarm to the management platform, transmits the working status of the server in real time, and plays the role of monitoring the operation of the server. At the same time, the alarm level is determined according to the failure interval time. And decide whether to shut down the server to ensure that the server does not have an accident.

Description

一种BMC芯片智能协处理装置A BMC chip intelligent co-processing device

技术领域technical field

本发明涉及BMC芯片领域,具体涉及一种BMC芯片智能协处理装置及处理方法。The invention relates to the field of BMC chips, in particular to a BMC chip intelligent co-processing device and a processing method.

背景技术Background technique

随着客户对服务器的稳定性方面的要求原来越高,对服务器主板的管理要求越来越严格。服务器主板采用BMC芯片进行管理,BMC芯片可以实现系统运行的监测及控制,从而实现对系统更好的维护。在服务器的实际应用中,BMC芯片会受到各种因素的干扰,比如电磁辐射、电压不稳等,会造成BMC芯片的程序跑飞。当BMC芯片失效之后,服务器的运行和监控失去控制,整个服务器有工作异常的风险。同时,BMC芯片失效也就无法发送报警信息,即使客户发现问题也需要耗费人力去现场维护,带来极大的资源浪费。As customers have higher requirements for server stability, the management requirements for server motherboards are becoming more and more stringent. The main board of the server is managed by the BMC chip, which can realize the monitoring and control of the system operation, so as to achieve better maintenance of the system. In the actual application of the server, the BMC chip will be interfered by various factors, such as electromagnetic radiation, voltage instability, etc., which will cause the program of the BMC chip to run away. When the BMC chip fails, the operation and monitoring of the server are out of control, and the entire server may be at risk of working abnormally. At the same time, if the BMC chip fails, it will not be able to send an alarm message. Even if the customer finds a problem, it will take manpower to go to the site for maintenance, resulting in a huge waste of resources.

发明内容Contents of the invention

为解决上述问题,本发明提供一种BMC芯片智能协处理装置及处理方法,可在BMC芯片内部处理器失效后,维持视频及控制的传输,并发送警报到管理平台,实时传送服务器工作状态,并根据配置策略决定是否关闭服务器。In order to solve the above problems, the present invention provides a BMC chip intelligent co-processing device and processing method, which can maintain the transmission of video and control after the internal processor of the BMC chip fails, and send an alarm to the management platform to transmit the working status of the server in real time. And decide whether to shut down the server according to the configuration policy.

本发明的技术方案是:一种BMC芯片智能协处理装置,包括:ARM处理器,通信模块,与所述ARM处理器连接的协处理模块,分别与所述ARM处理器、协处理模块连接的服务器主板,以及通过通信模块与协处理模块连接的管理平台;The technical scheme of the present invention is: a kind of BMC chip intelligent coprocessing device, comprising: ARM processor, communication module, the coprocessing module connected with described ARM processor, the coprocessing module connected with described ARM processor, coprocessing module respectively The main board of the server, and the management platform connected with the co-processing module through the communication module;

所述协处理模块包括:The co-processing module includes:

看门狗子模块:对ARM处理器进行失效检测并复位ARM处理器,且将ARM处理器失效信息和复位信息发送给协处理控制子模块;Watchdog sub-module: detects the failure of the ARM processor and resets the ARM processor, and sends the failure information and reset information of the ARM processor to the co-processing control sub-module;

协处理控制子模块:设置有主板信息接收端口和主板控制信号发出端口;当ARM处理器正常运行时,将ARM处理器发出的交互信息经通信模块转发给管理平台,将ARM处理器发出的主板控制信号经主板控制信号发出端口转发给服务器主板,并将经通信模块接收的控制信息发送给ARM处理器;当接收到ARM处理器失效信息时,将经主板信息接收端口接收的主板信息由通信模块发给管理平台,并由主板控制信号发出端口发出主板控制信号给服务器主板,且由通信模块发出警报信息给管理平台。Co-processing control sub-module: It is equipped with a main board information receiving port and a main board control signal sending port; when the ARM processor is running normally, the interactive information sent by the ARM processor is forwarded to the management platform through the communication module, and the main board sent by the ARM processor The control signal is forwarded to the server main board through the control signal sending port of the main board, and the control information received by the communication module is sent to the ARM processor; The module sends it to the management platform, and the mainboard control signal is sent to the server mainboard by the mainboard control signal port, and the communication module sends an alarm message to the management platform.

进一步地,所述协处理控制子模块包括:Further, the co-processing control submodule includes:

警报接收单元:接收看门口模块发出的ARM处理器失效信息;Alarm receiving unit: receive the ARM processor failure information sent by the gatekeeper module;

警报判断单元:根据ARM处理器失效信息判断警报级别;Alarm judging unit: judging the alarm level according to the failure information of the ARM processor;

警报发送单元:将警报信息以报文形式发出。Alarm sending unit: send the alarm information in the form of message.

进一步地,警报发送单元发出的警报信息报文包括以下信息:警报类型、目的编号、设备请求编号、本次ARM处理器失效时间、上次ARM处理器失效时间、24小时失效次数、历史失效次数、溢出标志、ECC校验数据。Further, the alarm information message sent by the alarm sending unit includes the following information: alarm type, purpose number, equipment request number, this ARM processor failure time, the last ARM processor failure time, 24-hour failure times, historical failure times , overflow flag, ECC check data.

进一步地,主板信息接收端口为视频信息接收端口,主板控制信号发出端口为主板电源控制信号发出端口。Further, the main board information receiving port is a video information receiving port, and the main board control signal sending port is a main board power control signal sending port.

进一步地,ARM处理器发出的交互信息包括视频信息。Further, the interaction information sent by the ARM processor includes video information.

进一步地,通信模块为网络接口。Further, the communication module is a network interface.

进一步地,协处理模块还包括数据封装解析子模块,所述数据封装解析子模块用于对ARM处理器与协处理控制子模块之间的传输数据进行封装或解析。Further, the co-processing module further includes a data encapsulation and analysis sub-module, and the data encapsulation and analysis sub-module is used for encapsulating or analyzing the transmission data between the ARM processor and the co-processing control sub-module.

一种BMC芯片智能协处理方法,包括ARM处理器、协处理模块和服务器主板;A BMC chip intelligent co-processing method, comprising an ARM processor, a co-processing module and a server motherboard;

还包括以下步骤:Also includes the following steps:

S1:协处理模块转发ARM处理器发出的交互信息和主板控制信号,并判断ARM处理器是否失效;S1: The co-processing module forwards the interaction information sent by the ARM processor and the control signal of the main board, and judges whether the ARM processor is invalid;

S2:若ARM处理器未失效则重复步骤S1,若ARM处理器失效则协处理模块接管交互信息和主板控制信号,并发出警报信息,且重启ARM处理器。S2: If the ARM processor is not invalid, repeat step S1. If the ARM processor fails, the co-processing module takes over the interactive information and the control signal of the main board, sends out an alarm message, and restarts the ARM processor.

进一步地,步骤S2中协处理模块接管交互信息是指协处理模块接收主板信息并将其发出,且发出主板电源控制信号给服务器主板。Further, in step S2, the co-processing module takes over the interactive information means that the co-processing module receives and sends the main board information, and sends the main board power control signal to the server main board.

进一步地,步骤S2中发出警报信息具体包括以下步骤:Further, sending out the alarm information in step S2 specifically includes the following steps:

S2.1:判断失效间隔是否小于最短间隔预设阈值;S2.1: Determine whether the failure interval is less than the shortest interval preset threshold;

S2.2:若失效间隔小于最短间隔预设阈值,则发出三级警报并关闭服务器;否则判断失效间隔是否小于中级间隔预设阈值;S2.2: If the failure interval is less than the preset threshold of the shortest interval, issue a three-level alarm and shut down the server; otherwise, judge whether the failure interval is less than the preset threshold of the intermediate interval;

S2.3:若失效间隔小于中级间隔预设阈值,则发出二级警报;否则判断失效间隔是否小于最长间隔预设阈值;S2.3: If the failure interval is less than the preset threshold of the intermediate interval, a second-level alarm is issued; otherwise, it is judged whether the failure interval is less than the preset threshold of the longest interval;

S2.4:若失效间隔小于最长时间预设阈值,则发出一级警报。S2.4: If the failure interval is less than the maximum time preset threshold, a first-level alarm will be issued.

本发明提供的BMC芯片智能协处理装置及处理方法,在BMC芯片内部处理器失效后,维持视频及控制的传输,并发送警报到管理平台,实时传送服务器工作状态,起到监视服务器运行的作用。同时,本装置具有记录BMC芯片处理器失效间隔的功能,根据失效间隔的时间决定发送警报级别,以及决定是否关闭服务器,确保服务器不出现事故。The BMC chip intelligent co-processing device and processing method provided by the present invention maintain the transmission of video and control after the internal processor of the BMC chip fails, and send an alarm to the management platform, transmit the working status of the server in real time, and play the role of monitoring the operation of the server . At the same time, this device has the function of recording the failure interval of the BMC chip processor, and determines the level of sending the alarm according to the time of the failure interval, and decides whether to shut down the server to ensure that the server does not have any accidents.

附图说明Description of drawings

图1是本发明具体实施例装置结构示意图。Fig. 1 is a schematic diagram of the device structure of a specific embodiment of the present invention.

图2是本发明具体实施例方法流程示意图。Fig. 2 is a schematic flow chart of a method according to a specific embodiment of the present invention.

图中,1-ARM处理器,2-协处理模块,21-看门狗子模块,22-数据封装解析子模块,23-协处理控制子模块,3-服务器主板,4-通信模块,5-管理平台。In the figure, 1-ARM processor, 2-co-processing module, 21-watchdog sub-module, 22-data encapsulation and analysis sub-module, 23-co-processing control sub-module, 3-server motherboard, 4-communication module, 5 - Management platform.

具体实施方式Detailed ways

下面结合附图并通过具体实施例对本发明进行详细阐述,以下实施例是对本发明的解释,而本发明并不局限于以下实施方式。The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. The following embodiments are explanations of the present invention, but the present invention is not limited to the following embodiments.

如图1所示,本发明提供的BMC芯片智能协处理装置,包括:ARM处理器1、通信模块4、协处理模块2、服务器主板3、管理平台5。协处理模块2与ARM处理器1连接,服务器主板3分别与ARM处理器1、协处理模块2连接,管理平台5通过通信模块4与协处理器连接。As shown in FIG. 1 , the BMC chip intelligent co-processing device provided by the present invention includes: an ARM processor 1 , a communication module 4 , a co-processing module 2 , a server main board 3 , and a management platform 5 . The co-processing module 2 is connected to the ARM processor 1 , the server main board 3 is connected to the ARM processor 1 and the co-processing module 2 respectively, and the management platform 5 is connected to the co-processor through the communication module 4 .

其中协处理模块2包括:看门狗子模块21和协处理控制子模块23。The co-processing module 2 includes: a watchdog sub-module 21 and a co-processing control sub-module 23 .

看门狗子模块21:对ARM处理器1进行失效检测并复位ARM处理器1,且将ARM处理器1失效信息和复位信息发送给协处理控制子模块23。The watchdog sub-module 21 : detects the failure of the ARM processor 1 and resets the ARM processor 1 , and sends the failure information and reset information of the ARM processor 1 to the co-processing control sub-module 23 .

协处理控制子模块23:设置有主板信息接收端口和主板控制信号发出端口;当ARM处理器1正常运行时,将ARM处理器1发出的交互信息经通信模块4转发给管理平台5,将ARM处理器1发出的主板控制信号经主板控制信号发出端口转发给服务器主板3,并将经通信模块4接收的控制信息发送给ARM处理器1;当接收到ARM处理器1失效信息时,将经主板信息接收端口接收的主板信息由通信模块4发给管理平台5,并由主板控制信号发出端口发出主板控制信号给服务器主板3,且由通信模块4发出警报信息给管理平台5。Co-processing control sub-module 23: it is provided with a mainboard information receiving port and a mainboard control signal sending port; The mainboard control signal sent by processor 1 is forwarded to server mainboard 3 through the mainboard control signal sending port, and the control information received by communication module 4 is sent to ARM processor 1; The motherboard information received by the motherboard information receiving port is sent to the management platform 5 by the communication module 4, and the motherboard control signal is sent to the server motherboard 3 by the motherboard control signal sending port, and the alarm information is sent to the management platform 5 by the communication module 4.

本实施例中,通信模块4可以采用网络接口,主板信息接收端口为视频信息接收端口,主板控制信号发出端口为主板电源控制信号发出端口,ARM处理器1发出的交互信息包括视频信息。服务器主板3将视频信息(VGA信号)发出后可经数模转换电路转换为数字信号后发送给ARM处理器1或协处理控制子模块23。In this embodiment, the communication module 4 can use a network interface, the main board information receiving port is a video information receiving port, the main board control signal sending port is a main board power control signal sending port, and the interactive information sent by the ARM processor 1 includes video information. The video information (VGA signal) sent by the server motherboard 3 can be converted into a digital signal by the digital-to-analog conversion circuit and then sent to the ARM processor 1 or the co-processing control sub-module 23 .

协处理模块2还包括数据封装解析子模块22,数据封装解析子模块22用于对ARM处理器1与协处理控制子模块23之间的传输数据进行封装或解析。The co-processing module 2 also includes a data encapsulation and analysis sub-module 22 , which is used for encapsulating or analyzing the transmission data between the ARM processor 1 and the co-processing control sub-module 23 .

在ARM处理器1正常运行时,协处理模块2将ARM处理器1发出信息转发给管理平台5或服务器主板3;在ARM处理器1失效期间,协处理模块2接管对服务器主板3的监控,即接收服务器主板3发出的视频信息,将其直接经网络发送给管理平台5,并发送主板电源控制信号给服务器主板3,从而起到监视服务器运行的作用。当ARM处理器1复位并启动完毕后,再将控制权转交给ARM处理器1。When the ARM processor 1 is running normally, the co-processing module 2 forwards the information sent by the ARM processor 1 to the management platform 5 or the server main board 3; during the failure of the ARM processor 1, the co-processing module 2 takes over the monitoring of the server main board 3, That is to receive the video information sent by the server main board 3, send it directly to the management platform 5 via the network, and send the main board power control signal to the server main board 3, thereby playing the role of monitoring the operation of the server. After the ARM processor 1 is reset and started, the control right is transferred to the ARM processor 1 .

协处理控制子模块23接收到ARM处理器1失效信息后,还根据其内部配置策略判断警报级别,实现警报功能,供管理员及时发现故障。协处理控制子模块23配置有:After the co-processing control sub-module 23 receives the failure information of the ARM processor 1, it also judges the alarm level according to its internal configuration strategy, and realizes the alarm function for the administrator to find the fault in time. Co-processing control sub-module 23 is configured with:

警报接收单元:接收看门口模块发出的ARM处理器1失效信息;Alarm receiving unit: receive the ARM processor 1 failure information sent by the gatekeeper module;

警报判断单元:根据ARM处理器1失效信息判断警报级别;Alarm judging unit: judging the alarm level according to the failure information of the ARM processor 1;

警报发送单元:将警报信息以报文形式发出。Alarm sending unit: send the alarm information in the form of message.

协处理控制子模块23根据失效间隔时间判断警报级别,并决定是否关闭服务器。The co-processing control sub-module 23 judges the alarm level according to the failure interval time, and decides whether to shut down the server.

当失效间隔小于最短间隔预设阈值(可设置为1小时),则发出三级警报,并关闭服务器;当失效间隔小于中间间隔预设阈值(可设置为12小时),则发出二级警报;当失效间隔小于最长间隔预设阈值(可设置为24小时),则发出三级警报。When the failure interval is less than the preset threshold of the shortest interval (can be set to 1 hour), a third-level alarm will be issued and the server will be shut down; when the failure interval is less than the preset threshold of the middle interval (can be set to 12 hours), a second-level alarm will be issued; When the failure interval is less than the longest interval preset threshold (can be set to 24 hours), a three-level alarm will be issued.

警报发送单元发出的警报信息报文包括以下信息:警报类型、目的编号、设备请求编号、本次ARM处理器失效时间、上次ARM处理器失效时间、24小时失效次数、历史失效次数、溢出标志、ECC校验数据。管理平台5接收报文信息,可实时监控服务器失效状态。The alarm information message sent by the alarm sending unit includes the following information: alarm type, purpose number, device request number, current ARM processor failure time, last ARM processor failure time, 24-hour failure times, historical failure times, overflow flag , ECC check data. The management platform 5 receives the message information and can monitor the failure state of the server in real time.

如图2所示,本实施例提供的BMC芯片智能协处理方法,具体包括以下步骤:As shown in Figure 2, the BMC chip intelligent co-processing method provided in this embodiment specifically includes the following steps:

S1:协处理模块2转发ARM处理器1发出的交互信息和主板控制信号,并判断ARM处理器1是否失效;S1: The co-processing module 2 forwards the interaction information and the main board control signal sent by the ARM processor 1, and judges whether the ARM processor 1 is invalid;

S2:若ARM处理器1未失效则重复步骤S1,若ARM处理器1失效则协处理模块2接管交互信息和主板控制信号,并发出警报信息,且重启ARM处理器1。S2: If the ARM processor 1 is not invalid, repeat step S1. If the ARM processor 1 fails, the co-processing module 2 takes over the interaction information and the control signal of the main board, sends out an alarm message, and restarts the ARM processor 1 .

步骤S2中协处理模块2接管交互信息是指协处理模块2接收主板信息并将其发出,且发出主板电源控制信号给服务器主板3。The co-processing module 2 taking over the interactive information in step S2 means that the co-processing module 2 receives and sends the main board information, and sends the main board power control signal to the server main board 3 .

步骤S2中发出警报信息具体包括以下步骤:Sending the alarm message in step S2 specifically includes the following steps:

S2.1:判断失效间隔是否小于最短间隔预设阈值;S2.1: Determine whether the failure interval is less than the shortest interval preset threshold;

S2.2:若失效间隔小于最短间隔预设阈值,则发出三级警报并关闭服务器;否则判断失效间隔是否小于中级间隔预设阈值;S2.2: If the failure interval is less than the preset threshold of the shortest interval, issue a three-level alarm and shut down the server; otherwise, judge whether the failure interval is less than the preset threshold of the intermediate interval;

S2.3:若失效间隔小于中级间隔预设阈值,则发出二级警报;否则判断失效间隔是否小于最长间隔预设阈值;S2.3: If the failure interval is less than the preset threshold of the intermediate interval, a second-level alarm is issued; otherwise, it is judged whether the failure interval is less than the preset threshold of the longest interval;

S2.4:若失效间隔小于最长时间预设阈值,则发出一级警报。S2.4: If the failure interval is less than the maximum time preset threshold, a first-level alarm will be issued.

以上公开的仅为本发明的优选实施方式,但本发明并非局限于此,任何本领域的技术人员能思之的没有创造性的变化,以及在不脱离本发明原理前提下所作的若干改进和润饰,都应落在本发明的保护范围内。The above disclosure is only a preferred embodiment of the present invention, but the present invention is not limited thereto, any non-creative changes that those skilled in the art can think of, and some improvements and modifications made without departing from the principle of the present invention , should fall within the protection scope of the present invention.

Claims (7)

1.一种BMC芯片智能协处理装置,其特征在于,包括:ARM处理器,通信模块,与所述ARM处理器连接的协处理模块,分别与所述ARM处理器、协处理模块连接的服务器主板,以及通过通信模块与协处理模块连接的管理平台;1. a BMC chip intelligent co-processing device, is characterized in that, comprises: ARM processor, communication module, the co-processing module that is connected with described ARM processor, the server that is connected with described ARM processor, co-processing module respectively a main board, and a management platform connected to the co-processing module through the communication module; 所述协处理模块包括:The co-processing module includes: 看门狗子模块:对ARM处理器进行失效检测并复位ARM处理器,且将ARM处理器失效信息和复位信息发送给协处理控制子模块;Watchdog sub-module: detects the failure of the ARM processor and resets the ARM processor, and sends the failure information and reset information of the ARM processor to the co-processing control sub-module; 协处理控制子模块:设置有主板信息接收端口和主板控制信号发出端口;当ARM处理器正常运行时,将ARM处理器发出的交互信息经通信模块转发给管理平台,将ARM处理器发出的主板控制信号经主板控制信号发出端口转发给服务器主板,并将经通信模块接收的控制信息发送给ARM处理器;当接收到ARM处理器失效信息时,将经主板信息接收端口接收的主板信息由通信模块发给管理平台,并由主板控制信号发出端口发出主板控制信号给服务器主板,且由通信模块发出警报信息给管理平台。Co-processing control sub-module: It is equipped with a main board information receiving port and a main board control signal sending port; when the ARM processor is running normally, the interactive information sent by the ARM processor is forwarded to the management platform through the communication module, and the main board sent by the ARM processor The control signal is forwarded to the server main board through the control signal sending port of the main board, and the control information received by the communication module is sent to the ARM processor; The module sends it to the management platform, and the mainboard control signal is sent to the server mainboard by the mainboard control signal port, and the communication module sends an alarm message to the management platform. 2.根据权利要求1所述的BMC芯片智能协处理装置,其特征在于,所述协处理控制子模块包括:2. BMC chip intelligence co-processing device according to claim 1, is characterized in that, described co-processing control submodule comprises: 警报接收单元:接收看门口模块发出的ARM处理器失效信息;Alarm receiving unit: receive the ARM processor failure information sent by the gatekeeper module; 警报判断单元:根据ARM处理器失效信息判断警报级别;Alarm judging unit: judging the alarm level according to the failure information of the ARM processor; 警报发送单元:将警报信息以报文形式发出。Alarm sending unit: send the alarm information in the form of message. 3.根据权利要求2所述的BMC芯片智能协处理装置,其特征在于,警报发送单元发出的警报信息报文包括以下信息:警报类型、目的编号、设备请求编号、本次ARM处理器失效时间、上次ARM处理器失效时间、24小时失效次数、历史失效次数、溢出标志、ECC校验数据。3. BMC chip intelligent co-processing device according to claim 2, is characterized in that, the alarm information message that alarm sending unit sends comprises following information: alarm type, purpose number, equipment request number, this ARM processor failure time , Last ARM processor failure time, 24-hour failure times, historical failure times, overflow flag, ECC check data. 4.根据权利要求1、2或3所述的BMC芯片智能协处理装置,其特征在于,主板信息接收端口为视频信息接收端口,主板控制信号发出端口为主板电源控制信号发出端口。4. according to claim 1,2 or 3 described BMC chip intelligent co-processing devices, it is characterized in that, the main board information receiving port is a video information receiving port, and the main board control signal sending port is a main board power supply control signal sending port. 5.根据权利要求4所述的BMC芯片智能协处理装置,其特征在于,ARM处理器发出的交互信息包括视频信息。5. The BMC chip intelligent co-processing device according to claim 4, wherein the interactive information sent by the ARM processor comprises video information. 6.根据权利要求1、2或3所述的BMC芯片智能协处理装置,其特征在于,通信模块为网络接口。6. The BMC chip intelligent co-processing device according to claim 1, 2 or 3, wherein the communication module is a network interface. 7.根据权利要求1、2或3所述的BMC芯片智能协处理装置,其特征在于,协处理模块还包括数据封装解析子模块,所述数据封装解析子模块用于对ARM处理器与协处理控制子模块之间的传输数据进行封装或解析。7. according to claim 1,2 or 3 described BMC chip intelligent co-processing devices, it is characterized in that co-processing module also includes data encapsulation analysis sub-module, said data encapsulation analysis sub-module is used for ARM processor and co-processing Process and control the transmission data between sub-modules for encapsulation or analysis.
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