CN106407059A - Server node testing system and method - Google Patents

Abstract

The invention discloses a server node testing system and method. The system includes: a PSOC module, used to connect with the server node through a link, and read the voltage value of the server node; an FPGA module, used to obtain the enable voltage value of the server node Signal and preset function signal; BMC module, connected with PSOC module and FPGA module, used to obtain the data collected by PSOC module and FPGA module, and perform corresponding processing; display terminal, used to connect with BMC module, processed according to BMC module The result shows the running status information of the server node. The analog characteristics of the PSOC module are used to detect the voltage of the node. The FPGA module is mainly used for the control of the power-on sequence. The status information of the server node is displayed through the display terminal to facilitate the detection and judgment of the inspectors, and the error information of the node can be easily and accurately located when the node is abnormal.

Description

A server node testing system and method

technical field

The invention relates to the technical field of servers, in particular to a server node testing system and method.

Background technique

With the development of server technology, the node density of the server is increasing day by day, accompanied by the difficulty of testing and solving hardware-related bugs for high-density nodes.

At present, traditional test equipment and test methods can no longer meet the current detection requirements for server nodes. It mainly reflects that in high-end server systems, the high density of computing nodes makes the surrounding space of the point to be tested smaller, and some signals to be tested It is no longer possible to measure directly through the probe. When the number of points to be measured is large, the traditional detection method is cumbersome and inefficient. The authenticity of test results is also easily affected by environmental interference.

Therefore, how to provide a testing method for the server node, which can simply and accurately detect the computing node to be tested, and locate the error information of the node is a technical problem that those skilled in the art need to solve at present.

Contents of the invention

The object of the present invention is to provide a server node testing system and method, which can simply and accurately detect computing nodes to be tested and locate node error information.

In order to solve the problems of the technologies described above, the present invention provides the following technical solutions:

A server node testing system, comprising:

The PSOC module is used to connect to the server node through the link, and read the voltage value of the server node;

The FPGA module is used to obtain the enable signal and the preset function signal of the voltage of the server node;

BMC module, is connected with described PSOC module and FPGA module, is used for obtaining the data collected by described PSOC module and FPGA module, and carries out corresponding processing;

The display terminal is used to connect with the BMC module, and display the running status information of the server node according to the processing result of the BMC module.

Preferably, the BMC module includes:

a voltage threshold setting unit, configured to set a voltage threshold range in response to an operator operation;

A first judgment unit, configured to judge whether the voltage value of the server node read by the PSOC module is within the voltage threshold range, and output a corresponding first judgment result;

a level setting unit for setting a preset level in response to an operator operation;

The second judging unit is used to judge whether the enable signal of the voltage of the server node acquired by the FPGA module and the level triggered by the preset function signal on the corresponding pin of the BMC module are the same as the preset level , and output the corresponding second judgment result.

Preferably, the display terminal is a test computer.

Preferably, the BMC module is connected to the test computer through a network card.

Preferably, it further includes: an alarm unit arranged on the display terminal, configured to send out a reminder signal when the running state of the server node is abnormal.

A server node testing method, comprising:

Obtain the voltage value of the server node through the PSOC module connected to the server node;

Obtaining the enable signal and the preset function signal of the voltage of the server node through the FPGA module;

Whether the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal are judged by the BMC module;

If it is determined that the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal, the error information of the server node is located.

Preferably, the judging whether the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal includes:

judging whether the voltage value of the server node is within a preset voltage threshold range;

If not, it is determined that the voltage signal of the server node is abnormal;

Judging whether the level of the pin connected between the BMC module and the FPGA module is the same as the preset level;

If not, it is determined that the voltage enable signal and the preset function signal are abnormal.

Preferably, after determining that the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal, it also includes:

Emit an alert signal that matches the combination of exception signals.

Compared with the prior art, the above-mentioned technical solution has the following advantages:

A server node testing system provided by the present invention includes: a PSOC module, used to connect to the server node through a link, and read the voltage value of the server node; an FPGA module, used to obtain the enable signal and the preset Set function signal; BMC module, connected with PSOC module and FPGA module, used to obtain the data collected by PSOC module and FPGA module, and perform corresponding processing; display terminal, used to connect with BMC module, display according to the result processed by BMC module The running status information of the server node. The server can detect the voltage and temperature of the chip by using the analog characteristics of the PSOC module. In this solution, the analog characteristics of the PSOC module are mainly used to detect the voltage of the node. The FPGA module is mainly used for the control of the power-on sequence, and the BMC module is the base board management controller. The module has functions such as local and remote diagnosis, console support, configuration management, hardware management and troubleshooting management. The status information of the server node is displayed through the display terminal to facilitate the detection and judgment of the inspectors, and the error information of the node can be easily and accurately located when the node is abnormal.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings that need to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings in the following description are For some embodiments of the present invention, those skilled in the art can also obtain other drawings based on these drawings without any creative work.

Fig. 1 is a schematic structural diagram of a server node testing system provided by a specific embodiment of the present invention;

FIG. 2 is a flowchart of a server node testing method provided by an embodiment of the present invention.

detailed description

The core of the present invention is to provide a server node testing system and method, which can simply and accurately detect computing nodes to be tested and locate node error information.

In order to make the above objects, features and advantages of the present invention more comprehensible, the specific implementation manners of the present invention will be described in detail below in conjunction with the accompanying drawings.

In the following description, specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways than those described here, and those skilled in the art can make similar extensions without departing from the connotation of the present invention. Accordingly, the invention is not limited to the specific implementations disclosed below.

Please refer to FIG. 1 , which is a schematic structural diagram of a server node testing system provided by a specific embodiment of the present invention.

A specific embodiment of the present invention provides a server node testing system, including: PSOC module 1, used to connect with the server node through a link, and read the voltage value of the server node; FPGA module 2, used to obtain the voltage value of the server node The enable signal of the voltage and the preset function signal; the BMC module 3 is connected with the PSOC module 1 and the FPGA module 2, and is used to obtain the data collected by the PSOC module 1 and the FPGA module 2, and perform corresponding processing; the display terminal 4 is used for In connection with the BMC module 3, the running status information of the server node is displayed according to the result processed by the BMC module 3.

In this embodiment, PSOC is Programmable System-On-Chip (programmable system on chip), which is a kind of design for standard "full digital" microcontroller design, pure analog design and the intermediate between the two Devices with the same high applicability for all designs. It is a new generation device with the basic principle of extremely flexible and fully programmable mixed-signal SOC. The server uses PSOC to use analog characteristics to detect the voltage and temperature of the chip. In this embodiment, the server uses the PSOC module mainly to detect the voltage of the server node by using the analog characteristic. FPGA (Field-Programmable Gate Array) is a Field Programmable Gate Array, which is mainly used to control the power-on sequence on the server. In this embodiment, the FPGA module is mainly used to distribute the enable signal of the voltage and important function signals to the On the pins associated with the BMC module. BMC (Baseboard Management Controller) is the baseboard management controller, which has functions such as local and remote diagnosis, console support, configuration management, hardware management and troubleshooting management. In this embodiment, the BMC module analyzes the PSOC module and the FPGA module The communication data of the detection server node is obtained, and the status information of the detection server node is sent to the display terminal for corresponding display, thereby realizing the monitoring of the server node. When the status of the server node is abnormal, the user can know the error of the server node through the display terminal Information, you can intuitively locate node error information, so that users can solve hardware bugs related to voltage signals and improve user work efficiency.

In one embodiment of the present invention, the BMC module includes: a voltage threshold setting unit, which is used to respond to the operator's operation to set the voltage threshold range; a first judging unit, which is used to judge the voltage value of the server node read by the PSOC module Whether it is within the voltage threshold range, and output the corresponding first judgment result; the level setting unit is used to set the preset level in response to the operator’s operation; the second judgment unit is used to judge the server node obtained by the FPGA module Whether the level triggered by the enable signal of the voltage and the preset function signal on the corresponding pin of the BMC module is the same as the preset level, and output the corresponding second judgment result.

In this embodiment, according to the actual link, the PSOC module reads the voltage value of the server node, and the BMC module reads the data transmitted by the PSOC module, so that the voltage threshold range can be set by the voltage threshold setting unit according to the node function specification, To judge whether the voltage of the server node is abnormal, when the voltage value of the server node read by the PSOC module exceeds the voltage threshold range, the first judging unit judges that the voltage of the server node is abnormal. For the data obtained from communication with the FPGA module, the BMC module sets the corresponding high and low levels through the level setting unit according to the node specification. The FPGA module distributes the enable signal of the voltage and important function signals to the pins associated with the BMC module. On the pin, the data of the FPGA module will cause the level change of the pin of the BMC module. By comparing the level of the pin connected with the BMC module and the FPGA module with the preset level, the enable signal and the preset function signal of the voltage are judged. Whether it is abnormal, if the second judging unit judges that the comparison results are different, it means that the enable signal of the voltage and the preset function signal are abnormal, wherein the preset function signal is usually set as some important function signal.

In one embodiment of the present invention, preferably, the display terminal is a test computer, and the BMC module is connected to the test computer through a network card. After the BMC module receives the monitoring data, it analyzes and transmits the analyzed server node status information to the test computer through the network card, and the server node status information can be displayed through the WEB UI interface of the test computer. On the interface, you can see whether the server node voltage and important function signals are working abnormally.

Further, it also includes: an alarm unit arranged on the display terminal, used for sending out a reminder signal when the running state of the server node is abnormal.

In this embodiment, when the running state of the server node is abnormal, the alarm unit on the display terminal sends a corresponding reminder signal to remind the user that the server node has error information.

Please refer to FIG. 2 , which is a flow chart of a server node testing method provided by an embodiment of the present invention.

Correspondingly, an embodiment of the present invention also provides a server node testing method, including:

S11: Obtain the voltage value of the server node through the PSOC module connected to the server node. The voltage value of the server node is detected through the analog characteristic of the PSOC module.

S12: Acquiring the enable signal of the voltage of the server node and the preset function signal through the FPGA module.

S13: Determine whether the voltage signal of the server node, the voltage enable signal, and the preset function signal are abnormal through the BMC module.

S14: If it is determined that the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal, locate the error information of the server node.

Locating the error information of the server node refers to correspondingly displaying the error information of the server node so as to be viewed by the user.

Among them, judging whether the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal, including:

Judging whether the voltage value of the server node is within the preset voltage threshold range, its summary, the voltage threshold range can be set according to the node manual, and the voltage threshold range is the voltage range of the server node when it is working normally;

If not, it is determined that the voltage signal of the server node is abnormal;

Determine whether the level of the pin connected to the BMC module and the FPGA module is the same as the preset level, wherein the FPGA module distributes the voltage enable signal and the preset function signal to the pin connected to the BMC module, and the voltage level The change of the enable signal and the preset function signal will cause the level change of the upper cover pin of the BMC module. The preset level refers to the enable signal of the voltage and the level when the preset function signal is normal;

If not, it is determined that the voltage enable signal and the preset function signal are abnormal.

Further, after determining that the voltage signal of the server node, the enable signal of the voltage, and the preset function signal are abnormal, the method further includes: sending a prompt signal matching the abnormal signal combination.

Users can set a variety of prompt signals according to their needs. Each prompt signal corresponds to a signal abnormality. For example, the first prompt signal is sent when the voltage signal is abnormal, and the second prompt is sent when the voltage signal and the voltage enable signal are both abnormal. Signal.

In summary, the server node testing system and method provided by the present invention are suitable for detecting abnormal chip voltages of server nodes and monitoring of signal abnormalities that have a greater impact on the normal operation of nodes. According to the PSOC module and BMC module on the server node The actual link, the BMC module communicates with the PSOC module to monitor the working status of the voltage on the node. For the enable signal of the voltage and some important function signals, it is transmitted to the BMC module through the FPGA module to realize the monitoring of these signals. The BMC module analyzes the received data, and then displays the analyzed information through the display terminal. Users such as engineers can check whether the node voltage and important functional signals are working normally through the display terminal. When the server node is working abnormally, the user The relevant information can be read, and the error information of the node can be located accurately and quickly.

The server node testing system and method provided by the present invention have been introduced in detail above. In this paper, specific examples are used to illustrate the principle and implementation of the present invention, and the descriptions of the above embodiments are only used to help understand the method and core idea of the present invention. It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, some improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims (8)

1. A server node testing system, characterized in that, comprising: The PSOC module is used to connect to the server node through the link, and read the voltage value of the server node; The FPGA module is used to obtain the enable signal and the preset function signal of the voltage of the server node; BMC module, is connected with described PSOC module and FPGA module, is used for obtaining the data collected by described PSOC module and FPGA module, and carries out corresponding processing; The display terminal is used to connect with the BMC module, and display the running status information of the server node according to the processing result of the BMC module. 2. The system according to claim 1, wherein the BMC module comprises: a voltage threshold setting unit, configured to set a voltage threshold range in response to an operator operation; A first judgment unit, configured to judge whether the voltage value of the server node read by the PSOC module is within the voltage threshold range, and output a corresponding first judgment result; a level setting unit for setting a preset level in response to an operator operation; The second judging unit is used to judge whether the enable signal of the voltage of the server node acquired by the FPGA module and the level triggered by the preset function signal on the corresponding pin of the BMC module are the same as the preset level , and output the corresponding second judgment result. 3. The system according to claim 2, wherein the display terminal is a test computer. 4. The system according to claim 3, wherein the BMC module is connected with the test computer through a network card. 5. The system according to any one of claims 1 to 4, further comprising: an alarm unit arranged on the display terminal, configured to send out a reminder signal when the running state of the server node is abnormal. 6. A server node testing method, characterized in that, comprising: Obtain the voltage value of the server node through the PSOC module connected to the server node; Obtaining the enable signal and the preset function signal of the voltage of the server node through the FPGA module; Whether the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal are judged by the BMC module; If it is determined that the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal, the error information of the server node is located. 7. The method according to claim 6, wherein the judging whether the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal includes: judging whether the voltage value of the server node is within a preset voltage threshold range; If not, it is determined that the voltage signal of the server node is abnormal; Judging whether the level of the pin connected between the BMC module and the FPGA module is the same as the preset level; If not, it is determined that the voltage enable signal and the preset function signal are abnormal. 8. The method according to claim 7, characterized in that, after determining that the voltage signal of the server node, the enable signal of the voltage and the preset function signal are abnormal, further comprising: Emit an alert signal that matches the combination of exception signals.