CN105810726A - Semiconductor triode - Google Patents
Semiconductor triode Download PDFInfo
- Publication number
- CN105810726A CN105810726A CN201410844360.XA CN201410844360A CN105810726A CN 105810726 A CN105810726 A CN 105810726A CN 201410844360 A CN201410844360 A CN 201410844360A CN 105810726 A CN105810726 A CN 105810726A
- Authority
- CN
- China
- Prior art keywords
- region
- substrate
- semiconductor transistor
- semiconductor
- led out
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 239000004020 conductor Substances 0.000 claims abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 239000011810 insulating material Substances 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Bipolar Integrated Circuits (AREA)
Abstract
The invention discloses a semiconductor triode, which comprises a substrate. The substrate is provided with a first conductivity type first region, a second conductivity type second region, and a first conductivity type third region. The second region surrounds the periphery of the first region. The third region surrounds the periphery of the second region. An insulating region extends from one side of the third region to the other side of the third region so as to isolate each of the first region, the second region and the third region into two relatively independent parts. The two independent parts of the first region are connected through the conductive material. One part of the first region is led out as an electrode. Meanwhile, the two isolated parts of the second region and the third region are also led out as electrodes. According to the technical scheme of the invention, the area of a chip can be reduced. Meanwhile, the semiconductor triode is convenient to implement.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a novel semiconductor device.
Background
Since the first transistor invented by Bell laboratories in the United states came out, semiconductors have been rapidly developed, transistors have the ability to be mass produced using highly automated processes, and have gradually penetrated into various areas of life, including aerospace, and medical communication, and many sophisticated devices have been made without departing from transistors made from semiconductor materials.
The triode is a semiconductor device for controlling current, which is called a semiconductor triode, also called a bipolar transistor and a transistor. The function is to amplify weak signals into electrical signals with larger amplitude, and the switch is also used as a contactless switch. The triode is formed by manufacturing two PN junctions which are very close to each other on a semiconductor substrate, the whole semiconductor is divided into three parts by the two PN junctions, the middle part is a base region, the two side parts are an emitter region and a collector region, and the arrangement modes include PNP and NPN.
With the increasing demand for semiconductor devices, the size of semiconductor chips is important. The smaller semiconductor chip size means the higher integration degree of the device, and the smaller device size means that more transistors can be placed in the same area, thereby bringing more excellent device performance.
Therefore, how to continuously reduce the chip area has been the direction of research effort of those skilled in the art.
Disclosure of Invention
The invention provides a semiconductor triode which can well reduce the area of a chip, and in order to realize the technical effect, the invention adopts the following technical scheme:
a semiconductor triode comprises a substrate;
forming a first region with a first conductive type, a second region with a second conductive type and a third region with the first conductive type in the substrate, wherein the second region is arranged around the periphery of the first region, and the third region is arranged around the periphery of the second region; wherein,
an insulating region extending from one side of the third region to the other to separate the first region, the second region and the third region into two relatively independent portions, and the two independent portions of the first region are connected by a conductive material;
and two isolated parts of the second region and the third region are respectively led out to be used as electrodes, and one part of the first region is led out to be used as an electrode.
In the above semiconductor triode, the first conductivity type is N-type, and the second conductivity type is P-type.
In the semiconductor triode, the substrate is a silicon substrate.
In the semiconductor triode, intrinsic silicon is adopted as the silicon substrate.
In the above semiconductor transistor, wherein,
one part of the first area is extracted to be used as an emitter;
two isolated parts of the second region are led out to be used as a first base level and a second base level;
and two isolated parts of the second region are led out to be used as a first collector and a second collector.
In the semiconductor triode, the insulating region is formed by a strip-shaped gap and/or an insulating material.
In the semiconductor triode, the first region and the second region are both heavily doped, and the third region is lightly doped.
In the semiconductor triode, the bottom of the first region, the bottom of the second region and the bottom of the third region have a certain distance from the bottom surface of the substrate.
In the semiconductor triode, the first region is circular, and the second region and the third region are both annular.
In the semiconductor triode, the first region, the second region and the third region are led out through leads.
Based on the technical scheme, the invention can reduce the chip area and is easy to implement.
Drawings
The invention and its features, aspects and advantages will become more apparent from reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings. Like reference symbols in the various drawings indicate like elements. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.
FIG. 1 is a schematic diagram of a semiconductor device provided in one embodiment of the present invention;
FIG. 2 is a schematic view of the present invention corresponding to FIG. 1 in another orientation;
fig. 3 is a circuit diagram corresponding to fig. 1.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
Compared with the prior art, the novel semiconductor triode provided by the invention can greatly reduce the area of a chip, thereby providing a basis for further improving the precision of a device.
The invention provides a semiconductor triode, which is shown in a reference figure 1 and a reference figure 2 and comprises a substrate 1;
a first region 11 having a first conductivity type, a second region 12 having a second conductivity type and a third region 13 having the first conductivity type are formed in the substrate 1. The second region 12 is arranged around the periphery of the first region 11, and the third region 13 is arranged around the periphery of the second region 12; further, an insulating region 14 is further disposed in the substrate 1, the insulating region 14 extends from one side of the third region 13 to the other side to separate the first region 11, the second region 12 and the third region 13 into two relatively independent portions, and the two independent portions of the first region 11 are connected by a conductive material 15;
one of the portions of the first region 11 is drawn out as an electrode, and both of the portions where the second region 12 and the third region 13 are isolated are drawn out as electrodes.
In an optional embodiment of the invention, the first conductive type is an N-type, and the second conductive type is a P-type.
In an alternative embodiment of the invention, the substrate may be a silicon substrate. Further alternatively, for example, an intrinsic silicon material may be used as the silicon substrate.
In an alternative embodiment of the present invention, the conductive material 15 is a metal, and the metal material is disposed in the insulating region 14 to electrically connect the two divided portions of the first region 11.
In an alternative embodiment of the present invention, one of the portions of the first region 11 is led out to be used as an emitter (e)11a of a triode;
the two portions of the second region 12 separated by the insulating region 14 are extracted as a first base level (b1)12a and a second base level (b2)12 b;
the two portions of the third region 13 separated by the insulating region 14 are extracted as a first collector (c1)13a and a second collector (c2)13 b.
The first base 12a, the first collector (c1)13a, the second base 12b, and the second collector (c2)13b share the emitter (e)11a extracted from the first region, as shown in fig. 3.
In an alternative embodiment of the present invention, the insulating region 14 is formed by a strip-shaped gap (or void, trench) and/or an insulating material. For example, in fig. 2, the first region 11, the second region 12, and the third region 13 are separated into two independent portions by a stripe-shaped gap and an insulating material. At the same time, the two portions of the first region 11 will form a diffusion region in between, which does not have any substantial effect on the present invention.
In an alternative embodiment of the present invention, the first region 11 and the second region 12 are both heavily doped (N +, P +), and the third region 13 is lightly doped (N-). The heavy doping of the first region 11 and the second region 12 is relative to the light doping of the third region 13, that is, the ion doping concentration of the first region 11 and the second region 12 is greater than that of the third region 13.
In an alternative embodiment of the present invention, the bottom portions of the first region 11, the second region 12 and the third region 13 are spaced from the bottom surface of the substrate 10, that is, the regions need to be located in the substrate 10 as a whole, so as to prevent the solder balls at the bottom of the substrate 10 from affecting the electrical contact of the electrodes.
In an alternative embodiment of the present invention, the first region 11 may be circular, and the second region 12 and the third region 13 surrounding the first region 11 are both annular. However, it should be understood by those skilled in the art that the circular first region 11 and the annular second and third regions 12 and 13 are merely a preferred embodiment, and in other alternative embodiments, the first region 11 is not limited to a circle, such as a polygon or an irregular pattern, and it is only necessary to ensure that the second region 12 surrounds the first region 11 and the third region 13 surrounds the periphery of the second region 12, which is not described herein again.
In an alternative embodiment of the present invention, two portions of the second region 12 and the third region 13 separated by a metal or a lead are respectively led out, and one portion of the first region 11 is led out by a lead.
In summary, according to the present invention, as the above technical solution is adopted, the base is disposed around the emitter, the collector is disposed around the base, and the base and the collector are divided into two regions and share the emitter, such a structure can greatly reduce the area occupied by the chip, so that more devices can be placed on the same substrate, which is beneficial to improving the device performance. The invention has small structural change and is convenient to implement.
The above description is of the preferred embodiment of the invention. It is to be understood that the invention is not limited to the particular embodiments described above, in that devices and structures not described in detail are understood to be implemented in a manner common in the art; those skilled in the art can make many possible variations and modifications to the disclosed embodiments, or modify equivalent embodiments to equivalent variations, without departing from the spirit of the invention, using the methods and techniques disclosed above. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.
Claims (10)
1. A semiconductor triode is characterized by comprising a substrate;
forming a first region with a first conductive type, a second region with a second conductive type and a third region with the first conductive type in the substrate, wherein the second region is arranged around the periphery of the first region, and the third region is arranged around the periphery of the second region; wherein,
an insulating region extending from one side of the third region to the other to separate the first region, the second region and the third region into two relatively independent portions, and the two independent portions of the first region are connected by a conductive material;
one part of the first region is led out to be used as an electrode, and two parts of the second region and the third region which are separated are led out to be used as electrodes.
2. The semiconductor transistor of claim 1, wherein the first conductivity type is N-type and the second conductivity type is P-type.
3. The semiconductor transistor of claim 1, wherein the substrate is a silicon substrate.
4. The semiconductor transistor of claim 3, wherein said conductive material is a metal.
5. The semiconductor transistor of claim 1,
one part of the first area is extracted to be used as an emitter;
two isolated parts of the second region are led out to be used as a first base level and a second base level;
and two isolated parts of the second region are led out to be used as a first collector and a second collector.
6. The semiconductor transistor of claim 1, wherein the insulating region is a stripe-shaped gap and/or insulating material.
7. The semiconductor transistor of claim 1, wherein the first region and the second region are both heavily doped and the third region is lightly doped.
8. The semiconductor transistor of claim 1, wherein a bottom of the first, second, and third regions is spaced from a bottom surface of the substrate.
9. The semiconductor transistor of claim 1, wherein the first region is circular in shape and the second and third regions are both annular in shape.
10. The semiconductor transistor of claim 1, wherein the first region, the second region, and the third region are drawn by a wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410844360.XA CN105810726A (en) | 2014-12-30 | 2014-12-30 | Semiconductor triode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410844360.XA CN105810726A (en) | 2014-12-30 | 2014-12-30 | Semiconductor triode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105810726A true CN105810726A (en) | 2016-07-27 |
Family
ID=56419960
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410844360.XA Pending CN105810726A (en) | 2014-12-30 | 2014-12-30 | Semiconductor triode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105810726A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4238555A1 (en) * | 1992-07-27 | 1994-02-03 | Hans Hermann Rottmerhusen | Integrated module including power semiconductor switches with control circuit - has control circuits for power transistor circuit integrated in single module including cooling vanes |
-
2014
- 2014-12-30 CN CN201410844360.XA patent/CN105810726A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4238555A1 (en) * | 1992-07-27 | 1994-02-03 | Hans Hermann Rottmerhusen | Integrated module including power semiconductor switches with control circuit - has control circuits for power transistor circuit integrated in single module including cooling vanes |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI671899B (en) | Lateral bipolar junction transistors having high current-driving capability | |
| CN107527943B (en) | power semiconductor device | |
| CN108417614B (en) | Semiconductor device with a plurality of semiconductor chips | |
| JP7013668B2 (en) | Semiconductor device | |
| JP2009188178A (en) | Semiconductor device | |
| CN204966496U (en) | Two -way switch | |
| CN102044543B (en) | Semiconductor device capable of integrating IGBT (Insulated Gate Bipolar Transistor) and FRD (Fast Recovery Diode) by single chip | |
| US9029952B2 (en) | Semiconductor structure and method of manufacturing the same | |
| JP2009188335A (en) | Semiconductor device | |
| CN103996704B (en) | IGBT with precise detection function and manufacturing method thereof | |
| KR20160029216A (en) | Electrostatic discharge protection device | |
| CN104253152A (en) | IGBT (insulated gate bipolar transistor) and manufacturing method thereof | |
| US20160027907A1 (en) | Bidirectional switch | |
| JP6362925B2 (en) | Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device | |
| KR102110249B1 (en) | Power semiconductor chip | |
| CN105810727B (en) | A kind of bipolar junction transistor | |
| CN104253154A (en) | IGBT (insulated gate bipolar transistor) with inlaid diode and manufacturing method of IGBT | |
| TWI593083B (en) | Semiconductor device for current sensor in power semiconductor | |
| US20140061718A1 (en) | Insulated gate bipolar transistor | |
| CN105810726A (en) | Semiconductor triode | |
| US8912566B2 (en) | Gate amplification triac | |
| JP5068057B2 (en) | Semiconductor device | |
| KR102712906B1 (en) | Asymmetric transient voltage suppressor device and methods for formation | |
| US8455980B2 (en) | Schottky-clamped bipolar transistor with reduced self heating | |
| JP7243795B2 (en) | semiconductor equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160727 |
|
| RJ01 | Rejection of invention patent application after publication |