CN105704418B - MIPI picture signals are converted into the device and method of LVDS picture signals - Google Patents
MIPI picture signals are converted into the device and method of LVDS picture signals Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
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Abstract
The invention discloses the device and method that a kind of MIPI picture signals are converted into LVDS picture signals, this method includes：1) 0 channel signals of MIPI lane and MIPI lane data-signals are received；It parses 0 channel signals of MIPI lane and obtains MIPI data channel physical layer coding informations, parse the MIPI lane data-signals and obtain MIPI data channel quantity informations；2) MIPI lane data-signals progress physical layer decoding process is obtained by MIPI image data packets according to the MIPI data channel physical layer coding information；3) the MIPI image datas packet is converted by rgb signal according to the MIPI data channel quantity information；4) rgb signal is divided by multilink rgb signal according to LVDS configuration orders；5) the multilink rgb signal is converted into multilink LVDS picture signals.The present invention can support that the MIPI signals input of all specifications, standard, the electrical parameter for the LVDS signals that the LVDS signals of a variety of link transmission modes can be supported to export, and exported are not influenced by MIPI signals.
Description
Technical Field
The invention relates to the technical field of image signal processing, in particular to a device and a method for converting MIPI image signals into LVDS image signals.
Background
The MIPI interface (Mobile industry processor interface) is a new type of mobile equipment display interface capable of supporting 2560x1600 resolution, and the interface is composed of a lane data signal for transmitting image data, a lane 0 (lane 0) lane signal for transmitting image related state and control information, and a clock signal.
However, currently, the mainstream display module in the market still stays in the interface standard of the LVDS (Low-Voltage Differential Signaling) for various reasons such as production, technology, price, consumer acceptance, because the LVDS standard is already mature, the display effect of the screen is good, and the operation is stable, and various high-resolution images can be displayed by adopting a single link, a double link, a four link, an eight link and other multi-link transmission modes. The novel display module with the function of receiving the MIPI signals is high in selling price, few in variety and manufacturer, and poor in display effect and stability.
For this reason, a device capable of converting various input MIPI image signals into LVDS image signals capable of transmitting different characteristics is required for displaying images on the LVDS display module.
Disclosure of Invention
Aiming at the defects of the prior art, the invention discloses a device and a method for converting MIPI image signals into LVDS image signals, the device and the method can support the input of MIPI signals with all specifications and standards, LVDS signals with various link transmission modes can be output, and the electrical parameters of the output LVDS signals are not influenced by the MIPI signals.
The technical scheme adopted for achieving the purpose of the invention is as follows: a device for converting MIPI image signals into LVDS image signals comprises a control module, an MIPI auxiliary signal analysis module, an MIPI data signal analysis module, an image data packet analysis module, an RGB signal conversion module, an LVDS transmission link segmentation module and an LVDS image signal conversion module, wherein the control module, the MIPI auxiliary signal analysis module, the MIPI data signal analysis module, the image data packet analysis module, the RGB signal conversion module, the LVDS transmission link segmentation module and the LVDS image signal conversion module; wherein,
the MIPI auxiliary signal analysis module is used for receiving an MIPI lane 0 channel signal and analyzing the MIPI lane 0 channel signal to obtain MIPI data channel physical layer coding information;
the MIPI data signal analysis module is used for receiving the MIPI lane data signals and analyzing the MIPI lane data signals to obtain MIPI data channel number information;
the image data packet analysis module is used for analyzing the MIPI lane data signals into MIPI image data packets according to the MIPI data channel physical layer coding information;
the RGB signal conversion module is used for converting the MIPI image data packet into RGB signals according to the MIPI data channel quantity information;
the LVDS transmission link division module is used for dividing the RGB signals into multilink RGB signals;
the LVDS image signal conversion module is used for converting the multilink RGB signals into multilink LVDS image signals;
the control module is used for realizing the transmission and the issuing of the control instructions of all the functional modules in the programmable logic device.
Preferably, in the above scheme, the LVDS image signal conversion module configures the output multi-link LVDS image signal according to configuration parameters such as the number of links, a transmission coding mode, a color level bit, a transmission driving capability, pre-emphasis and the like issued by the control module.
In addition, the invention also provides a method for converting the MIPI image signal into the LVDS image signal, which comprises the following steps:
step 1: receiving an MIPI lane 0 channel signal and an MIPI lane data signal; analyzing the MIPI lane 0 channel signal to obtain MIPI data channel physical layer coding information, and analyzing the MIPI lane data signal to obtain MIPI data channel number information;
step 2: carrying out physical layer decoding processing on the MIPI lane data signal according to the MIPI data channel physical layer coding information to obtain an MIPI image data packet;
and step 3: converting the MIPI image data packet into an RGB signal according to the MIPI data channel quantity information;
and 4, step 4: dividing the RGB signals into multilink RGB signals according to LVDS configuration commands;
and 5: and converting the multilink RGB signals into multilink LVDS image signals.
Preferably, in the above scheme, step 1 further includes the following steps: receiving an MIPI clock signal, analyzing the MIPI clock signal to obtain an MIPI data transmission rate, recovering a receiving clock of an MIPI data channel according to the MIPI data transmission rate, and outputting a corrected MIPI lane data signal according to the receiving clock.
The invention has the following advantages:
(1) the invention can convert the input MIPI image signal into LVDS image signals of various link transmission modes.
(2) The invention can support the input of MIPI image signals with all specifications and standards, and can automatically identify the data channel number and the data transmission rate of the MIPI image signals.
(3) Relevant control parameters (such as LVDS link number, VESA JEIDA transmission encoding mode, LVDS color level bit, transmission driving capability, pre-emphasis and the like) of the LVDS image signals output by the invention can be set by upper-layer software, are irrelevant to the input MIPI image signals, and the electrical parameters of the output LVDS image signals are not influenced by the input MIPI image signals.
Drawings
Fig. 1 is a block diagram of a device for converting an MIPI image signal into an LVDS image signal according to the present invention.
Fig. 2 is a flowchart of a method for converting an MIPI image signal into an LVDS image signal according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the figures and the specific embodiments.
The programmable logic device of the embodiment adopts an FPGA.
As shown in fig. 1, the apparatus for converting an MIPI image signal into an LVDS image signal disclosed by the present invention includes a control module (1), an MIPI auxiliary signal analysis module (2), an MIPI data signal analysis module (3), an image data packet analysis module (4), an RGB signal conversion module (5), an LVDS transmission link segmentation module (6), an LVDS image signal conversion module (7), a transmission sequence synchronization module (8), and an MIPI signal detection module (9) which are arranged in an FPGA chip, wherein the MIPI signal detection module (9) is connected to an external MIPI image signal source, the LVDS image signal conversion module (7) is connected to a module to be tested, and the control module (1) is connected to an upper computer.
In the above embodiment, the MIPI auxiliary signal parsing module (2) includes a MIPI lane 0 channel termination matching module, a physical layer transmission decoding module, and an information decoding module; the MIPI data signal analysis module (3) comprises an MIPI data channel termination matching module, a data channel quantity detection module and a transmission rate detection module; the image data packet analysis module (4) comprises a data channel clock recovery module, an MIPI signal transmission mode detection module, a physical layer transmission decoding module and a data transmission descrambling module; the RGB signal conversion module (5) comprises an image data decoding module, an image packet header analyzing module, an RGB image data packet decoding module, an RGB image time sequence generating module, an RGB image data caching module and an RGB image generating module; the LVDS transmission link segmentation module (6) comprises an RGB signal buffer module, an LVDS data link segmentation module and an LVDS image transmission coding module; the LVDS image signal conversion module (7) comprises an LVDS image transmission serialization module and an LVDS image signal output module; the transmission sequence synchronization module (8) comprises an image transmission synchronization sequence detection module and an image receiving synchronization module.
The signal conversion process of the above embodiment is further described with reference to fig. 2.
In the above embodiment, the upper computer issues the LVDS transmission configuration parameters and the LVDS timing configuration parameters to the control module (1) after the apparatus of the present invention is powered on.
In the above embodiment, the MIPI signal detection module (9) is configured to receive an mipian 0 channel signal, an MIPI lane data signal, and an MIPI clock signal input by an external MIPI image signal source, and detect that a connection state of the MIPI lane 0 channel signal, the MIPI lane data signal, and the MIPI clock signal is fed back to the control module (1) in real time, when the connection state of the MIPI lane 0 channel signal, the MIPI lane data signal, and the MIPI clock signal is normal, the control module (1) may start other functional modules to perform corresponding signal conversion operations, otherwise may stop the signal conversion operations of the other functional modules, thereby avoiding interference of an output LVDS signal caused by an external clutter signal transmitted to the apparatus of the present invention.
In the above embodiment, after the MIPI signal detection module (9) receives the MIPI lane 0 path signal, the MIPI lane data signal, and the MIPI clock signal, the MIPI lane 0 path signal is sent to the MIPI lane 0 path termination matching module, the MIPI lane data signal is sent to the MIPI data path termination matching module, and the MIPI clock signal is sent to the transmission rate detection module.
In the above embodiment, the MIPI LANE 0 path termination matching module performs termination matching on the MIPI LANE 0 path signal, so that the optimal MIPI LANE 0 path signal is received and then sent to the physical layer transmission decoding module to perform physical decoding operation, thereby restoring MIPI LANE 0 path data, and then the data is sent to the information decoding module to be analyzed, so as to obtain MIPI data path physical layer coding information and a MIPI data path scrambling and descrambling sequence, and then the MIPI data path coding information and MIPI data path scrambling and descrambling sequence are sent to the control module (1). The MIPI data channel termination matching module carries out termination matching and balancing operation on the MIPI lane data signals, the MIPI lane data signals are sent to the data channel number detection module and the data channel clock recovery module respectively after the optimal MIPI lane data signals are received, the data channel number detection module detects the number of the data channels of the sent signals, and detection results are sent to the control module (1). And meanwhile, the transmission rate detection module analyzes the MIPI clock signal to obtain the MIPI data transmission rate, and sends a detection result to the control module (1). Because different data transmission rates correspond to different MIPI signal standards, the device can automatically identify MIPI image signals of different MIPI standards.
In the above embodiment, after the data channel clock recovery module receives the MIPI lane data signal sent by the MIPI data channel termination matching module, the control module (1) sends the data transmission rate fed back by the transmission rate detection module to the data channel clock recovery module, the data channel clock recovery module recovers the receiving clock of each MIPI data channel according to the data transmission rate, and each MIPI data channel recovers the transmission data in each MIPI data channel according to the receiving clock (thereby overcoming the distortion of the data in the transmission process) and outputs the corrected MIPI lane data signal to the MIPI signal transmission mode detection module. The MIPI signal transmission mode detection module analyzes the received MIPI lane data signal to obtain a high-speed mode signal clock or a low-power-consumption mode conversion time sequence parameter, and when the MIPI signal is detected to be in a high-speed mode, the MIPI signal transmission mode detection module sends the high-speed mode signal clock and the MIPI lane data signal to the physical layer transmission decoding module; when detecting that the MIPI signal is in a low power consumption mode, the MIPI signal transmission mode detection module sends the MIPI lane data signal to the physical layer transmission decoding module, and sends the low power consumption mode conversion time sequence parameter to the control module (1). And the physical layer transmission decoding module performs physical layer decoding operation on the MIPI lane data signal according to the high-speed mode signal clock and the MIPI data channel physical layer coding information sent by the control module (1) or according to the low-power-consumption mode switching time sequence and the MIPI data channel physical layer coding information sent by the control module (1), and outputs an MIPI image data packet to the data transmission descrambling module. And the data transmission descrambling module descrambles the received MIPI image data packet according to the MIPI data channel scrambling descrambling sequence issued by the control module (1), obtains the descrambled MIPI image data packet and sends the MIPI image data packet to the image transmission synchronization sequence detection module.
In the above embodiment, the image transmission synchronization sequence detection module detects the transmission sequence of the received MIPI image data packet, and compares the transmission sequence with the transmission sequence issued by the control module (1), and when the transmission sequence of the MIPI image data packet conforms to the transmission sequence issued by the control module (1), the image reception synchronization module performs synchronization processing on the MIPI image data packet, and sends the MIPI image data packet after the synchronization processing to the image data decoding module. The image data unpacking module unpacks the received MIPI image data packet to obtain packet header information and image data in the packet, and respectively sends the packet header information and the image data into the image packet header analysis module and the RGB image data packet decoding module. The image packet header analysis module analyzes the data packet header to obtain decoding information of the data packet header and command words, the decoding information and the command words are sent to the control module (1), the control module (1) controls the RGB image data packet decoding module to complete MIPI data decoding operation according to the command words, the decoding information and the MIPI data channel number, RGB image data are obtained and then sent to the RGB image data caching module to be cached, meanwhile, the control module (1) sends LVDS time sequence parameters to the RGB image time sequence generation module, and the RGB image time sequence generation module generates corresponding RGB time sequence signals (VSync, HSync and DE) according to the LVDS time sequence parameters and sends the RGB image data to the RGB image generation module. Under the control of the RGB time sequence signal, the RGB image generation module takes out the image data cached by the RGB image data caching module, so that the image data is output into a standard RGB image signal and sent into the RGB signal caching module for caching.
In the above embodiment, the LVDS data link division module reads the RGB image signals of the RGB signal buffer module according to the LVDS link number issued by the control module (1) to perform link division processing, and synchronously divides the RGB timing signals to each data link. The LVDS image transmission encoding module encodes the multilink RGB signal according to an LVDS transmission encoding mode (such as VESA, JEIDA) issued by the control module (1) and a color gradation bit (6bit, 8bit, 10bit and 12bit) and outputs multilink LVDS encoding data.
In the above embodiment, the LVDS image transmission serialization module serializes the multilink LVDS encoded data according to the LVDS transmission parameters (such as the LVDS clock transmission bit mode, the LVDS transmission serialization factor, etc.) issued by the control module (1), and outputs a multilink LVDS image signal; the LVDS image signal output module adjusts the multilink LVDS image signals according to LVDS transmission parameters (such as LVDS driving strength, LVDS pre-emphasis, LVDS output impedance, LVDS output delay and the like) issued by the control module (1), and outputs the adjusted multilink LVDS image signals to the LVDS module to be tested.
Details not described in this specification are within the skill of the art that are well known to those skilled in the art. It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A device for converting MIPI image signals into LVDS image signals is characterized by comprising a control module (1), an MIPI auxiliary signal analysis module (2), an MIPI data signal analysis module (3), an image data packet analysis module (4), an RGB signal conversion module (5), an LVDS transmission link segmentation module (6), an LVDS image signal conversion module (7) and a transmission sequence synchronization module (8), wherein the control module, the MIPI auxiliary signal analysis module, the MIPI data signal analysis module (4), the RGB signal conversion module (5), the LVDS transmission link segmentation module (6), the LVDS image signal conversion module (; wherein,
the MIPI auxiliary signal analysis module (2) is used for receiving an MIPI lane 0 channel signal and analyzing the MIPI lane 0 channel signal to obtain MIPI data channel physical layer coding information;
the MIPI data signal analysis module (3) is used for receiving MIPI lane data signals and analyzing the MIPI lane data signals to obtain MIPI data channel number information; the system comprises a processor, a clock module and a data processing module, wherein the processor is used for receiving an MIPI clock signal and analyzing the MIPI clock signal to obtain an MIPI data transmission rate;
the image data packet analysis module (4) is used for recovering a receiving clock of the MIPI data channel according to the MIPI data transmission rate and outputting a corrected MIPI lane data signal; the system comprises a mobile terminal, a mobile terminal and a communication module, wherein the mobile terminal is used for receiving a MIPI (mobile terminal interface) lane data signal and transmitting the MIPI lane data signal to the mobile terminal;
the transmission sequence synchronization module (8) is used for detecting the transmission sequence of the MIPI image data packet and carrying out synchronization processing on the transmission sequence of the MIPI image data packet;
the RGB signal conversion module (5) is used for converting the MIPI image data packet after synchronous processing into RGB signals according to the MIPI data channel quantity information;
the LVDS transmission link division module (6) is used for dividing the RGB signals into multi-link RGB signals;
the LVDS image signal conversion module (7) is used for converting the multilink RGB signals into multilink LVDS image signals;
the control module (1) is used for realizing the transmission and the issuing of the control instructions of all the functional modules in the programmable logic device.
2. The apparatus for converting MIPI image signals into LVDS image signals according to claim 1, wherein the MIPI auxiliary signal parsing module (2) includes a MIPI lane 0 channel termination matching module, a physical layer transmission decoding module and an information decoding module; wherein,
the MIPI lane 0 channel termination matching module is used for performing termination matching on the MIPI lane 0 channel signals;
the physical layer transmission decoding module is used for physically decoding the matched MIPI lane 0 channel signal and restoring MIPI lane 0 channel data;
and the information decoding module is used for carrying out data analysis on the MIPI lane 0 channel data to obtain the MIPI data channel physical layer coding information.
3. The apparatus for converting MIPI image signals into LVDS image signals according to claim 2, wherein the MIPI data signal parsing module (3) includes a MIPI data channel termination matching module, a data channel number detecting module; wherein,
the MIPI data channel termination matching module is used for performing termination matching on the MIPI lane data signals;
and the data channel number detection module is used for detecting the matched MIPI lane data signals to obtain the MIPI data channel number information.
4. The apparatus for converting MIPI image signals into LVDS image signals according to claim 3, wherein the MIPI data signal parsing module (3) further comprises a transmission rate detection module, and the image packet parsing module (4) comprises a data channel clock recovery module, a MIPI signal transmission mode detection module and a physical layer transmission decoding module; wherein,
the transmission rate detection module is used for receiving an MIPI clock signal and analyzing the MIPI clock signal to obtain an MIPI data transmission rate;
the data channel clock recovery module receives the matched MIPI lane data signals, recovers a receiving clock of the MIPI data channel according to the MIPI data transmission rate, and outputs the corrected MIPI lane data signals;
the MIPI signal transmission mode detection module is used for analyzing the corrected MIPI lane data signal to obtain a high-speed mode signal clock or a low-power-consumption mode conversion timing sequence parameter;
and the physical layer transmission decoding module is used for carrying out physical layer decoding on the corrected MIPI lane data signal according to the MIPI data channel physical layer coding information and the high-speed mode signal clock or the low-power-consumption mode conversion time sequence parameter, and outputting the MIPI image data packet.
5. The apparatus for converting MIPI image signals into LVDS image signals according to claim 4, wherein the information decoding module is further configured to perform data analysis on the MIPI lane 0 channel signals to obtain an MIPI data channel scrambling and descrambling sequence; the image data packet analysis module (4) also comprises a data transmission descrambling module; wherein,
and the data transmission descrambling module is used for descrambling the MIPI image data packet according to the MIPI data channel scrambling and descrambling sequence to obtain a descrambled MIPI image data packet.
6. The apparatus for converting MIPI image signals into LVDS image signals according to claim 5, wherein said LVDS transmission link division module (6) comprises an RGB signal buffer module, an LVDS data link division module and an LVDS image transmission coding module; wherein,
the RGB signal buffer module is used for buffering the RGB signals;
the LVDS data link division module is used for dividing the RGB signals into multilink RGB signals;
the LVDS image transmission encoding module is used for encoding the multilink RGB signals and outputting multilink LVDS encoding data.
7. The apparatus for converting MIPI image signals into LVDS image signals according to claim 6, wherein the LVDS image signal conversion module (7) includes an LVDS image transmission serialization module and an LVDS image signal output module; wherein,
the LVDS image transmission serialization module is used for performing serialization processing on the multilink LVDS coding data and outputting multilink LVDS image signals;
the LVDS image signal output module is used for adjusting the transmission quality of the multilink LVDS signal and outputting the adjusted multilink LVDS image signal.
8. The apparatus for converting MIPI image signals into LVDS image signals according to claim 4, further comprising a MIPI signal detection module (9) disposed in said programmable logic device, wherein said MIPI signal detection module (9) is configured to input said MIPI lane 0 channel signal, said MIPI lane data signal and said MIPI clock signal, and feed back the input status of said MIPI lane 0 channel signal, said MIPI lane data signal and said MIPI clock signal to said control module (1) in real time.
9. A method for converting MIPI image signals into LVDS image signals is characterized by comprising the following steps:
step 1: receiving an MIPI lane 0 channel signal, an MIPI lane data signal and an MIPI clock signal; analyzing the MIPI lane 0 channel signal to obtain MIPI data channel physical layer coding information, analyzing the MIPI lane data signal to obtain MIPI data channel number information, and analyzing the MIPI clock signal to obtain MIPI data transmission rate;
step 2: recovering a receiving clock of the MIPI data channel according to the MIPI data transmission rate, and outputting a corrected MIPI lane data signal; carrying out physical layer decoding processing on the corrected MIPI lane data signal according to the MIPI data channel physical layer coding information to obtain an MIPI image data packet;
detecting a transmission sequence of the MIPI image data packet, and carrying out synchronous processing on the transmission sequence of the MIPI image data packet;
and step 3: converting the MIPI image data packet after synchronous processing into an RGB signal according to the MIPI data channel number information;
and 4, step 4: dividing the RGB signals into multilink RGB signals according to LVDS configuration commands;
and 5: and converting the multilink RGB signals into multilink LVDS image signals.
10. The method of converting MIPI image signals into LVDS image signals according to claim 9, wherein the step 1 further comprises the steps of: receiving an MIPI clock signal, analyzing the MIPI clock signal to obtain an MIPI data transmission rate, recovering a receiving clock of an MIPI data channel according to the MIPI data transmission rate, and outputting a corrected MIPI lane data signal according to the receiving clock.
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| CN108898983B (en) * | 2018-07-12 | 2021-07-23 | 武汉精测电子集团股份有限公司 | Video signal extension system and method |
| CN110769207B (en) * | 2019-11-19 | 2022-04-01 | 深圳开立生物医疗科技股份有限公司 | Electronic endoscope signal transmission method, device, equipment and system |
| CN111177056B (en) * | 2020-01-02 | 2023-04-18 | 何刚 | Method, apparatus and computer readable storage medium for implementing AXI VIP using protocol layering |
| CN111246144B (en) * | 2020-01-08 | 2022-04-08 | 何刚 | MIPI CSI VIP method and device using protocol layering |
| CN111629119B (en) * | 2020-05-06 | 2022-10-25 | 深圳市爱协生科技有限公司 | MIPI data processing method, device, storage medium and display terminal |
| CN113035113A (en) * | 2021-04-12 | 2021-06-25 | 中航华东光电有限公司 | Display screen driving method and system based on FPGA |
| CN113691759B (en) * | 2021-09-06 | 2024-07-19 | 上海集成电路装备材料产业创新中心有限公司 | Method for receiving MIPI signal based on FPGA, terminal and medium |
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