CN105281555A - A Modular Topology and MMC Flexible DC Transmission System Based on Modular Topology - Google Patents

Abstract

The invention discloses a module topology and an MMC type flexible direct current power transmission system based on the module topology, which comprises a sixth diode, a direct current capacitor and an LC circuit, and a first diode, a second diode, a third diode, a fourth diode and a fifth diode are respectively connected in parallel with the first insulated gate bipolar transistor, the second insulated gate bipolar transistor, the third insulated gate bipolar transistor, the fourth insulated gate bipolar transistor and the fifth insulated gate bipolar transistor in an anti-parallel manner, the capacitance is switched in and out by controlling the switching on and off of the first insulated gate bipolar transistor and the second insulated gate bipolar transistor, therefore, the required alternating voltage is generated, and the third insulated gate bipolar transistor and the fourth insulated gate bipolar transistor are used for controlling the additional LC loop to absorb the power fluctuation of fundamental frequency and double frequency on the direct current capacitor, so that the power fluctuation is reduced.

Description

A Modular Topology and MMC Flexible DC Transmission System Based on Modular Topology

【Technical field】

The invention belongs to the field of flexible power transmission and distribution, and in particular relates to a module topology and an MMC type flexible DC power transmission system based on the module topology.

【Background technique】

Compared with the traditional voltage source converter, the modular multilevel converter (ModularMultileverConverter, MMC) has the advantages of good scalability, small harmonics, low switching frequency, and less requirements for consistent triggering of devices, and is especially suitable for DC transmission application occasions.

In order to reduce the loss and the number of components, the early MMC adopts the half-bridge sub-module cascading form, but the MMC in the half-bridge sub-module cascading form cannot effectively block the DC fault. Therefore, a new topology is urgently needed to solve the above technical problems. .

【Content of invention】

The purpose of the present invention is to overcome the above-mentioned shortcomings, provide a module topology and an MMC type flexible direct current transmission system based on the module topology, and solve the problem that the half-bridge module cannot effectively block the direct current fault.

In order to achieve the above object, the present invention includes a sixth diode VD6, a DC capacitor C and an LC loop, and are respectively connected with the first IGBT VT1, the second IGBT VT2, the third IGBT The polar transistor VT3, the fourth insulated gate bipolar transistor VT4 and the fifth insulated gate bipolar transistor VT5 are connected in antiparallel with a first diode VD1, a second diode VD2, a third diode VD3, a fourth Diode VD4 and fifth diode VD5;

The first insulated gate bipolar transistor VT1 and the second insulated gate bipolar transistor VT2 and the antiparallel first diode VD1 and second diode VD2 are used to input and cut off the module capacitance C to generate The main switching device of the required voltage, the third IGBT VT3 and the fourth IGBT VT4 and the anti-parallel third diode VD3 and the fourth VD4 are used to control the capacitance in the LC loop The input and removal of Ca and inductance La are used to absorb the auxiliary switching device of the fundamental frequency and double frequency power, the fifth insulated gate bipolar transistor VT5, the fifth diode VD5 and the sixth diode VD6 are used to block DC fault current.

The collector of the first insulated gate bipolar transistor VT1 is connected to the cathode of the first diode VD1, the emitter of the first insulated gate bipolar transistor VT1 is connected to the anode of the first diode VD1, and the first The emitter of the insulated gate bipolar transistor VT1 is connected to the collector of the second insulated gate bipolar transistor VT2 and the first interface A, and the anode of the second diode VD2 is connected to the emitter of the second insulated gate bipolar transistor VT2 connected, the cathode of the second diode VD2 is connected to the collector of the second insulated gate bipolar transistor VT2, the collector of the third insulated gate bipolar transistor VT3 is connected to the cathode of the third diode VD3, and the third The emitter of the insulated gate bipolar transistor VT3 is connected to the anode of the third diode VD3, the emitter of the third insulated gate bipolar transistor VT3 is connected to the collector of the fourth insulated gate bipolar transistor VT4, and the fourth The collector of the IGBT VT4 is connected to the cathode of the fourth diode VD4, the emitter of the fourth IGBT VT4 is connected to the anode of the fourth diode VD4, and the fifth IGBT The emitter of the transistor VT5 is connected to the emitter of the fourth IGBT VT4, the emitter of the fifth IGBT VT5 is connected to the anode of the fifth diode VD5, and the fifth IGBT The collector of the transistor VT5 is connected to the cathode of the fifth diode VD5, the anode of the sixth diode VD6 is connected to the collector of the fifth IGBT VT5 and the second interface B, and the cathode is connected to the first IGBT The collector of the polar transistor VT1, the LC circuit is connected between the emitter of the third insulated gate bipolar transistor VT3 and the emitter of the fifth insulated gate bipolar transistor VT5, and the DC capacitor C is connected to the third insulated gate bipolar transistor VT5 Between the collector of the polar transistor VT3 and the emitter of the fourth insulated gate bipolar transistor VT4, the first insulated gate bipolar transistor VT1, the second insulated gate bipolar transistor VT2, the third insulated gate bipolar transistor The gates of the transistor VT3 , the fourth IGBT VT4 , and the fifth IGBT VT5 are connected to the driving signal.

The collector of the first insulated gate bipolar transistor VT1 is connected to the cathode of the first diode VD1, the emitter of the first insulated gate bipolar transistor VT1 is connected to the anode of the first diode VD1, and the first The emitter of the insulated gate bipolar transistor VT1 is connected to the collector of the second insulated gate bipolar transistor VT2 and the second interface B, and the anode of the second diode VD2 is connected to the emitter of the second insulated gate bipolar transistor VT2 connected, the cathode of the second diode VD2 is connected to the collector of the second insulated gate bipolar transistor VT2, the collector of the third insulated gate bipolar transistor VT3 is connected to the cathode of the third diode VD3, and the third The emitter of the insulated gate bipolar transistor VT3 is connected to the anode of the third diode VD3, the emitter of the third insulated gate bipolar transistor VT3 is connected to the collector of the fourth insulated gate bipolar transistor VT4, and the fourth The collector of the IGBT VT4 is connected to the cathode of the fourth diode VD4, the emitter of the fourth IGBT VT4 is connected to the anode of the fourth diode VD4, and the fifth IGBT The collector of the type transistor VT5 is connected to the collector of the first IGBT VT1, the emitter of the fifth IGBT VT5 is connected to the anode of the fifth diode VD5, and the fifth IGBT The collector of the transistor VT5 is connected to the cathode of the fifth diode VD5, the anode of the sixth diode VD6 is connected to the emitter of the second IGBT VT2, and the cathode is connected to the fifth IGBT VT5 The emitter is connected to the first interface A, the LC loop is connected between the emitter of the third insulated gate bipolar transistor VT3 and the emitter of the fourth insulated gate bipolar transistor VT4, and the DC capacitor C is connected to the third insulated gate bipolar transistor VT4 Between the collector of the polar transistor VT3 and the emitter of the fourth insulated gate bipolar transistor VT4, the first insulated gate bipolar transistor VT1, the second insulated gate bipolar transistor VT2, the third insulated gate bipolar transistor Gates of the transistor VT3 , the fourth IGBT VT4 and the fifth IGBT VT5 are connected to the driving signal.

The third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT4 are connected with an auxiliary circuit, and the auxiliary circuit adopts a control loop with DC capacitor voltage or fundamental wave power and double frequency power as control targets Control auxiliary circuits.

The auxiliary circuit can detect the voltage of the DC capacitor, compare it with the command value, control it through PI, and finally compare it with the triangular carrier wave to generate a PWM wave, and send it to the third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT3 type transistor VT4.

It includes three upper bridge arms and three lower bridge arms respectively connected to the AC three-phase system. Both the upper bridge arms and the lower bridge arms include inductors connected to the AC three-phase system, and the downstream of the inductors are sequentially connected to several module topologies;

The second interface B of the head end module topology in each upper bridge arm is connected to the corresponding inductor, the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, and the end module topology The first interface A is connected to the positive pole Vdc+ of the positive DC bus;

The second interface B of the head-end module topology in each lower bridge arm is connected to the negative pole Vdc- of the positive DC bus, and the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, The first interface A of the end module topology is connected to a corresponding inductor.

Compared with the prior art, the new topology proposed by the present invention includes five IGBTs, a diode in antiparallel with the IGBT and an independent diode, by controlling the first IGBT VT1 and the second insulated gate bipolar transistor VT2 are turned on and off to input and cut off the capacitance, thereby generating the required AC voltage, the third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT4 are used To control the additional LC circuit to absorb the power fluctuations of the fundamental frequency and the double frequency on the DC capacitor, thereby reducing the power fluctuation, reducing the capacitance and volume of the DC capacitor, and blocking it by controlling the fifth insulated gate bipolar transistor VT5 DC fault, the fifth insulated gate bipolar transistor VT5 remains on during normal operation, when a DC fault occurs, the fifth insulated gate bipolar transistor VT5 is turned off, the fault current flows through the sixth diode VD6, and at the same time The main capacitor is connected in reverse to suppress the DC fault current and solve the problem that the half-bridge module cannot effectively block the DC fault. At the same time, the introduction of the auxiliary circuit reduces the capacitance of the DC capacitor, thereby reducing the module volume and increasing the power density.

【Description of drawings】

Fig. 1 is the first topology diagram proposed by the present invention;

Fig. 2 is the second topology diagram proposed by the present invention;

Fig. 3 is a schematic diagram of the application of the first topology in the MMC type flexible direct current transmission system;

Figure 4 is a schematic diagram of the application of the second topology in the MMC type flexible direct current transmission system;

Fig. 5 is a schematic diagram of the DC fault blocking function after adopting the first topology;

Fig. 6 is a schematic diagram of the DC fault blocking function after adopting the second topology;

7 is a schematic diagram of a control strategy of an auxiliary circuit;

Fig. 8 is a schematic diagram of the reduction of capacitor voltage fluctuation after adopting the topology of the present invention.

【detailed description】

The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

Referring to Fig. 1 and Fig. 2, the present invention includes the sixth diode VD6, the DC capacitor C and the LC loop, and are respectively connected to the first insulated gate bipolar transistor VT1, the second insulated gate bipolar transistor VT2, and the third insulated gate bipolar transistor VT1. The gate bipolar transistor VT3, the fourth insulated gate bipolar transistor VT4 and the fifth insulated gate bipolar transistor VT5 are connected in antiparallel with a first diode VD1, a second diode VD2, a third diode VD3, The fourth diode VD4 and the fifth diode VD5;

The first insulated gate bipolar transistor VT1 and the second insulated gate bipolar transistor VT2 and the antiparallel connection of the first diode VD1 and the second diode VD2 are used to input and remove the module capacitance C to generate the required The voltage of the main switching device, the third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT4 and the antiparallel connection of the third diode VD3 and the fourth VD4 are used to control the capacitance Ca in the LC circuit and The input and cut-off of the inductor La is used to absorb the auxiliary switching device of the fundamental frequency and double frequency power, the fifth insulated gate bipolar transistor VT5, the fifth diode VD5 and the sixth diode VD6 are used to block the DC fault current .

Example 1:

Referring to FIG. 1, the collector of the first IGBT VT1 is connected to the cathode of the first diode VD1, and the emitter of the first IGBT VT1 is connected to the anode of the first diode VD1. The emitter of the first insulated gate bipolar transistor VT1 is connected to the collector of the second insulated gate bipolar transistor VT2 and the first interface A, and the anode of the second diode VD2 is connected to the anode of the second insulated gate bipolar transistor VT2 The emitter stage is connected, the cathode of the second diode VD2 is connected to the collector of the second insulated gate bipolar transistor VT2, the collector of the third insulated gate bipolar transistor VT3 is connected to the cathode of the third diode VD3, The emitter of the third IGBT VT3 is connected to the anode of the third diode VD3, the emitter of the third IGBT VT3 is connected to the collector of the fourth IGBT VT4, The collector of the fourth insulated gate bipolar transistor VT4 is connected to the cathode of the fourth diode VD4, the emitter of the fourth insulated gate bipolar transistor VT4 is connected to the anode of the fourth diode VD4, and the fifth insulated gate bipolar transistor VT4 is connected to the anode of the fourth diode VD4. The emitter of the bipolar transistor VT5 is connected to the emitter of the fourth IGBT VT4, the emitter of the fifth IGBT VT5 is connected to the anode of the fifth diode VD5, and the fifth IGBT The collector of the polar transistor VT5 is connected to the cathode of the fifth diode VD5, the anode of the sixth diode VD6 is connected to the collector of the fifth insulated gate bipolar transistor VT5 and the second interface B, and the cathode is connected to the first insulating gate bipolar transistor VT5. The collector of the gate bipolar transistor VT1, the LC circuit is connected between the emitter of the third insulated gate bipolar transistor VT3 and the emitter of the fifth insulated gate bipolar transistor VT5, and the DC capacitor C is connected to the third insulated gate bipolar transistor VT5 Between the collector of the gate bipolar transistor VT3 and the emitter of the fourth insulated gate bipolar transistor VT4, the first insulated gate bipolar transistor VT1, the second insulated gate bipolar transistor VT2, the third insulated gate bipolar transistor The gates of the polar transistor VT3 , the fourth IGBT VT4 , and the fifth IGBT VT5 are connected to a driving signal.

Referring to Fig. 3, an MMC-type flexible DC power transmission system based on module topology includes three upper bridge arms and three lower bridge arms respectively connected to the AC three-phase system. Both the upper bridge arms and the lower bridge arms include AC The inductance of the three-phase system, the downstream of the inductance is sequentially connected to several module topologies;

The second interface B of the head end module topology in each upper bridge arm is connected to the corresponding inductor, the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, and the end module topology The first interface A is connected to the positive pole Vdc+ of the positive DC bus;

The second interface B of the head-end module topology in each lower bridge arm is connected to the positive pole Vdc- of the positive DC bus, and the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, The first interface A of the end module topology is connected to a corresponding inductor.

When working normally, the fifth insulated gate bipolar transistor VT5 is closed, and the main switching device controls the input and removal of the main capacitor through the opening and closing of the upper and lower switching tubes, so as to achieve the control goal. When the first IGBT VT1 is closed, the DC capacitor is connected to the circuit, and when the second IGBT VT2 is closed, the DC capacitor is short-circuited and no longer connected to the circuit. The third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT4 control the charging and discharging of the capacitor in the LC circuit to absorb power fluctuations of the fundamental frequency and the double frequency.

Example 2:

2 and 4, the collector of the first IGBT VT1 is connected to the cathode of the first diode VD1, the emitter of the first IGBT VT1 is connected to the cathode of the first diode VD1 The anode is connected, the emitter of the first insulated gate bipolar transistor VT1 is connected to the collector of the second insulated gate bipolar transistor VT2 and the second interface B, the anode of the second diode VD2 is connected to the second insulated gate bipolar transistor The emitter of the transistor VT2 is connected, the cathode of the second diode VD2 is connected to the collector of the second insulated gate bipolar transistor VT2, the collector of the third insulated gate bipolar transistor VT3 is connected to the collector of the third diode VD3 The negative poles are connected, the emitter of the third insulated gate bipolar transistor VT3 is connected to the anode of the third diode VD3, the emitter of the third insulated gate bipolar transistor VT3 is connected to the collector of the fourth insulated gate bipolar transistor VT4 The electrodes are connected, the collector of the fourth insulated gate bipolar transistor VT4 is connected to the cathode of the fourth diode VD4, the emitter of the fourth insulated gate bipolar transistor VT4 is connected to the anode of the fourth diode VD4, and the fourth insulated gate bipolar transistor VT4 is connected to the anode of the fourth diode VD4. The collector of the five insulated gate bipolar transistor VT5 is connected to the collector of the first insulated gate bipolar transistor VT1, the emitter of the fifth insulated gate bipolar transistor VT5 is connected to the anode of the fifth diode VD5, and the fifth The collector of the IGBT VT5 is connected to the cathode of the fifth diode VD5, the anode of the sixth diode VD6 is connected to the emitter of the second IGBT VT2, and the cathode is connected to the fifth IGBT The emitter of the polar transistor VT5 is connected to the first interface A, the LC loop is connected between the emitter of the third insulated gate bipolar transistor VT3 and the emitter of the fourth insulated gate bipolar transistor VT4, and the DC capacitor C is connected to Between the collector of the third IGBT VT3 and the emitter of the fourth IGBT VT4, the first IGBT VT1, the second IGBT VT2, the third The gates of the IGBT VT3 , the fourth IGBT VT4 and the fifth IGBT VT5 are connected to the driving signal.

Referring to Figure 4, an MMC-type flexible DC power transmission system based on a module topology includes three upper bridge arms and three lower bridge arms respectively connected to the AC three-phase system. Both the upper bridge arms and the lower bridge arms include access to the AC The inductance of the three-phase system, the downstream of the inductance is sequentially connected to several module topologies;

The second interface B of the head end module topology in each upper bridge arm is connected to the corresponding inductor, the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, and the end module topology The first interface A is connected to the positive pole Vdc+ of the positive DC bus;

The second interface B of the head-end module topology in each lower bridge arm is connected to the negative pole Vdc- of the positive DC bus, and the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, The first interface A of the end module topology is connected to a corresponding inductor.

When working normally, the fifth insulated gate bipolar transistor VT5 is closed, and the main switching device controls the input and removal of the main capacitor through the opening and closing of the upper and lower switching tubes, so as to achieve the control goal. When the second IGBT VT2 is closed, the DC capacitor is connected to the circuit, and when the first IGBT VT1 is closed, the DC capacitor is short-circuited and no longer connected to the circuit. The third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT4 control the charging and discharging of the capacitor in the LC circuit to absorb power fluctuations of the fundamental frequency and the double frequency.

FIG. 5 is a schematic diagram of suppressing a DC short-circuit fault current by the topology module proposed in Embodiment 1 in an MMC type flexible DC power transmission system. When a DC fault occurs, the positive and negative poles of the DC bus are connected directly or through a certain impedance. For the MMC system with a half-bridge structure, a DC path will be formed after a short circuit. In this path, there is no other than the impedance of the short circuit point. Impedance or voltage source, so a large current will be generated. As for the topology, when a DC fault occurs, the current path will flow as shown in Figure 5. It can be seen from the figure that when a DC fault occurs, the main capacitor of the module will be connected into the circuit, and the capacitor will provide a negative potential to the circuit to offset the DC voltage, thereby reducing the DC short-circuit current.

FIG. 6 is a schematic diagram of suppressing a DC short-circuit fault current by the topology module proposed in Embodiment 2 in an MMC flexible DC transmission system. When a DC fault occurs, the positive and negative poles of the DC bus are connected directly or through a certain impedance. For the MMC system with a half-bridge structure, a DC path will be formed after a short circuit. In this path, there is no other than the impedance of the short circuit point. Impedance or voltage source, so a large current will be generated. As for the topology, when a DC fault occurs, the current path will flow as shown in Figure 6. It can be seen from the figure that when a DC fault occurs, the main capacitor of the module will be connected into the circuit, and the capacitor will provide a negative potential to the circuit to offset the DC voltage, thereby reducing the DC short-circuit current.

There are many ways to control the auxiliary circuit. Figure 7 shows a simple closed-loop control method. After detecting the voltage of the DC capacitor and comparing it with the command value, it is controlled by PI, and finally compared with the triangular carrier to generate PWM Waves are given to the gates of the third IGBT VT3 and the fourth IGBT VT4. Possible methods include, but not only include, using a power detection method to obtain the power of the fundamental frequency and the double frequency, and using the power as a command value to control the power on the DC capacitor.

Referring to Figure 8, the LC loop is controlled by the auxiliary circuit to absorb the power fluctuations of the fundamental frequency and the double frequency, and the voltage fluctuation on the DC capacitor is reduced. The reduction of voltage fluctuation can reduce the requirement on capacitance capacity. The reduction of the capacitor capacity greatly improves the reduction of the cost and the volume of the capacitor.

Claims (6)

1. A module topology, characterized in that: comprise the sixth diode VD6, DC capacitor C and LC circuit, and respectively with the first insulated gate bipolar transistor VT1, the second insulated gate bipolar transistor VT2, the first insulated gate bipolar transistor Three insulated gate bipolar transistors VT3, fourth insulated gate bipolar transistors VT4 and fifth insulated gate bipolar transistors VT5 are connected in antiparallel with a first diode VD1, a second diode VD2, a third diode VD3, the fourth diode VD4 and the fifth diode VD5; The first insulated gate bipolar transistor VT1 and the second insulated gate bipolar transistor VT2 and the antiparallel first diode VD1 and second diode VD2 are used to input and cut off the module capacitance C to generate The main switching device of the required voltage, the third IGBT VT3 and the fourth IGBT VT4 and the anti-parallel third diode VD3 and the fourth VD4 are used to control the capacitance in the LC loop The input and removal of Ca and inductance La are used to absorb the auxiliary switching device of the fundamental frequency and double frequency power, the fifth insulated gate bipolar transistor VT5, the fifth diode VD5 and the sixth diode VD6 are used to block DC fault current. 2. A module topology according to claim 1, characterized in that: the collector of the first IGBT VT1 is connected to the cathode of the first diode VD1, and the first IGBT The emitter of the transistor VT1 is connected to the anode of the first diode VD1, the emitter of the first insulated gate bipolar transistor VT1 is connected to the collector of the second insulated gate bipolar transistor VT2 and the first interface A, and the second two The anode of the diode VD2 is connected to the emitter of the second IGBT VT2, the cathode of the second diode VD2 is connected to the collector of the second IGBT VT2, and the third IGBT The collector of the transistor VT3 is connected to the cathode of the third diode VD3, the emitter of the third insulated gate bipolar transistor VT3 is connected to the anode of the third diode VD3, and the emitter of the third insulated gate bipolar transistor VT3 pole is connected to the collector of the fourth insulated gate bipolar transistor VT4, the collector of the fourth insulated gate bipolar transistor VT4 is connected to the cathode of the fourth diode VD4, and the emitter of the fourth insulated gate bipolar transistor VT4 stage is connected to the anode of the fourth diode VD4, the emitter of the fifth insulated gate bipolar transistor VT5 is connected to the emitter of the fourth insulated gate bipolar transistor VT4, and the emitter of the fifth insulated gate bipolar transistor VT5 It is connected to the anode of the fifth diode VD5, the collector of the fifth insulated gate bipolar transistor VT5 is connected to the cathode of the fifth diode VD5, and the anode of the sixth diode VD6 is connected to the fifth insulated gate bipolar transistor VT5. The collector of the transistor VT5 and the second interface B, the negative pole is connected to the collector of the first insulated gate bipolar transistor VT1, and the LC circuit is connected to the emitter of the third insulated gate bipolar transistor VT3 and the fifth insulated gate bipolar transistor Between the emitters of the transistor VT5, the DC capacitor C is connected between the collector of the third IGBT VT3 and the emitter of the fourth IGBT VT4, and the first IGBT VT1 , the gates of the second IGBT VT2 , the third IGBT VT3 , the fourth IGBT VT4 , and the fifth IGBT VT5 are connected to drive signals. 3. A module topology according to claim 1, characterized in that: the collector of the first IGBT VT1 is connected to the cathode of the first diode VD1, and the first IGBT The emitter of the transistor VT1 is connected to the anode of the first diode VD1, the emitter of the first insulated gate bipolar transistor VT1 is connected to the collector of the second insulated gate bipolar transistor VT2 and the second interface B, and the second two The anode of the diode VD2 is connected to the emitter of the second IGBT VT2, the cathode of the second diode VD2 is connected to the collector of the second IGBT VT2, and the third IGBT The collector of the transistor VT3 is connected to the cathode of the third diode VD3, the emitter of the third insulated gate bipolar transistor VT3 is connected to the anode of the third diode VD3, and the emitter of the third insulated gate bipolar transistor VT3 pole is connected to the collector of the fourth insulated gate bipolar transistor VT4, the collector of the fourth insulated gate bipolar transistor VT4 is connected to the cathode of the fourth diode VD4, and the emitter of the fourth insulated gate bipolar transistor VT4 stage is connected to the anode of the fourth diode VD4, the collector of the fifth insulated gate bipolar transistor VT5 is connected to the collector of the first insulated gate bipolar transistor VT1, and the emitter of the fifth insulated gate bipolar transistor VT5 It is connected to the anode of the fifth diode VD5, the collector of the fifth insulated gate bipolar transistor VT5 is connected to the cathode of the fifth diode VD5, and the anode of the sixth diode VD6 is connected to the second insulated gate bipolar transistor VT5. The emitter of the transistor VT2, the cathode is connected to the emitter of the fifth insulated gate bipolar transistor VT5 and the first interface A, and the LC loop is connected to the emitter of the third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor Between the emitters of the transistor VT4, the DC capacitor C is connected between the collector of the third IGBT VT3 and the emitter of the fourth IGBT VT4, and the first IGBT VT1 , the gates of the second IGBT VT2 , the third IGBT VT3 , the fourth IGBT VT4 and the fifth IGBT VT5 are connected to drive signals. 4. A module topology according to claim 1, characterized in that: the third IGBT VT3 and the fourth IGBT VT4 are connected with an auxiliary circuit, and the auxiliary circuit uses a DC capacitor Voltage or fundamental wave power and double frequency power are control loops of control targets to control auxiliary circuits. 5. A kind of module topology according to claim 4, characterized in that: the auxiliary circuit can detect the voltage/fundamental wave power and double frequency power of the DC capacitor, and after comparing with the command value, it is controlled by PI, Finally, compared with the triangular carrier wave, a PWM wave is generated and sent to the third insulated gate bipolar transistor VT3 and the fourth insulated gate bipolar transistor VT4. 6. A MMC type flexible direct current transmission system based on module topology according to claim 2 or 3, characterized in that: it includes three upper bridge arms and three lower bridge arms respectively connected to the AC three-phase system, the upper bridge Both the arm and the lower bridge arm include inductance connected to the AC three-phase system, and the downstream of the inductance is sequentially connected to several module topologies; The second interface B of the head end module topology in each upper bridge arm is connected to the corresponding inductor, the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, and the end module topology The first interface A is connected to the positive pole Vdc+ of the positive DC bus; The second interface B of the head-end module topology in each lower bridge arm is connected to the positive pole Vdc- of the negative DC bus, and the first interface A of the upstream module topology in the adjacent module topology is connected to the second interface B of the downstream module topology, The first interface A of the end module topology is connected to a corresponding inductor.