CN104157659B - Radiation detector crosstalk segregating radiating reinforcing pixel structure and manufacturing method thereof - Google Patents

Abstract

The invention relates to a radiation detector crosstalk isolation and radiation hardened pixel structure and a manufacturing method of the radiation detector crosstalk isolation and radiation hardened pixel structure. Radiation detector crosstalk isolation and radiation hardened pixel structure, including electrode field plate, P well, P+ region, insulating dielectric material, N-type bulk silicon, N-type MOSFET, P-type MOSFET, back electrode, field plate metal electrode, P+ lead-out electrode , connecting the field plate grooves. According to the radiation detector pixel structure with air gap and trench field plate of the present invention, there is an air gap isolation structure between the top-layer silicon MOSFET and the middle electrode field plate, which can effectively prevent the bottom potential from expanding to the top-layer silicon MOSFET body region , the TID effect is generated in the insulating medium after radiation ionization is shielded; the MOSFET in the circuit is surrounded by trench silicon connected to the field plate electrode, this structure can further reduce the parasitic capacitance between the circuit and the sensor, and effectively shield the crosstalk between the two parts of the signal.

Description

A radiation detector crosstalk isolation and radiation hardened pixel structure and its manufacturing method

technical field

The invention relates to a radiation detector crosstalk isolation and radiation reinforced pixel structure and a method for manufacturing the radiation detector crosstalk isolation and radiation reinforced pixel structure.

Background technique

The radiation detector detects the charged particles by collecting the non-equilibrium carriers generated by the ionization reaction between the charged particles and the silicon atoms around the incident path of the radiation particles. Key parameters to measure its performance include resolution, signal-to-noise ratio, readout speed, and radiation hardening capabilities. In order to further improve the signal-to-noise ratio and radiation hardening capability of the radiation detector, as well as improve the charge collection efficiency and collection time, it is necessary to study the structure of the pixel sensor and the transmission tube, and provide an improvement plan for the charge collection mechanism and performance impact.

A silicon-on-insulator (Silicon On Insulator, SOI) pixel detector integrates a pixel sensor and a submicron complementary semiconductor field-effect transistor circuit on a single chip. It is characterized by small size, high resolution and low quality. Moreover, compared with the traditional bulk silicon pixel detector, there is no need for (Bonding on) "bonding" bonding packaging technology, which greatly improves the complexity and cost of the manufacturing process. However, SOI pixel detectors have a series of problems in actual work, such as the back gate effect, the total radiation dose effect produces hole traps in the buried oxygen, and the crosstalk between the circuit and the sensor.

The article "F.F.Khalid, G.W.Deptuch, A.Shenai, et al. Monolithic Active PixelMatrix with Binary Counters (MAMBO) ASIC. Nuclear Science Symposium Conference Record (NSS/MIC), 2010IEEE.2010, 1544-1550." proposes nested wells Nested well structure (Nested well structure NWS), this structure can isolate the crosstalk between the circuit and the sensor, but in order to avoid the back gate effect of this structure, the P well structure must completely contain the circuit part, and cannot be optimized independently. The article "T.Miyoshi, Recent progress indevelopment of SOI pixel detectors.Nuclear Science Symposium Conference Record (NSS/MIC), 2010 IEEE.2010, 1885-1888." proposes a dual silicon-on-insulator (DSOI) pixel structure. The structure contains a horizontal field plate, and the potential of the field plate is adjustable. This structure can also well isolate the crosstalk between the circuit and the sensor, but because of the buried oxygen structure, a large number of hole traps are introduced under radiation conditions, resulting in Total ionizing dose (Total Ionizing Dose-TID) effect. The published patent "Application No.: CN200980133383, Cheng Luoyun, Shallow Trench Isolation Structure with Air Gap, Complementary Metal-Oxide Semiconductor Image Sensor Using the Shallow Trench Isolation Structure and Its Manufacturer" provides an air gap shallow trench Isolation structure, but this structure is mainly an isolation structure between pixels, and the existing air gap can prevent the dark current generated by the oxide medium from affecting the main pixel signal, which is not related to the problem to be solved in this patent. Therefore, there is an urgent need to solve the crosstalk between the circuit and the sensor and the radiation TID effect in the SOI radiation detector pixel.

Contents of the invention

The object of the present invention is to provide a radiation detector crosstalk isolation and radiation hardened pixel structure that further reduces the crosstalk between the circuit and the sensor and shields the radiation TID effect. The purpose of the present invention is also to provide a radiation detector crosstalk isolation and a method for manufacturing a radiation-hardened pixel structure.

The purpose of the present invention is achieved like this:

Radiation detector crosstalk isolation and radiation hardened pixel structure, including electrode field plate, P well, P+ region, insulating dielectric material, N-type bulk silicon, N-type MOSFET, P-type MOSFET, back electrode, field plate metal electrode, P+ lead-out electrode , to connect the field plate groove; above the electrode field plate, two pairs of N-type MOSFETs and P-type MOSFETs that cooperate with each other are installed on both sides of the P+ lead-out electrode, and each pair of N-type MOSFETs and P-type MOSFETs is installed on both sides. The field plate metal electrode connected to the electrode field plate; the electrode field plate, N-type MOSFET, P-type MOSFET, P+ lead-out electrode, and field plate metal electrode are packaged together in an insulating dielectric material; the middle of the bottom of the insulating dielectric material is connected to the P+ lead-out electrode The P+ area of the P+ area, the P well on both sides of the P+ area, the P+ area and the P well are packaged together by N-type bulk silicon; there is an air gap between the electrode field plate and the MOSFET, the air gap does not contact the channel of the MOSFET, and the air gap The width along the lateral direction of the connection between the source electrode and the drain electrode of the MOSFET does not exceed the farthest boundary distance between the source electrode and the drain electrode; the air gap is greater than the width of the MOSFET along the vertical direction of the connection between the source electrode and the drain electrode of the MOSFET; the air gap The horizontal contact material is an insulating dielectric material.

The insulating dielectric material is silicon nitride or silicon oxide.

The horizontal shape of the air gap is oval, rectangular or circular.

The method for making radiation detector crosstalk isolation and radiation hardened pixel structure:

(1) Using a silicon-on-insulator epitaxial wafer to generate an insulating dielectric layer;

(2) The etching insulating medium is a non-uniform structure;

(3) Butt low-temperature bonding with another silicon-on-insulator epitaxial wafer with continuous or discontinuous distribution of silicon on the top layer;

(4) Remove the supporting silicon and the insulating dielectric material, etch a circle of grooves around the silicon layer for preparing the MOSFET, fill the epitaxial heavily doped silicon material with the same doping type as the electrode field plate, and lead out the electrode field plate groove.

The lateral etch size of the etched insulating dielectric is larger than the trench length of the MOSFET.

The beneficial effects of the present invention are:

According to the radiation detector pixel structure with air gap and trench field plate of the present invention, there is an air gap isolation structure between the top-layer silicon MOSFET and the middle electrode field plate, which can effectively prevent the bottom potential from expanding to the top-layer silicon MOSFET body region , the TID effect is generated in the insulating medium after radiation ionization is shielded; the MOSFET in the circuit is surrounded by trench silicon connected to the field plate electrode. This structure can further reduce the parasitic capacitance between the circuit and the sensor, and effectively shield the crosstalk between the two parts of the signal.

Description of drawings

Figure 1 shows the proposed nested well pixel structure;

Figure 2 shows the proposed double silicon-on-insulator pixel structure;

Fig. 3 is the pixel structure proposed by the present invention;

FIG. 4 is a schematic diagram illustrating specific steps of a pixel structure according to an embodiment of the present invention;

FIG. 5 is a schematic diagram illustrating specific steps of a pixel structure according to an embodiment of the present invention;

6 is a schematic diagram illustrating specific steps of a pixel structure according to an embodiment of the present invention;

FIG. 7 is a schematic diagram illustrating specific steps of a pixel structure according to an embodiment of the present invention;

FIG. 8 is a schematic diagram illustrating specific steps of a pixel structure according to an embodiment of the present invention;

FIG. 9 is a schematic diagram illustrating specific steps of a pixel structure according to an embodiment of the present invention;

FIG. 10 is a schematic top view of a trench layout in a pixel according to the present invention.

FIG. 11 is a schematic top view of a trench layout in a pixel according to the present invention.

FIG. 12 is a schematic top view of a trench layout in a pixel according to the present invention.

FIG. 13 is a schematic top view of a trench layout in a pixel according to the present invention.

Fig. 14 is a comparison diagram of threshold voltage deviation of N-type MOSFET under the effect of total radiation dose in the same nested well pixel structure and double silicon-on-insulator pixel structure in the present invention;

Fig. 15 is a comparison diagram of the threshold voltage deviation of the P-type MOSFET in the same nested well pixel structure and double silicon-on-insulator pixel structure under the effect of total radiation dose in the present invention;

Fig. 16 is a comparison diagram of the parasitic capacitance between the circuit and the sensor electrode in the same nested well pixel structure and the double silicon-on-insulator pixel structure according to the present invention.

detailed description

The present invention will be further described below in conjunction with the accompanying drawings.

A radiation detector crosstalk isolation and radiation hardened pixel structure, including an air gap, is formed above the electrode field plate and below the circuit metal oxide semiconductor field effect transistor. The horizontal contact material of the air gap is silicon oxide dielectric material. When the air gap structure is viewed from a top view angle, the figure can be a rectangular, circular, oval, etc. air gap structure surrounded by an oxide medium; the step of forming the air gap structure may include: using a silicon-on-insulator epitaxial wafer to generate a certain thickness of insulating medium The insulating medium is etched into a non-uniform structure by etching; then it is bonded with another silicon-on-insulator epitaxial wafer with continuous or discontinuous distribution of silicon on the top layer at low temperature; when preparing another silicon-on-insulator epitaxial wafer, the top layer If the silicon is distributed continuously, it is necessary to use PN junction or shallow trench technology to isolate the generated metal-oxide-semiconductor field-effect transistors; between the upper silicon and the top silicon, and the two parts of the top silicon are supported by insulating dielectric materials. After the bonding process, remove the supporting silicon and the insulating dielectric material, etch a shallow trench structure around the silicon layer of the metal oxide semiconductor field effect transistor, and fill it with epitaxial heavily doped silicon material, thereby leading to the electrode field plate groove Trench, so that the trench field plate surrounds the metal-oxide-semiconductor field-effect transistor of the circuit. The air gap structure located under the channel of the circuit metal oxide semiconductor field effect transistor can effectively prevent the back gate effect caused by the expansion of the potential generated by the bottom potential, and can also avoid the total dose effect of radiation ionization to generate a large number of hole charges in the insulating medium , thus affecting the threshold voltage change of N-type or P-type MOSFETs; the trench field plate structure can effectively protect circuit MOSFETs, further reduce the parasitic capacitance between the circuit and the sensor, and attenuate crosstalk between electrodes , Improve the radiation detector's ability to detect radiation reinforcement and detection capabilities. Therefore, in fact, the air gap isolation structure according to the present invention can be applied in commercial, military, aerospace and other fields.

The object of the present invention is to provide an SOI radiation detector pixel structure with such an air gap isolation and trench field plate structure and a manufacturing method thereof. In particular, there is a gap below the channel part of the semiconductor field effect transistor in the silicon circuit on the top layer of the pixel, and there is no dielectric material such as silicon oxide; and the semiconductor field effect transistor is surrounded by silicon grooves, which are drawn out by electrodes and used as potential control field plates. It is mainly used in particle detectors and radiation detectors.

A radiation detector crosstalk isolation and radiation hardened pixel structure, comprising: an air gap formed on an electrode field plate and below a circuit metal oxide semiconductor field effect transistor. The horizontal contact material of the air gap is silicon oxide dielectric material. In the air gap structure, the horizontal contact material of the air gap can be silicon nitride, or an insulator dielectric material such as a multilayer dielectric. The gap structure is under the MOSFET but not in contact with the channel portion of the MOSFET. The air gap structure is below the MOSFET, but the lateral width does not exceed the furthest boundary distance between the source electrode and the drain electrode of the MOSFET. The air gap structure should exceed the width of the metal oxide semiconductor field effect transistor in the third dimension direction of the plane, that is, ensure that the channel part of the metal oxide semiconductor field effect transistor is not in contact with the oxide dielectric material. When the air gap structure is viewed from a top view, the pattern can be a rectangle, a circle, an ellipse, etc., surrounded by an oxide medium. The height of the air gap structure can be adjusted according to the process conditions. The air gap structure can be formed by silicon-on-insulator bonding process.

The step of forming the air gap structure may include: using a silicon-on-insulator epitaxial wafer to generate a certain thickness of an insulating dielectric layer, using an etching method to etch the insulating dielectric into a non-uniform structure; Low-temperature bonding on silicon epiwafer butt joints. When growing the insulating dielectric layer, the material may be silicon oxide, or a stacked dielectric material of silicon oxide and silicon nitride, or other insulating dielectric materials. In the process of forming the etching mask, etching can completely etch away part of the insulating medium, and leak the top layer silicon; other parts of the insulating medium remain. Etching can make part of the insulating medium not completely etched away, and the top silicon is not leaked; other parts of the insulating medium remain. In the process of forming the etching mask, etching makes part of the insulating medium completely or incompletely etched, and its lateral etching size is larger than the channel length of the metal oxide semiconductor field effect transistor; to ensure that the metal oxide semiconductor field effect transistor channel is not completely etched. contact with insulating media. When preparing another silicon-on-insulator epitaxial wafer, if the silicon on the top layer is distributed continuously, it is necessary to use PN junction or shallow trench technology to isolate the resulting metal-oxide-semiconductor field-effect transistor. Etching can make part of the insulating medium not completely etched away, and the top silicon is not leaked; other parts of the insulating medium remain. When preparing another silicon-on-insulator epitaxial wafer, the top silicon layer can be at the same height as the upper surface of the insulating dielectric material. When preparing another silicon-on-insulator epitaxial wafer, the height of the top silicon layer and the upper surface of the insulating dielectric material may not be the same height. When preparing another silicon-on-insulator epitaxial wafer, if the silicon on the top layer is discontinuously distributed, each part is an independent or connected metal-oxide-semiconductor field-effect transistor in the circuit. If the silicon on the top layer is distributed continuously, each part is an independent metal-oxide-semiconductor field-effect transistor that needs to be connected in the circuit. The top layer of silicon is distributed continuously or discontinuously, and the lateral size of the silicon material is larger than the lateral size left by the air gap etching; it is ensured that the insulating dielectric material can physically support the metal oxide semiconductor field effect transistor device. After two parts of silicon-on-insulator epitaxial wafers are bonded, the air gap structure is located between the two parts of silicon-on-insulator top-layer silicon, and the two parts of top-layer silicon are supported by insulating dielectric materials. After the bonding process, remove the supporting silicon and the insulating dielectric material, etch a shallow trench structure around the silicon layer of the metal oxide semiconductor field effect transistor, and fill it with epitaxial heavily doped silicon material, thereby leading to the electrode field plate groove Trench, so that the trench field plate surrounds the metal-oxide-semiconductor field-effect transistor of the circuit. When filling the epitaxial heavily doped silicon material, ensure that the doping type of the filled silicon is the same as the doping type of the electrode field plate; the groove structure surrounds the metal oxide semiconductor field effect crystal region, and the groove can be a rectangular surrounding structure, and divided into The surrounding structure is an outer rectangle and an inner rectangle, and the two parts respectively lead out electrodes and short-circuit; the groove can be a straight-sided or arc-shaped or polygonal surrounding structure, and the surrounding structure is divided into an outer surrounding and an inner surrounding, and the two parts are respectively The electrodes are drawn out and short-circuited; the groove can be a surrounding structure of an outer rectangle and an inner rectangle, and the two parts of the surrounding structure can be connected together through the gap position of the metal oxide semiconductor field effect crystal region, and the electrodes are respectively drawn out and short-circuited; the groove It can be a straight-sided or arc-shaped or polygonal surrounding structure, and the two parts of the surrounding structure can be connected together through the gaps in the metal-oxide-semiconductor field-effect crystal region, and the electrodes are respectively drawn out and short-circuited.

According to an aspect of the present invention, a radiation detector crosstalk isolation and radiation hardened pixel structure provided includes: a sensor, an electronic circuit part and an isolation structure between them. The partial structure of the sensor includes: N-type epitaxy 305 , P well 302 , P+ region 303 , back electrode 308 and P+ electrode 303 . The electronic circuit part is composed of metal oxide semiconductor field effect transistors (Metal Oxide Semiconductor Field Effect Transistor MOSFET) 306 and 307, and the electrodes of MOSFET 306 and 307 are connected with the sensor electrode 310 according to the specific circuit layout. The isolation structure includes: a field plate electrode 301 , a field plate trench structure 311 , and an air gap structure 312 between the field plate and the MOSFET. The radiation detector crosstalk isolation and radiation hardened pixel structure features proposed in this patent are as follows:

The air gap 312 is formed above the field plate electrode 301 and below the circuit metal oxide semiconductor field effect transistor MOSFET. The horizontal contact material of the air gap 312 is the silicon oxide dielectric material 304 .

The horizontal contact material of the air gap 312 can be silicon nitride, or an insulator dielectric material such as a multi-layer dielectric;

The air gap 312 structure is under the MOSFET 306/307, but not in contact with the channel portion of the MOSFET 306/307;

The air gap 312 structure is below the MOSFET 306/307, but the lateral width does not exceed the furthest boundary distance between the source electrode and the drain electrode of the MOSFET;

The air gap 312 structure should exceed the width of the MOSFET 306/307 in the third dimension of the plane, that is, ensure that the channel part of the MOSFET 306/307 is not in contact with the oxide dielectric material.

The structure of the air gap 312 can be rectangular, circular, elliptical, polygonal, etc. when the structure of the air gap 312 is surrounded by the oxide medium 304 when viewed from a top view angle. ;

The structural height of the air gap 312 can be adjusted according to the process conditions.

The air gap 312 structure can be formed by SOI bonding process;

The step of forming the air gap 312 structure may include: using an SOI epitaxial wafer to form an insulating dielectric layer 401 with a certain thickness, and etching the insulating dielectric into a non-uniform structure 504 by means of etching; Low-temperature bonding of SOI epitaxial wafers;

When growing the insulating dielectric layer 504, the material may be silicon oxide, or a stacked dielectric material of silicon oxide and silicon nitride, or other insulating dielectric materials;

In the process of forming the etching mask, etching can make part of the insulating medium 504 be completely etched away, leaking the top layer silicon 506; other parts of the insulating medium remain;

In the process of forming the etching mask, etching can make part of the insulating medium 504 not completely etched away, and the top layer silicon 506 is not leaked; other parts of the insulating medium remain;

In the process of forming the etching mask, etching makes part of the insulating medium completely or incompletely etched, and the lateral etching size is larger than the channel length of MOSFET 306/307; ensuring that the channel of MOSFET 306/307 does not contact the insulating medium.

When preparing another SOI epitaxial wafer, if the top-layer silicon 603 is distributed continuously, it is necessary to use PN junction or shallow trench technology to isolate the generated MOSFET;

When preparing another SOI epitaxial wafer, the top layer silicon 603 can be at the same height as the upper surface of the insulating dielectric material 602;

When preparing another SOI epitaxial wafer, the height of the top layer silicon 603 and the upper surface of the insulating dielectric material 602 may be different;

When preparing another SOI epitaxial wafer, if the top-layer silicon 603 is discontinuously distributed, each part is independent or needs to be connected to the MOSFET 306/307 in the circuit;

When preparing another SOI epitaxial wafer, if the top-layer silicon 603 is distributed continuously, each part is independent or needs to be connected to the MOSFET 306/307 in the circuit;

When preparing another SOI epitaxial wafer, the top silicon 603 is distributed continuously or discontinuously, and the lateral dimension of the silicon material is larger than the lateral dimension left by the etching of the air gap 808; ensure that the insulating dielectric material can physically support the MOSFET 806/807 device;

After the two parts of SOI epitaxial wafers are bonded, the structure of the air gap 808 is located between the top silicon of the two parts of SOI, and the two parts of the top silicon are supported by the insulating dielectric material 804 .

After the bonding process, the supporting silicon 601 and the insulating dielectric material 602 are removed, and a shallow trench 911 structure is etched around the silicon layer of the MOSFET 906/907, and the epitaxial heavily doped silicon material is filled to make it the same as the field plate electrode 901 are connected to lead out the silicon material electrode field plate 901;

The groove 911 structure has a certain distance from the MOSFET 906/907 structure, and the distance is determined by the pixel size and the line width and distance on the process line;

When filling the epitaxial heavily doped silicon material, ensure that the doping type of the filled silicon 911 is the same as that of the electrode field plate 901;

The structure of the trench 1004 surrounds the MOSFET region 1002. The trench 1004 can be a rectangular surrounding structure, and is divided into an outer rectangular surrounding structure and an inner rectangular surrounding structure. The two parts respectively lead out electrodes and short-circuit;

The trench 1104 structure surrounds the MOSFET region 1102. The trench 1104 can be a straight-sided or arc-shaped or polygonal surrounding structure, and the surrounding structure is divided into an outer surround and an inner surround, and the two parts lead out electrodes and short-circuit;

The structure of the trench 1204 surrounds the MOSFET region 1202. The trench 1204 can be an outer rectangular and inner rectangular surrounding structure. The two surrounding structures can be connected together through the gaps of the MOSFET region 1202, and the electrodes are respectively drawn out and short-circuited;

The structure of the trench 1304 surrounds the MOSFET region 1302. The trench 1304 can be a straight-sided or arc-shaped or polygonal surrounding structure. The two parts of the surrounding structure can be connected together through the gaps of the MOSFET region 1302, and the electrodes are respectively drawn out and shorted.

According to yet another aspect of the present invention, there is provided a pixelated radiation detector manufactured by the above method.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. If descriptions of well-known functions or constructions make the subject matter of the present invention unclear, they will be omitted. Also, actual parts in the drawings are simplified or enlarged for the purpose of clear illustration. Here, the position of the characteristic layer or area can represent a relative position, but the actual situation is not necessarily the same as the scale in the schematic diagram.

Figure 1 presents the proposed nested-well pixel structure. The structure includes N well 101, P well 102, P+ region 103, insulating dielectric material 104, N-type bulk silicon 105, N-type (or P-type) MOSFET 106, P-type (or N-type) MOSFET 107, back electrode 108, N+ region 109, N+ metal electrode 110, P+ lead-out electrode 111 and other parts.

Figure 2 shows the proposed double silicon-on-insulator pixel structure. The structure includes an electrode field plate 201, a P well 202, a P+ region 203, an insulating dielectric material 204, an N-type bulk silicon 205, an N-type (or P-type) MOSFET 206, a P-type (or N-type) MOSFET 207, and a back electrode 208, Field plate metal electrode 209, P+ extraction electrode 210 and other parts.

FIG. 3 shows the pixel structure with an air gap proposed by the present invention. The structure includes an electrode field plate 301, a P well 302, a P+ region 303, an insulating dielectric material 304, an N-type bulk silicon 305, an N-type (or P-type) MOSFET 306, a P-type (or N-type) MOSFET 307, and a back electrode 308. The field plate metal electrode 309 and the P+ extraction electrode 310 are connected to the field plate trench 311 and other parts.

4 to 9 are diagrams illustrating manufacturing steps of a pixel according to an embodiment of the present invention. 4 to 9 are shown and focus on the isolation structure between the circuit in the pixel and the sensor, so the layout of the MOSFET in the sensor or the circuit in the figures is only for illustration.

According to the manufacturing steps of the pixel structure with an air gap of the present invention, as shown in FIG. 4 , on the top layer silicon 401 of silicon-on-insulator, a P+ implantation region 406 is etched out with a mask, and a P+ region 403 is formed after P+ ion implantation and annealing , and implanted into the P well 402 region.

Then, as shown in FIG. 5, a layer of insulating dielectric 504 identical to that of 404 is deposited on the top layer of silicon 501. After the surface is planarized, mask etching is performed to etch a non-uniform insulating dielectric structure 504, and the etching hole 506 can expose the field The plate structure 501 may also not expose the field plate structure 501 .

Then, as shown in FIG. 6 , another silicon-on-insulator epitaxial wafer is prepared, the top layer of silicon 603 may be in a discontinuous state, and the upper surface is level with the insulating medium 602 . Here, it is required that the layout of the top layer silicon 603 should correspond to the etching hole 506 to ensure that the part of the top layer silicon 603 used as a channel is not in contact with the insulating dielectric structure 504 .

Then, as shown in FIG. 7 , after the prepared Si-on-insulator epitaxial wafer 605 is turned over and aligned with the Si-on-insulator epitaxial wafer 505, low-temperature bonding is performed, and there is an air gap between the silicon 706 and 707 and the field plate. Structure 708. After the bonding process is completed, the supporting silicon 601 is removed and planarized so that the silicon 706 and 707 leak out of the surface.

Then, as shown in FIG. 8 , after mask etching, a trench structure is etched out, and the trench is directly connected to the field plate structure, and the heavily doped silicon material is epitaxially surrounded by the top layer silicon 806 and 807 . And the specific pattern structure of the specific mask may be determined by the size of the space occupied by the actual MOSFET. Afterwards, the epitaxial heavily doped silicon is planarized so that its upper surface is level with the top silicon layers 806 and 807 . N-type and P-type impurity implants are then performed to form the PN structure required by the top silicon 806 and 807 MOSFETs.

Then, as shown in FIG. 9 , after thermally growing the gate oxide layer, polysilicon is deposited, and after etching away the redundant part, after etching through a mask, the electrode contact holes of the top-layer silicon MOSFETs 906 and 907 are drilled, and at the same time, the field plate trenches 911 Metal electrodes are etched out on the structure and the P+ region. Afterwards, an insulating dielectric material 904 is deposited, and the back side is metallized. These processes are generally known in the art, so details are omitted.

10 to 13 are schematic top views of the layout of trenches in pixels according to the present invention. The trench 1004 structure surrounds the MOSFET region 1002. The trench 1004 can be a rectangular surrounding structure, and is divided into an outer rectangular surrounding structure and an inner rectangular surrounding structure. 1104 can be a straight-sided or arc-shaped or polygonal surrounding structure, and the surrounding structure is divided into outer surrounding and inner surrounding, and the two parts respectively lead out electrodes and short-circuit; the trench 1204 structure surrounds the MOSFET region 1202, and the trench 1204 can be The surrounding structure of the outer rectangle and the inner rectangle, the two parts of the surrounding structure can be communicated together through the gap position of the MOSFET region 1202, and the electrodes are respectively drawn out and shorted; the structure of the trench 1304 surrounds the MOSFET region 1302, and the trench 1304 can be a straight side or An arc-shaped or polygonal surrounding structure, the two parts of the surrounding structure can be connected together through the gaps in the MOSFET region 1302, and the electrodes are respectively drawn out and short-circuited.

14 and 15 are comparison diagrams of threshold voltage deviations of N-type and P-type MOSFETs under the effect of total radiation dose in the same nested well pixel structure and double silicon-on-insulator pixel structure according to the present invention. It can be seen from the figure that the pixel structure proposed by the present invention is not affected by the total radiation dose effect, and has better radiation hardening capability than the two proposed pixel structures.

Fig. 16 is a comparison diagram of the parasitic capacitance between the circuit and the sensor electrode in the same nested well pixel structure and the double silicon-on-insulator pixel structure according to the present invention. With pattern etching, the present invention proposes that the pixel structure has lower parasitic capacitance between the circuit and the sensor electrodes, further reducing the crosstalk between the electrodes.

According to the radiation detector pixel structure with air gap and trench field plate of the present invention, there is an air gap structure between the top layer silicon and the field plate electrode, and the lateral dimension of the air gap structure is larger than the channel size of the top layer silicon MOSFET and smaller than The edge distance between the source and drain electrodes of the top silicon MOSFET; the field plate structure has a trench leading out, and the trench surrounds the MOSFET in the circuit. The air gap structure located under the MOSFET channel of the circuit can effectively prevent the back gate effect caused by the potential expansion of the bottom potential, and can also avoid the total dose effect of radiation ionization from generating a large number of hole charges in the insulating medium, thereby affecting N-type or The threshold voltage of the P-type MOSFET changes; the grooved field plate structure can effectively protect the circuit MOSFET, further reduce the parasitic capacitance between the circuit and the sensor, attenuate the crosstalk between electrodes, and improve the radiation reinforcement and detection capabilities of the radiation detector. Therefore, in fact, the air gap isolation structure according to the present invention can be applied in commercial, military, aerospace and other fields.

The above are specific examples of the present invention and are not intended to limit the present invention. The crosstalk isolation and radiation-hardened pixel structure provided by the present invention is also applicable to SOI image sensors. Likewise, it can be applied in all pixel sensors, such as pixel sensors, particle detectors, radiation detectors and their variants. Without departing from the essence and scope of the present invention, some adjustments and optimizations can be made, and the protection scope of the present invention shall prevail in the claims.

Although the exemplary embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible without departing from the scope of the present invention disclosed in the claims and spirit.

Claims (3)

1. A radiation detector crosstalk isolation and radiation hardened pixel structure, comprising electrode field plate (301), P well (302), P+ region (303), insulating dielectric material (304), N-type bulk silicon (305), N-type MOSFET (306), P-type MOSFET (307), back electrode (308), field plate metal electrode (309), P+ extraction electrode (310), connecting field plate groove (311); above the electrode field plate , two pairs of N-type MOSFETs (306) and P-type MOSFETs (307) that cooperate with each other are installed on both sides of the P+ lead-out electrode, and the two sides of each pair of N-type MOSFETs (306) and P-type MOSFETs (307) are installed with and electrodes The field plate metal electrode (309) connected to the field plate; the electrode field plate, N-type MOSFET, P-type MOSFET, P+ lead-out electrode, and field-plate metal electrode are jointly packaged in an insulating dielectric material; The P+ area connected to the electrode, the P+ area is on both sides of the P well, and the P+ area and the P well are packaged together by N-type bulk silicon; it is characterized in that there is an air gap between the electrode field plate and the MOSFET, and the air gap is not connected with the MOSFET. Channel contact, the width of the air gap along the lateral direction of the connection between the source electrode and the drain electrode of the MOSFET does not exceed the farthest boundary distance between the source electrode and the drain electrode; the air gap along the vertical direction of the connection between the source electrode and the drain electrode of the MOSFET is larger than that of the MOSFET The width of the air gap; the horizontal contact material of the air gap is an insulating dielectric material; The insulating dielectric material is silicon nitride or silicon oxide; The horizontal shape of the air gap is ellipse, rectangle or circle. 2. A method for making a radiation detector crosstalk isolation and radiation-hardened pixel structure, characterized in that: (1) Using a silicon-on-insulator epitaxial wafer to generate an insulating dielectric layer; (2) The etching insulating medium is a non-uniform structure; (3) Butt low-temperature bonding with another silicon-on-insulator epitaxial wafer with continuous or discontinuous distribution of silicon on the top layer; (4) Remove the supporting silicon and the insulating dielectric material, etch a circle of grooves around the silicon layer of the MOSFET, fill the epitaxial heavily doped silicon material with the same doping type as the electrode field plate, and lead out the electrode field plate groove; There is an air gap between the electrode field plate and the MOSFET, the air gap does not contact the channel of the MOSFET, and the width of the air gap along the lateral direction of the connection between the source electrode and the drain electrode of the MOSFET does not exceed the farthest boundary distance between the source electrode and the drain electrode ; The air gap is larger than the width of the MOSFET along the vertical direction of the connection between the MOSFET source electrode and the drain electrode; the horizontal contact material of the air gap is an insulating dielectric material; The insulating dielectric material is silicon nitride or silicon oxide; The horizontal shape of the air gap is ellipse, rectangle or circle. 3 . The method for fabricating a radiation detector crosstalk isolation and radiation-hardened pixel structure according to claim 2 , wherein the lateral etching size of the etched insulating medium is larger than the trench length of the MOSFET. 4 .