[go: up one dir, main page]

CA2510004A1 - Synchroniseur d'horloge commande par logiciel - Google Patents

Synchroniseur d'horloge commande par logiciel Download PDF

Info

Publication number
CA2510004A1
CA2510004A1 CA 2510004 CA2510004A CA2510004A1 CA 2510004 A1 CA2510004 A1 CA 2510004A1 CA 2510004 CA2510004 CA 2510004 CA 2510004 A CA2510004 A CA 2510004A CA 2510004 A1 CA2510004 A1 CA 2510004A1
Authority
CA
Canada
Prior art keywords
phase
clock
wave
edge
clocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA 2510004
Other languages
English (en)
Inventor
John W. Bogdan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CA 2510004 priority Critical patent/CA2510004A1/fr
Priority to PCT/CA2006/001120 priority patent/WO2007000060A2/fr
Publication of CA2510004A1 publication Critical patent/CA2510004A1/fr
Priority to US12/351,824 priority patent/US9794096B2/en
Priority to US13/763,729 priority patent/US8982974B2/en
Priority to US13/844,722 priority patent/US9100165B2/en
Priority to US14/656,264 priority patent/US9641315B2/en
Priority to US15/582,747 priority patent/US10057047B2/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0996Selecting a signal among the plurality of phase-shifted signals produced by the ring oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0054Detection of the synchronisation error by features other than the received signal transition

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
CA 2510004 2005-06-27 2005-06-27 Synchroniseur d'horloge commande par logiciel Abandoned CA2510004A1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
CA 2510004 CA2510004A1 (fr) 2005-06-27 2005-06-27 Synchroniseur d'horloge commande par logiciel
PCT/CA2006/001120 WO2007000060A2 (fr) 2005-06-27 2006-06-27 Synthetiseur d'horloge commande par logiciel
US12/351,824 US9794096B2 (en) 2005-06-27 2009-01-10 Direct synchronization of synthesized clock
US13/763,729 US8982974B2 (en) 2005-06-27 2013-02-10 OFDM clock recovery
US13/844,722 US9100165B2 (en) 2005-06-27 2013-03-15 Direct data recovery
US14/656,264 US9641315B2 (en) 2005-06-27 2015-03-12 Clock recovery techniques
US15/582,747 US10057047B2 (en) 2005-06-27 2017-04-30 Phase synthesis techniques

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA 2510004 CA2510004A1 (fr) 2005-06-27 2005-06-27 Synchroniseur d'horloge commande par logiciel

Publications (1)

Publication Number Publication Date
CA2510004A1 true CA2510004A1 (fr) 2006-12-27

Family

ID=37561589

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2510004 Abandoned CA2510004A1 (fr) 2005-06-27 2005-06-27 Synchroniseur d'horloge commande par logiciel

Country Status (2)

Country Link
CA (1) CA2510004A1 (fr)
WO (1) WO2007000060A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112532239A (zh) * 2020-11-24 2021-03-19 珠海泰芯半导体有限公司 一种usb数据恢复系统

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108712226B (zh) * 2018-05-28 2020-03-27 中国电子科技集团公司第二十九研究所 一种芯片半自动同步方法及系统
CN116301197B (zh) * 2023-04-27 2023-08-04 上海合见工业软件集团有限公司 时钟数据恢复方法、电子设备和介质

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5485490A (en) * 1992-05-28 1996-01-16 Rambus, Inc. Method and circuitry for clock synchronization
TW525350B (en) * 2001-12-20 2003-03-21 Realtek Semiconductor Co Ltd Hybrid phase locked loop
US6933791B2 (en) * 2003-07-07 2005-08-23 National Central University Frequency synthesizing circuit having a frequency multiplier for an output PLL reference signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112532239A (zh) * 2020-11-24 2021-03-19 珠海泰芯半导体有限公司 一种usb数据恢复系统
CN112532239B (zh) * 2020-11-24 2024-01-02 珠海泰芯半导体有限公司 一种usb数据恢复系统

Also Published As

Publication number Publication date
WO2007000060A2 (fr) 2007-01-04
WO2007000060A3 (fr) 2007-02-15

Similar Documents

Publication Publication Date Title
US10057047B2 (en) Phase synthesis techniques
US9794096B2 (en) Direct synchronization of synthesized clock
US20180254882A1 (en) Synthesizing Clock of OFDM Receiver
US9838236B2 (en) Direct synthesis of receiver clock
US11616678B2 (en) Data recovery using subcarriers gradients
US8826062B2 (en) Apparatus for synchronizing a data handover between a first clock domain and a second clock domain through phase synchronization
US7800451B2 (en) Frequency adjustment for clock generator
US9769003B2 (en) Direct synthesis of OFDM receiver clock
US9077315B2 (en) Inverse signal transformation
US12237962B2 (en) Data recovery using gradients
US11533117B2 (en) Digital time processing over time sensitive networks
CA2510004A1 (fr) Synchroniseur d'horloge commande par logiciel
US10979208B1 (en) Digital time processing
JP5044719B2 (ja) 小数位相検出器を用いたクロック生成
Lee et al. A second-order semi-digital clock recovery circuit based on injection locking
US20050212565A1 (en) Single-chip digital phase frequency synthesiser
WO2006000095A1 (fr) Systeme d'horloge universel d'heterodyne
US11811505B2 (en) Digital time processing using rational number filters
US20250038943A1 (en) Direct Compensation of Residence Times
Lee et al. ISSCC 2003/SESSION 4/CLOCK RECOVERY AND BACKPLANE TRANSCEIVERS/PAPER 4.3

Legal Events

Date Code Title Description
FZDE Dead