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BRPI0924512A2 - secure application execution delivery method and appliance - Google Patents

secure application execution delivery method and appliance

Info

Publication number
BRPI0924512A2
BRPI0924512A2 BRPI0924512A BRPI0924512A BRPI0924512A2 BR PI0924512 A2 BRPI0924512 A2 BR PI0924512A2 BR PI0924512 A BRPI0924512 A BR PI0924512A BR PI0924512 A BRPI0924512 A BR PI0924512A BR PI0924512 A2 BRPI0924512 A2 BR PI0924512A2
Authority
BR
Brazil
Prior art keywords
appliance
application execution
delivery method
secure application
execution delivery
Prior art date
Application number
BRPI0924512A
Other languages
Portuguese (pt)
Inventor
Bernard Lint
Carlos V Rozas
David Durham
Dion Rodgers
Don A Van Dyke
Ernie Brickel
Francis X Mckeen
Gary Graunke
Gilbert Neiger
Howard C Herbert
Jiang Tao Li
John Garney
Joseph Cihula
Michael A Goldsmith
Prashant Dewan
Simon P Johnson
Stalinselvaraj Jeyasingh
Stephen J Tolopka
Stephen R Van Doren
Uday R Savagankar
Vincent R Scarlata
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=44196072&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=BRPI0924512(A2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Intel Corp filed Critical Intel Corp
Publication of BRPI0924512A2 publication Critical patent/BRPI0924512A2/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2105Dual mode as a secondary aspect

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Retry When Errors Occur (AREA)
BRPI0924512A 2009-12-22 2009-12-22 secure application execution delivery method and appliance BRPI0924512A2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2009/069212 WO2011078855A1 (en) 2009-12-22 2009-12-22 Method and apparatus to provide secure application execution

Publications (1)

Publication Number Publication Date
BRPI0924512A2 true BRPI0924512A2 (en) 2016-03-01

Family

ID=44196072

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0924512A BRPI0924512A2 (en) 2009-12-22 2009-12-22 secure application execution delivery method and appliance

Country Status (7)

Country Link
JP (1) JP5443599B2 (en)
KR (1) KR101457355B1 (en)
CN (1) CN102473224B (en)
BR (1) BRPI0924512A2 (en)
DE (1) DE112009005466T5 (en)
GB (2) GB2481563B (en)
WO (1) WO2011078855A1 (en)

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US9698989B2 (en) * 2013-07-23 2017-07-04 Intel Corporation Feature licensing in a secure processing environment
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US9413765B2 (en) * 2014-03-25 2016-08-09 Intel Corporation Multinode hubs for trusted computing
US9864861B2 (en) 2014-03-27 2018-01-09 Intel Corporation Object oriented marshaling scheme for calls to a secure region
US9705892B2 (en) 2014-06-27 2017-07-11 Intel Corporation Trusted time service for offline mode
US9703733B2 (en) * 2014-06-27 2017-07-11 Intel Corporation Instructions and logic to interrupt and resume paging in a secure enclave page cache
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US9940456B2 (en) 2014-12-16 2018-04-10 Intel Corporation Using trusted execution environments for security of code and data
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Also Published As

Publication number Publication date
GB2481563A (en) 2011-12-28
WO2011078855A9 (en) 2011-09-09
GB2481563B (en) 2017-07-19
JP5443599B2 (en) 2014-03-19
GB201118724D0 (en) 2011-12-14
GB2550698A (en) 2017-11-29
KR101457355B1 (en) 2014-11-04
CN102473224B (en) 2016-10-12
JP2012530961A (en) 2012-12-06
KR20120099472A (en) 2012-09-10
CN102473224A (en) 2012-05-23
DE112009005466T5 (en) 2012-10-31
GB201709341D0 (en) 2017-07-26
GB2550698B (en) 2018-04-11
WO2011078855A1 (en) 2011-06-30

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Legal Events

Date Code Title Description
B15K Others concerning applications: alteration of classification

Ipc: G06F 12/14 (2006.01), G06F 21/72 (2013.01), G06F 2

B06T Formal requirements before examination [chapter 6.20 patent gazette]
B11E Dismissal acc. art. 34 of ipl - requirements for examination incomplete
B11T Dismissal: dismissal of application maintained
B350 Update of information on the portal [chapter 15.35 patent gazette]