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AU7812798A - Fpga with conductors segmented by active repeaters - Google Patents

Fpga with conductors segmented by active repeaters

Info

Publication number
AU7812798A
AU7812798A AU78127/98A AU7812798A AU7812798A AU 7812798 A AU7812798 A AU 7812798A AU 78127/98 A AU78127/98 A AU 78127/98A AU 7812798 A AU7812798 A AU 7812798A AU 7812798 A AU7812798 A AU 7812798A
Authority
AU
Australia
Prior art keywords
segmented
fpga
conductors
active repeaters
repeaters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU78127/98A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dynaco Corp
Original Assignee
DynaChip Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/869,201 external-priority patent/US6025736A/en
Priority claimed from US08/978,691 external-priority patent/US6002268A/en
Application filed by DynaChip Corp filed Critical DynaChip Corp
Publication of AU7812798A publication Critical patent/AU7812798A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
    • H03K17/6257—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors with several inputs only combined with selecting means
    • H03K17/6264—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors with several inputs only combined with selecting means using current steering means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
    • H03K17/6285—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors with several outputs only combined with selecting means
    • H03K17/6292—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors with several outputs only combined with selecting means using current steering means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/01759—Coupling arrangements; Interface arrangements with a bidirectional operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H03K19/17744—Structural details of routing resources for input/output signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H03K19/17792—Structural details for adapting physical parameters for operating speed

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
AU78127/98A 1997-06-04 1998-06-03 Fpga with conductors segmented by active repeaters Abandoned AU7812798A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US08869201 1997-06-04
US08/869,201 US6025736A (en) 1993-01-08 1997-06-04 Fast reprogrammable logic with active links between cells
US08/978,691 US6002268A (en) 1993-01-08 1997-11-26 FPGA with conductors segmented by active repeaters
US08978691 1997-11-26
PCT/US1998/011440 WO1998055918A1 (en) 1997-06-04 1998-06-03 Fpga with conductors segmented by active repeaters

Publications (1)

Publication Number Publication Date
AU7812798A true AU7812798A (en) 1998-12-21

Family

ID=27128099

Family Applications (1)

Application Number Title Priority Date Filing Date
AU78127/98A Abandoned AU7812798A (en) 1997-06-04 1998-06-03 Fpga with conductors segmented by active repeaters

Country Status (2)

Country Link
AU (1) AU7812798A (en)
WO (1) WO1998055918A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1271363A3 (en) * 2001-06-11 2005-03-30 Mentor Graphics Corporation Interface based design using a tabular paradigm
US7355443B2 (en) 2002-06-28 2008-04-08 Katarzyna Leijten-Nowak Integrated circuit having building blocks
DE102004014472B4 (en) 2004-03-24 2012-05-03 Infineon Technologies Ag Application specific semiconductor integrated circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5504440A (en) * 1994-01-27 1996-04-02 Dyna Logic Corporation High speed programmable logic architecture
US5512765A (en) * 1994-02-03 1996-04-30 National Semiconductor Corporation Extendable circuit architecture
US5543640A (en) * 1994-03-15 1996-08-06 National Semiconductor Corporation Logical three dimensional interconnections between integrated circuit chips using a two dimensional multi-chip module
US5497108A (en) * 1994-12-08 1996-03-05 Dynalogic Corporation BICMOS repeater circuit for a programmable logic device
US5631578A (en) * 1995-06-02 1997-05-20 International Business Machines Corporation Programmable array interconnect network
US5671432A (en) * 1995-06-02 1997-09-23 International Business Machines Corporation Programmable array I/O-routing resource
US5552721A (en) * 1995-06-05 1996-09-03 International Business Machines Corporation Method and system for enhanced drive in programmmable gate arrays
US5692147A (en) * 1995-06-07 1997-11-25 International Business Machines Corporation Memory mapping method and apparatus to fold sparsely populated structures into densely populated memory columns or rows by selectively transposing X and Y address portions, and programmable gate array applications thereof

Also Published As

Publication number Publication date
WO1998055918A1 (en) 1998-12-10

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase