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AU2003300480A1 - Nand memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same - Google Patents

Nand memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same

Info

Publication number
AU2003300480A1
AU2003300480A1 AU2003300480A AU2003300480A AU2003300480A1 AU 2003300480 A1 AU2003300480 A1 AU 2003300480A1 AU 2003300480 A AU2003300480 A AU 2003300480A AU 2003300480 A AU2003300480 A AU 2003300480A AU 2003300480 A1 AU2003300480 A1 AU 2003300480A1
Authority
AU
Australia
Prior art keywords
same
channel regions
memory cells
memory array
array incorporating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003300480A
Inventor
En-Hsing Chen
Luca G. Fasoli
Alper Ilkbahar
Sucheta Nallamothu
Roy E. Scheuerlein
Andrew J. Walker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk 3D LLC
Original Assignee
Matrix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/335,078 external-priority patent/US7505321B2/en
Priority claimed from US10/335,089 external-priority patent/US7005350B2/en
Priority claimed from US10/729,831 external-priority patent/US7233522B2/en
Application filed by Matrix Semiconductor Inc filed Critical Matrix Semiconductor Inc
Publication of AU2003300480A1 publication Critical patent/AU2003300480A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
AU2003300480A 2002-12-31 2003-12-31 Nand memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same Abandoned AU2003300480A1 (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US10/335,078 US7505321B2 (en) 2002-12-31 2002-12-31 Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US10/335,078 2002-12-31
US10/335,089 2002-12-31
US10/335,089 US7005350B2 (en) 2002-12-31 2002-12-31 Method for fabricating programmable memory array structures incorporating series-connected transistor strings
US10/729,831 2003-12-05
US10/729,831 US7233522B2 (en) 2002-12-31 2003-12-05 NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same
PCT/US2003/041848 WO2004061861A2 (en) 2002-12-31 2003-12-31 Nand memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same

Publications (1)

Publication Number Publication Date
AU2003300480A1 true AU2003300480A1 (en) 2004-07-29

Family

ID=32719018

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003300480A Abandoned AU2003300480A1 (en) 2002-12-31 2003-12-31 Nand memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same

Country Status (2)

Country Link
AU (1) AU2003300480A1 (en)
WO (1) WO2004061861A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7317641B2 (en) 2005-06-20 2008-01-08 Sandisk Corporation Volatile memory cell two-pass writing method
US7764549B2 (en) 2005-06-20 2010-07-27 Sandisk 3D Llc Floating body memory cell system and method of manufacture
US7417904B2 (en) * 2006-10-31 2008-08-26 Atmel Corporation Adaptive gate voltage regulation
US7505326B2 (en) 2006-10-31 2009-03-17 Atmel Corporation Programming pulse generator
KR100890016B1 (en) 2007-05-10 2009-03-25 삼성전자주식회사 Nonvolatile memory device, memory system comprising it and its programming method

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646266A (en) * 1984-09-28 1987-02-24 Energy Conversion Devices, Inc. Programmable semiconductor structures and methods for using the same
JPH0548000A (en) * 1991-08-13 1993-02-26 Fujitsu Ltd Semiconductor device
US5422435A (en) * 1992-05-22 1995-06-06 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing
US5514907A (en) * 1995-03-21 1996-05-07 Simple Technology Incorporated Apparatus for stacking semiconductor chips
US6005270A (en) * 1997-11-10 1999-12-21 Sony Corporation Semiconductor nonvolatile memory device and method of production of same
KR100297602B1 (en) * 1997-12-31 2001-08-07 윤종용 Method for programming a non-volatile memory device
US6888750B2 (en) * 2000-04-28 2005-05-03 Matrix Semiconductor, Inc. Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
US6420215B1 (en) * 2000-04-28 2002-07-16 Matrix Semiconductor, Inc. Three-dimensional memory array and method of fabrication
US6456528B1 (en) * 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode

Also Published As

Publication number Publication date
WO2004061861A2 (en) 2004-07-22
WO2004061861A3 (en) 2004-10-28

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase