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AU2003272617A1 - Integrated circuit design to optimize manufacturability - Google Patents

Integrated circuit design to optimize manufacturability

Info

Publication number
AU2003272617A1
AU2003272617A1 AU2003272617A AU2003272617A AU2003272617A1 AU 2003272617 A1 AU2003272617 A1 AU 2003272617A1 AU 2003272617 A AU2003272617 A AU 2003272617A AU 2003272617 A AU2003272617 A AU 2003272617A AU 2003272617 A1 AU2003272617 A1 AU 2003272617A1
Authority
AU
Australia
Prior art keywords
integrated circuit
circuit design
optimize manufacturability
manufacturability
optimize
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003272617A
Inventor
Nicola Dragone
Carlo Guardiani
John Kibarian
Enrico Malavasi
Ratibor Radojcic
Andrzej Strojwas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PDF Solutions Inc
Original Assignee
PDF Solutions Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PDF Solutions Inc filed Critical PDF Solutions Inc
Publication of AU2003272617A1 publication Critical patent/AU2003272617A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/18Manufacturability analysis or optimisation for manufacturability
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
AU2003272617A 2003-09-16 2003-09-16 Integrated circuit design to optimize manufacturability Abandoned AU2003272617A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2003/029758 WO2005036422A1 (en) 2003-09-16 2003-09-16 Integrated circuit design to optimize manufacturability

Publications (1)

Publication Number Publication Date
AU2003272617A1 true AU2003272617A1 (en) 2005-04-27

Family

ID=34434210

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003272617A Abandoned AU2003272617A1 (en) 2003-09-16 2003-09-16 Integrated circuit design to optimize manufacturability

Country Status (5)

Country Link
JP (1) JP2007529100A (en)
CN (1) CN100474311C (en)
AU (1) AU2003272617A1 (en)
DE (1) DE10394299T5 (en)
WO (1) WO2005036422A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004061898A2 (en) 2003-01-02 2004-07-22 Pdf Solutions, Inc. Yield improvement
US7902878B2 (en) * 2008-04-29 2011-03-08 Qualcomm Incorporated Clock gating system and method
US8677292B2 (en) * 2009-04-22 2014-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Cell-context aware integrated circuit design
KR101252698B1 (en) 2009-04-29 2013-04-09 퀄컴 인코포레이티드 Clock gating system and method
CN102542116B (en) * 2012-01-06 2014-12-17 深圳市汉普电子技术开发有限公司 Method and device of DFM (Design for Manufacturability) analysis automation
JP6370148B2 (en) * 2014-07-30 2018-08-08 株式会社ディスコ Holding jig generator
DE102019124928A1 (en) 2018-09-28 2020-04-02 Taiwan Semiconductor Manufacturing Company, Ltd. INTEGRATED CIRCUIT DESIGN USING FUZZY MACHINE LEARNERS

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5539652A (en) * 1995-02-07 1996-07-23 Hewlett-Packard Company Method for manufacturing test simulation in electronic circuit design
US5666288A (en) * 1995-04-21 1997-09-09 Motorola, Inc. Method and apparatus for designing an integrated circuit
US5754826A (en) * 1995-08-04 1998-05-19 Synopsys, Inc. CAD and simulation system for targeting IC designs to multiple fabrication processes
JPH0981623A (en) * 1995-09-19 1997-03-28 Fujitsu Ltd CAD system and LSI design method
US5956497A (en) * 1997-02-26 1999-09-21 Advanced Micro Devices, Inc. Methodology for designing an integrated circuit using a reduced cell library for preliminary synthesis
JP2002076086A (en) * 2000-08-29 2002-03-15 Hitachi Ltd Yield prediction system for electronic devices

Also Published As

Publication number Publication date
WO2005036422A1 (en) 2005-04-21
CN100474311C (en) 2009-04-01
DE10394299T5 (en) 2006-08-10
CN1839389A (en) 2006-09-27
JP2007529100A (en) 2007-10-18

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase