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AU2003269995A1 - A method and system to enhance the removal of high-k-dielectric materials - Google Patents

A method and system to enhance the removal of high-k-dielectric materials

Info

Publication number
AU2003269995A1
AU2003269995A1 AU2003269995A AU2003269995A AU2003269995A1 AU 2003269995 A1 AU2003269995 A1 AU 2003269995A1 AU 2003269995 A AU2003269995 A AU 2003269995A AU 2003269995 A AU2003269995 A AU 2003269995A AU 2003269995 A1 AU2003269995 A1 AU 2003269995A1
Authority
AU
Australia
Prior art keywords
enhance
removal
dielectric materials
dielectric
materials
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003269995A
Other versions
AU2003269995A8 (en
Inventor
Gordon Bease
Lee Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of AU2003269995A1 publication Critical patent/AU2003269995A1/en
Publication of AU2003269995A8 publication Critical patent/AU2003269995A8/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
AU2003269995A 2002-08-27 2003-08-26 A method and system to enhance the removal of high-k-dielectric materials Abandoned AU2003269995A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US40603102P 2002-08-27 2002-08-27
US60/406,031 2002-08-27
PCT/US2003/026496 WO2004021409A2 (en) 2002-08-27 2003-08-26 A method and system to enhance the removal of high-k-dielectric materials

Publications (2)

Publication Number Publication Date
AU2003269995A1 true AU2003269995A1 (en) 2004-03-19
AU2003269995A8 AU2003269995A8 (en) 2004-03-19

Family

ID=31978257

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003269995A Abandoned AU2003269995A1 (en) 2002-08-27 2003-08-26 A method and system to enhance the removal of high-k-dielectric materials

Country Status (4)

Country Link
US (1) US20040129674A1 (en)
JP (1) JP2005537668A (en)
AU (1) AU2003269995A1 (en)
WO (1) WO2004021409A2 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6537844B1 (en) * 2001-05-31 2003-03-25 Kabushiki Kaisha Toshiba Manufacturing method for exposure mask, generating method for mask substrate information, mask substrate, exposure mask, manufacturing method for semiconductor device and server
DE10237696B3 (en) 2002-08-15 2004-04-15 Infineon Technologies Ag Transmission fault detection method, for two-wire differential signal transmission line, continually monitoring average voltage of the two line signals to detect any sudden jumps
JP2006501651A (en) * 2002-09-27 2006-01-12 東京エレクトロン株式会社 Method and system for etching high-k dielectric materials
US7413996B2 (en) * 2003-04-14 2008-08-19 Lsi Corporation High k gate insulator removal
US20050064716A1 (en) * 2003-04-14 2005-03-24 Hong Lin Plasma removal of high k metal oxide
JP2005039015A (en) * 2003-07-18 2005-02-10 Hitachi High-Technologies Corp Plasma processing method and apparatus
US7037845B2 (en) * 2003-08-28 2006-05-02 Intel Corporation Selective etch process for making a semiconductor device having a high-k gate dielectric
US7115530B2 (en) * 2003-12-03 2006-10-03 Texas Instruments Incorporated Top surface roughness reduction of high-k dielectric materials using plasma based processes
US20060068603A1 (en) * 2004-09-30 2006-03-30 Tokyo Electron Limited A method for forming a thin complete high-permittivity dielectric layer
US7413992B2 (en) * 2005-06-01 2008-08-19 Lam Research Corporation Tungsten silicide etch process with reduced etch rate micro-loading
EP1969619A1 (en) * 2005-10-20 2008-09-17 INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM vzw (IMEC) A method for fabricating a high-k dielectric layer
KR100998417B1 (en) * 2007-08-20 2010-12-03 주식회사 하이닉스반도체 Method of forming dielectric film of semiconductor memory device
US20090253268A1 (en) * 2008-04-03 2009-10-08 Honeywell International, Inc. Post-contact opening etchants for post-contact etch cleans and methods for fabricating the same
US8598027B2 (en) * 2010-01-20 2013-12-03 International Business Machines Corporation High-K transistors with low threshold voltage
CN102064103A (en) * 2010-12-02 2011-05-18 上海集成电路研发中心有限公司 High-k gate dielectric layer manufacture method
JP6980406B2 (en) * 2017-04-25 2021-12-15 株式会社日立ハイテク Semiconductor manufacturing equipment and methods for manufacturing semiconductor equipment
KR102342124B1 (en) 2019-02-14 2021-12-22 주식회사 히타치하이테크 semiconductor manufacturing equipment

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US104706A (en) * 1870-06-28 Improved device for tendering or chopping meat
US43340A (en) * 1864-06-28 Improved leather-paper for floor-cloths
US4690728A (en) * 1986-10-23 1987-09-01 Intel Corporation Pattern delineation of vertical load resistor
US4940509A (en) * 1988-03-25 1990-07-10 Texas Instruments, Incorporated Isotropic etchant for capped silicide processes
US5868854A (en) * 1989-02-27 1999-02-09 Hitachi, Ltd. Method and apparatus for processing samples
WO1999026277A1 (en) * 1997-11-17 1999-05-27 Mattson Technology, Inc. Systems and methods for plasma enhanced processing of semiconductor wafers
KR100308190B1 (en) * 1999-01-20 2001-09-26 윤종용 Method of removing pyrochlore caused during a ferroelectric crystalline dielectric film process
TW514996B (en) * 1999-12-10 2002-12-21 Tokyo Electron Ltd Processing apparatus with a chamber having therein a high-corrosion-resistant sprayed film
US6667246B2 (en) * 2001-12-04 2003-12-23 Matsushita Electric Industrial Co., Ltd. Wet-etching method and method for manufacturing semiconductor device
US6656852B2 (en) * 2001-12-06 2003-12-02 Texas Instruments Incorporated Method for the selective removal of high-k dielectrics
US6806095B2 (en) * 2002-03-06 2004-10-19 Padmapani C. Nallan Method of plasma etching of high-K dielectric materials with high selectivity to underlying layers
US6818553B1 (en) * 2002-05-15 2004-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Etching process for high-k gate dielectrics
US6579809B1 (en) * 2002-05-16 2003-06-17 Advanced Micro Devices, Inc. In-situ gate etch process for fabrication of a narrow gate transistor structure with a high-k gate dielectric
US6764898B1 (en) * 2002-05-16 2004-07-20 Advanced Micro Devices, Inc. Implantation into high-K dielectric material after gate etch to facilitate removal

Also Published As

Publication number Publication date
AU2003269995A8 (en) 2004-03-19
WO2004021409A2 (en) 2004-03-11
US20040129674A1 (en) 2004-07-08
JP2005537668A (en) 2005-12-08
WO2004021409A3 (en) 2004-07-01

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase