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AU2001295903A1 - Module for generating circuits for decoding convolutional codes, related method and circuit - Google Patents

Module for generating circuits for decoding convolutional codes, related method and circuit

Info

Publication number
AU2001295903A1
AU2001295903A1 AU2001295903A AU9590301A AU2001295903A1 AU 2001295903 A1 AU2001295903 A1 AU 2001295903A1 AU 2001295903 A AU2001295903 A AU 2001295903A AU 9590301 A AU9590301 A AU 9590301A AU 2001295903 A1 AU2001295903 A1 AU 2001295903A1
Authority
AU
Australia
Prior art keywords
module
circuit
decoding circuits
related method
generating circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001295903A
Inventor
Gianmario Bollano
Donato Ettorre
Maura Turolla
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TIM SpA
Original Assignee
Telecom Italia Lab SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telecom Italia Lab SpA filed Critical Telecom Italia Lab SpA
Publication of AU2001295903A1 publication Critical patent/AU2001295903A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Selective Calling Equipment (AREA)

Abstract

The present invention relates to a module 50 for generating integrated decoding circuits for use, in particular, in turbo devices, to the method for defining the characteristics of and generating convolutional decoding circuits, and to the circuit that can be obtained with said module 50. The module 50 is parametric and, thanks to this feature, makes it possible to generate decoding circuits having different performance characteristics which are such that they can be used in turbo devices employing different decoding modes and different architectures. In addition, the module 50 makes it possible to generate decoding circuits whose distinguishing feature is that they can manage a plurality of generator polynomials selectively and can thus also be used in asymmetrical turbo devices.
AU2001295903A 2000-10-19 2001-10-11 Module for generating circuits for decoding convolutional codes, related method and circuit Abandoned AU2001295903A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
IT2000TO000984A IT1320715B1 (en) 2000-10-19 2000-10-19 CIRCUIT GENERATOR MODULE FOR THE DECODING OF CONVENTIONAL CODES, METHOD FOR THE GENERATION OF SUCH TYPE OF CIRCUIT AND
ITTO00A000984 2000-10-19
PCT/IT2001/000514 WO2002033834A1 (en) 2000-10-19 2001-10-11 Module for generating circuits for decoding convolutional codes, related method and circuit

Publications (1)

Publication Number Publication Date
AU2001295903A1 true AU2001295903A1 (en) 2002-04-29

Family

ID=11458138

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001295903A Abandoned AU2001295903A1 (en) 2000-10-19 2001-10-11 Module for generating circuits for decoding convolutional codes, related method and circuit

Country Status (10)

Country Link
US (1) US7401284B2 (en)
EP (1) EP1336250B1 (en)
JP (1) JP3984162B2 (en)
KR (1) KR100855018B1 (en)
AT (1) ATE320112T1 (en)
AU (1) AU2001295903A1 (en)
DE (1) DE60117831T2 (en)
IT (1) IT1320715B1 (en)
RU (1) RU2298283C2 (en)
WO (1) WO2002033834A1 (en)

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US7376939B1 (en) * 2002-02-07 2008-05-20 Xilinx, Inc. System for architecture and resource specification and methods to compile the specification onto hardware
JP2004080508A (en) 2002-08-20 2004-03-11 Nec Electronics Corp Decoding method for error correction code, its program, and its device
NL1027012C2 (en) * 2004-09-10 2006-01-23 Tatung Co Reusable hardware IP protocol for system on a chip devices, determines whether hardware IP parameters are required and enters function parameter or search signal
FR2876472B1 (en) * 2004-10-08 2008-09-19 Tatung Co Ltd PROTOCOL METHOD FOR REUSABLE IP HARDWARE COMPONENT FOR A CHIP SYSTEM DEVICE
EP2808345A3 (en) 2007-12-05 2015-03-11 Massachusetts Institute of Technology Aglycosylated immunoglobulin mutants
US20110087949A1 (en) * 2008-06-09 2011-04-14 Nxp B.V. Reconfigurable turbo interleavers for multiple standards
US8406342B2 (en) 2008-06-19 2013-03-26 Qualcomm Incorporated Methods and systems for improving frame decoding performance using known information
EP3828205A1 (en) 2010-10-01 2021-06-02 Oxford BioTherapeutics Ltd Anti-ror1 antibodies
JOP20210044A1 (en) 2010-12-30 2017-06-16 Takeda Pharmaceuticals Co Anti-CD38 . antibody
US10385395B2 (en) 2012-04-11 2019-08-20 The Regents Of The University Of California Diagnostic tools for response to 6-thiopurine therapy
US9260527B2 (en) 2013-03-15 2016-02-16 Sdix, Llc Anti-human CXCR4 antibodies and methods of making same
TWI527040B (en) * 2013-05-13 2016-03-21 群聯電子股份有限公司 Data writing method, memory storage device and memory controller
CN104182293B (en) * 2013-05-22 2017-06-30 群联电子股份有限公司 Data writing method, memory storage device and memory controller
UA119047C2 (en) 2013-10-11 2019-04-25 Берлін-Хемі Аг LY75 CONJUGATED ANTIBODY FOR CANCER TREATMENT
JP7316930B2 (en) 2016-07-15 2023-07-28 武田薬品工業株式会社 Methods and Materials for Assessing Response to Plasmablast and Plasma Cell Depletion Therapy
RU2634201C1 (en) * 2016-07-26 2017-10-24 федеральное государственное казенное военное образовательное учреждение высшего образования "Краснодарское высшее военное училище имени генерала армии С.М. Штеменко" Министерства обороны Российской Федерации Device for spoofing resistant coding and decoding information with excessive systematic codes
GB201703876D0 (en) 2017-03-10 2017-04-26 Berlin-Chemie Ag Pharmaceutical combinations
CA3088199A1 (en) 2018-01-12 2019-07-18 Takeda Pharmaceutical Company Limited Subcutaneous dosing of anti-cd38 antibodies
CA3095086A1 (en) 2018-03-28 2019-10-03 Takeda Pharmaceutical Company Limited Subcutaneous dosing of anti-cd38 antibodies
GB201809746D0 (en) 2018-06-14 2018-08-01 Berlin Chemie Ag Pharmaceutical combinations
JP7705353B2 (en) 2019-06-10 2025-07-09 武田薬品工業株式会社 Combination therapy using CD38 antibodies
US12497463B2 (en) 2020-06-23 2025-12-16 Jiangsu Kanion Pharmaceutical Co., Ltd. Anti-CD38 antibody and use thereof
WO2022075474A1 (en) 2020-10-09 2022-04-14 学校法人慶應義塾 Therapeutic agent for immune/inflammatory disease
KR20250135226A (en) 2023-01-06 2025-09-12 다케다 야쿠힌 고교 가부시키가이샤 Anti-CD38 antibodies for the treatment of autoimmune diseases
WO2025088065A1 (en) 2023-10-25 2025-05-01 Deutsches Krebsforschungszentrum Stiftung des öffentlichen Rechts Diagnosis and therapy of aml
WO2025193746A1 (en) 2024-03-12 2025-09-18 Takeda Pharmaceutical Company Limited Dosing regimens of anti-cd38 antibodies for treatment of subjects with immune thrombocytopenia
WO2025235919A1 (en) 2024-05-09 2025-11-13 Takeda Pharmaceutical Company Limited Dosing regimens of anti-cd38 antibodies for treatment of subjects with immunoglobulin a nephropathy

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2156889C (en) * 1994-09-30 1999-11-02 Edward L. Schwartz Method and apparatus for encoding and decoding data
US5721746A (en) * 1996-04-19 1998-02-24 General Electric Company Optimal soft-output decoder for tail-biting trellis codes
US5996104A (en) * 1996-09-13 1999-11-30 Herzberg; Hanan System for coding system
US6112326A (en) * 1998-02-02 2000-08-29 Ericsson Inc. Precoding technique to lower the bit error rate (BER) of punctured convolutional codes
US6484283B2 (en) * 1998-12-30 2002-11-19 International Business Machines Corporation Method and apparatus for encoding and decoding a turbo code in an integrated modem system

Also Published As

Publication number Publication date
EP1336250B1 (en) 2006-03-08
JP2004512726A (en) 2004-04-22
EP1336250A1 (en) 2003-08-20
KR20030063366A (en) 2003-07-28
DE60117831D1 (en) 2006-05-04
ITTO20000984A1 (en) 2002-04-19
RU2298283C2 (en) 2007-04-27
JP3984162B2 (en) 2007-10-03
WO2002033834A1 (en) 2002-04-25
WO2002033834A9 (en) 2002-11-28
KR100855018B1 (en) 2008-08-28
US7401284B2 (en) 2008-07-15
ITTO20000984A0 (en) 2000-10-19
IT1320715B1 (en) 2003-12-10
ATE320112T1 (en) 2006-03-15
US20040013210A1 (en) 2004-01-22
DE60117831T2 (en) 2006-12-14

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