AU2001289296A1 - Enhanced turbo product code decoder system - Google Patents
Enhanced turbo product code decoder systemInfo
- Publication number
- AU2001289296A1 AU2001289296A1 AU2001289296A AU8929601A AU2001289296A1 AU 2001289296 A1 AU2001289296 A1 AU 2001289296A1 AU 2001289296 A AU2001289296 A AU 2001289296A AU 8929601 A AU8929601 A AU 8929601A AU 2001289296 A1 AU2001289296 A1 AU 2001289296A1
- Authority
- AU
- Australia
- Prior art keywords
- product code
- code decoder
- decoder system
- turbo product
- enhanced turbo
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2717—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions the interleaver involves 3 or more directions
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- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/258—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2721—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions the interleaver involves a diagonal direction, e.g. by using an interleaving matrix with read-out in a diagonal direction
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2771—Internal interleaver for turbo codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2918—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes with error correction codes in three or more dimensions, e.g. 3-dimensional product code where the bits are arranged in a cube
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2921—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes wherein error correction coding involves a diagonal direction
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/296—Particular turbo code structure
- H03M13/2963—Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/296—Particular turbo code structure
- H03M13/2966—Turbo codes concatenated with another code, e.g. an outer block code
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2975—Judging correct decoding, e.g. iteration stopping criteria
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2978—Particular arrangement of the component decoders
- H03M13/2981—Particular arrangement of the component decoders using as many component decoders as component codes
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
- H03M13/451—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6325—Error control coding in combination with demodulation
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6513—Support of multiple code types, e.g. unified decoder for LDPC and turbo codes
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6561—Parallelized implementations
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
- H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
- H04L1/0051—Stopping criteria
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- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
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- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0066—Parallel concatenated codes
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- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/067—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US19457000P | 2000-04-04 | 2000-04-04 | |
| US60/194570 | 2000-04-04 | ||
| PCT/US2001/010980 WO2001076079A2 (en) | 2000-04-04 | 2001-04-04 | Enhanced turbo product code decoder system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001289296A1 true AU2001289296A1 (en) | 2001-10-15 |
Family
ID=22718092
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001289296A Abandoned AU2001289296A1 (en) | 2000-04-04 | 2001-04-04 | Enhanced turbo product code decoder system |
Country Status (6)
| Country | Link |
|---|---|
| US (4) | US20020026615A1 (en) |
| EP (1) | EP1281241A2 (en) |
| JP (1) | JP2003534680A (en) |
| AU (1) | AU2001289296A1 (en) |
| CA (1) | CA2404984A1 (en) |
| WO (1) | WO2001076079A2 (en) |
Families Citing this family (125)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2817091B1 (en) | 2000-11-22 | 2003-03-21 | St Microelectronics Sa | EASY SYNCHRONIZATION TURBOCODE ENCODER |
| US7076000B2 (en) * | 2001-01-18 | 2006-07-11 | Motorola, Inc. | Soft-decision metric generation for higher order modulation |
| KR100450948B1 (en) * | 2001-07-12 | 2004-10-02 | 삼성전자주식회사 | Apparatus and method for determining modulation scheme in communication system |
| US7793191B2 (en) | 2002-04-05 | 2010-09-07 | Sony Corporation | Interleave device, interleaving method, deinterleave device, and deinterleave method |
| KR100878521B1 (en) * | 2002-05-09 | 2009-01-13 | 삼성전자주식회사 | Soft output generator and its method |
| FR2850810B1 (en) * | 2003-02-03 | 2005-05-13 | Nortel Networks Ltd | METHOD FOR CONTROLLING THE NUMBER OF ITERATIONS OF AN ITERATIVE DECODING PROCESS AND DEVICE FOR IMPLEMENTING THE METHOD |
| US7469049B1 (en) * | 2003-03-04 | 2008-12-23 | Marvell International Ltd. | Data dependent scrambler with reduced overhead |
| JP4077355B2 (en) * | 2003-04-16 | 2008-04-16 | 三菱電機株式会社 | Communication apparatus and communication method |
| US7054883B2 (en) * | 2003-12-01 | 2006-05-30 | Emc Corporation | Virtual ordered writes for multiple storage devices |
| US7441175B2 (en) * | 2004-03-12 | 2008-10-21 | Seagate Technology Llc | Turbo product code implementation and decoding termination method and apparatus |
| US7383484B2 (en) * | 2004-03-12 | 2008-06-03 | Seagate Technology Llc | Cyclic redundancy check based message passing in turbo product code decoding |
| JP3891186B2 (en) * | 2004-03-22 | 2007-03-14 | 住友電気工業株式会社 | Decoding device and preprocessing device |
| US7949074B2 (en) * | 2004-04-24 | 2011-05-24 | Thomson Licensing | Apparatus and method for decoding in a hierarchical, modulation system |
| US7415651B2 (en) * | 2004-06-02 | 2008-08-19 | Seagate Technology | Data communication system with multi-dimensional error-correction product codes |
| US7310767B2 (en) * | 2004-07-26 | 2007-12-18 | Motorola, Inc. | Decoding block codes |
| US7260762B2 (en) * | 2004-07-26 | 2007-08-21 | Motorola, Inc. | Decoder performance for block product codes |
| DE102004063950B4 (en) * | 2004-08-07 | 2009-02-19 | Tropf, Hermann | channel coding |
| US7516389B2 (en) | 2004-11-04 | 2009-04-07 | Agere Systems Inc. | Concatenated iterative and algebraic coding |
| US7835264B2 (en) * | 2004-12-29 | 2010-11-16 | Mitsubishi Denki Kabushiki Kaisha | Interleaver, deinterleaver, communication device, and method for interleaving and deinterleaving |
| US7644347B2 (en) * | 2005-09-30 | 2010-01-05 | Intel Corporation | Silent data corruption mitigation using error correction code with embedded signaling fault detection |
| KR100758306B1 (en) * | 2005-12-08 | 2007-09-12 | 한국전자통신연구원 | Apparatus for Generating Soft Bit Metric and its method, and M-ary QAM receive system using it |
| US7676733B2 (en) | 2006-01-04 | 2010-03-09 | Intel Corporation | Techniques to perform forward error correction for an electrical backplane |
| KR101402592B1 (en) * | 2006-03-06 | 2014-06-17 | 에스케이바이오팜 주식회사 | Transdermal Composition Using Piroxicam-Inorganic Complex and Patch System Comprising the Same |
| US8271848B2 (en) * | 2006-04-06 | 2012-09-18 | Alcatel Lucent | Method of decoding code blocks and system for concatenating code blocks |
| US8239735B2 (en) | 2006-05-12 | 2012-08-07 | Apple Inc. | Memory Device with adaptive capacity |
| US8156403B2 (en) | 2006-05-12 | 2012-04-10 | Anobit Technologies Ltd. | Combined distortion estimation and error correction coding for memory devices |
| KR101375955B1 (en) | 2006-05-12 | 2014-03-18 | 애플 인크. | Distortion estimation and cancellation in memory devices |
| US8060806B2 (en) * | 2006-08-27 | 2011-11-15 | Anobit Technologies Ltd. | Estimation of non-linear distortion in memory devices |
| US7805663B2 (en) * | 2006-09-28 | 2010-09-28 | Sandisk Corporation | Methods of adapting operation of nonvolatile memory |
| US7818653B2 (en) | 2006-09-28 | 2010-10-19 | Sandisk Corporation | Methods of soft-input soft-output decoding for nonvolatile memory |
| US7904783B2 (en) * | 2006-09-28 | 2011-03-08 | Sandisk Corporation | Soft-input soft-output decoder for nonvolatile memory |
| US7979775B2 (en) * | 2006-10-30 | 2011-07-12 | Motorola Mobility, Inc. | Turbo interference suppression in communication systems |
| US7975192B2 (en) * | 2006-10-30 | 2011-07-05 | Anobit Technologies Ltd. | Reading memory cells using multiple thresholds |
| US8166379B1 (en) * | 2006-11-03 | 2012-04-24 | Marvell International Ltd. | Calculating soft information from a multi-level modulation signal |
| US7924648B2 (en) * | 2006-11-28 | 2011-04-12 | Anobit Technologies Ltd. | Memory power and performance management |
| US8151163B2 (en) | 2006-12-03 | 2012-04-03 | Anobit Technologies Ltd. | Automatic defect management in memory devices |
| WO2008072604A1 (en) * | 2006-12-15 | 2008-06-19 | Sumitomo Electric Industries, Ltd. | Decoder for performing error correction decoding by repeated decoding method |
| US8151166B2 (en) | 2007-01-24 | 2012-04-03 | Anobit Technologies Ltd. | Reduction of back pattern dependency effects in memory devices |
| JP4803057B2 (en) * | 2007-02-06 | 2011-10-26 | 富士通株式会社 | Error correction code decoding apparatus |
| EP1956744A1 (en) * | 2007-02-12 | 2008-08-13 | CoreOptics, Inc., c/o The Corporation Trust Center | Tail extrapolator and method |
| WO2008111058A2 (en) | 2007-03-12 | 2008-09-18 | Anobit Technologies Ltd. | Adaptive estimation of memory cell read thresholds |
| US8001320B2 (en) | 2007-04-22 | 2011-08-16 | Anobit Technologies Ltd. | Command interface for memory devices |
| US7965782B1 (en) | 2007-05-11 | 2011-06-21 | Redpine Signals, Inc. | Reduced complexity maximum likelihood decoder for MIMO communications |
| US8234545B2 (en) | 2007-05-12 | 2012-07-31 | Apple Inc. | Data storage with incremental redundancy |
| WO2008139441A2 (en) | 2007-05-12 | 2008-11-20 | Anobit Technologies Ltd. | Memory device with internal signal processing unit |
| US7925936B1 (en) | 2007-07-13 | 2011-04-12 | Anobit Technologies Ltd. | Memory device with non-uniform programming levels |
| US8259497B2 (en) | 2007-08-06 | 2012-09-04 | Apple Inc. | Programming schemes for multi-level analog memory cells |
| US8174905B2 (en) | 2007-09-19 | 2012-05-08 | Anobit Technologies Ltd. | Programming orders for reducing distortion in arrays of multi-level analog memory cells |
| US8000141B1 (en) | 2007-10-19 | 2011-08-16 | Anobit Technologies Ltd. | Compensation for voltage drifts in analog memory cells |
| US8068360B2 (en) | 2007-10-19 | 2011-11-29 | Anobit Technologies Ltd. | Reading analog memory cells using built-in multi-threshold commands |
| WO2009050703A2 (en) | 2007-10-19 | 2009-04-23 | Anobit Technologies | Data storage in analog memory cell arrays having erase failures |
| KR101509836B1 (en) | 2007-11-13 | 2015-04-06 | 애플 인크. | Optimized selection of memory units in multi-unit memory devices |
| US8225181B2 (en) | 2007-11-30 | 2012-07-17 | Apple Inc. | Efficient re-read operations from memory devices |
| US8209588B2 (en) | 2007-12-12 | 2012-06-26 | Anobit Technologies Ltd. | Efficient interference cancellation in analog memory cell arrays |
| US8085586B2 (en) | 2007-12-27 | 2011-12-27 | Anobit Technologies Ltd. | Wear level estimation in analog memory cells |
| US8156398B2 (en) | 2008-02-05 | 2012-04-10 | Anobit Technologies Ltd. | Parameter estimation based on error correction code parity check equations |
| US7924587B2 (en) | 2008-02-21 | 2011-04-12 | Anobit Technologies Ltd. | Programming of analog memory cells using a single programming pulse per state transition |
| US8230300B2 (en) | 2008-03-07 | 2012-07-24 | Apple Inc. | Efficient readout from analog memory cells using data compression |
| US8059457B2 (en) | 2008-03-18 | 2011-11-15 | Anobit Technologies Ltd. | Memory device with multiple-accuracy read commands |
| US8400858B2 (en) | 2008-03-18 | 2013-03-19 | Apple Inc. | Memory device with reduced sense time readout |
| US8761316B2 (en) * | 2008-03-28 | 2014-06-24 | Qualcomm Incorporated | Systems and methods for approximating log likelihood ratios in a communication system |
| US8370711B2 (en) | 2008-06-23 | 2013-02-05 | Ramot At Tel Aviv University Ltd. | Interruption criteria for block decoding |
| US20090319860A1 (en) * | 2008-06-23 | 2009-12-24 | Ramot At Tel Aviv University Ltd. | Overcoming ldpc trapping sets by decoder reset |
| US7995388B1 (en) | 2008-08-05 | 2011-08-09 | Anobit Technologies Ltd. | Data storage using modified voltages |
| US7924613B1 (en) | 2008-08-05 | 2011-04-12 | Anobit Technologies Ltd. | Data storage in analog memory cells with protection against programming interruption |
| US8169825B1 (en) | 2008-09-02 | 2012-05-01 | Anobit Technologies Ltd. | Reliable data storage in analog memory cells subjected to long retention periods |
| US8949684B1 (en) | 2008-09-02 | 2015-02-03 | Apple Inc. | Segmented data storage |
| US8910009B1 (en) * | 2008-09-08 | 2014-12-09 | Marvell International Ltd. | Method and apparatus for enhancing error detection in data transmission |
| US8482978B1 (en) | 2008-09-14 | 2013-07-09 | Apple Inc. | Estimation of memory cell read thresholds by sampling inside programming level distribution intervals |
| US8000135B1 (en) | 2008-09-14 | 2011-08-16 | Anobit Technologies Ltd. | Estimation of memory cell read thresholds by sampling inside programming level distribution intervals |
| JP5535219B2 (en) * | 2008-09-30 | 2014-07-02 | エルエスアイ コーポレーション | Method and apparatus for soft data generation in a memory device using a reference cell |
| US8239734B1 (en) | 2008-10-15 | 2012-08-07 | Apple Inc. | Efficient data storage in storage device arrays |
| US8713330B1 (en) | 2008-10-30 | 2014-04-29 | Apple Inc. | Data scrambling in memory devices |
| US8208304B2 (en) | 2008-11-16 | 2012-06-26 | Anobit Technologies Ltd. | Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N |
| US8248831B2 (en) | 2008-12-31 | 2012-08-21 | Apple Inc. | Rejuvenation of analog memory cells |
| US8397131B1 (en) | 2008-12-31 | 2013-03-12 | Apple Inc. | Efficient readout schemes for analog memory cell devices |
| US8924661B1 (en) | 2009-01-18 | 2014-12-30 | Apple Inc. | Memory system including a controller and processors associated with memory devices |
| US8228701B2 (en) | 2009-03-01 | 2012-07-24 | Apple Inc. | Selective activation of programming schemes in analog memory cell arrays |
| US8473798B1 (en) * | 2009-03-20 | 2013-06-25 | Comtect EF Data Corp. | Encoding and decoding systems and related methods |
| US8259506B1 (en) | 2009-03-25 | 2012-09-04 | Apple Inc. | Database of memory read thresholds |
| US8832354B2 (en) | 2009-03-25 | 2014-09-09 | Apple Inc. | Use of host system resources by memory controller |
| US8238157B1 (en) | 2009-04-12 | 2012-08-07 | Apple Inc. | Selective re-programming of analog memory cells |
| US8479080B1 (en) | 2009-07-12 | 2013-07-02 | Apple Inc. | Adaptive over-provisioning in memory systems |
| US8495465B1 (en) | 2009-10-15 | 2013-07-23 | Apple Inc. | Error correction coding over multiple memory pages |
| US8335949B2 (en) * | 2009-11-06 | 2012-12-18 | Trellisware Technologies, Inc. | Tunable early-stopping for decoders |
| US8677054B1 (en) | 2009-12-16 | 2014-03-18 | Apple Inc. | Memory management schemes for non-volatile memory devices |
| US8694814B1 (en) | 2010-01-10 | 2014-04-08 | Apple Inc. | Reuse of host hibernation storage space by memory controller |
| US8572311B1 (en) | 2010-01-11 | 2013-10-29 | Apple Inc. | Redundant data storage in multi-die memory systems |
| US8694853B1 (en) | 2010-05-04 | 2014-04-08 | Apple Inc. | Read commands for reading interfering memory cells |
| US8572423B1 (en) | 2010-06-22 | 2013-10-29 | Apple Inc. | Reducing peak current in memory systems |
| US8595591B1 (en) | 2010-07-11 | 2013-11-26 | Apple Inc. | Interference-aware assignment of programming levels in analog memory cells |
| US8576958B2 (en) * | 2010-07-19 | 2013-11-05 | Qualcomm Incorporated | Method for soft modulation in a wireless telecommunication network |
| US9104580B1 (en) | 2010-07-27 | 2015-08-11 | Apple Inc. | Cache memory for hybrid disk drives |
| US8767459B1 (en) | 2010-07-31 | 2014-07-01 | Apple Inc. | Data storage in analog memory cells across word lines using a non-integer number of bits per cell |
| US8856475B1 (en) | 2010-08-01 | 2014-10-07 | Apple Inc. | Efficient selection of memory blocks for compaction |
| JP5485069B2 (en) * | 2010-08-06 | 2014-05-07 | パナソニック株式会社 | Error correction decoding apparatus and error correction decoding method |
| US8694854B1 (en) | 2010-08-17 | 2014-04-08 | Apple Inc. | Read threshold setting based on soft readout statistics |
| US9021181B1 (en) | 2010-09-27 | 2015-04-28 | Apple Inc. | Memory management for unifying memory cell conditions by using maximum time intervals |
| JP5241965B2 (en) * | 2010-11-26 | 2013-07-17 | 三菱電機株式会社 | Soft decision value generation circuit |
| US9300491B2 (en) | 2011-02-11 | 2016-03-29 | Qualcomm Incorporated | Frame delivery path selection in hybrid communication networks |
| EP2681632B1 (en) | 2011-03-01 | 2017-11-08 | AS-International Association e.V. | Bus system with a master and a group of slaves and communication method to exchange data in such a bussystem |
| US8897169B2 (en) * | 2011-03-02 | 2014-11-25 | Qualcomm Incorporated | Discovery of conventional devices and bridges in hybrid communication networks |
| US8806306B2 (en) * | 2011-03-07 | 2014-08-12 | Acacia Communications Inc. | Generation of soft bit metrics for differentially encoded quadrature phase shift keying (QPSK) |
| US9397786B2 (en) * | 2012-02-20 | 2016-07-19 | Tyco Electronics Subsea Communications Llc | System and method including modified bit-interleaved coded modulation |
| US9300329B2 (en) * | 2012-11-08 | 2016-03-29 | Sk Hynix Memory Solutions Inc. | Turbo-product codes (TPC) with interleaving |
| CN104769901B (en) * | 2013-01-04 | 2019-08-02 | 马维尔国际贸易有限公司 | Method for communication, telecommunication device and chipset for processing signals |
| US9391641B2 (en) | 2013-04-26 | 2016-07-12 | SK Hynix Inc. | Syndrome tables for decoding turbo-product codes |
| US9407398B2 (en) | 2013-09-08 | 2016-08-02 | Tyco Electronics Subsea Communications Llc | System and method using cascaded single partity check coding |
| US9337935B2 (en) | 2013-09-08 | 2016-05-10 | Tyco Electronics Subsea Communications Llc | Coded modulation for small step-size variable spectral efficiency |
| US9231623B1 (en) * | 2013-09-11 | 2016-01-05 | SK Hynix Inc. | Chase decoding for turbo-product codes (TPC) using error intersections |
| US20150169406A1 (en) * | 2013-12-16 | 2015-06-18 | Sandisk Technologies Inc. | Decoding techniques for a data storage device |
| US9553608B2 (en) | 2013-12-20 | 2017-01-24 | Sandisk Technologies Llc | Data storage device decoder and method of operation |
| GB2525877B (en) * | 2014-05-07 | 2016-08-10 | Cisco Tech Inc | Forward error correction with turbo/non-turbo switching |
| US20160291887A1 (en) * | 2015-03-30 | 2016-10-06 | Kabushiki Kaisha Toshiba | Solid-state drive with non-volatile random access memory |
| US9935659B2 (en) * | 2015-05-18 | 2018-04-03 | SK Hynix Inc. | Performance optimization in soft decoding for turbo product codes |
| US10090865B2 (en) * | 2016-03-23 | 2018-10-02 | SK Hynix Inc. | Performance optimization in soft decoding of error correcting codes |
| US10084485B2 (en) | 2016-03-23 | 2018-09-25 | SK Hynix Inc. | Soft decoder parameter optimization for product codes |
| US10090862B2 (en) | 2016-03-23 | 2018-10-02 | SK Hynix Inc. | Hybrid soft decoding algorithm for multiple-dimension TPC codes |
| KR101811281B1 (en) * | 2017-04-17 | 2017-12-22 | 고려대학교 산학협력단 | Method and apparatus for decoding 3 dimensional turbo product code based on crossing layers |
| KR101858123B1 (en) * | 2017-04-25 | 2018-05-17 | 고려대학교 산학협력단 | Method and apparatus for hybrid type iterative decoding |
| US10871910B1 (en) * | 2019-09-27 | 2020-12-22 | Western Digital Technologies, Inc. | Non-volatile memory with selective interleaved coding based on block reliability |
| JP7614876B2 (en) | 2021-02-16 | 2025-01-16 | キオクシア株式会社 | Memory System |
| US11556416B2 (en) | 2021-05-05 | 2023-01-17 | Apple Inc. | Controlling memory readout reliability and throughput by adjusting distance between read thresholds |
| US11847342B2 (en) | 2021-07-28 | 2023-12-19 | Apple Inc. | Efficient transfer of hard data and confidence levels in reading a nonvolatile memory |
| CN114421976B (en) * | 2022-01-25 | 2023-09-08 | 电子科技大学 | TPC iterative decoding method and decoder based on probability calculation |
Family Cites Families (51)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4295218A (en) * | 1979-06-25 | 1981-10-13 | Regents Of The University Of California | Error-correcting coding system |
| US4564945A (en) * | 1983-06-20 | 1986-01-14 | Reference Technology, Inc. | Error-correction code for digital data on video disc |
| US4559625A (en) * | 1983-07-28 | 1985-12-17 | Cyclotomics, Inc. | Interleavers for digital communications |
| US4763331A (en) * | 1985-12-11 | 1988-08-09 | Nippon Telegraph And Telephone Corporation | Method for decoding error correcting block codes |
| US4845714A (en) * | 1987-06-08 | 1989-07-04 | Exabyte Corporation | Multiple pass error correction process and apparatus for product codes |
| US4821290A (en) * | 1988-02-09 | 1989-04-11 | General Electric Company | Decoder for digital signal codes |
| US5157671A (en) * | 1990-05-29 | 1992-10-20 | Space Systems/Loral, Inc. | Semi-systolic architecture for decoding error-correcting codes |
| FR2675968B1 (en) * | 1991-04-23 | 1994-02-04 | France Telecom | METHOD FOR DECODING A CONVOLUTIVE CODE WITH MAXIMUM LIKELIHOOD AND WEIGHTING OF DECISIONS, AND CORRESPONDING DECODER. |
| FR2675971B1 (en) * | 1991-04-23 | 1993-08-06 | France Telecom | CORRECTIVE ERROR CODING METHOD WITH AT LEAST TWO SYSTEMIC CONVOLUTIVE CODES IN PARALLEL, ITERATIVE DECODING METHOD, CORRESPONDING DECODING MODULE AND DECODER. |
| US5574834A (en) * | 1992-01-09 | 1996-11-12 | Matsushita Graphic Communications Systems, Inc. | Image communication system for following a communication procedure to simultaneously transmit image code data |
| US5392299A (en) * | 1992-01-15 | 1995-02-21 | E-Systems, Inc. | Triple orthogonally interleaed error correction system |
| JPH05315977A (en) * | 1992-05-12 | 1993-11-26 | Hitachi Ltd | Soft-decision maximum likelihood decoding method and decoder |
| WO1994011955A1 (en) * | 1992-11-06 | 1994-05-26 | Pericle Communications Company | Adaptive data rate modem |
| US5457704A (en) | 1993-05-21 | 1995-10-10 | At&T Ipm Corp. | Post processing method and apparatus for symbol reliability generation |
| US5369652A (en) * | 1993-06-14 | 1994-11-29 | International Business Machines Corporation | Error detection and correction having one data format recordable on record media using a diverse number of concurrently recorded tracks |
| FR2712760B1 (en) * | 1993-11-19 | 1996-01-26 | France Telecom | Method for transmitting bits of information by applying concatenated block codes. |
| JP3321976B2 (en) * | 1994-04-01 | 2002-09-09 | 富士通株式会社 | Signal processing device and signal processing method |
| US5559506A (en) * | 1994-05-04 | 1996-09-24 | Motorola, Inc. | Method and apparatus for encoding and decoding a digital radio signal |
| CA2131242C (en) * | 1994-08-31 | 1999-02-16 | Masao Ikekawa | Apparatus for error-correct decoding in a digital data communications system |
| KR0139161B1 (en) * | 1994-11-26 | 1998-05-15 | 김광호 | Variable length encoding / decoding device using symbol-code rearrangement of variable length code table |
| US5657354A (en) * | 1995-05-15 | 1997-08-12 | Thesling, Iii; William H. | Planar approximating method for computing the log-likelihood ratio optimal signal metric of each component code decoder in 8-PSK block coded modulation systems |
| DE59610391D1 (en) * | 1995-06-12 | 2003-06-05 | Siemens Ag | Method and coding device for the secure transmission of data by means of multi-component coding |
| DE19526416A1 (en) * | 1995-07-19 | 1997-01-23 | Siemens Ag | Method and arrangement for determining an adaptive termination criterion in the iterative decoding of multidimensionally coded information |
| US5719884A (en) * | 1995-07-27 | 1998-02-17 | Hewlett-Packard Company | Error correction method and apparatus based on two-dimensional code array with reduced redundancy |
| US5703911A (en) * | 1995-08-17 | 1997-12-30 | Chung-Chin Chen | Decoding method for trellis codes with large free distances |
| JP3171772B2 (en) * | 1995-08-23 | 2001-06-04 | 沖電気工業株式会社 | Viterbi decoding method and Viterbi decoding device |
| US5684811A (en) * | 1995-09-01 | 1997-11-04 | Motorola, Inc. | Method and apparatus for decoding convolutionally encoded information |
| US5841818A (en) * | 1996-01-17 | 1998-11-24 | Chung-Chin Chen | Decoding method for trellis codes employing a convolutional processor |
| US5802116A (en) * | 1996-04-04 | 1998-09-01 | Lucent Technologies Inc. | Soft decision Viterbi decoding with large constraint lengths |
| US5721745A (en) * | 1996-04-19 | 1998-02-24 | General Electric Company | Parallel concatenated tail-biting convolutional code and decoder therefor |
| US5721746A (en) * | 1996-04-19 | 1998-02-24 | General Electric Company | Optimal soft-output decoder for tail-biting trellis codes |
| GB2316585A (en) * | 1996-08-23 | 1998-02-25 | Daewoo Electronics Co Ltd | Synchronization method and apparatus in Viterbi decoder |
| US5898698A (en) * | 1996-09-24 | 1999-04-27 | Orckit Communications Ltd. | Multiple codeword interleaver method and apparatus |
| US5901182A (en) * | 1997-03-26 | 1999-05-04 | Sharp Laboratories Of America, Inc. | Metric sifting in breadth-first decoding of convolutional coded data |
| US6188797B1 (en) * | 1997-05-27 | 2001-02-13 | Apple Computer, Inc. | Decoder for programmable variable length data |
| US5930272A (en) * | 1997-06-10 | 1999-07-27 | Efficient Channel Coding, Inc. | Block decoding with soft output information |
| US5907582A (en) * | 1997-08-11 | 1999-05-25 | Orbital Sciences Corporation | System for turbo-coded satellite digital audio broadcasting |
| US6145114A (en) * | 1997-08-14 | 2000-11-07 | Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through Communications Research Centre | Method of enhanced max-log-a posteriori probability processing |
| FR2778289B1 (en) * | 1998-05-04 | 2000-06-09 | Alsthom Cge Alcatel | ITERATIVE DECODING OF PRODUCT CODES |
| JP2002526965A (en) * | 1998-09-28 | 2002-08-20 | アドバンスト ハードウェア アーキテクチャーズ,インコーポレイテッド | Turbo product code decoder |
| US6367047B1 (en) * | 1998-10-20 | 2002-04-02 | Ecrix | Multi-level error detection and correction technique for data storage recording device |
| US6484283B2 (en) * | 1998-12-30 | 2002-11-19 | International Business Machines Corporation | Method and apparatus for encoding and decoding a turbo code in an integrated modem system |
| US6499128B1 (en) * | 1999-02-18 | 2002-12-24 | Cisco Technology, Inc. | Iterated soft-decision decoding of block codes |
| US6795507B1 (en) * | 1999-09-30 | 2004-09-21 | Skyworks Solutions, Inc. | Method and apparatus for turbo decoding of trellis coded modulated signal transmissions |
| US6594318B1 (en) * | 1999-12-02 | 2003-07-15 | Qualcomm Incorporated | Method and apparatus for computing soft decision input metrics to a turbo decoder |
| US6421804B1 (en) * | 1999-12-20 | 2002-07-16 | Agere Systems Guardian Corp. | Generating reliability values for iterative decoding of block codes |
| US6526531B1 (en) * | 2000-03-22 | 2003-02-25 | Agere Systems Inc. | Threshold detection for early termination of iterative decoding |
| US6539367B1 (en) * | 2000-05-26 | 2003-03-25 | Agere Systems Inc. | Methods and apparatus for decoding of general codes on probability dependency graphs |
| JP2001358765A (en) | 2000-06-13 | 2001-12-26 | Sanyo Electric Co Ltd | Provider transfer server and provider transfer service method |
| WO2002009300A2 (en) * | 2000-07-21 | 2002-01-31 | Catena Networks, Inc. | Method and system for turbo encoding in adsl |
| US20020150167A1 (en) * | 2001-02-17 | 2002-10-17 | Victor Demjanenko | Methods and apparatus for configurable or assymetric forward error correction |
-
2001
- 2001-04-04 EP EP01964707A patent/EP1281241A2/en not_active Withdrawn
- 2001-04-04 JP JP2001573642A patent/JP2003534680A/en not_active Withdrawn
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- 2001-04-04 US US09/826,443 patent/US20020026615A1/en not_active Abandoned
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- 2004-06-30 US US10/882,576 patent/US7085987B2/en not_active Expired - Fee Related
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- 2006-01-10 US US11/329,484 patent/US7421638B2/en not_active Expired - Lifetime
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| WO2001076079A3 (en) | 2002-05-23 |
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