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AU2001257323A1 - Method and apparatus to improve context switch times in a computing system - Google Patents

Method and apparatus to improve context switch times in a computing system

Info

Publication number
AU2001257323A1
AU2001257323A1 AU2001257323A AU5732301A AU2001257323A1 AU 2001257323 A1 AU2001257323 A1 AU 2001257323A1 AU 2001257323 A AU2001257323 A AU 2001257323A AU 5732301 A AU5732301 A AU 5732301A AU 2001257323 A1 AU2001257323 A1 AU 2001257323A1
Authority
AU
Australia
Prior art keywords
computing system
context switch
switch times
improve context
improve
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001257323A
Inventor
David Emberson
Daniel S. Rice
Ashley Saulsbury
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2001257323A1 publication Critical patent/AU2001257323A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
AU2001257323A 2000-04-27 2001-04-26 Method and apparatus to improve context switch times in a computing system Abandoned AU2001257323A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US56137800A 2000-04-27 2000-04-27
US09561378 2000-04-27
PCT/US2001/013530 WO2001082059A2 (en) 2000-04-27 2001-04-26 Method and apparatus to improve context switch times in a computing system

Publications (1)

Publication Number Publication Date
AU2001257323A1 true AU2001257323A1 (en) 2001-11-07

Family

ID=24241692

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001257323A Abandoned AU2001257323A1 (en) 2000-04-27 2001-04-26 Method and apparatus to improve context switch times in a computing system

Country Status (2)

Country Link
AU (1) AU2001257323A1 (en)
WO (1) WO2001082059A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7962731B2 (en) 2005-10-20 2011-06-14 Qualcomm Incorporated Backing store buffer for the register save engine of a stacked register file
US7844804B2 (en) * 2005-11-10 2010-11-30 Qualcomm Incorporated Expansion of a stacked register file using shadow registers

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4740893A (en) * 1985-08-07 1988-04-26 International Business Machines Corp. Method for reducing the time for switching between programs
EP0519348B1 (en) * 1991-06-19 1999-07-28 Hewlett-Packard Company Co-processor supporting architecture adapted to a processor which does not natively support co-processing
US6408325B1 (en) * 1998-05-06 2002-06-18 Sun Microsystems, Inc. Context switching technique for processors with large register files

Also Published As

Publication number Publication date
WO2001082059A2 (en) 2001-11-01
WO2001082059A3 (en) 2002-04-11

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