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AU2001249575A1 - System for calibrating timing of an integrated circuit wafer tester - Google Patents

System for calibrating timing of an integrated circuit wafer tester

Info

Publication number
AU2001249575A1
AU2001249575A1 AU2001249575A AU4957501A AU2001249575A1 AU 2001249575 A1 AU2001249575 A1 AU 2001249575A1 AU 2001249575 A AU2001249575 A AU 2001249575A AU 4957501 A AU4957501 A AU 4957501A AU 2001249575 A1 AU2001249575 A1 AU 2001249575A1
Authority
AU
Australia
Prior art keywords
integrated circuit
circuit wafer
wafer tester
calibrating timing
calibrating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001249575A
Inventor
Charles A. Miller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FormFactor Inc
Original Assignee
FormFactor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FormFactor Inc filed Critical FormFactor Inc
Publication of AU2001249575A1 publication Critical patent/AU2001249575A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318385Random or pseudo-random test pattern
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31905Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • G01R31/3191Calibration

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
AU2001249575A 2000-06-20 2001-03-28 System for calibrating timing of an integrated circuit wafer tester Abandoned AU2001249575A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09598399 2000-06-20
US09/598,399 US6622103B1 (en) 2000-06-20 2000-06-20 System for calibrating timing of an integrated circuit wafer tester
PCT/US2001/010025 WO2002001234A2 (en) 2000-06-20 2001-03-28 System for calibrating timing of an integrated circuit wafer tester

Publications (1)

Publication Number Publication Date
AU2001249575A1 true AU2001249575A1 (en) 2002-01-08

Family

ID=24395393

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001249575A Abandoned AU2001249575A1 (en) 2000-06-20 2001-03-28 System for calibrating timing of an integrated circuit wafer tester

Country Status (9)

Country Link
US (2) US6622103B1 (en)
EP (1) EP1295139B1 (en)
JP (1) JP2004502174A (en)
KR (2) KR100861602B1 (en)
CN (1) CN1250979C (en)
AU (1) AU2001249575A1 (en)
DE (1) DE60121064T2 (en)
TW (1) TW512471B (en)
WO (1) WO2002001234A2 (en)

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Also Published As

Publication number Publication date
KR100794080B1 (en) 2008-01-10
US6622103B1 (en) 2003-09-16
DE60121064D1 (en) 2006-08-03
KR100861602B1 (en) 2008-10-07
EP1295139B1 (en) 2005-12-07
WO2002001234A3 (en) 2002-04-18
KR20030029062A (en) 2003-04-11
US6606575B2 (en) 2003-08-12
KR20070090263A (en) 2007-09-05
DE60121064T2 (en) 2006-11-02
CN1437711A (en) 2003-08-20
TW512471B (en) 2002-12-01
US20020049554A1 (en) 2002-04-25
WO2002001234A2 (en) 2002-01-03
JP2004502174A (en) 2004-01-22
EP1295139A2 (en) 2003-03-26
CN1250979C (en) 2006-04-12

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