AU2001248167A1 - Method and circuit for testing dc parameters of circuit input and output nodes - Google Patents
Method and circuit for testing dc parameters of circuit input and output nodesInfo
- Publication number
- AU2001248167A1 AU2001248167A1 AU2001248167A AU4816701A AU2001248167A1 AU 2001248167 A1 AU2001248167 A1 AU 2001248167A1 AU 2001248167 A AU2001248167 A AU 2001248167A AU 4816701 A AU4816701 A AU 4816701A AU 2001248167 A1 AU2001248167 A1 AU 2001248167A1
- Authority
- AU
- Australia
- Prior art keywords
- circuit
- testing
- parameters
- output nodes
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318552—Clock circuits details
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318577—AC testing, e.g. current testing, burn-in
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
- G01R31/31715—Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318577—AC testing, e.g. current testing, burn-in
- G01R31/31858—Delay testing
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/570,412 US6586921B1 (en) | 2000-05-12 | 2000-05-12 | Method and circuit for testing DC parameters of circuit input and output nodes |
| US09570412 | 2000-05-12 | ||
| PCT/CA2001/000450 WO2001086314A2 (en) | 2000-05-12 | 2001-04-03 | Method and circuit for testing dc parameters of circuit input and output nodes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001248167A1 true AU2001248167A1 (en) | 2001-11-20 |
Family
ID=24279545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001248167A Abandoned AU2001248167A1 (en) | 2000-05-12 | 2001-04-03 | Method and circuit for testing dc parameters of circuit input and output nodes |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6586921B1 (en) |
| EP (1) | EP1307754A2 (en) |
| JP (1) | JP2003532902A (en) |
| AU (1) | AU2001248167A1 (en) |
| CA (1) | CA2406619A1 (en) |
| WO (1) | WO2001086314A2 (en) |
Families Citing this family (51)
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| DE10109558C1 (en) * | 2001-02-28 | 2003-01-30 | Siemens Ag | Additional circuit on the receiver side for the boundary scan during data transmission with differential signals |
| US6777970B2 (en) * | 2001-04-19 | 2004-08-17 | Intel Corporation | AC testing of leakage current in integrated circuits using RC time constant |
| WO2004044601A1 (en) * | 2002-11-14 | 2004-05-27 | Logicvision, Inc. | Boundary scan with strobed pad driver enable |
| US7337160B2 (en) * | 2002-12-31 | 2008-02-26 | Bae Systems Information And Electronic Systems Integration Inc. | Use of radiation-hardened chalcogenide technology for spaceborne reconfigurable digital processing systems |
| US6907377B2 (en) * | 2003-03-31 | 2005-06-14 | Intel Corporation | Method and apparatus for interconnect built-in self test based system management performance tuning |
| US7088091B2 (en) * | 2003-08-14 | 2006-08-08 | Intel Corporation | Testing a multi-channel device |
| TWI225933B (en) * | 2003-09-01 | 2005-01-01 | Faraday Tech Corp | Universal test platform and test method for latch-up |
| US7453255B2 (en) * | 2003-11-20 | 2008-11-18 | Logicvision, Inc. | Circuit and method for measuring delay of high speed signals |
| US7002365B2 (en) * | 2003-12-30 | 2006-02-21 | Intel Corporation | Method and an apparatus for testing transmitter and receiver |
| US6963212B2 (en) * | 2004-03-23 | 2005-11-08 | Agilent Technologies, Inc. | Self-testing input/output pad |
| DE102004025984A1 (en) * | 2004-05-26 | 2005-12-15 | Sms Demag Ag | Method and device for assembly and functional testing of rolling fittings in rolling mills or in rolling mills, such as tandem rolling mills |
| WO2006117588A1 (en) * | 2005-05-04 | 2006-11-09 | Freescale Semiconductor, Inc. | An integrated circuit and a method for designing a boundary scan super-cell |
| US7616036B1 (en) | 2005-09-12 | 2009-11-10 | Virage Logic Corporation | Programmable strobe and clock generator |
| US7519888B2 (en) * | 2005-09-12 | 2009-04-14 | Virage Logic Corporation | Input-output device testing |
| US7265696B2 (en) * | 2005-11-10 | 2007-09-04 | International Business Machines Corporation | Methods and apparatus for testing an integrated circuit |
| US7511526B2 (en) * | 2006-08-23 | 2009-03-31 | Munt Kenneth A | Circuit module testing apparatus and method |
| US7411407B2 (en) * | 2006-10-13 | 2008-08-12 | Agilent Technologies, Inc. | Testing target resistances in circuit assemblies |
| US20080231310A1 (en) * | 2006-10-20 | 2008-09-25 | Stmicroelectronics Pvt. Ltd. | Flexible on chip testing circuit for i/o's characterization |
| US7698610B2 (en) * | 2007-07-25 | 2010-04-13 | Freescale Semiconductor, Inc. | Techniques for detecting open integrated circuit pins |
| JP2009048674A (en) * | 2007-08-14 | 2009-03-05 | Nec Electronics Corp | Semiconductor integrated circuit |
| US7973563B2 (en) * | 2008-02-15 | 2011-07-05 | Silicon Labs Spectra, Inc. | Programmable IO architecture |
| EP2113779A1 (en) | 2008-04-30 | 2009-11-04 | Nxp B.V. | Testable integrated circuit and integrated circuit test method |
| US7839155B2 (en) * | 2008-12-15 | 2010-11-23 | Texas Instruments Incorporated | Methods and apparatus to analyze on-chip controlled integrated circuits |
| US8572433B2 (en) | 2010-03-10 | 2013-10-29 | Texas Instruments Incorporated | JTAG IC with commandable circuit controlling data register control router |
| KR101110792B1 (en) * | 2009-07-02 | 2012-03-16 | 주식회사 하이닉스반도체 | Semiconductor device and its driving method |
| US8489947B2 (en) * | 2010-02-15 | 2013-07-16 | Mentor Graphics Corporation | Circuit and method for simultaneously measuring multiple changes in delay |
| US8680874B2 (en) | 2010-07-30 | 2014-03-25 | Imec | On-chip testing using time-to-digital conversion |
| US8712718B1 (en) * | 2011-07-20 | 2014-04-29 | Xilinx, Inc. | Predicting performance of an integrated circuit |
| CN103105570B (en) * | 2013-01-23 | 2016-09-07 | 无锡华润上华科技有限公司 | The method of testing of a kind of cut-in voltage and system |
| US10545189B2 (en) | 2015-10-27 | 2020-01-28 | Nvidia Corporation | Granular dynamic test systems and methods |
| US10481203B2 (en) | 2015-04-04 | 2019-11-19 | Nvidia Corporation | Granular dynamic test systems and methods |
| ES2974290T3 (en) | 2017-11-15 | 2024-06-26 | Proteantecs Ltd | IC margin measurement and failure prediction device |
| US12282058B2 (en) | 2017-11-23 | 2025-04-22 | Proteantecs Ltd. | Integrated circuit pad failure detection |
| EP3714280B1 (en) * | 2017-11-23 | 2024-04-17 | Proteantecs Ltd. | Integrated circuit pad failure detection |
| US11740281B2 (en) | 2018-01-08 | 2023-08-29 | Proteantecs Ltd. | Integrated circuit degradation estimation and time-of-failure prediction using workload and margin sensing |
| US10670649B2 (en) * | 2018-02-02 | 2020-06-02 | Texas Instruments Incorporated | Bondwire testing of IC using pin diode signatures |
| TWI828676B (en) | 2018-04-16 | 2024-01-11 | 以色列商普騰泰克斯有限公司 | Methods for integrated circuit profiling and anomaly detection and relevant computer program products |
| EP3811246A4 (en) | 2018-06-19 | 2022-03-23 | Proteantecs Ltd. | EFFICIENT INTEGRATED CIRCUIT SIMULATION AND TEST |
| KR102660897B1 (en) * | 2019-01-11 | 2024-04-24 | 삼성전자주식회사 | Multi-chip package |
| EP4070315A4 (en) | 2019-12-04 | 2023-11-29 | Proteantecs Ltd. | MONITORING DEGRADATION OF A MEMORY DEVICE |
| CN115461632A (en) | 2020-04-20 | 2022-12-09 | 普腾泰克斯有限公司 | Die-to-die connectivity monitoring |
| IL299556A (en) | 2020-07-06 | 2023-02-01 | Proteantecs Ltd | Margin measurement in an integrated circuit for structural testing |
| EP4320497A4 (en) | 2021-04-07 | 2025-02-26 | Proteantecs Ltd. | ADAPTIVE FREQUENCY SCALING BASED ON CLOCK CYCLE TIME MEASUREMENT |
| TWI770964B (en) * | 2021-04-27 | 2022-07-11 | 華邦電子股份有限公司 | Testing circuit and testing method thereof |
| CN113848498B (en) * | 2021-08-11 | 2024-08-30 | 威凯检测技术有限公司 | Method for verifying test capability of power supply voltage slow-drop and slow-rise of road vehicle electrical and electronic equipment |
| US11815551B1 (en) | 2022-06-07 | 2023-11-14 | Proteantecs Ltd. | Die-to-die connectivity monitoring using a clocked receiver |
| CN114935729B (en) * | 2022-06-10 | 2025-04-22 | 江苏华创微系统有限公司 | A dry node-based double-sided time-sharing drive system and system fault detection method thereof |
| CN116359719B (en) * | 2023-01-09 | 2025-09-12 | 北京唯实兴邦科技有限公司 | An online monitoring and intelligent early warning method for intermittent faults of integrated circuits |
| US12013800B1 (en) | 2023-02-08 | 2024-06-18 | Proteantecs Ltd. | Die-to-die and chip-to-chip connectivity monitoring |
| US12123908B1 (en) | 2023-09-12 | 2024-10-22 | Proteantecs Ltd. | Loopback testing of integrated circuits |
| US12461143B2 (en) | 2024-01-24 | 2025-11-04 | Proteantecs Ltd. | Integrated circuit margin measurement |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4117400A (en) | 1976-04-29 | 1978-09-26 | Dynascan Corporation | Circuit for testing transistors or the like |
| US4578637A (en) | 1984-04-06 | 1986-03-25 | Signetics Corporation | Continuity/leakage tester for electronic circuits |
| US4697151A (en) | 1986-06-05 | 1987-09-29 | Analog Devices, Inc. | Method and apparatus for testing operational amplifier leakage current |
| US5371457A (en) | 1991-02-12 | 1994-12-06 | Lipp; Robert J. | Method and apparatus to test for current in an integrated circuit |
| US5323107A (en) | 1991-04-15 | 1994-06-21 | Hitachi America, Ltd. | Active probe card |
| US5402072A (en) | 1992-02-28 | 1995-03-28 | International Business Machines Corporation | System and method for testing and fault isolation of high density passive boards and substrates |
| US6101457A (en) * | 1992-10-29 | 2000-08-08 | Texas Instruments Incorporated | Test access port |
| US5477545A (en) * | 1993-02-09 | 1995-12-19 | Lsi Logic Corporation | Method and apparatus for testing of core-cell based integrated circuits |
| US5670890A (en) * | 1993-04-22 | 1997-09-23 | Lsi Logic Corporation | Switchable pull-ups and pull-downs for IDDQ testing of integrated circuits |
| US5428297A (en) | 1993-06-15 | 1995-06-27 | Grace; James W. | Precision integrated resistors |
| DE4422264A1 (en) | 1994-06-24 | 1996-01-04 | Philips Patentverwaltung | Circuit arrangement for monitoring a circuit point for a leakage resistance |
| JPH0862294A (en) * | 1994-08-25 | 1996-03-08 | Mitsubishi Electric Corp | Semiconductor device and method for testing semiconductor device |
| US6577148B1 (en) * | 1994-08-31 | 2003-06-10 | Motorola, Inc. | Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer |
| US5648973A (en) | 1996-02-06 | 1997-07-15 | Ast Research, Inc. | I/O toggle test method using JTAG |
| US5696773A (en) | 1996-04-25 | 1997-12-09 | Credence Systems Corporation | Apparatus for performing logic and leakage current tests on a digital logic circuit |
| US5621739A (en) | 1996-05-07 | 1997-04-15 | Intel Corporation | Method and apparatus for buffer self-test and characterization |
| US5642364A (en) | 1996-06-28 | 1997-06-24 | Hughes Electronics | Contactless testing of inputs and outputs of integrated circuits |
| US5789933A (en) | 1996-10-30 | 1998-08-04 | Hewlett-Packard Co. | Method and apparatus for determining IDDQ |
| US5815043A (en) | 1997-02-13 | 1998-09-29 | Apple Computer, Inc. | Frequency controlled ring oscillator having by passable stages |
| JPH1183952A (en) | 1997-09-12 | 1999-03-26 | Fujitsu Ltd | Electronic circuit test method and test apparatus |
| US6000051A (en) | 1997-10-10 | 1999-12-07 | Logic Vision, Inc. | Method and apparatus for high-speed interconnect testing |
| US6158032A (en) * | 1998-03-27 | 2000-12-05 | International Business Machines Corporation | Data processing system, circuit arrangement and program product including multi-path scan interface and methods thereof |
| US6286119B1 (en) * | 1998-12-22 | 2001-09-04 | Nortel Networks Limited | Delay fault testing with IEEE 1149.1 |
-
2000
- 2000-05-12 US US09/570,412 patent/US6586921B1/en not_active Expired - Lifetime
-
2001
- 2001-04-03 CA CA002406619A patent/CA2406619A1/en not_active Abandoned
- 2001-04-03 EP EP01921052A patent/EP1307754A2/en not_active Withdrawn
- 2001-04-03 WO PCT/CA2001/000450 patent/WO2001086314A2/en not_active Ceased
- 2001-04-03 AU AU2001248167A patent/AU2001248167A1/en not_active Abandoned
- 2001-04-03 JP JP2001583206A patent/JP2003532902A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CA2406619A1 (en) | 2001-11-15 |
| WO2001086314A2 (en) | 2001-11-15 |
| US6586921B1 (en) | 2003-07-01 |
| EP1307754A2 (en) | 2003-05-07 |
| WO2001086314A3 (en) | 2002-05-10 |
| JP2003532902A (en) | 2003-11-05 |
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