AU2001240083A1 - Method and apparatus for timing-dependent transfers using fifos - Google Patents
Method and apparatus for timing-dependent transfers using fifosInfo
- Publication number
- AU2001240083A1 AU2001240083A1 AU2001240083A AU4008301A AU2001240083A1 AU 2001240083 A1 AU2001240083 A1 AU 2001240083A1 AU 2001240083 A AU2001240083 A AU 2001240083A AU 4008301 A AU4008301 A AU 4008301A AU 2001240083 A1 AU2001240083 A1 AU 2001240083A1
- Authority
- AU
- Australia
- Prior art keywords
- fifos
- timing
- transfers
- dependent
- dependent transfers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 230000001419 dependent effect Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/538,386 US6928494B1 (en) | 2000-03-29 | 2000-03-29 | Method and apparatus for timing-dependant transfers using FIFOs |
| US09538386 | 2000-03-29 | ||
| PCT/US2001/007219 WO2001073540A2 (en) | 2000-03-29 | 2001-03-06 | METHOD AND APPARATUS FOR TIMING-DEPENDENT TRANSFERS USING FIFOs |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001240083A1 true AU2001240083A1 (en) | 2001-10-08 |
Family
ID=24146713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001240083A Abandoned AU2001240083A1 (en) | 2000-03-29 | 2001-03-06 | Method and apparatus for timing-dependent transfers using fifos |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6928494B1 (en) |
| AU (1) | AU2001240083A1 (en) |
| TW (1) | TW563019B (en) |
| WO (1) | WO2001073540A2 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7466174B2 (en) | 2006-03-31 | 2008-12-16 | Intel Corporation | Fast lock scheme for phase locked loops and delay locked loops |
| EP2062064A1 (en) * | 2006-08-31 | 2009-05-27 | Nxp B.V. | Multi-clock system-on-chip with universal clock control modules for transition fault test at speed multi-core |
| US8140712B2 (en) * | 2009-07-17 | 2012-03-20 | Sandforce, Inc. | System, method, and computer program product for inserting a gap in information sent from a drive to a host device |
| US8516166B2 (en) * | 2009-07-20 | 2013-08-20 | Lsi Corporation | System, method, and computer program product for reducing a rate of data transfer to at least a portion of memory |
| US8560796B2 (en) * | 2010-03-29 | 2013-10-15 | Freescale Semiconductor, Inc. | Scheduling memory access requests using predicted memory timing and state information |
| US8572322B2 (en) * | 2010-03-29 | 2013-10-29 | Freescale Semiconductor, Inc. | Asynchronously scheduling memory access requests |
| US20130117543A1 (en) * | 2011-11-04 | 2013-05-09 | Advanced Micro Devices, Inc. | Low overhead operation latency aware scheduler |
| US20130275709A1 (en) * | 2012-04-12 | 2013-10-17 | Micron Technology, Inc. | Methods for reading data from a storage buffer including delaying activation of a column select |
| JP7703473B2 (en) | 2022-03-18 | 2025-07-07 | キオクシア株式会社 | Semiconductor memory device |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5175732A (en) * | 1991-02-15 | 1992-12-29 | Standard Microsystems Corp. | Method and apparatus for controlling data communication operations within stations of a local-area network |
| JPH08272738A (en) * | 1995-03-30 | 1996-10-18 | Nec Corp | Compensation system for recovery time of microprocessor system |
| JPH08315567A (en) * | 1995-05-22 | 1996-11-29 | Mitsubishi Electric Corp | Semiconductor memory device |
| KR100218734B1 (en) * | 1996-05-06 | 1999-09-01 | 김영환 | Method and device for generating internal pulse signal of synchronomic memory |
| US5758131A (en) * | 1996-09-11 | 1998-05-26 | Hewlett-Packard Company | Bus adapter for synchronizing communications between two circuits running at different clock rates |
| US5987594A (en) * | 1997-06-25 | 1999-11-16 | Sun Microsystems, Inc. | Apparatus for executing coded dependent instructions having variable latencies |
| US5953689A (en) * | 1998-03-12 | 1999-09-14 | Emc Corporation | Benchmark tool for a mass storage system |
| US6092129A (en) * | 1998-04-13 | 2000-07-18 | Sandcraft, Inc. | Method and apparatus for communicating signals between circuits operating at different frequencies |
| US6192446B1 (en) * | 1998-09-03 | 2001-02-20 | Micron Technology, Inc. | Memory device with command buffer |
| US6418518B1 (en) * | 1998-09-18 | 2002-07-09 | National Semiconductor Corporation | Decoupled address and data access to an SDRAM |
| US6385708B1 (en) * | 1998-11-16 | 2002-05-07 | Infineon Technologies Ag | Using a timing-look-up-table and page timers to determine the time between two consecutive memory accesses |
| US6370600B1 (en) * | 1999-05-25 | 2002-04-09 | Advanced Micro Devices, Inc. | Staging buffer for translating clock domains when source clock frequency exceeds target clock frequency |
-
2000
- 2000-03-29 US US09/538,386 patent/US6928494B1/en not_active Expired - Fee Related
-
2001
- 2001-02-16 TW TW090103604A patent/TW563019B/en active
- 2001-03-06 AU AU2001240083A patent/AU2001240083A1/en not_active Abandoned
- 2001-03-06 WO PCT/US2001/007219 patent/WO2001073540A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| TW563019B (en) | 2003-11-21 |
| US6928494B1 (en) | 2005-08-09 |
| WO2001073540A3 (en) | 2002-03-07 |
| WO2001073540A2 (en) | 2001-10-04 |
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