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ATE334535T1 - EXCHANGE WITH VIRTUAL SHARED MEMORY - Google Patents

EXCHANGE WITH VIRTUAL SHARED MEMORY

Info

Publication number
ATE334535T1
ATE334535T1 AT01308479T AT01308479T ATE334535T1 AT E334535 T1 ATE334535 T1 AT E334535T1 AT 01308479 T AT01308479 T AT 01308479T AT 01308479 T AT01308479 T AT 01308479T AT E334535 T1 ATE334535 T1 AT E334535T1
Authority
AT
Austria
Prior art keywords
switch
exchange
expansion
shared memory
virtual shared
Prior art date
Application number
AT01308479T
Other languages
German (de)
Inventor
Michael Sokol
Sheng Feng William Chien
Original Assignee
Altima Communications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altima Communications Inc filed Critical Altima Communications Inc
Application granted granted Critical
Publication of ATE334535T1 publication Critical patent/ATE334535T1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/29—Flow control; Congestion control using a combination of thresholds
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
    • H04L12/4633—Interconnection of networks using encapsulation techniques, e.g. tunneling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/30—Flow control; Congestion control in combination with information about buffer occupancy at either end or at transit nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/45—Arrangements for providing or supporting expansion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/103—Packet switching elements characterised by the switching fabric construction using a shared central buffer; using a shared memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/201—Multicast operation; Broadcast operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Transceivers (AREA)
  • Switches That Are Operated By Magnetic Or Electric Fields (AREA)
  • Switches With Compound Operations (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

A network of switches having a first switch having a first memory interface and a first expansion port. The network also has an expansion bus having a first expansion bus interface and a second expansion bus interface. The first expansion bus interface is connected to the first expansion port. A second switch has a second memory interface and a second expansion port. The second expansion port is connected to the second expansion bus interface, thereby connecting the first switch to the second switch, wherein the expansion bus allows the first switch to directly access the second memory interface through the second switch and the second switch to directly access the first memory interface through the first switch.
AT01308479T 2000-10-03 2001-10-03 EXCHANGE WITH VIRTUAL SHARED MEMORY ATE334535T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US23776400P 2000-10-03 2000-10-03
US09/827,175 US7120155B2 (en) 2000-10-03 2001-04-06 Switch having virtual shared memory

Publications (1)

Publication Number Publication Date
ATE334535T1 true ATE334535T1 (en) 2006-08-15

Family

ID=26931018

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01308479T ATE334535T1 (en) 2000-10-03 2001-10-03 EXCHANGE WITH VIRTUAL SHARED MEMORY

Country Status (3)

Country Link
US (1) US7120155B2 (en)
AT (1) ATE334535T1 (en)
DE (1) DE60121727T2 (en)

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DE60103331T2 (en) * 2000-07-05 2004-09-23 Roke Manor Research Ltd., Romsey Method of operating a packet reassembly buffer and network router
US7420977B2 (en) * 2000-10-03 2008-09-02 Broadcom Corporation Method and apparatus of inter-chip bus shared by message passing and memory access
US7466668B2 (en) * 2001-08-24 2008-12-16 Hewlett-Packard Development Company, L.P. Reduced pin-count system interface for gigabit ethernet physical layer devices
US20130318269A1 (en) 2012-05-22 2013-11-28 Xockets IP, LLC Processing structured and unstructured data using offload processors
US20130318084A1 (en) 2012-05-22 2013-11-28 Xockets IP, LLC Processing structured and unstructured data using offload processors
US9378161B1 (en) 2013-01-17 2016-06-28 Xockets, Inc. Full bandwidth packet handling with server systems including offload processors
US9250954B2 (en) 2013-01-17 2016-02-02 Xockets, Inc. Offload processor modules for connection to system memory, and corresponding methods and systems
WO2017209669A1 (en) * 2016-06-02 2017-12-07 Telefonaktiebolaget Lm Ericsson (Publ) Method and network node for handling sctp packets

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Also Published As

Publication number Publication date
US20020181450A1 (en) 2002-12-05
DE60121727D1 (en) 2006-09-07
DE60121727T2 (en) 2007-08-23
US7120155B2 (en) 2006-10-10

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