NL2013288B1 - Low-temperature formation of silicon and silicon oxide structures. - Google Patents

Abstract

A method for low-temperature formation of a silicon/silicon-oxide structure on a substrate is described wherein the method comprises: forming a first (poly)silane layer over at least part of a substrate; transforming said first (poly)silane layer directly into a (crystalline) silicon layer by exposing said first (poly)silane layer to UV radiation comprising one or more wavelengths within the range between 100 and 450 nm; forming a second (poly)silane layer over at least part of said substrate; and, transforming said second (poly)silane layer directly into a silicon oxide layer by exposing said second (poly)silane layer to oxygen and/or ozone and to UV light comprising one or more wavelengths within the range between 100 and 450 nm.

Description

Low-temperature formation of silicon and silicon oxide structures

Field of the invention

The invention relates to low-temperature formation of silicon and silicon oxide structures, and, in particular, though not exclusively, to low-temperature methods for forming silicon and silicon oxide structures on the basis of liquid polysilanes .

Background of the invention A promising technique for producing flexible electronics is the so-called roll-to-roll (R2R) fabrication technique (also known as web processing or reel-to-reel processing) wherein thin-films are deposited on a flexible (plastic) substrate and processed into electrical components in a continuous way. In an R2R process printing techniques (e.g. imprint, inkjet, or screen printing) and coating techniques (e.g. roll, slit coating or spray coating) are used in order to achieve high-throughput, low-cost manufacture of semiconducting devices, including photovoltaic cells and TFT circuitry for displays. Such techniques include the use of inks, i.e. liquid semiconductor, metal and dielectric precursors, which can be deposited on the substrate using a simple coating or printing technique. This way, flexible electronics may be fabricated at a fraction of the cost of traditional semiconductor manufacturing methods.

In order to realize flexible electronics for high-performance applications, such as UHF RFIDs and flexible displays, low-cost and high-throughput formation of high-mobility thin-film semiconductor layers on a flexible substrate is required. Further, the manufacturing process should support formation of structures having small feature size and high alignment accuracy. Commercially interesting candidates for a flexible plastic substrate material include polyethylene naphthalate (PEN) and polyethylene terephthalate (PET). These materials are low-cost materials with a high optical transparency and chemically compatible with most semiconductor processes. The maximum processing temperatures of these materials are however relatively low approximately (approx. 200°C for PEN and 120°C for PET).

Several liquid-based techniques for forming a semiconducting coating on a substrate are known. Organic semiconductor materials may be used in a low-temperature deposition technique in order to realize "plastic" TFT circuitry for LCD applications or "plastic" photovoltaic cells. However, the electron mobility and reliability of these organic semiconductors are still inferior to their amorphous silicon counterparts (approx. 1 cm2/Vs) so that integration of peripheral driver and control circuits is difficult to achieve. Alternatively, amorphous metal-oxide semiconductors like In-Ga-Zn-0 (a-IGZO) may be formed on a plastic substrate using a low-temperature solution-based process. Although, the electron mobility of an a-IGZO layer is higher than a-Si, it is still limited to 20 cm2/Vs. Furthermore, the hole mobility is very low so that p-type metal-oxide semiconductor TFTs cannot be made. The inability to realize circuitry in a CMOS configuration poses a serious limitation on the use of this material in commercial applications. Hence, in summary, plastic and a-IGZO semiconducting materials are still substantially inferior to (poly) crystalline silicon / silicon oxide structures that offer highly stable electrical properties and sufficiently high mobility (> 100 cm2/Vs) for electronics applications.

Techniques for liquid-based formation of silicon and silicon dioxide are known. For example, US 6,541,354, EP1284306 and US2003/0229190 describe processes for forming silicon films using a solution containing a cyclic silane compound such as cyclopentasilane (CPS) and a solvent. Typically, the solution is spin-coated onto a substrate and subjected to a drying step in order to remove the solvent. Thereafter, a combined UV treatment and annealing step of the coated substrate at a temperature of around 300 °C is used to transform the coating layer in 30 minutes into an amorphous silicon layer. A further annealing step at 800 °C or exposure of the amorphous silicon layer to laser light may covert the amorphous layer into a poly-crystalline layer. EP1284306 also describes the formation of a silicon dioxde layer by oxidizing a polysilane coating by baking a polysilane coated substrate in an oxygen-environment at a high temperature. Similarly, Tanaka et. al. describe in their article "Solution-processed Si02 films using hydrogenated polysilane based liquid materials" SID Symposium Digest of Technical Papers, Vol. 38, p. 188-191, May 2007 describe a process wherein Si02 films are formed on the basis of CPS by backing CPS coatings at temperatures at 410 °C. The temperature for forming silicon and silicon dioxide layers on the basis of the liquid-based processes that are known in the prior art are is too high for plastic substrate materials such as PET and PEN.

Hence, there is a need for in the art for fast and efficient low-temperature formation of silicon and silicon dioxide layers using a liquid silicon precursor. In particular, there is a need in the art for efficient low temperature formation of amorphous, microcrystalline and polycrystalline layers on plastic substrates using a liquid-based process .

Summary of the invention

It is an objective of the invention to reduce or eliminate at least one of the drawbacks known in the prior art. In a first aspect the invention may relate a method for low-temperature formation of a silicon/silicon-oxide structure on a substrate comprising: forming a first (poly)silane layer over at least part of a substrate; transforming said first (poly)silane layer directly into a (crystalline) silicon layer by exposing said first (poly)silane layer to UV radiation comprising one or more wavelengths within the range between 100 and 450 nm; forming a second (poly)silane layer over at least part of said substrate; and, transforming said second (poly)silane layer directly into a silicon oxide layer by exposing said second (poly)silane layer to oxygen and/or ozone and to UV light comprising one or more wavelengths within the range between 100 and 450 nm.

In an embodiment, said UV light may be generated by one or more UV light sources, wherein the energy density and/or irradiance of said one or more UV light sources may be selected such that said direct transformation of said first and/or second (poly)silane layer takes place without the need of a substrate heating step for transforming at least part of said first or second (poly)silane into amorphous silicon or amorphous silicon oxide respectively.

It has been surprisingly found that one or more layers of silane compounds (e.g. coating of one or more silane compounds) can be directly transformed by UV light into silicon without thermally annealing the substrate (either before or during the transformation) in order to transform the (poly)silane layers in amorphous silicon or amorphous silicon oxide .

Direct transformation of the (poly)silane into silicon is achieved by exposing the layer to UV laser pulses of a predetermined energy density or to UV LED light of a predetermined irradiance. Because the (poly)silane is directly transformed into crystalline silicon the substrate does not need to be subjected to (substrate) annealing temperatures that are higher than the maximum handling temperature of plastic substrates such as polyamide, PEN or PET. The process does not require high-vacuum conditions and are compatible with roll-to-roll processing.

In an embodiment, said second (poly)silane may be formed over at least part of said (crystalline) silicon layer. In another embodiment, said first (poly)silane may be formed over at least part of said silicon oxide layer. Hence, silicon/silicon oxide multilayer structures may be simply formed by the formation of one or more (poly)silane layers and exposing the layers to UV light.

In an embodiment transforming said first and/or second (poly)silane layer may comprise: exposing said first and/or second (poly)silane layer to light from a (pulsed) laser, preferably, a (pulsed) YAG laser, an argon laser or an excimer laser, preferably the light of said (pulsed) laser light having energy density between 20 and 1000 mJ/cm2, preferably 25 and 500 mj/cm2, more preferably between 50 and 400 mJ/cm2. The UV laser based process allows very fast (single pulse) transformation of the polysilane coating directly into a silicon coating.

In an embodiment, transforming said first and/or second (poly)silane layer comprises: exposing said first and/or (poly)silane layer to light from a LED array, preferably the light of said a LED array having an irradiance selected between 10 and 1000 mW/cm2, preferably 20 and 800 mW/cm2, more preferably between 40 and 400 mW/cm2. The UV LED based process allows a simple and cheap way of transforming the polysilane coating directly into a silicon coating.

In an embodiment, the exposure to oxygen and/or ozone and to light is selected such that said second (poly)silane layer is transformed in a silicon-rich silicon oxide layer.

In an embodiment, the method may further comprise: exposing said silicon-rich silicon oxide layer to light from a (pulsed) UV laser for forming silicon nanoparticles in said silicon oxide layer, preferably said light being generated by a (pulsed) YAG laser, an argon laser or an excimer laser and/or said light having energy density between 20 and 1000 mj/cm2, preferably 25 and 500 mJ/cm2, more preferably between 50 and 400 mJ/cm2. Hence, the process allows low-temperature formation of silicon nanoparticles that are embedded in a silicon oxide. Such silicon - silicon-oxide structures may be advantageously used in semiconductor devices such as memory cells and/or optical coatings such as anti-reflection coatings (ARC).

In an embodiment, the thickness of said first or second (poly)silane layer is selected such that when exposed to said light said first or second (poly)silane layer is transformed in a layer of (crystalline) silicon nanoparticles, preferably the size of the particles and the nanoparticle density being controlled by selecting thickness of the (poly)silane layer between 10 and 100 nm.

In an embodiment, said (poly)silane layer may comprise a silane compound defined by the general formula SinXm, wherein X is a hydrogen; n is an integer of 5 or greater, preferably an integer between 5 and 20; and m is an integer equal to n, 2n-2, 2n or 2n+l; more preferably said liquid silane compound comprising cyclopentasilane (CPS) and/or cyclohexasilane.

In an embodiment, said (poly)silane layer may comprise a silane compound defined by the general formula SiiXjYp, wherein X represents a hydrogen atom and/or halogen atom and Y represents an boron atom or a phosphorus atom; wherein i represents an integer of 3 or more; j represents an integer selected from the range defined by i and 2i+p+2; and, p represents an integer selected from the range defined by 1 and I; or,

In an embodiment, said (poly)silane layer may comprises neopentasilane.

In an embodiment said (poly)silane layer may be formed on said substrate by applying a substantially pure liquid (poly)silane on said substrate.

In an embodiment, the substrate may be solid-state substrate including a semiconductor substrate (e.g. silicon) or a glass substrate. In another embodiment, the substrate may be a flexible substrate. Suitable materials for flexible substrates may include metals, plastics, paper (cellulose-based materials, woven and non-woven fibre-based materials. Preferably the plastic material may comprise polyimide, PEN or PET or derivatives thereof.

The (poly)silane is directly transformed into crystalline silicon or silcon oxide so that the substrate does not need to be subjected to annealing temperatures that are higher than the maximum handling temperature of substrate materials. This way, solution-based formation of crystalline silicon layers on plastic substrates with relatively low handling temperatures such as polyamide, PEN or PET is realized.

In an embodiment said first and/or second (poly)silane layer may be formed over said substrate using at a printing technique, preferably ink jet printing, gravure printing, screen printing, flexographic/letterpress printing and/or offset printing; or, coating technique, preferably doctor blade coating, slot die coating, roller coating, dip coating and/or air knife coating.

In an aspect, the invention may relate to a method of forming silicon on a substrate comprising: forming a (poly)silane layer over a substrate; transforming said (poly)silane layer into a (crystalline) silicon layer by exposing said first (poly)silane layer to UV light comprising one or more wavelengths within the range between 100 and 450 nm.

In an embodiment, the UV light is generated by a UV light sources wherein the energy density and/or irradiance of said UV light source may be selected such that the first and second (poly)silane layers are directly transformed into silicon and silicon oxide respectively without the need for heating the substrate temperature to temperatures higher than 300 °C, preferably higher 250 °C, more preferably higher 200 °C, even more preferably without heating the temperature of the substrate.

In another aspect, the invention may relate to a method of forming silicon oxide on a substrate comprising: forming a (poly)silane layer over a substrate; transforming said (poly)silane layer into a (crystalline) silicon oxide layer by exposing said second (poly)silane layer to oxygen and/or ozone and to UV light comprising one or more wavelengths within the range between 100 and 450 nm.

In an embodiment, the UV light is generated by an UV light source wherein the energy density and/or irradiance of said UV light source is selected such that the transformation of said (poly)silane layer takes place without the need for heating the substrate temperature to temperatures higher than 300 °C, preferably higher 250 °C, more preferably higher 200 °C, even more preferably without heating the temperature of the substrate.

In a further aspect, the invention may relate to a method of forming a silicon on a substrate comprising: forming a (poly)silane layer over a substrate; transforming said first (poly)silane layer into a (crystalline) silicon layer by exposing said first (poly)silane layer to an UV LED light source, said light source generating one or more wavelengths within the range between 100 and 400 nm, preferably between 200 and 400 nm; wherein said transformation takes places without heating the substrate temperature.

In an embodiment, said UV LED light source comprises an UV LED array, preferably the light of said a LED array having an irradiance selected between 10 and 1000 mW/cm2, preferably 20 and 800 mW/cm2, more preferably between 40 and 400 mW/cm2.

In a yet a further aspect, the invention may relate to a method of forming a crystalline silicon layer on flexible cellulose substrate comprising: forming a (poly)silane layer over said substrate; transforming said first (poly)silane layer into a (crystalline) silicon layer by exposing said first (poly)silane layer to light from a (pulsed) laser, preferably, a (pulsed) YAG laser, an argon laser or an excimer laser, the light of said (pulsed) laser having energy density between 20 and 1000 mJ/cm2, preferably 25 and 500 mJ/cm2, more preferably between 50 and 400 mJ/cm2.

In a further aspect, the invention may relate to a method of forming nano-dots embedded in a silicon-oxide layer comprising: forming a (poly)silane layer over a substrate; transforming said (poly)silane layer into a silicon-rich silicon oxide layer by exposing said second (poly)silane layer to oxygen and/or ozone and to light comprising one or more wavelengths within the range between 100 400 nm; wherein the substrate temperature during said transformation of said (poly)silane layer is kept below 300 °C, preferably below 250 °C, more preferably below 200 °C, even more preferably at room temperature .

In an aspect, the invention may relate to the use of the methods described above, in the manufacturer of a semiconducting device, preferably a thin-film transistor, a memory cell or a photovoltaic cell.

In an embodiment, the invention may relate to the use of the method described above in the manufacturer of an optical coating.

The invention will be further illustrated with reference to the attached drawings, which schematically will show embodiments according to the invention. It will be understood that the invention is not in any way restricted to these specific embodiments.

Brief description of the drawings

Fig. 1A-1C depict a low-temperature process for liquid-based formation of silicon layer according to an embodiment of the invention.

Fig. 2A-2C depict AFM measurements and a Raman spectrum of a poly-silicon thin film has have been fabricated using low-temperature processes according to various embodiments of the invention.

Fig. 3A-3D depict Raman spectra of poly-silicon thin films that have been fabricated using solution-based silicon formation processes according to various embodiments of the invention .

Fig. 4 depicts a photo of flexible cellulose substrate comprising a polycrystalline silicon coating that is formed using solution-based silicon formation processes according to an embodiment of the invention.

Fig. 5A-5C low-temperature solution-based process for the formation of silicon/silicon-oxide structures on a substrate .

Fig. 6A and 6B depicts experimental data of the real part of the dielectric function of silicon oxide layers.

Fig. 7A-7C depicts a low-temperature solution-based process for the formation of silicon nanoparticles according to an embodiment of the invention.

Fig. 8A-8F depicts low-temperature solution-based process for the formation of silicon/silicon-oxide structures according to an embodiment of the invention.

Fig. 9A-9H depicts low-temperature solution-based process for the formation of silicon/silicon-oxide structures according to another embodiment of the invention.

Fig. 10 depicts the use of silicon nanoparticles embedded in the gate insulator of a transistor.

Detailed description

Fig. 1A-1C depict a low-temperature process for liquid-based formation of silicon layer according to an embodiment of the invention. As shown in Fig. 1A, a substrate 102, may be coated with a liquid silane compound 104 using suitable coating technique, e.g. a doctor-blade coating technique in a low-oxygen environment (below 10 ppm, more preferably below 1 ppm) wherein a doctor blade 106 for smoothly applying a silane coating on the top surface of the substrate. Instead of doctor blade coating other coating techniques including e.g. slot die coating, roller coating, dip coating, air knife coating, etc. may be used to apply the silane on the substrate. Alternatively, a printing technique such gravure printing, screen printing, flexographic/letterpress printing and/or offset printing may be used to apply a silane layer the substrate. Preferably, the substrate may comprise a flexible plastic substrate material including for example a polyamide, polyethylene naphthalate (PEN) and/or polyethylene terephthalate (PET). Alternatively, the substrate may comprise a flexible substrate material including cellulose-based material and/or a (woven or a non-woven) fibre-based material.

In an embodiment, the liquid silane may comprise cyclopentasilane (CPS) SisHio. In an embodiment, the CPS may be irradiated with UV radiation for a predetermined time. The UV radiation may be used in order to break the CPS rings and to transform at least part of the CPS in (low-order) polysilanes, which are soluble in the CPS. Hence, by UV irradiating the CPS coating a coating may be formed comprising polysilane or a mixture of polysilane and CPS (a cyclic silane). For the purpose of this disclosure, a polysilane coating or a mixed polysilane-cyclic silane coating will be referred to as a polysilane coating.

In an embodiment, the CPS may be irradiated with an UV light having an intensity selected between 1 and 100 mW, preferably between 2 and 50 mW, more preferably between 5 and 20 mW. Depending on the selected intensity and the desired degree of polymerization, the coating may be exposed to UV light for a period between 1 and 100 minutes, preferably between 2 and 50 minutes, more preferably between 5 and 40 minutes. The polymerization process transforms the CPS into a polysilane coating or a mixed polysilane-CPS coating that is more viscous and more stable for handing in subsequent processing steps. Moreover, the formation of polysilane increases the boiling temperature of the coating so that the coating can be annealed at temperatures higher than the boiling temperature of CPS (around 194 °C) .

The thickness of the polysilane thin-film layers may be selected between 50 and 5000 nm, preferably between 50 and 4000 nm, more preferably between 50 and 2000 nm or between 50 and 1000 nm.

While the examples in this application are described with reference to cyclopentasilane (CPS) SisHio, the invention is by no limited to this material. In particular, the invention may be used with liquid semiconductor precursors comprising one or more silane compounds. In an embodiment, a silane compound may be represented by the general formula SinXm, wherein X is a hydrogen; n is preferably an integer of 5 or greater and is more preferably an integer between 5 and 20; m is preferably an integer of n, 2n-2, 2n or 2n+l; wherein part of the hydrogen may be replace by a halogen.

Examples of such silane compounds are described in detail in EP1087428, which is hereby incorporated by reference into this application. Examples of the compounds of m = 2n+2 include silane hydrides, such as trisilane, tetrasilane, pentasilane, hexasilane, and heptasilane, and substituted compounds thereof in which hydrogen atoms are partially or completely replaced with halogen atoms. Examples of m = 2n include monocyclic silicon hydride compounds, such as cyclotrisilane, cyclotetrasilane, cyclopentasilane, silylcyclopentasilane, cyclohexasilane, silylcyclohexasilane, and cycloheptasilane; and halogenated cyclic silicon compounds thereof in which hydrogen atoms are partially or completely replaced with halogen atoms, such as hexachlorocyclotrisilane, trichlorocyclotrisilane, coctachlorocyclotetrasilane, tetrachlorocyclotetrasilane, decachlorocyclopentasilane, pentachlorocyclopentasilane, dodecachlorocyclohexasilane, hexachlorocyclohexasilane, tetradecachlorocycloheptasilane, heptachlorocycloheptasilane, hexabromocyclotrisilane, tribromocyclotrisilane, pentabromocyclotrisilane, tetrabromocyclotrisilane, octabromocyclotetrasilane, tetrabromocyclotetrasilane, decabromocyclopentasilane, pentabromocyclopentasilane, dodecabromocyclohexasilane, hexabromocyclohexasilane, tetradecabromocycloheptasilane, and heptabromocycloheptasilane. Examples of compounds of m= 2n-2 include dicyclic silicon hydride compounds, such as 1,1'-biscyclobutasilane, 1,1'-biscyclopentasilane, 1,1'— biscyclohexasilane, 1,1'-biscycloheptasilane, 1,1'— cyclobutasilylcyclopentasilane, 1,1'— cyclobutasilylcyclohexasilane, 1,1'— cyclobutasilylcycloheptasilane, 1,1'— cyclopentasilylcyclohexasilane, 1,1'— cyclopentasilylcycloheptasilane, 1,1'— cyclohexasilyIcycloheptasilane, spiro[2,2]pentasilane, spiro[3,3]heptasilane, spiro[4,4]nonasilane, spiro[4,,5]decasilane, spiro[4,6]undecasilane, spiro[5,5]undecasilane, spiro[5,6]dodecasilane, and spiro[6,6]tridecasilane; substituted silicon compounds in which hydrogen atoms are partly or completely replaced with SiH3 groups or halogen atoms. Moreover, examples of compounds of m = n include polycyclic silicon hydride compounds, such as Compounds 1 to 5 represented by the following formulae, arid substituted silicon compounds thereof in which hydrogen atoms are partially or completely replaced with SiH3 groups or halogen atoms. These compounds may be used as a mixture of two or more types.

In an embodiment, the liquid silane compound may comprise a cyclic silane, such as cyclopentasilane (CPS) SisHio and/or cyclohexasilane (CHS) Si6Hi2. In another embodiment, the liquid silane compound may comprise.

In an embodiment, a substantially pure liquid silane compound or a mixture of at least two substantially pure liquid silane compounds may be used in the formation of a polysilane coating on a substrate. In an embodiment "substantially pure" may refer to a purity level of a liquid semiconducting precursor of 94%, 96%, 98% or higher than 99%.

The polysilane coating may then be transformed into a solid-state silicon layer by exposing the coating to UV light. In an embodiment, polysilane coating may be transformed directly, i.e. without any thermal annealing step, in silicon by exposing the polysilane layer to UV radiation for a predetermined time.

Fig. IB depicts a process according to an embodiment of the invention wherein a substrate 102 comprising apolysilane coating 108 is exposed to UV light originating from a UV laser system 110. The UV laser system may comprise a UV laser and an optical system 114 for focussing the laser light onto the coating.

The laser light has a wavelength selected within the UV range, preferably between 100 and 450 nm, more preferably between 200 and 400 nm. Examples of such UV laser include but are not limited to excimer lasers, YAG lasers, argon lasers, etc. The UV laser may be configured to transmit short pulses of laser light in the UV spectrum. In an embodiment, the pulse width may be selected between 5 and 500 ns. In another embodiment, the pulses may have an energy density selected between 20 and 1000 mJ/cm2, preferably 25 and 500 mJ/cm2, more preferably between 50 and 400 mj/cm2.

Hence, in an embodiment, UV laser light pulses may be used to directly transform the polysilane into silicon Depending on the energy density, number of pulses and the pulse width the polysilane may be directly transformed into amorphous, microcrystalline, nanocrystalline and/or polycrystalline silicon.

Fig. 1C depicts a process according to an embodiment of the invention wherein a substrate 102 comprising a polysilane coating 108 is exposed to UV light originating from a UV LED array system 116. The UV LED array system may comprise a plurality of UV LEDs 118 wherein each LED or groups of LEDs may be associated with an optical lens and/or reflector system 120 such that the LED array irradiates a substantial homogenous beam of UV light of a predetermined intensity onto the substrate. In an embodiment, the UV LED array may be configured to generate UV light of an irradiance selected between 100 and 800 mW/cm2, preferably 200 and 700 mW/cm2 and the UV LED array may be positioned at a 25-100 mm distance from the substrate surface. Further, the LEDs may be configured to generate UV light in range selected between 100 and 450 nm, preferably between 200 and 400 nm.

Fig. 2A-2C depict AFM measurements and a Raman spectrum of polysilicon thin films that have been formed by exposing a polysilane coating to laser as described with reference to Fig. IB. In this particular example, the coating is irradiated with 50 laser pulses of an energy density of 250 mJ/cm2. The associated Raman spectrum shows the formation of high quality polysilicon. The AFM measurements indicate an average grain size of 124 nm and an average roughness of 23 nm.

Fig. 3A-3D show Raman spectra of silicon thin-film that are formed by a exposing a polysilane coating to a single UV laser pulse (XeCl excimer laser, 25 ns pulse width at 308 nm) for increasing energy densities: Fig. 3A shows the result of the exposure of the polysilane coating using a single shot laser pulse of 150 mJ/cm2; Fig. 3B shows the result of the exposure of the polysilane coating using a single shot laser pulse of 200 mJ/cm2; Fig. 3C shows the result of the exposure of the polysilane coating using a single shot laser pulse of 250 mJ/cm2 and Fig. 3D shows the result of the exposure of the polysilane coating using a single shot laser pulse of 300 mJ/cm2 .

The spectra show a very clear peak near 521 cnr1 indicating that polycrystalline layers are obtained by exposing a polysilane coating UV light of predetermined energy densities and/or irradiances. In an embodiment, energy densities selected between 150 and 300 mJ/cm2 may be used in order to transform the polysilane coating into crystalline silicon without any temperature annealing step before and/or during the laser exposure.

When using pulsed laser light in the UV range, the layers can be effectively transformed into solid-state silicon on the basis of only one or more very short pulses. Such laser pulses may have a pulse width within 10 - 500 ns, hence the transformation of the (poly)silane compounds occurs at a very short time-scale, thus providing a very fast process of forming silicon on the basis of a (poly)silane coating that can be simply applied to a substrate using known solution-based coating and/or printing techniques.

Similar Raman spectra were obtained when exposing polysilane coatings to UV radiation originating from an UV LED array as described with reference to Fig. 1C. In particular, the spectra show the formation of polycrystalline silicon films by exposing the polysilane coating for 20-40 minutes to an UV irradiance selected between 100 and 400 mW/cm2, preferably between 150 and 350 mW/cm2.

It has been surprisingly found that one or more layers of silane compounds (e.g. coating of one or more silane compounds) can be directly transformed by UV light into silicon without thermally annealing the substrate (either before or during the transformation). Here direct transformation implies that there is no need for a separate (intermediate) temperature anneal step for transforming the polysilicon into amorphous silicon as known from prior art processes. Direct transformation of the (poly)silane into silicon has been achieved by exposing the layer to UV laser pulses of a predetermined energy density of to UV LED light of a predetermined irradiance. Because the (poly)silane is directly transformed into crystalline silicon the substrate does not need to be subjected to annealing temperatures that are higher than the maximum handling temperature of flexible substrates such as plastic substrates made from polyamide, PEN and/or PET materials.

The UV laser based process allows very fast (single pulse) transformation of the polysilane coating directly into a silicon coating. The UV LED based process allows a simple and cheap way of transforming the polysilane coating directly into a silicon coating. In any way, both processes do not require high-vacuum conditions and are compatible with roll-to-roll processing.

The low-temperature solution-based process described with reference to Fig. 1-3 thus allows the formation of solid-state silicon (polycrystalline, nanocrystallince or microcrystalline silicon or amorphous silicon) on flexible substrates, including plastic substrates that have a relative low processing temperature (e.g. PET or PEN), a cellulose-based material and/or a (woven or a non-woven) fibre-based substrate material. For example, Fig. 4 depicts a photo of flexible cellulose (paper) substrate comprising a polycrystalline silicon coating that is formed on the substrate using the solution-based silicon formation process described above.

In this example, a paper substrate was used. Celluloid-based foils that are sold under the tradename PowerCoat™ were prepared with a polysilane coating. To that end, a CPS coating was applied directly onto the celluloid foil and exposed for 30 minutes at 100 °C to UV light in order to transform the CPS into polysilane. Thereafter UV light from a pulsed excimer-laser was used in order to transform the polysilane into silicon using similar conditions (number of shots, energy densities, pulse widths) that were used in the processes described with reference to Fig. 1-3 above.

Hence, the results above show that crystalline silicon films can be formed directly onto paper substrates thus opening a large number of new applications including direct formation of silicon structures onto paper substrates for used in a wide range of semiconductor/IC technologies (including but not limited to RFID, sensing, battery, display technologies) .

In a further embodiment, the solution-based process described above is used for forming silicon-dioxide (SiCg) films or silicon-rich silicon-oxide (SiOx x<2) thin-films on a flexible substrate. These processes are described in more detail with reference to Fig. 5A-5C.

Fig. 5A depicts a schematic of a low-temperature solution-based process for forming a silicon oxide layer according to an embodiment of the invention. In this process, polysilane may be coated onto a substrate 502 in a similar way as described with reference to Fig. 1A.

Thereafter, the polysilane coating 504 may be transformed into silicon oxide by exposing the coating to oxygen and/or ozone 505 for a predetermined time as shown in Fig. 5B. The oxidation time may be selected between 10 and 120 min, preferably between 20 and 60 min.

The oxidation process may be accelerated by heating the substrate up to a temperature that is below the maximum handling temperature of the substrate material. In an embodiment, the substrate may be heated to a temperature between 100 and 300 °C. In another embodiment, the substrate may be heated up to a temperature selected between 100 and 250 °C. In yet another embodiment, the substrate may be heated up to a temperature selected between 100 and 200 °C.

Alternatively and/or in addition, the oxidation process may be accelerated by exposing the polysilane layer to UV light of an UV source 506 during the oxidation step. In particular, during and/or after the oxidation process, the polysilane layer may be exposed to UV light. Preferably, an UV LED system as described with reference to Fig. 1C is used exposing the polysilane layer during the oxidation process.

In an embodiment, the UV LED array may be configured to generate an irradiance selected between 10 and 1000 mW/cm2, preferably 20 and 800 mW/cm2, more preferably between 40 and 400 mW/cm2. During exposure, the UV LED array may be positioned at a predetermined distance from the substrate surface. The distance may be selected between 10 and 1000 mm, preferably between 25 and 100 mm. This way a silicon oxide film may be formed wherein the atomic ration between the oxygen and silicon may be varied between 1 and 2 (i.e. SiOx 1 < x ^ 2) depending on the annealing temperature and/or the intensity of the UV light.

The process in Fig. 5A and 5B may be used to form a silicon-rich silicon oxide layer. When exposing such film to UV light, silicon nanoparticles (sometimes also referred to as nanodots) may be formed in the silicon oxide layer as shown. This is schematically shown in Fig. 5C.

Exposure of a silicon-rich silicon oxide layer (SiOx x < 2) to intense UV pulsed laser light from a laser source (in a similar way as described with reference to Fig. IB) may induce crystallization of the silicon thereby forming silicon nano-dots in a matrix of SiCb. The size of the nano-dots may be controlled by the number of pulses, the pulse width and/or energy density of the UV pules.

The formation of nanoparticles in the silicon oxide layer may be monitored using spectroscopic ellipsometry as descired in the article by Lee et. al. "optical properties of Si02/nanocrystalline Si multilayers studied using spectroscopic ellipsometry, Thin Solid Filsm 476 (2005) pp. 196-200. In this method the real part of the dielectric function <ει> may be measured and fitted to the Tauc-Lorenz model. The fitted functions may be used to estimate the volume fraction of Si nanocrystals in the S1O2.

Fig. 6A and 6B depicts experimental data of the real part of the dielectric function of silicon oxide layers (SiOx x < 2) as a function of the photon energy before (Fig. 6A) and after exposure to UV laser light (Fig. 6B). In this particular example, silicon-rich silicon oxide was prepared by exposing a 30 nm thick polysilane layer for 60 minutes to oxygen at substrate temperatures between 65 and 75 C°. The formation of silicon nanoparticles in the silicon-rich SiOx layer causes a reduction in the height of the second peak at around 4,4 eV. This way, nanoparticles of a size between 2 and 20 nm may be formed in the silicon oxide layer.

Nanoparticles embedded in a silicon oxide layer may be used for various applications. For example, a silicon oxide layer comprising nanoparticles may be used as an optical antireflection coating or as a storage medium (e.g. a flash memory). The process depicted in Fig. 5A-5C allows low-temperature formation of such nanoparticles. The formation temperature is lower than the processing temperature of flexible substrates, including plastic substrates such as PET or PEN, cellulose-based material and/or a (woven or a non-woven) fibre-based substrate material.

Fig. 7A—7C depicts a low-temperature solution-based process for the formation of silicon nanoparticles according to another embodiment of the invention. Fig. 7A depicts the formation of polysilane coating 704 on a substrate 702 using e.g. a doctor-blade 703 (similar to the process described with reference to Fig. 1A). In this particular embodiment, the thickness of the polysilane coating may have a reduced thickness between 10 and 100 nm, preferably between 20 and 50 nm. Thereafter, the thin polysilane coating is exposed for a predetermined time to UV light (Fig. 7B) originating from an UV source 706. The UV source may be laser of a LED array as described with reference to Fig. IB and 1C.

Due to the reduced thickness of the polysilane coating, isolated crystalline silicon nanoparticles 708 may formed during the UV exposure as shown in Fig. 7C. The size of the particles and the nanoparticle density may be controlled by the thickness of the polysilane layer and the energy density of the UV laser pulses or the irradiance of the UV LED array. This way nanoparticles of 5 to 50 nm may be formed on a substrate without the need of elevated substrate temperatures.

Fig. 8A-8F depicts low-temperature solution-based process for the formation of silicon/silicon-oxide structures according to an embodiment of the invention. The solution-based low temperature process may be used to fabricate silicon - silicon oxide multi-layer structure. Fig. 8A-8C show the formation of a first (poly)silicon layer 808 on a substrate 802 by coating a polysilane 804 on the substrate using e.g. a doctor blade 803 in order to form a first polysilane layer and exposing the polysilane layer to UV light 806 (similar to the solution-based low temperature process described with reference to Fig. 1A-1C). Then, a silicon oxide layer 810 may be formed over the silicon layer by coating a polysilane 807 over the first (poly)silicon layer in order to form a second polysilane layer 809. The second polysilane layer is than transformed into a silicon oxide layer by exposing the second polysilane layer to oxygen and/or ozone 814 and, optionally, to UV light 812. The silicon oxide layer may be realized in a similar way as the process described with reference to Fig. 5A-5C.

Fig. 8F depicts a further process step in case the silicon oxide layer is formed as a silicon-rich silicon oxide layer 811. In that case, silicon nanoparticles 818 may be formed in the silicon oxide layer by exposing the layer to UV light 816 in a similar way as described with reference to Fig. 5C. This way, silicon - silicon oxide multilayers may be formed using a solution-based process that does not require elevated substrate temperatures.

Fig. 9A—9H depicts low-temperature solution-based process for the formation of silicon/silicon-oxide structures according to another embodiment of the invention. In this particular example, a silicon - silicon oxide multilayer structure may be formed by coating a substrate 902 with a polysilane 904 in order to form a first polysilane layer on a substrate (Fig. 9A), transforming the first polysilane layer into a silicon layer 908 by exposing the polysilane layer to UV light 906 (Fig. 9B), coating the silicon layer with a polysilane 907 in order to form a second polysilane layer over the silicon layer (Fig. 9C) and forming a first silicon oxide layer 910 over the silicon layer by exposing the second polysilane layer to oxygen 914 and, optionally, UV light 912 (Fig. 9D).

Thereafter, nanoparticles may be formed on the silicon - silicon oxide structure in a similar way as described with reference to Fig. 7A-7C. In particular, a third thin polysilane layer may be formed over the first silicon oxide layer by coating a polysilane 916 over the first silicon oxide layer (Fig. 9E). The third thin polysilane layer 918 may be exposed to UV light in order to form silicon nanoparticles 922 on top of the first silicon oxide layer 910 (Fig. 9F and 9G) . A second silicon oxide layer 924 may be formed over the silicon nanoparticles so that the nanoparticles are located (embedded) between the first and second silicon oxide layers. The process steps may be repeated in any order in order to realize silicon - silicon oxide multilayer structures using a solution-based low-temperature fabrication technique.

Fig. 10 depicts the use of silicon nanoparticles embedded in the gate insulator of a transistor. In particular, Fig. 10 depicts the cross-section of at least part of a transistor structure 1000 on a substrate. The substrate may comprise flexible (plastic) substrate 1002 that is covered with silicon oxide layer 1004. The transistor structure may further comprise a polysilicon layer 1006. At least part of the polysilicon layer is covered by a silicon oxide layer 1008 that serves as an insulating layer for the gate metallization 1010. Parts of the polysilicon layer may be doped in order to form source and drain regions 1012i,2. The silicon oxide layer may comprise silicon nano-dots 1014 that serve as a charge trapping media which causes a shift of the threshold voltage of the transistor and which may provide the function of the flash memory. The transistor structure may be realized on the basis of the solution-based low-temperature processes described in this application.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.

It is to be understood that any feature described in relation to any one embodiment may be used alone, or in combination with other features described, and may also be used in combination with one or more features of any other of the embodiments, or any combination of any other of the embodiments. The invention is not limited to the embodiments described above, which may be varied within the scope of the accompanying claims. For example, different coating and/or printing techniques may be used to apply a polysilane layer onto a substrate. Exemplary printing techniques that may be used with the invention include gravure printing, screen printing, flexographic/letterpress printing and/or offset printing. Similarly, exemplary coating techniques that may be used include slot die coating, roller coating, dip coating, air knife coating, etc. Further, other (flexible) substrates than plastic substrates may be used as a support substrate including metallic, fibre-type (woven or non-woven) sheets, etc .

Claims (14)

24 A method for forming a silicon / silica structure on a substrate at low temperature, comprising: forming a first (poly) silane layer over at least a portion of a substrate; directly converting said first (poly) silane layer into a (crystalline) silicon layer by exposing said first (poly) silane layer to UV radiation comprising one or more wavelengths in the range between 100 and 450 nm; forming a second (poly) silane layer over at least a portion of said substrate; directly converting said second (poly) silane layer to a silicon oxide layer by exposing said second (poly) silane layer to oxygen and / or ozone and to UV light comprising one or more wavelengths in the range between 100 and 450 nm. The method of claim 1, wherein said second (poly) silane is formed over at least a portion of said (crystalline) silicon layer or wherein said first (poly) silane is formed over at least a portion of said silicon oxide layer. Method according to claims 1 or 2, wherein said UV light is generated by one or more UV light sources, wherein the energy density and / or radiation density of said one or more UV light sources is selected such that said direct conversion of said first and / or or second (poly) silane layer takes place without the need for a substrate heating step to transform at least a part of said first or second (poly) silane into amorphous silicon or amorphous silicon oxide. A method according to any of claims 1 to 3, wherein the forming of said first and / or second (poly) silane layer comprises: exposing said first and / or second (poly) silane layer to light from a (pulsed) laser , preferably a pulsed YAG laser, an argon laser or an excimer laser, wherein preferably the light from said (pulsed) laser light has an energy density between 20 and 1000 mJ / cm 2, preferably 25 and 500 mJ / cm 2, more preferably between 50 and 400 mJ / cm 2. The method according to any of claims 1 to 3, wherein said transforming said first and / or second (poly) silane layer comprises: exposing said first and / or (poly) silane layer to light from an LED array, at preferably the light of said LED series with a radiation density selected between 10 and 1000 mW / cm 2, preferably 20 and 800 mW / cm 2, more preferably between 40 and 400 mW / cm 2. The method according to any of claims 1 to 5, wherein the exposure to oxygen and / or ozone and to UV light is selected such that said second (poly) silane layer is transformed into a silicon-rich silicon oxide layer. The method of claim 6, further comprising: exposing said silicon-rich silicon oxide layer to light from a (pulsed) UV laser to form silicon nanoparticles in said silicon oxide layer, wherein said light is preferably generated by a (pulsed) YAG laser , an argon laser or an excimer laser and / or said light has an energy density between 20 and 1000 mJ / cm 2, preferably 25 and 500 mJ / cm 2, more preferably between 50 and 400 mJ / cm 2. The method of any one of claims 1 to 5, wherein the thickness of said first or second (poly) silane layer is selected such that when exposed to said UV light, said first or second (poly) silane layer is transformed into a layer of silicon nanoparticles, wherein the size of the particles and the nanoparticles is preferably controlled by selecting the thickness of the (poly) silane layer between 10 and 100 nm. The method according to any of claims 1 to 8, wherein said (poly) silane layer comprises a silane compound defined by the general formula SinXm / - wherein x is a hydrogen; n is an integer of 5 or more, preferably an integer between 5 and 20; and m is an integer equal to n, 2n-2, 2n or 2n + 1; wherein more preferably said liquid silane compound comprises cyclopentosilane (CPS) and / or cyclohexasilane; or wherein said (poly) silane layer comprises a silane compound defined by the general formula Sii X j Y p, wherein x represents a hydrogen atom and / or halogen atom and Y represents a boron atom or a phosphorus atom; wherein i represents an integer of 3 or more; j represents an integer selected from the range defined by i and 2i + p + 2; and, p represents an integer selected from the range defined by 1 and I; or wherein said (poly) silane layer comprises neopentalisane. 27 The method according to any of claims 1 to 7, wherein said (poly) silane layer is formed on said substrate by applying a substantially pure liquid (poly) silane to said substrate or by applying a mixture of a ( poly) silane and. A method according to any of claims 1 to 10, wherein said substrate is a metallic substrate, a cellulose-based (paper) substrate, a (woven) fiber-based substrate or a plastic substrate, wherein said plastic polyimide , PEN or PET or derivatives thereof. A method according to any of claims 1 to 11, wherein said first and / or second (poly) silane layer is (are) formed over said substrate using a printing technique, preferably inkjet printing, engraving printing, screen printing, flexographic printing / letterpress printing and / or offset printing; or, coating technique, preferably doctor blade coating, slot ink coating, roll coating, dip coating and / or air knife coating. Use of the method according to any of claims 1 to 12 in the manufacture of a semiconductor device, preferably a thin-film transistor, a memory cell, a capacitor, a battery or a photovoltaic cell. Use of the method according to any of claims 1 to 12 in the manufacture of an optical coating.