NL1042961B1 - Oscillator phase_noise reduction - Google Patents

Abstract

Electronic systems like transmitters and receivers require an oscillator for up- and down-conversion of the RF signals, and/or a clock for signal-synchronisation. The phase-noise in these oscillators influences the overall system performance. For instance phase-noise causes "reciprocal mixing" in receivers, whereby an adjacent channel during a frequency conversion or mixing is transferred to the wanted 20 channel. A lower phase-noise reduces the effect of reciprocal mixing and improves system performance. This document describes a system that reduces the phase-noise of an oscillator. 25 STATE OF THE ART The development of oscillators with low phase-noise is considered an important topic. Several ways for analysing oscillator phase-noise have been developed during the last decades, see for instance Reference [1]. Most importantly, the 30 oscillator swing should be maximised while noise generated by all components should be minimised in order to obtain maximum phase-noise performance. In most case the power consumption needs to be increased in order to meet the required phase-noise performance. In the case of f.i. ring-oscillators, the limited Q of the resonator limits the obtainable phase-noise such that this oscillator type 35 cannot be used in certain applications. In the majority of the applications, the requirements on phase-noise, tuning range, power consumption, etc is a multi- dimensional compromise. In most applications the oscillator is used in a phase-locked loop (PLL). The oscillator output signal is divided in frequency, and this frequency divided signal is 40 compared to a reference frequency. The differente signal is fed back to the oscillator. When the PLL is locked, the overall phase-noise within the feedback loop bandwidth is governed by the phase-noise of the reference signal, while outside 1042961 1042961