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Ding, 2017 - Google Patents

Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking

Ding, 2017

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Document ID
7206666665303721352
Author
Ding H
Publication year

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With the help of the parallelism provided by the fine-grained architecture, hardware accelerators on Field Programmable Gate Arrays (FPGAs) can significantly improve the performance of many applications. However, designers are required to have excellent …
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Classifications

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    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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