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Rekik et al., 2013 - Google Patents

Virtual prototyping of multiprocessor architectures using the open virtual platform

Rekik et al., 2013

Document ID
4011655036643966381
Author
Rekik W
Said M
Amor N
Abid M
Publication year
Publication venue
2013 International Conference on Computer Applications Technology (ICCAT)

External Links

Snippet

The complexity of System on Chip (SoC) design is increasing continuously with the use of MultiProcessor System on Chip (MPSoC) architectures. Mastering the complexity of these systems with a typical co-design workflow is really recommended. As such, computer aided …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
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    • G06F9/44—Arrangements for executing specific programmes
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    • G06F9/45533—Hypervisors; Virtual machine monitors
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    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
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    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
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