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ip-xact
Here are 13 public repositories matching this topic...
Translates IPXACT XML to synthesizable VHDL or SystemVerilog
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Jun 22, 2024 - Python
Import and export IP-XACT XML register models
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Oct 15, 2024 - Python
This repository provides the IEEE 1685 IP-XACT schema files for a Git submodule integration.
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Nov 17, 2024 - HTML
IP-XACT packaging of Pulpino by pulp-platform.org: https://github.com/pulp-platform/pulpino
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Dec 11, 2019 - Verilog
Library containing various VHDL IPs
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Jan 5, 2024 - SystemVerilog
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